if_iy.c revision 1.45
1 /* $NetBSD: if_iy.c,v 1.45 2000/12/14 06:59:02 thorpej Exp $ */ 2 /* #define IYDEBUG */ 3 /* #define IYMEMDEBUG */ 4 5 /*- 6 * Copyright (c) 1996 The NetBSD Foundation, Inc. 7 * All rights reserved. 8 * 9 * This code is derived from software contributed to The NetBSD Foundation 10 * by Ignatios Souvatzis. 11 * 12 * Redistribution and use in source and binary forms, with or without 13 * modification, are permitted provided that the following conditions 14 * are met: 15 * 1. Redistributions of source code must retain the above copyright 16 * notice, this list of conditions and the following disclaimer. 17 * 2. Redistributions in binary form must reproduce the above copyright 18 * notice, this list of conditions and the following disclaimer in the 19 * documentation and/or other materials provided with the distribution. 20 * 3. All advertising materials mentioning features or use of this software 21 * must display the following acknowledgement: 22 * This product includes software developed by the NetBSD 23 * Foundation, Inc. and its contributors. 24 * 4. Neither the name of The NetBSD Foundation nor the names of its 25 * contributors may be used to endorse or promote products derived 26 * from this software without specific prior written permission. 27 * 28 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 29 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 30 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 31 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 32 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 33 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 34 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 35 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 36 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 37 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 38 * POSSIBILITY OF SUCH DAMAGE. 39 */ 40 41 /* 42 * Supported hardware: 43 * 44 * - Intel EtherExpress Pro/10. 45 * - possibly other boards using the i82595 chip and no special tweaks. 46 */ 47 48 #include "opt_inet.h" 49 #include "opt_ns.h" 50 #include "bpfilter.h" 51 #include "rnd.h" 52 53 #include <sys/param.h> 54 #include <sys/systm.h> 55 #include <sys/mbuf.h> 56 #include <sys/buf.h> 57 #include <sys/protosw.h> 58 #include <sys/socket.h> 59 #include <sys/ioctl.h> 60 #include <sys/errno.h> 61 #include <sys/syslog.h> 62 #include <sys/device.h> 63 #include <sys/endian.h> 64 #if NRND > 0 65 #include <sys/rnd.h> 66 #endif 67 68 #include <net/if.h> 69 #include <net/if_types.h> 70 #include <net/if_dl.h> 71 72 #include <net/if_ether.h> 73 74 #if NBPFILTER > 0 75 #include <net/bpf.h> 76 #include <net/bpfdesc.h> 77 #endif 78 79 #ifdef INET 80 #include <netinet/in.h> 81 #include <netinet/in_systm.h> 82 #include <netinet/in_var.h> 83 #include <netinet/ip.h> 84 #include <netinet/if_inarp.h> 85 #endif 86 87 #ifdef NS 88 #include <netns/ns.h> 89 #include <netns/ns_if.h> 90 #endif 91 92 #if defined(SIOCSIFMEDIA) 93 #include <net/if_media.h> 94 #endif 95 96 #include <machine/cpu.h> 97 #include <machine/bus.h> 98 #include <machine/intr.h> 99 100 #include <dev/isa/isareg.h> 101 #include <dev/isa/isavar.h> 102 #include <dev/ic/i82595reg.h> 103 104 /* XXX why isn't this centralized? */ 105 #ifndef __BUS_SPACE_HAS_STREAM_METHODS 106 #define bus_space_write_stream_2 bus_space_write_2 107 #define bus_space_write_multi_stream_2 bus_space_write_multi_2 108 #define bus_space_read_stream_2 bus_space_read_2 109 #define bus_space_read_multi_stream_2 bus_space_read_multi_2 110 #endif /* __BUS_SPACE_HAS_STREAM_METHODS */ 111 112 /* 113 * Ethernet status, per interface. 114 */ 115 struct iy_softc { 116 struct device sc_dev; 117 void *sc_ih; 118 119 bus_space_tag_t sc_iot; 120 bus_space_handle_t sc_ioh; 121 122 struct ethercom sc_ethercom; 123 124 struct ifmedia iy_ifmedia; 125 int iy_media; 126 127 int mappedirq; 128 129 int hard_vers; 130 131 int promisc; 132 133 int sram, tx_size, rx_size; 134 135 int tx_start, tx_end, tx_last; 136 int rx_start; 137 138 int doing_mc_setup; 139 #ifdef IYDEBUG 140 int sc_debug; 141 #endif 142 143 #if NRND > 0 144 rndsource_element_t rnd_source; 145 #endif 146 }; 147 148 void iywatchdog __P((struct ifnet *)); 149 int iyioctl __P((struct ifnet *, u_long, caddr_t)); 150 int iyintr __P((void *)); 151 void iyinit __P((struct iy_softc *)); 152 void iystop __P((struct iy_softc *)); 153 void iystart __P((struct ifnet *)); 154 155 void iy_intr_rx __P((struct iy_softc *)); 156 void iy_intr_tx __P((struct iy_softc *)); 157 158 void iyreset __P((struct iy_softc *)); 159 void iy_readframe __P((struct iy_softc *, int)); 160 void iy_drop_packet_buffer __P((struct iy_softc *)); 161 void iy_find_mem_size __P((struct iy_softc *)); 162 void iyrint __P((struct iy_softc *)); 163 void iytint __P((struct iy_softc *)); 164 void iyxmit __P((struct iy_softc *)); 165 static void iy_mc_setup __P((struct iy_softc *)); 166 static void iy_mc_reset __P((struct iy_softc *)); 167 void iyget __P((struct iy_softc *, bus_space_tag_t, bus_space_handle_t, int)); 168 void iyprobemem __P((struct iy_softc *)); 169 static __inline void eepromwritebit __P((bus_space_tag_t, bus_space_handle_t, 170 int)); 171 static __inline int eepromreadbit __P((bus_space_tag_t, bus_space_handle_t)); 172 173 #ifdef IYDEBUGX 174 void print_rbd __P((volatile struct iy_recv_buf_desc *)); 175 176 int in_ifrint = 0; 177 int in_iftint = 0; 178 #endif 179 180 int iy_mediachange __P((struct ifnet *)); 181 void iy_mediastatus __P((struct ifnet *, struct ifmediareq *)); 182 183 int iyprobe __P((struct device *, struct cfdata *, void *)); 184 void iyattach __P((struct device *, struct device *, void *)); 185 186 static u_int16_t eepromread __P((bus_space_tag_t, bus_space_handle_t, int)); 187 188 static int eepromreadall __P((bus_space_tag_t, bus_space_handle_t, u_int16_t *, 189 int)); 190 191 struct cfattach iy_ca = { 192 sizeof(struct iy_softc), iyprobe, iyattach 193 }; 194 195 static u_int8_t eepro_irqmap[] = EEPP_INTMAP; 196 static u_int8_t eepro_revirqmap[] = EEPP_RINTMAP; 197 198 int 199 iyprobe(parent, match, aux) 200 struct device *parent; 201 struct cfdata *match; 202 void *aux; 203 { 204 struct isa_attach_args *ia = aux; 205 u_int16_t eaddr[8]; 206 207 bus_space_tag_t iot; 208 bus_space_handle_t ioh; 209 210 u_int8_t c, d; 211 212 iot = ia->ia_iot; 213 214 if (ia->ia_iobase == IOBASEUNK) 215 return 0; 216 217 if (bus_space_map(iot, ia->ia_iobase, 16, 0, &ioh)) 218 return 0; 219 220 /* try to find the round robin sig: */ 221 222 c = bus_space_read_1(iot, ioh, ID_REG); 223 if ((c & ID_REG_MASK) != ID_REG_SIG) 224 goto out; 225 226 d = bus_space_read_1(iot, ioh, ID_REG); 227 if ((d & ID_REG_MASK) != ID_REG_SIG) 228 goto out; 229 230 if (((d-c) & R_ROBIN_BITS) != 0x40) 231 goto out; 232 233 d = bus_space_read_1(iot, ioh, ID_REG); 234 if ((d & ID_REG_MASK) != ID_REG_SIG) 235 goto out; 236 237 if (((d-c) & R_ROBIN_BITS) != 0x80) 238 goto out; 239 240 d = bus_space_read_1(iot, ioh, ID_REG); 241 if ((d & ID_REG_MASK) != ID_REG_SIG) 242 goto out; 243 244 if (((d-c) & R_ROBIN_BITS) != 0xC0) 245 goto out; 246 247 d = bus_space_read_1(iot, ioh, ID_REG); 248 if ((d & ID_REG_MASK) != ID_REG_SIG) 249 goto out; 250 251 if (((d-c) & R_ROBIN_BITS) != 0x00) 252 goto out; 253 254 #ifdef IYDEBUG 255 printf("iyprobe verified working ID reg.\n"); 256 #endif 257 258 if (eepromreadall(iot, ioh, eaddr, 8)) 259 goto out; 260 261 if (ia->ia_irq == IRQUNK) 262 ia->ia_irq = eepro_irqmap[eaddr[EEPPW1] & EEPP_Int]; 263 264 if (ia->ia_irq >= sizeof(eepro_revirqmap)) 265 goto out; 266 267 if (eepro_revirqmap[ia->ia_irq] == 0xff) 268 goto out; 269 270 /* now lets reset the chip */ 271 272 bus_space_write_1(iot, ioh, COMMAND_REG, RESET_CMD); 273 delay(200); 274 275 ia->ia_iosize = 16; 276 277 bus_space_unmap(iot, ioh, 16); 278 return 1; /* found */ 279 out: 280 bus_space_unmap(iot, ioh, 16); 281 return 0; 282 } 283 284 void 285 iyattach(parent, self, aux) 286 struct device *parent, *self; 287 void *aux; 288 { 289 struct iy_softc *sc = (void *)self; 290 struct isa_attach_args *ia = aux; 291 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 292 bus_space_tag_t iot; 293 bus_space_handle_t ioh; 294 unsigned temp; 295 u_int16_t eaddr[8]; 296 u_int8_t myaddr[ETHER_ADDR_LEN]; 297 int eirq; 298 299 iot = ia->ia_iot; 300 301 if (bus_space_map(iot, ia->ia_iobase, 16, 0, &ioh)) { 302 printf(": can't map i/o space\n"); 303 return; 304 } 305 306 sc->sc_iot = iot; 307 sc->sc_ioh = ioh; 308 309 sc->mappedirq = eepro_revirqmap[ia->ia_irq]; 310 311 /* now let's reset the chip */ 312 313 bus_space_write_1(iot, ioh, COMMAND_REG, RESET_CMD); 314 delay(200); 315 316 iyprobemem(sc); 317 318 bcopy(sc->sc_dev.dv_xname, ifp->if_xname, IFNAMSIZ); 319 ifp->if_softc = sc; 320 ifp->if_start = iystart; 321 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_NOTRAILERS 322 | IFF_MULTICAST; 323 324 sc->doing_mc_setup = 0; 325 326 ifp->if_ioctl = iyioctl; 327 ifp->if_watchdog = iywatchdog; 328 329 IFQ_SET_READY(&ifp->if_snd); 330 331 (void)eepromreadall(iot, ioh, eaddr, 8); 332 sc->hard_vers = eaddr[EEPW6] & EEPP_BoardRev; 333 334 #ifdef DIAGNOSTICS 335 if ((eaddr[EEPPEther0] != 336 eepromread(iot, ioh, EEPPEther0a)) && 337 (eaddr[EEPPEther1] != 338 eepromread(iot, ioh, EEPPEther1a)) && 339 (eaddr[EEPPEther2] != 340 eepromread(iot, ioh, EEPPEther2a))) 341 342 printf("EEPROM Ethernet address differs from copy\n"); 343 #endif 344 345 myaddr[1] = eaddr[EEPPEther0] & 0xFF; 346 myaddr[0] = eaddr[EEPPEther0] >> 8; 347 myaddr[3] = eaddr[EEPPEther1] & 0xFF; 348 myaddr[2] = eaddr[EEPPEther1] >> 8; 349 myaddr[5] = eaddr[EEPPEther2] & 0xFF; 350 myaddr[4] = eaddr[EEPPEther2] >> 8; 351 352 ifmedia_init(&sc->iy_ifmedia, 0, iy_mediachange, iy_mediastatus); 353 ifmedia_add(&sc->iy_ifmedia, IFM_ETHER | IFM_10_2, 0, NULL); 354 ifmedia_add(&sc->iy_ifmedia, IFM_ETHER | IFM_10_5, 0, NULL); 355 ifmedia_add(&sc->iy_ifmedia, IFM_ETHER | IFM_10_T, 0, NULL); 356 ifmedia_add(&sc->iy_ifmedia, IFM_ETHER | IFM_AUTO, 0, NULL); 357 ifmedia_set(&sc->iy_ifmedia, IFM_ETHER | IFM_AUTO); 358 /* Attach the interface. */ 359 if_attach(ifp); 360 ether_ifattach(ifp, myaddr); 361 printf(": address %s, rev. %d, %d kB\n", 362 ether_sprintf(myaddr), 363 sc->hard_vers, sc->sram/1024); 364 365 eirq = eepro_irqmap[eaddr[EEPPW1] & EEPP_Int]; 366 if (eirq != ia->ia_irq) 367 printf("%s: EEPROM irq setting %d ignored\n", 368 sc->sc_dev.dv_xname, eirq); 369 370 sc->sc_ih = isa_intr_establish(ia->ia_ic, ia->ia_irq, IST_EDGE, 371 IPL_NET, iyintr, sc); 372 373 #if NRND > 0 374 rnd_attach_source(&sc->rnd_source, sc->sc_dev.dv_xname, 375 RND_TYPE_NET, 0); 376 #endif 377 378 temp = bus_space_read_1(iot, ioh, INT_NO_REG); 379 bus_space_write_1(iot, ioh, INT_NO_REG, (temp & 0xf8) | sc->mappedirq); 380 } 381 382 void 383 iystop(sc) 384 struct iy_softc *sc; 385 { 386 bus_space_tag_t iot; 387 bus_space_handle_t ioh; 388 #ifdef IYDEBUG 389 u_int p, v; 390 #endif 391 392 iot = sc->sc_iot; 393 ioh = sc->sc_ioh; 394 395 bus_space_write_1(iot, ioh, COMMAND_REG, RCV_DISABLE_CMD); 396 397 bus_space_write_1(iot, ioh, INT_MASK_REG, ALL_INTS); 398 bus_space_write_1(iot, ioh, STATUS_REG, ALL_INTS); 399 400 bus_space_write_1(iot, ioh, COMMAND_REG, RESET_CMD); 401 delay(200); 402 #ifdef IYDEBUG 403 printf("%s: dumping tx chain (st 0x%x end 0x%x last 0x%x)\n", 404 sc->sc_dev.dv_xname, sc->tx_start, sc->tx_end, sc->tx_last); 405 p = sc->tx_last; 406 if (!p) 407 p = sc->tx_start; 408 do { 409 char sbuf[128]; 410 411 bus_space_write_2(iot, ioh, HOST_ADDR_REG, p); 412 413 v = le16toh(bus_space_read_stream_2(iot, ioh, MEM_PORT_REG)); 414 bitmask_snprintf(v, "\020\006Ab\010Dn", sbuf, sizeof(sbuf)); 415 printf("0x%04x: %s ", p, sbuf); 416 417 v = le16toh(bus_space_read_stream_2(iot, ioh, MEM_PORT_REG)); 418 bitmask_snprintf(v, "\020\6MAX_COL\7HRT_BEAT\010TX_DEF\011UND_RUN\012JERR\013LST_CRS\014LTCOL\016TX_OK\020COLL", 419 sbuf, sizeof(sbuf)); 420 printf("0x%s", sbuf); 421 422 p = le16toh(bus_space_read_stream_2(iot, ioh, MEM_PORT_REG)); 423 printf(" 0x%04x", p); 424 425 v = le16toh(bus_space_read_stream_2(iot, ioh, MEM_PORT_REG)); 426 bitmask_snprintf(v, "\020\020Ch", sbuf, sizeof(sbuf)); 427 printf(" 0x%s\n", sbuf); 428 429 } while (v & 0x8000); 430 #endif 431 sc->tx_start = sc->tx_end = sc->rx_size; 432 sc->tx_last = 0; 433 sc->sc_ethercom.ec_if.if_flags &= ~(IFF_RUNNING|IFF_OACTIVE); 434 } 435 436 void 437 iyreset(sc) 438 struct iy_softc *sc; 439 { 440 int s; 441 s = splnet(); 442 iystop(sc); 443 iyinit(sc); 444 splx(s); 445 } 446 447 void 448 iyinit(sc) 449 struct iy_softc *sc; 450 { 451 int i; 452 unsigned temp; 453 struct ifnet *ifp; 454 bus_space_tag_t iot; 455 bus_space_handle_t ioh; 456 457 iot = sc->sc_iot; 458 ioh = sc->sc_ioh; 459 460 ifp = &sc->sc_ethercom.ec_if; 461 #ifdef IYDEBUG 462 printf("ifp is %p\n", ifp); 463 #endif 464 465 bus_space_write_1(iot, ioh, 0, BANK_SEL(2)); 466 467 temp = bus_space_read_1(iot, ioh, EEPROM_REG); 468 if (temp & 0x10) 469 bus_space_write_1(iot, ioh, EEPROM_REG, temp & ~0x10); 470 471 for (i=0; i<6; ++i) { 472 bus_space_write_1(iot, ioh, I_ADD(i), LLADDR(ifp->if_sadl)[i]); 473 } 474 475 temp = bus_space_read_1(iot, ioh, REG1); 476 bus_space_write_1(iot, ioh, REG1, 477 temp | XMT_CHAIN_INT | XMT_CHAIN_ERRSTOP | RCV_DISCARD_BAD); 478 479 if (ifp->if_flags & (IFF_PROMISC|IFF_ALLMULTI)) { 480 temp = MATCH_ALL; 481 } else if (sc->sc_ethercom.ec_multicnt) { 482 temp = MATCH_MULTI; 483 } else 484 temp = MATCH_ID; 485 486 bus_space_write_1(iot, ioh, RECV_MODES_REG, temp); 487 488 #ifdef IYDEBUG 489 { 490 char sbuf[128]; 491 492 bitmask_snprintf(temp, "\020\1PRMSC\2NOBRDST\3SEECRC\4LENGTH\5NOSaIns\6MultiIA", 493 sbuf, sizeof(sbuf)); 494 printf("%s: RECV_MODES set to %s\n", sc->sc_dev.dv_xname, sbuf); 495 } 496 #endif 497 /* XXX VOODOO */ 498 temp = bus_space_read_1(iot, ioh, MEDIA_SELECT); 499 bus_space_write_1(iot, ioh, MEDIA_SELECT, temp); 500 /* XXX END OF VOODOO */ 501 502 503 delay(500000); /* for the hardware to test for the connector */ 504 505 temp = bus_space_read_1(iot, ioh, MEDIA_SELECT); 506 #ifdef IYDEBUG 507 { 508 char sbuf[128]; 509 510 bitmask_snprintf(temp, "\020\1LnkInDis\2PolCor\3TPE\4JabberDis\5NoAport\6BNC", 511 sbuf, sizeof(sbuf)); 512 printf("%s: media select was 0x%s ", sc->sc_dev.dv_xname, sbuf); 513 } 514 #endif 515 temp = (temp & TEST_MODE_MASK); 516 517 switch(IFM_SUBTYPE(sc->iy_ifmedia.ifm_media)) { 518 case IFM_10_5: 519 temp &= ~ (BNC_BIT | TPE_BIT); 520 break; 521 522 case IFM_10_2: 523 temp = (temp & ~TPE_BIT) | BNC_BIT; 524 break; 525 526 case IFM_10_T: 527 temp = (temp & ~BNC_BIT) | TPE_BIT; 528 break; 529 default: 530 /* nothing; leave as it is */ 531 } 532 switch (temp & (BNC_BIT | TPE_BIT)) { 533 case BNC_BIT: 534 sc->iy_media = IFM_ETHER | IFM_10_2; 535 break; 536 case TPE_BIT: 537 sc->iy_media = IFM_ETHER | IFM_10_T; 538 break; 539 default: 540 sc->iy_media = IFM_ETHER | IFM_10_5; 541 } 542 543 bus_space_write_1(iot, ioh, MEDIA_SELECT, temp); 544 #ifdef IYDEBUG 545 { 546 char sbuf[128]; 547 548 bitmask_snprintf(temp, "\020\1LnkInDis\2PolCor\3TPE\4JabberDis\5NoAport\6BNC", 549 sbuf, sizeof(sbuf)); 550 printf("changed to 0x%s\n", sbuf); 551 } 552 #endif 553 554 bus_space_write_1(iot, ioh, 0, BANK_SEL(0)); 555 bus_space_write_1(iot, ioh, INT_MASK_REG, ALL_INTS); 556 bus_space_write_1(iot, ioh, 0, BANK_SEL(1)); 557 558 temp = bus_space_read_1(iot, ioh, INT_NO_REG); 559 bus_space_write_1(iot, ioh, INT_NO_REG, (temp & 0xf8) | sc->mappedirq); 560 561 #ifdef IYDEBUG 562 { 563 char sbuf[128]; 564 565 bitmask_snprintf(temp, "\020\4bad_irq\010flash/boot present", 566 sbuf, sizeof(sbuf)); 567 printf("%s: int no was %s\n", sc->sc_dev.dv_xname, sbuf); 568 569 temp = bus_space_read_1(iot, ioh, INT_NO_REG); 570 bitmask_snprintf(temp, "\020\4bad_irq\010flash/boot present", 571 sbuf, sizeof(sbuf)); 572 printf("%s: int no now %s\n", sc->sc_dev.dv_xname, sbuf); 573 } 574 #endif 575 576 577 bus_space_write_1(iot, ioh, RCV_LOWER_LIMIT_REG, 0); 578 bus_space_write_1(iot, ioh, RCV_UPPER_LIMIT_REG, (sc->rx_size - 2) >> 8); 579 bus_space_write_1(iot, ioh, XMT_LOWER_LIMIT_REG, sc->rx_size >> 8); 580 bus_space_write_1(iot, ioh, XMT_UPPER_LIMIT_REG, sc->sram >> 8); 581 582 temp = bus_space_read_1(iot, ioh, REG1); 583 #ifdef IYDEBUG 584 { 585 char sbuf[128]; 586 587 bitmask_snprintf(temp, "\020\2WORD_WIDTH\010INT_ENABLE", 588 sbuf, sizeof(sbuf)); 589 printf("%s: HW access is %s\n", sc->sc_dev.dv_xname, sbuf); 590 } 591 #endif 592 bus_space_write_1(iot, ioh, REG1, temp | INT_ENABLE); /* XXX what about WORD_WIDTH? */ 593 594 #ifdef IYDEBUG 595 { 596 char sbuf[128]; 597 598 temp = bus_space_read_1(iot, ioh, REG1); 599 bitmask_snprintf(temp, "\020\2WORD_WIDTH\010INT_ENABLE", 600 sbuf, sizeof(sbuf)); 601 printf("%s: HW access is %s\n", sc->sc_dev.dv_xname, sbuf); 602 } 603 #endif 604 605 bus_space_write_1(iot, ioh, 0, BANK_SEL(0)); 606 607 bus_space_write_1(iot, ioh, INT_MASK_REG, ALL_INTS & ~(RX_BIT|TX_BIT)); 608 bus_space_write_1(iot, ioh, STATUS_REG, ALL_INTS); /* clear ints */ 609 610 bus_space_write_2(iot, ioh, RCV_START_LOW, 0); 611 bus_space_write_2(iot, ioh, RCV_STOP_LOW, sc->rx_size - 2); 612 sc->rx_start = 0; 613 614 bus_space_write_1(iot, ioh, 0, SEL_RESET_CMD); 615 delay(200); 616 617 bus_space_write_2(iot, ioh, XMT_ADDR_REG, sc->rx_size); 618 619 sc->tx_start = sc->tx_end = sc->rx_size; 620 sc->tx_last = 0; 621 622 bus_space_write_1(iot, ioh, 0, RCV_ENABLE_CMD); 623 624 ifp->if_flags |= IFF_RUNNING; 625 ifp->if_flags &= ~IFF_OACTIVE; 626 } 627 628 void 629 iystart(ifp) 630 struct ifnet *ifp; 631 { 632 struct iy_softc *sc; 633 634 635 struct mbuf *m0, *m; 636 u_int len, pad, last, end; 637 u_int llen, residual; 638 int avail; 639 caddr_t data; 640 u_int16_t resval, stat; 641 bus_space_tag_t iot; 642 bus_space_handle_t ioh; 643 644 #ifdef IYDEBUG 645 printf("iystart called\n"); 646 #endif 647 sc = ifp->if_softc; 648 649 if ((ifp->if_flags & (IFF_RUNNING | IFF_OACTIVE)) != IFF_RUNNING) 650 return; 651 652 iot = sc->sc_iot; 653 ioh = sc->sc_ioh; 654 655 for (;;) { 656 IFQ_POLL(&ifp->if_snd, m0); 657 if (m0 == NULL) 658 break; 659 #ifdef IYDEBUG 660 printf("%s: trying to write another packet to the hardware\n", 661 sc->sc_dev.dv_xname); 662 #endif 663 664 /* We need to use m->m_pkthdr.len, so require the header */ 665 if ((m0->m_flags & M_PKTHDR) == 0) 666 panic("iystart: no header mbuf"); 667 668 len = m0->m_pkthdr.len; 669 pad = len & 1; 670 671 #ifdef IYDEBUG 672 printf("%s: length is %d.\n", sc->sc_dev.dv_xname, len); 673 #endif 674 if (len < (ETHER_MIN_LEN - ETHER_CRC_LEN)) { 675 pad = ETHER_MIN_LEN - ETHER_CRC_LEN - len; 676 } 677 678 if (len + pad > ETHER_MAX_LEN) { 679 /* packet is obviously too large: toss it */ 680 ++ifp->if_oerrors; 681 IF_DEQUEUE(&ifp->if_snd, m0); 682 m_freem(m0); 683 continue; 684 } 685 686 #if NBPFILTER > 0 687 if (ifp->if_bpf) 688 bpf_mtap(ifp->if_bpf, m0); 689 #endif 690 691 avail = sc->tx_start - sc->tx_end; 692 if (avail <= 0) 693 avail += sc->tx_size; 694 695 #ifdef IYDEBUG 696 printf("%s: avail is %d.\n", sc->sc_dev.dv_xname, avail); 697 #endif 698 /* 699 * we MUST RUN at splnet here --- 700 * XXX todo: or even turn off the boards ints ??? hm... 701 */ 702 703 /* See if there is room to put another packet in the buffer. */ 704 705 if ((len+pad+2*I595_XMT_HDRLEN) > avail) { 706 #ifdef IYDEBUG 707 printf("%s: len = %d, avail = %d, setting OACTIVE\n", 708 sc->sc_dev.dv_xname, len, avail); 709 #endif 710 ifp->if_flags |= IFF_OACTIVE; 711 return; 712 } 713 714 /* we know it fits in the hardware now, so dequeue it */ 715 IFQ_DEQUEUE(&ifp->if_snd, m0); 716 717 last = sc->tx_end; 718 end = last + pad + len + I595_XMT_HDRLEN; 719 720 if (end >= sc->sram) { 721 if ((sc->sram - last) <= I595_XMT_HDRLEN) { 722 /* keep header in one piece */ 723 last = sc->rx_size; 724 end = last + pad + len + I595_XMT_HDRLEN; 725 } else 726 end -= sc->tx_size; 727 } 728 729 bus_space_write_2(iot, ioh, HOST_ADDR_REG, last); 730 bus_space_write_stream_2(iot, ioh, MEM_PORT_REG, 731 htole16(XMT_CMD)); 732 733 bus_space_write_2(iot, ioh, MEM_PORT_REG, 0); 734 bus_space_write_2(iot, ioh, MEM_PORT_REG, 0); 735 736 bus_space_write_stream_2(iot, ioh, MEM_PORT_REG, 737 htole16(len + pad)); 738 739 residual = resval = 0; 740 741 while ((m = m0)!=0) { 742 data = mtod(m, caddr_t); 743 llen = m->m_len; 744 if (residual) { 745 #ifdef IYDEBUG 746 printf("%s: merging residual with next mbuf.\n", 747 sc->sc_dev.dv_xname); 748 #endif 749 resval |= *data << 8; 750 bus_space_write_stream_2(iot, ioh, 751 MEM_PORT_REG, resval); 752 --llen; 753 ++data; 754 } 755 if (llen > 1) 756 bus_space_write_multi_stream_2(iot, ioh, 757 MEM_PORT_REG, data, llen>>1); 758 residual = llen & 1; 759 if (residual) { 760 resval = *(data + llen - 1); 761 #ifdef IYDEBUG 762 printf("%s: got odd mbuf to send.\n", 763 sc->sc_dev.dv_xname); 764 #endif 765 } 766 767 MFREE(m, m0); 768 } 769 770 if (residual) 771 bus_space_write_stream_2(iot, ioh, MEM_PORT_REG, 772 resval); 773 774 pad >>= 1; 775 while (pad-- > 0) 776 bus_space_write_stream_2(iot, ioh, MEM_PORT_REG, 0); 777 778 #ifdef IYDEBUG 779 printf("%s: new last = 0x%x, end = 0x%x.\n", 780 sc->sc_dev.dv_xname, last, end); 781 printf("%s: old start = 0x%x, end = 0x%x, last = 0x%x\n", 782 sc->sc_dev.dv_xname, sc->tx_start, sc->tx_end, sc->tx_last); 783 #endif 784 785 if (sc->tx_start != sc->tx_end) { 786 bus_space_write_2(iot, ioh, HOST_ADDR_REG, 787 sc->tx_last + XMT_COUNT); 788 789 /* 790 * XXX We keep stat in le order, to potentially save 791 * a byte swap. 792 */ 793 stat = bus_space_read_stream_2(iot, ioh, MEM_PORT_REG); 794 795 bus_space_write_2(iot, ioh, HOST_ADDR_REG, 796 sc->tx_last + XMT_CHAIN); 797 798 bus_space_write_stream_2(iot, ioh, MEM_PORT_REG, 799 htole16(last)); 800 801 bus_space_write_stream_2(iot, ioh, MEM_PORT_REG, 802 stat | htole16(CHAIN)); 803 #ifdef IYDEBUG 804 printf("%s: setting 0x%x to 0x%x\n", 805 sc->sc_dev.dv_xname, sc->tx_last + XMT_COUNT, 806 le16toh(stat) | CHAIN); 807 #endif 808 } 809 stat = bus_space_read_2(iot, ioh, MEM_PORT_REG); /* dummy read */ 810 811 /* XXX todo: enable ints here if disabled */ 812 813 ++ifp->if_opackets; 814 815 if (sc->tx_start == sc->tx_end) { 816 bus_space_write_2(iot, ioh, XMT_ADDR_REG, last); 817 bus_space_write_1(iot, ioh, 0, XMT_CMD); 818 sc->tx_start = last; 819 #ifdef IYDEBUG 820 printf("%s: writing 0x%x to XAR and giving XCMD\n", 821 sc->sc_dev.dv_xname, last); 822 #endif 823 } else { 824 bus_space_write_1(iot, ioh, 0, RESUME_XMT_CMD); 825 #ifdef IYDEBUG 826 printf("%s: giving RESUME_XCMD\n", 827 sc->sc_dev.dv_xname); 828 #endif 829 } 830 sc->tx_last = last; 831 sc->tx_end = end; 832 } 833 } 834 835 836 static __inline void 837 eepromwritebit(iot, ioh, what) 838 bus_space_tag_t iot; 839 bus_space_handle_t ioh; 840 int what; 841 { 842 bus_space_write_1(iot, ioh, EEPROM_REG, what); 843 delay(1); 844 bus_space_write_1(iot, ioh, EEPROM_REG, what|EESK); 845 delay(1); 846 bus_space_write_1(iot, ioh, EEPROM_REG, what); 847 delay(1); 848 } 849 850 static __inline int 851 eepromreadbit(iot, ioh) 852 bus_space_tag_t iot; 853 bus_space_handle_t ioh; 854 { 855 int b; 856 857 bus_space_write_1(iot, ioh, EEPROM_REG, EECS|EESK); 858 delay(1); 859 b = bus_space_read_1(iot, ioh, EEPROM_REG); 860 bus_space_write_1(iot, ioh, EEPROM_REG, EECS); 861 delay(1); 862 863 return ((b & EEDO) != 0); 864 } 865 866 static u_int16_t 867 eepromread(iot, ioh, offset) 868 bus_space_tag_t iot; 869 bus_space_handle_t ioh; 870 int offset; 871 { 872 volatile int i; 873 volatile int j; 874 volatile u_int16_t readval; 875 876 bus_space_write_1(iot, ioh, 0, BANK_SEL(2)); 877 delay(1); 878 bus_space_write_1(iot, ioh, EEPROM_REG, EECS); /* XXXX??? */ 879 delay(1); 880 881 eepromwritebit(iot, ioh, EECS|EEDI); 882 eepromwritebit(iot, ioh, EECS|EEDI); 883 eepromwritebit(iot, ioh, EECS); 884 885 for (j=5; j>=0; --j) { 886 if ((offset>>j) & 1) 887 eepromwritebit(iot, ioh, EECS|EEDI); 888 else 889 eepromwritebit(iot, ioh, EECS); 890 } 891 892 for (readval=0, i=0; i<16; ++i) { 893 readval<<=1; 894 readval |= eepromreadbit(iot, ioh); 895 } 896 897 bus_space_write_1(iot, ioh, EEPROM_REG, 0|EESK); 898 delay(1); 899 bus_space_write_1(iot, ioh, EEPROM_REG, 0); 900 901 bus_space_write_1(iot, ioh, COMMAND_REG, BANK_SEL(0)); 902 903 return readval; 904 } 905 906 /* 907 * Device timeout/watchdog routine. Entered if the device neglects to generate 908 * an interrupt after a transmit has been started on it. 909 */ 910 void 911 iywatchdog(ifp) 912 struct ifnet *ifp; 913 { 914 struct iy_softc *sc = ifp->if_softc; 915 916 log(LOG_ERR, "%s: device timeout\n", sc->sc_dev.dv_xname); 917 ++sc->sc_ethercom.ec_if.if_oerrors; 918 iyreset(sc); 919 } 920 921 /* 922 * What to do upon receipt of an interrupt. 923 */ 924 int 925 iyintr(arg) 926 void *arg; 927 { 928 struct iy_softc *sc = arg; 929 bus_space_tag_t iot; 930 bus_space_handle_t ioh; 931 932 u_short status; 933 934 iot = sc->sc_iot; 935 ioh = sc->sc_ioh; 936 937 status = bus_space_read_1(iot, ioh, STATUS_REG); 938 #ifdef IYDEBUG 939 if (status & ALL_INTS) { 940 char sbuf[128]; 941 942 bitmask_snprintf(status, "\020\1RX_STP\2RX\3TX\4EXEC", 943 sbuf, sizeof(sbuf)); 944 printf("%s: got interupt %s", sc->sc_dev.dv_xname, sbuf); 945 946 if (status & EXEC_INT) { 947 bitmask_snprintf(bus_space_read_1(iot, ioh, 0), 948 "\020\6ABORT", sbuf, sizeof(sbuf)); 949 printf(" event %s\n", sbuf); 950 } else 951 printf("\n"); 952 } 953 #endif 954 if ((status & (RX_INT | TX_INT)) == 0) 955 return 0; 956 957 if (status & RX_INT) { 958 iy_intr_rx(sc); 959 bus_space_write_1(iot, ioh, STATUS_REG, RX_INT); 960 } 961 if (status & TX_INT) { 962 iy_intr_tx(sc); 963 bus_space_write_1(iot, ioh, STATUS_REG, TX_INT); 964 } 965 966 #if NRND > 0 967 rnd_add_uint32(&sc->rnd_source, status); 968 #endif 969 970 return 1; 971 } 972 973 void 974 iyget(sc, iot, ioh, rxlen) 975 struct iy_softc *sc; 976 bus_space_tag_t iot; 977 bus_space_handle_t ioh; 978 int rxlen; 979 { 980 struct mbuf *m, *top, **mp; 981 struct ifnet *ifp; 982 int len; 983 984 ifp = &sc->sc_ethercom.ec_if; 985 986 MGETHDR(m, M_DONTWAIT, MT_DATA); 987 if (m == 0) 988 goto dropped; 989 m->m_pkthdr.rcvif = ifp; 990 m->m_pkthdr.len = rxlen; 991 len = MHLEN; 992 top = 0; 993 mp = ⊤ 994 995 while (rxlen > 0) { 996 if (top) { 997 MGET(m, M_DONTWAIT, MT_DATA); 998 if (m == 0) { 999 m_freem(top); 1000 goto dropped; 1001 } 1002 len = MLEN; 1003 } 1004 if (rxlen >= MINCLSIZE) { 1005 MCLGET(m, M_DONTWAIT); 1006 if ((m->m_flags & M_EXT) == 0) { 1007 m_free(m); 1008 m_freem(top); 1009 goto dropped; 1010 } 1011 len = MCLBYTES; 1012 } 1013 len = min(rxlen, len); 1014 if (len > 1) { 1015 len &= ~1; 1016 1017 bus_space_read_multi_stream_2(iot, ioh, MEM_PORT_REG, 1018 mtod(m, caddr_t), len/2); 1019 } else { 1020 #ifdef IYDEBUG 1021 printf("%s: received odd mbuf\n", sc->sc_dev.dv_xname); 1022 #endif 1023 *(mtod(m, caddr_t)) = bus_space_read_stream_2(iot, ioh, 1024 MEM_PORT_REG); 1025 } 1026 m->m_len = len; 1027 rxlen -= len; 1028 *mp = m; 1029 mp = &m->m_next; 1030 } 1031 /* XXX receive the top here */ 1032 ++ifp->if_ipackets; 1033 1034 #if NBPFILTER > 0 1035 if (ifp->if_bpf) 1036 bpf_mtap(ifp->if_bpf, top); 1037 #endif 1038 (*ifp->if_input)(ifp, top); 1039 return; 1040 1041 dropped: 1042 ++ifp->if_ierrors; 1043 return; 1044 } 1045 1046 void 1047 iy_intr_rx(sc) 1048 struct iy_softc *sc; 1049 { 1050 struct ifnet *ifp; 1051 bus_space_tag_t iot; 1052 bus_space_handle_t ioh; 1053 1054 u_int rxadrs, rxevnt, rxstatus, rxnext, rxlen; 1055 1056 iot = sc->sc_iot; 1057 ioh = sc->sc_ioh; 1058 ifp = &sc->sc_ethercom.ec_if; 1059 1060 rxadrs = sc->rx_start; 1061 bus_space_write_2(iot, ioh, HOST_ADDR_REG, rxadrs); 1062 rxevnt = le16toh(bus_space_read_stream_2(iot, ioh, MEM_PORT_REG)); 1063 rxnext = 0; 1064 1065 while (rxevnt == RCV_DONE) { 1066 rxstatus = le16toh(bus_space_read_stream_2(iot, ioh, 1067 MEM_PORT_REG)); 1068 rxnext = le16toh(bus_space_read_stream_2(iot, ioh, 1069 MEM_PORT_REG)); 1070 rxlen = le16toh(bus_space_read_stream_2(iot, ioh, 1071 MEM_PORT_REG)); 1072 #ifdef IYDEBUG 1073 { 1074 char sbuf[128]; 1075 1076 bitmask_snprintf(rxstatus, "\020\1RCLD\2IA_MCH\010SHORT\011OVRN\013ALGERR\014CRCERR\015LENERR\016RCVOK\020TYP", 1077 sbuf, sizeof(sbuf)); 1078 printf("%s: pck at 0x%04x stat %s next 0x%x len 0x%x\n", 1079 sc->sc_dev.dv_xname, rxadrs, sbuf, rxnext, rxlen); 1080 } 1081 #endif 1082 iyget(sc, iot, ioh, rxlen); 1083 1084 /* move stop address */ 1085 bus_space_write_2(iot, ioh, RCV_STOP_LOW, 1086 rxnext == 0 ? sc->rx_size - 2 : rxnext - 2); 1087 1088 bus_space_write_2(iot, ioh, HOST_ADDR_REG, rxnext); 1089 rxadrs = rxnext; 1090 rxevnt = le16toh(bus_space_read_stream_2(iot, ioh, 1091 MEM_PORT_REG)); 1092 } 1093 sc->rx_start = rxnext; 1094 } 1095 1096 void 1097 iy_intr_tx(sc) 1098 struct iy_softc *sc; 1099 { 1100 bus_space_tag_t iot; 1101 bus_space_handle_t ioh; 1102 struct ifnet *ifp; 1103 u_int txstatus, txstat2, txlen, txnext; 1104 1105 ifp = &sc->sc_ethercom.ec_if; 1106 iot = sc->sc_iot; 1107 ioh = sc->sc_ioh; 1108 1109 while (sc->tx_start != sc->tx_end) { 1110 bus_space_write_2(iot, ioh, HOST_ADDR_REG, sc->tx_start); 1111 txstatus = le16toh(bus_space_read_stream_2(iot, ioh, 1112 MEM_PORT_REG)); 1113 1114 if ((txstatus & (TX_DONE|CMD_MASK)) != (TX_DONE|XMT_CMD)) 1115 break; 1116 1117 txstat2 = le16toh(bus_space_read_stream_2(iot, ioh, 1118 MEM_PORT_REG)); 1119 txnext = le16toh(bus_space_read_stream_2(iot, ioh, 1120 MEM_PORT_REG)); 1121 txlen = le16toh(bus_space_read_stream_2(iot, ioh, 1122 MEM_PORT_REG)); 1123 #ifdef IYDEBUG 1124 { 1125 char sbuf[128]; 1126 1127 bitmask_snprintf(txstat2, "\020\6MAX_COL\7HRT_BEAT\010TX_DEF\011UND_RUN\012JERR\013LST_CRS\014LTCOL\016TX_OK\020COLL", 1128 sbuf, sizeof(sbuf)); 1129 printf("txstat 0x%x stat2 0x%s next 0x%x len 0x%x\n", 1130 txstatus, sbuf, txnext, txlen); 1131 } 1132 #endif 1133 if (txlen & CHAIN) 1134 sc->tx_start = txnext; 1135 else 1136 sc->tx_start = sc->tx_end; 1137 ifp->if_flags &= ~IFF_OACTIVE; 1138 1139 if ((txstat2 & 0x2000) == 0) 1140 ++ifp->if_oerrors; 1141 if (txstat2 & 0x000f) 1142 ifp->if_oerrors += txstat2 & 0x000f; 1143 } 1144 ifp->if_flags &= ~IFF_OACTIVE; 1145 } 1146 1147 int 1148 iyioctl(ifp, cmd, data) 1149 struct ifnet *ifp; 1150 u_long cmd; 1151 caddr_t data; 1152 { 1153 struct iy_softc *sc; 1154 struct ifaddr *ifa; 1155 struct ifreq *ifr; 1156 int s, error = 0; 1157 1158 sc = ifp->if_softc; 1159 ifa = (struct ifaddr *)data; 1160 ifr = (struct ifreq *)data; 1161 1162 #ifdef IYDEBUG 1163 printf("iyioctl called with ifp 0x%p (%s) cmd 0x%lx data 0x%p\n", 1164 ifp, ifp->if_xname, cmd, data); 1165 #endif 1166 1167 s = splnet(); 1168 1169 switch (cmd) { 1170 1171 case SIOCSIFADDR: 1172 ifp->if_flags |= IFF_UP; 1173 1174 switch (ifa->ifa_addr->sa_family) { 1175 #ifdef INET 1176 case AF_INET: 1177 iyinit(sc); 1178 arp_ifinit(ifp, ifa); 1179 break; 1180 #endif 1181 #ifdef NS 1182 /* XXX - This code is probably wrong. */ 1183 case AF_NS: 1184 { 1185 struct ns_addr *ina = &IA_SNS(ifa)->sns_addr; 1186 1187 if (ns_nullhost(*ina)) 1188 ina->x_host = *(union ns_host *) 1189 LLADDR(ifp->if_sadl); 1190 else 1191 bcopy(ina->x_host.c_host, LLADDR(ifp->if_sadl), 1192 ETHER_ADDR_LEN); 1193 /* Set new address. */ 1194 iyinit(sc); 1195 break; 1196 } 1197 #endif /* NS */ 1198 default: 1199 iyinit(sc); 1200 break; 1201 } 1202 break; 1203 1204 case SIOCSIFFLAGS: 1205 sc->promisc = ifp->if_flags & (IFF_PROMISC | IFF_ALLMULTI); 1206 if ((ifp->if_flags & IFF_UP) == 0 && 1207 (ifp->if_flags & IFF_RUNNING) != 0) { 1208 /* 1209 * If interface is marked down and it is running, then 1210 * stop it. 1211 */ 1212 iystop(sc); 1213 ifp->if_flags &= ~IFF_RUNNING; 1214 } else if ((ifp->if_flags & IFF_UP) != 0 && 1215 (ifp->if_flags & IFF_RUNNING) == 0) { 1216 /* 1217 * If interface is marked up and it is stopped, then 1218 * start it. 1219 */ 1220 iyinit(sc); 1221 } else { 1222 /* 1223 * Reset the interface to pick up changes in any other 1224 * flags that affect hardware registers. 1225 */ 1226 iystop(sc); 1227 iyinit(sc); 1228 } 1229 #ifdef IYDEBUGX 1230 if (ifp->if_flags & IFF_DEBUG) 1231 sc->sc_debug = IFY_ALL; 1232 else 1233 sc->sc_debug = 0; 1234 #endif 1235 break; 1236 1237 case SIOCADDMULTI: 1238 case SIOCDELMULTI: 1239 error = (cmd == SIOCADDMULTI) ? 1240 ether_addmulti(ifr, &sc->sc_ethercom): 1241 ether_delmulti(ifr, &sc->sc_ethercom); 1242 1243 if (error == ENETRESET) { 1244 /* 1245 * Multicast list has changed; set the hardware filter 1246 * accordingly. 1247 */ 1248 iyreset(sc); /* XXX can't make it work otherwise */ 1249 iy_mc_reset(sc); 1250 error = 0; 1251 } 1252 break; 1253 1254 case SIOCSIFMEDIA: 1255 case SIOCGIFMEDIA: 1256 error = ifmedia_ioctl(ifp, ifr, &sc->iy_ifmedia, cmd); 1257 break; 1258 default: 1259 error = EINVAL; 1260 } 1261 splx(s); 1262 return error; 1263 } 1264 1265 int 1266 iy_mediachange(ifp) 1267 struct ifnet *ifp; 1268 { 1269 struct iy_softc *sc = ifp->if_softc; 1270 1271 if (IFM_TYPE(sc->iy_ifmedia.ifm_media) != IFM_ETHER) 1272 return EINVAL; 1273 switch(IFM_SUBTYPE(sc->iy_ifmedia.ifm_media)) { 1274 case IFM_10_5: 1275 case IFM_10_2: 1276 case IFM_10_T: 1277 case IFM_AUTO: 1278 iystop(sc); 1279 iyinit(sc); 1280 return 0; 1281 default: 1282 return EINVAL; 1283 } 1284 } 1285 1286 void 1287 iy_mediastatus(ifp, ifmr) 1288 struct ifnet *ifp; 1289 struct ifmediareq *ifmr; 1290 { 1291 struct iy_softc *sc = ifp->if_softc; 1292 1293 ifmr->ifm_active = sc->iy_media; 1294 ifmr->ifm_status = IFM_AVALID | IFM_ACTIVE; 1295 } 1296 1297 1298 static void 1299 iy_mc_setup(sc) 1300 struct iy_softc *sc; 1301 { 1302 struct ether_multi *enm; 1303 struct ether_multistep step; 1304 struct ethercom *ecp; 1305 struct ifnet *ifp; 1306 bus_space_tag_t iot; 1307 bus_space_handle_t ioh; 1308 int avail, last /*, end*/ , len; 1309 int timeout; 1310 volatile u_int16_t dum; 1311 u_int8_t temp; 1312 1313 1314 ecp = &sc->sc_ethercom; 1315 ifp = &ecp->ec_if; 1316 1317 iot = sc->sc_iot; 1318 ioh = sc->sc_ioh; 1319 1320 len = 6 * ecp->ec_multicnt + 6; 1321 1322 avail = sc->tx_start - sc->tx_end; 1323 if (avail <= 0) 1324 avail += sc->tx_size; 1325 if (ifp->if_flags & IFF_DEBUG) 1326 printf("%s: iy_mc_setup called, %d addresses, " 1327 "%d/%d bytes needed/avail\n", ifp->if_xname, 1328 ecp->ec_multicnt, len + I595_XMT_HDRLEN, avail); 1329 1330 last = sc->rx_size; 1331 1332 bus_space_write_1(iot, ioh, 0, BANK_SEL(2)); 1333 bus_space_write_1(iot, ioh, RECV_MODES_REG, MATCH_MULTI); 1334 /* XXX VOODOO */ 1335 temp = bus_space_read_1(iot, ioh, MEDIA_SELECT); 1336 bus_space_write_1(iot, ioh, MEDIA_SELECT, temp); 1337 /* XXX END OF VOODOO */ 1338 bus_space_write_1(iot, ioh, 0, BANK_SEL(0)); 1339 bus_space_write_2(iot, ioh, HOST_ADDR_REG, last); 1340 bus_space_write_stream_2(iot, ioh, MEM_PORT_REG, htole16(MC_SETUP_CMD)); 1341 bus_space_write_2(iot, ioh, MEM_PORT_REG, 0); 1342 bus_space_write_2(iot, ioh, MEM_PORT_REG, 0); 1343 bus_space_write_stream_2(iot, ioh, MEM_PORT_REG, htole16(len)); 1344 1345 bus_space_write_multi_stream_2(iot, ioh, MEM_PORT_REG, 1346 LLADDR(ifp->if_sadl), 3); 1347 1348 ETHER_FIRST_MULTI(step, ecp, enm); 1349 while(enm) { 1350 bus_space_write_multi_stream_2(iot, ioh, MEM_PORT_REG, 1351 enm->enm_addrlo, 3); 1352 1353 ETHER_NEXT_MULTI(step, enm); 1354 } 1355 dum = bus_space_read_2(iot, ioh, MEM_PORT_REG); /* dummy read */ 1356 bus_space_write_2(iot, ioh, XMT_ADDR_REG, last); 1357 bus_space_write_1(iot, ioh, 0, MC_SETUP_CMD); 1358 1359 1360 sc->tx_start = sc->rx_size; 1361 sc->tx_end = sc->rx_size + I595_XMT_HDRLEN + len; 1362 1363 for (timeout=0; timeout<100; timeout++) { 1364 DELAY(2); 1365 if ((bus_space_read_1(iot, ioh, STATUS_REG) & EXEC_INT) == 0) 1366 continue; 1367 1368 temp = bus_space_read_1(iot, ioh, 0); 1369 bus_space_write_1(iot, ioh, STATUS_REG, EXEC_INT); 1370 #ifdef DIAGNOSTIC 1371 if (temp & 0x20) { 1372 printf("%s: mc setup failed, %d usec\n", 1373 sc->sc_dev.dv_xname, timeout * 2); 1374 } else if (((temp & 0x0f) == 0x03) && 1375 (ifp->if_flags & IFF_DEBUG)) { 1376 printf("%s: mc setup done, %d usec\n", 1377 sc->sc_dev.dv_xname, timeout * 2); 1378 } 1379 #endif 1380 break; 1381 } 1382 sc->tx_start = sc->tx_end; 1383 ifp->if_flags &= ~IFF_OACTIVE; 1384 1385 } 1386 1387 static void 1388 iy_mc_reset(sc) 1389 struct iy_softc *sc; 1390 { 1391 struct ether_multi *enm; 1392 struct ether_multistep step; 1393 struct ethercom *ecp; 1394 struct ifnet *ifp; 1395 bus_space_tag_t iot; 1396 bus_space_handle_t ioh; 1397 u_int16_t temp; 1398 1399 ecp = &sc->sc_ethercom; 1400 ifp = &ecp->ec_if; 1401 1402 iot = sc->sc_iot; 1403 ioh = sc->sc_ioh; 1404 1405 if (ecp->ec_multicnt > 63) { 1406 ifp->if_flags |= IFF_ALLMULTI; 1407 1408 } else if (ecp->ec_multicnt > 0) { 1409 /* 1410 * Step through the list of addresses. 1411 */ 1412 ETHER_FIRST_MULTI(step, ecp, enm); 1413 while(enm) { 1414 if (bcmp(enm->enm_addrlo, enm->enm_addrhi, 6) != 0) { 1415 ifp->if_flags |= IFF_ALLMULTI; 1416 goto setupmulti; 1417 } 1418 ETHER_NEXT_MULTI(step, enm); 1419 } 1420 /* OK, we really need to do it now: */ 1421 #if 0 1422 if ((ifp->if_flags & (IFF_RUNNING | IFF_OACTIVE)) 1423 != IFF_RUNNING) { 1424 ifp->if_flags |= IFF_OACTIVE; 1425 sc->want_mc_setup = 1; 1426 return; 1427 } 1428 #endif 1429 iy_mc_setup(sc); 1430 } else { 1431 ifp->if_flags &= ~IFF_ALLMULTI; 1432 } 1433 1434 setupmulti: 1435 bus_space_write_1(iot, ioh, 0, BANK_SEL(2)); 1436 if (ifp->if_flags & (IFF_PROMISC|IFF_ALLMULTI)) { 1437 temp = MATCH_ALL; 1438 } else if (sc->sc_ethercom.ec_multicnt) { 1439 temp = MATCH_MULTI; 1440 } else 1441 temp = MATCH_ID; 1442 1443 bus_space_write_1(iot, ioh, RECV_MODES_REG, temp); 1444 /* XXX VOODOO */ 1445 temp = bus_space_read_1(iot, ioh, MEDIA_SELECT); 1446 bus_space_write_1(iot, ioh, MEDIA_SELECT, temp); 1447 /* XXX END OF VOODOO */ 1448 1449 /* XXX TBD: setup hardware for all multicasts */ 1450 bus_space_write_1(iot, ioh, 0, BANK_SEL(0)); 1451 return; 1452 } 1453 1454 #ifdef IYDEBUGX 1455 void 1456 print_rbd(rbd) 1457 volatile struct ie_recv_buf_desc *rbd; 1458 { 1459 printf("RBD at %08lx:\nactual %04x, next %04x, buffer %08x\n" 1460 "length %04x, mbz %04x\n", (u_long)rbd, rbd->ie_rbd_actual, 1461 rbd->ie_rbd_next, rbd->ie_rbd_buffer, rbd->ie_rbd_length, 1462 rbd->mbz); 1463 } 1464 #endif 1465 1466 void 1467 iyprobemem(sc) 1468 struct iy_softc *sc; 1469 { 1470 bus_space_tag_t iot; 1471 bus_space_handle_t ioh; 1472 int testing; 1473 1474 iot = sc->sc_iot; 1475 ioh = sc->sc_ioh; 1476 1477 bus_space_write_1(iot, ioh, COMMAND_REG, BANK_SEL(0)); 1478 delay(1); 1479 bus_space_write_2(iot, ioh, HOST_ADDR_REG, 4096-2); 1480 bus_space_write_2(iot, ioh, MEM_PORT_REG, 0); 1481 1482 for (testing=65536; testing >= 4096; testing >>= 1) { 1483 bus_space_write_2(iot, ioh, HOST_ADDR_REG, testing-2); 1484 bus_space_write_2(iot, ioh, MEM_PORT_REG, 0xdead); 1485 bus_space_write_2(iot, ioh, HOST_ADDR_REG, testing-2); 1486 if (bus_space_read_2(iot, ioh, MEM_PORT_REG) != 0xdead) { 1487 #ifdef IYMEMDEBUG 1488 printf("%s: Didn't keep 0xdead at 0x%x\n", 1489 sc->sc_dev.dv_xname, testing-2); 1490 #endif 1491 continue; 1492 } 1493 1494 bus_space_write_2(iot, ioh, HOST_ADDR_REG, testing-2); 1495 bus_space_write_2(iot, ioh, MEM_PORT_REG, 0xbeef); 1496 bus_space_write_2(iot, ioh, HOST_ADDR_REG, testing-2); 1497 if (bus_space_read_2(iot, ioh, MEM_PORT_REG) != 0xbeef) { 1498 #ifdef IYMEMDEBUG 1499 printf("%s: Didn't keep 0xbeef at 0x%x\n", 1500 sc->sc_dev.dv_xname, testing-2); 1501 #endif 1502 continue; 1503 } 1504 1505 bus_space_write_2(iot, ioh, HOST_ADDR_REG, 0); 1506 bus_space_write_2(iot, ioh, MEM_PORT_REG, 0); 1507 bus_space_write_2(iot, ioh, HOST_ADDR_REG, testing >> 1); 1508 bus_space_write_2(iot, ioh, MEM_PORT_REG, testing >> 1); 1509 bus_space_write_2(iot, ioh, HOST_ADDR_REG, 0); 1510 if (bus_space_read_2(iot, ioh, MEM_PORT_REG) == (testing >> 1)) { 1511 #ifdef IYMEMDEBUG 1512 printf("%s: 0x%x alias of 0x0\n", 1513 sc->sc_dev.dv_xname, testing >> 1); 1514 #endif 1515 continue; 1516 } 1517 1518 break; 1519 } 1520 1521 sc->sram = testing; 1522 1523 switch(testing) { 1524 case 65536: 1525 /* 4 NFS packets + overhead RX, 2 NFS + overhead TX */ 1526 sc->rx_size = 44*1024; 1527 break; 1528 1529 case 32768: 1530 /* 2 NFS packets + overhead RX, 1 NFS + overhead TX */ 1531 sc->rx_size = 22*1024; 1532 break; 1533 1534 case 16384: 1535 /* 1 NFS packet + overhead RX, 4 big packets TX */ 1536 sc->rx_size = 10*1024; 1537 break; 1538 default: 1539 sc->rx_size = testing/2; 1540 break; 1541 } 1542 sc->tx_size = testing - sc->rx_size; 1543 } 1544 1545 static int 1546 eepromreadall(iot, ioh, wordp, maxi) 1547 bus_space_tag_t iot; 1548 bus_space_handle_t ioh; 1549 u_int16_t *wordp; 1550 int maxi; 1551 { 1552 int i; 1553 u_int16_t checksum, tmp; 1554 1555 checksum = 0; 1556 1557 for (i=0; i<EEPP_LENGTH; ++i) { 1558 tmp = eepromread(iot, ioh, i); 1559 checksum += tmp; 1560 if (i<maxi) 1561 wordp[i] = tmp; 1562 } 1563 1564 if (checksum != EEPP_CHKSUM) { 1565 #ifdef IYDEBUG 1566 printf("wrong EEPROM checksum 0x%x should be 0x%x\n", 1567 checksum, EEPP_CHKSUM); 1568 #endif 1569 return 1; 1570 } 1571 return 0; 1572 } 1573
Indexes created Fri Sep 26 20:09:58 GMT 2025