if_iy.c revision 1.50
1 /* $NetBSD: if_iy.c,v 1.50 2001/03/16 13:43:32 is Exp $ */ 2 /* #define IYDEBUG */ 3 /* #define IYMEMDEBUG */ 4 5 /*- 6 * Copyright (c) 1996 The NetBSD Foundation, Inc. 7 * All rights reserved. 8 * 9 * This code is derived from software contributed to The NetBSD Foundation 10 * by Ignatios Souvatzis. 11 * 12 * Redistribution and use in source and binary forms, with or without 13 * modification, are permitted provided that the following conditions 14 * are met: 15 * 1. Redistributions of source code must retain the above copyright 16 * notice, this list of conditions and the following disclaimer. 17 * 2. Redistributions in binary form must reproduce the above copyright 18 * notice, this list of conditions and the following disclaimer in the 19 * documentation and/or other materials provided with the distribution. 20 * 3. All advertising materials mentioning features or use of this software 21 * must display the following acknowledgement: 22 * This product includes software developed by the NetBSD 23 * Foundation, Inc. and its contributors. 24 * 4. Neither the name of The NetBSD Foundation nor the names of its 25 * contributors may be used to endorse or promote products derived 26 * from this software without specific prior written permission. 27 * 28 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 29 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 30 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 31 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 32 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 33 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 34 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 35 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 36 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 37 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 38 * POSSIBILITY OF SUCH DAMAGE. 39 */ 40 41 /* 42 * Supported hardware: 43 * 44 * - Intel EtherExpress Pro/10. 45 * - possibly other boards using the i82595 chip and no special tweaks. 46 */ 47 48 #include "opt_inet.h" 49 #include "opt_ns.h" 50 #include "bpfilter.h" 51 #include "rnd.h" 52 53 #include <sys/param.h> 54 #include <sys/systm.h> 55 #include <sys/mbuf.h> 56 #include <sys/buf.h> 57 #include <sys/protosw.h> 58 #include <sys/socket.h> 59 #include <sys/ioctl.h> 60 #include <sys/errno.h> 61 #include <sys/syslog.h> 62 #include <sys/device.h> 63 #include <sys/endian.h> 64 #if NRND > 0 65 #include <sys/rnd.h> 66 #endif 67 68 #include <net/if.h> 69 #include <net/if_types.h> 70 #include <net/if_dl.h> 71 72 #include <net/if_ether.h> 73 74 #if NBPFILTER > 0 75 #include <net/bpf.h> 76 #include <net/bpfdesc.h> 77 #endif 78 79 #ifdef INET 80 #include <netinet/in.h> 81 #include <netinet/in_systm.h> 82 #include <netinet/in_var.h> 83 #include <netinet/ip.h> 84 #include <netinet/if_inarp.h> 85 #endif 86 87 #ifdef NS 88 #include <netns/ns.h> 89 #include <netns/ns_if.h> 90 #endif 91 92 #if defined(SIOCSIFMEDIA) 93 #include <net/if_media.h> 94 #endif 95 96 #include <machine/cpu.h> 97 #include <machine/bus.h> 98 #include <machine/intr.h> 99 100 #include <dev/isa/isareg.h> 101 #include <dev/isa/isavar.h> 102 #include <dev/ic/i82595reg.h> 103 104 /* XXX why isn't this centralized? */ 105 #ifndef __BUS_SPACE_HAS_STREAM_METHODS 106 #define bus_space_write_stream_2 bus_space_write_2 107 #define bus_space_write_multi_stream_2 bus_space_write_multi_2 108 #define bus_space_read_stream_2 bus_space_read_2 109 #define bus_space_read_multi_stream_2 bus_space_read_multi_2 110 #endif /* __BUS_SPACE_HAS_STREAM_METHODS */ 111 112 /* 113 * Ethernet status, per interface. 114 */ 115 struct iy_softc { 116 struct device sc_dev; 117 void *sc_ih; 118 119 bus_space_tag_t sc_iot; 120 bus_space_handle_t sc_ioh; 121 122 struct ethercom sc_ethercom; 123 124 struct ifmedia iy_ifmedia; 125 int iy_media; 126 127 int mappedirq; 128 129 int hard_vers; 130 131 int promisc; 132 133 int sram, tx_size, rx_size; 134 135 int tx_start, tx_end, tx_last; 136 int rx_start; 137 138 int doing_mc_setup; 139 #ifdef IYDEBUG 140 int sc_debug; 141 #endif 142 143 #if NRND > 0 144 rndsource_element_t rnd_source; 145 #endif 146 }; 147 148 void iywatchdog __P((struct ifnet *)); 149 int iyioctl __P((struct ifnet *, u_long, caddr_t)); 150 int iyintr __P((void *)); 151 void iyinit __P((struct iy_softc *)); 152 void iystop __P((struct iy_softc *)); 153 void iystart __P((struct ifnet *)); 154 155 void iy_intr_rx __P((struct iy_softc *)); 156 void iy_intr_tx __P((struct iy_softc *)); 157 158 void iyreset __P((struct iy_softc *)); 159 void iy_readframe __P((struct iy_softc *, int)); 160 void iy_drop_packet_buffer __P((struct iy_softc *)); 161 void iy_find_mem_size __P((struct iy_softc *)); 162 void iyrint __P((struct iy_softc *)); 163 void iytint __P((struct iy_softc *)); 164 void iyxmit __P((struct iy_softc *)); 165 static void iy_mc_setup __P((struct iy_softc *)); 166 static void iy_mc_reset __P((struct iy_softc *)); 167 void iyget __P((struct iy_softc *, bus_space_tag_t, bus_space_handle_t, int)); 168 void iyprobemem __P((struct iy_softc *)); 169 static __inline void eepromwritebit __P((bus_space_tag_t, bus_space_handle_t, 170 int)); 171 static __inline int eepromreadbit __P((bus_space_tag_t, bus_space_handle_t)); 172 173 #ifdef IYDEBUGX 174 void print_rbd __P((volatile struct iy_recv_buf_desc *)); 175 176 int in_ifrint = 0; 177 int in_iftint = 0; 178 #endif 179 180 int iy_mediachange __P((struct ifnet *)); 181 void iy_mediastatus __P((struct ifnet *, struct ifmediareq *)); 182 183 int iyprobe __P((struct device *, struct cfdata *, void *)); 184 void iyattach __P((struct device *, struct device *, void *)); 185 186 static u_int16_t eepromread __P((bus_space_tag_t, bus_space_handle_t, int)); 187 188 static int eepromreadall __P((bus_space_tag_t, bus_space_handle_t, u_int16_t *, 189 int)); 190 191 struct cfattach iy_ca = { 192 sizeof(struct iy_softc), iyprobe, iyattach 193 }; 194 195 static u_int8_t eepro_irqmap[] = EEPP_INTMAP; 196 static u_int8_t eepro_revirqmap[] = EEPP_RINTMAP; 197 198 int 199 iyprobe(parent, match, aux) 200 struct device *parent; 201 struct cfdata *match; 202 void *aux; 203 { 204 struct isa_attach_args *ia = aux; 205 u_int16_t eaddr[8]; 206 207 bus_space_tag_t iot; 208 bus_space_handle_t ioh; 209 210 u_int8_t c, d; 211 212 iot = ia->ia_iot; 213 214 if (ia->ia_iobase == IOBASEUNK) 215 return 0; 216 217 if (bus_space_map(iot, ia->ia_iobase, 16, 0, &ioh)) 218 return 0; 219 220 /* try to find the round robin sig: */ 221 222 c = bus_space_read_1(iot, ioh, ID_REG); 223 if ((c & ID_REG_MASK) != ID_REG_SIG) 224 goto out; 225 226 d = bus_space_read_1(iot, ioh, ID_REG); 227 if ((d & ID_REG_MASK) != ID_REG_SIG) 228 goto out; 229 230 if (((d-c) & R_ROBIN_BITS) != 0x40) 231 goto out; 232 233 d = bus_space_read_1(iot, ioh, ID_REG); 234 if ((d & ID_REG_MASK) != ID_REG_SIG) 235 goto out; 236 237 if (((d-c) & R_ROBIN_BITS) != 0x80) 238 goto out; 239 240 d = bus_space_read_1(iot, ioh, ID_REG); 241 if ((d & ID_REG_MASK) != ID_REG_SIG) 242 goto out; 243 244 if (((d-c) & R_ROBIN_BITS) != 0xC0) 245 goto out; 246 247 d = bus_space_read_1(iot, ioh, ID_REG); 248 if ((d & ID_REG_MASK) != ID_REG_SIG) 249 goto out; 250 251 if (((d-c) & R_ROBIN_BITS) != 0x00) 252 goto out; 253 254 #ifdef IYDEBUG 255 printf("iyprobe verified working ID reg.\n"); 256 #endif 257 258 if (eepromreadall(iot, ioh, eaddr, 8)) 259 goto out; 260 261 if (ia->ia_irq == IRQUNK) 262 ia->ia_irq = eepro_irqmap[eaddr[EEPPW1] & EEPP_Int]; 263 264 if (ia->ia_irq >= sizeof(eepro_revirqmap)) 265 goto out; 266 267 if (eepro_revirqmap[ia->ia_irq] == 0xff) 268 goto out; 269 270 /* now lets reset the chip */ 271 272 bus_space_write_1(iot, ioh, COMMAND_REG, RESET_CMD); 273 delay(200); 274 275 ia->ia_iosize = 16; 276 277 bus_space_unmap(iot, ioh, 16); 278 return 1; /* found */ 279 out: 280 bus_space_unmap(iot, ioh, 16); 281 return 0; 282 } 283 284 void 285 iyattach(parent, self, aux) 286 struct device *parent, *self; 287 void *aux; 288 { 289 struct iy_softc *sc = (void *)self; 290 struct isa_attach_args *ia = aux; 291 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 292 bus_space_tag_t iot; 293 bus_space_handle_t ioh; 294 unsigned temp; 295 u_int16_t eaddr[8]; 296 u_int8_t myaddr[ETHER_ADDR_LEN]; 297 int eirq; 298 299 iot = ia->ia_iot; 300 301 if (bus_space_map(iot, ia->ia_iobase, 16, 0, &ioh)) { 302 printf(": can't map i/o space\n"); 303 return; 304 } 305 306 sc->sc_iot = iot; 307 sc->sc_ioh = ioh; 308 309 sc->mappedirq = eepro_revirqmap[ia->ia_irq]; 310 311 /* now let's reset the chip */ 312 313 bus_space_write_1(iot, ioh, COMMAND_REG, RESET_CMD); 314 delay(200); 315 316 iyprobemem(sc); 317 318 bcopy(sc->sc_dev.dv_xname, ifp->if_xname, IFNAMSIZ); 319 ifp->if_softc = sc; 320 ifp->if_start = iystart; 321 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_NOTRAILERS 322 | IFF_MULTICAST; 323 324 sc->doing_mc_setup = 0; 325 326 ifp->if_ioctl = iyioctl; 327 ifp->if_watchdog = iywatchdog; 328 329 IFQ_SET_READY(&ifp->if_snd); 330 331 (void)eepromreadall(iot, ioh, eaddr, 8); 332 sc->hard_vers = eaddr[EEPW6] & EEPP_BoardRev; 333 334 #ifdef DIAGNOSTICS 335 if ((eaddr[EEPPEther0] != 336 eepromread(iot, ioh, EEPPEther0a)) && 337 (eaddr[EEPPEther1] != 338 eepromread(iot, ioh, EEPPEther1a)) && 339 (eaddr[EEPPEther2] != 340 eepromread(iot, ioh, EEPPEther2a))) 341 342 printf("EEPROM Ethernet address differs from copy\n"); 343 #endif 344 345 myaddr[1] = eaddr[EEPPEther0] & 0xFF; 346 myaddr[0] = eaddr[EEPPEther0] >> 8; 347 myaddr[3] = eaddr[EEPPEther1] & 0xFF; 348 myaddr[2] = eaddr[EEPPEther1] >> 8; 349 myaddr[5] = eaddr[EEPPEther2] & 0xFF; 350 myaddr[4] = eaddr[EEPPEther2] >> 8; 351 352 ifmedia_init(&sc->iy_ifmedia, 0, iy_mediachange, iy_mediastatus); 353 ifmedia_add(&sc->iy_ifmedia, IFM_ETHER | IFM_10_2, 0, NULL); 354 ifmedia_add(&sc->iy_ifmedia, IFM_ETHER | IFM_10_5, 0, NULL); 355 ifmedia_add(&sc->iy_ifmedia, IFM_ETHER | IFM_10_T, 0, NULL); 356 ifmedia_add(&sc->iy_ifmedia, IFM_ETHER | IFM_AUTO, 0, NULL); 357 ifmedia_set(&sc->iy_ifmedia, IFM_ETHER | IFM_AUTO); 358 /* Attach the interface. */ 359 if_attach(ifp); 360 ether_ifattach(ifp, myaddr); 361 printf(": address %s, rev. %d, %d kB\n", 362 ether_sprintf(myaddr), 363 sc->hard_vers, sc->sram/1024); 364 365 eirq = eepro_irqmap[eaddr[EEPPW1] & EEPP_Int]; 366 if (eirq != ia->ia_irq) 367 printf("%s: EEPROM irq setting %d ignored\n", 368 sc->sc_dev.dv_xname, eirq); 369 370 sc->sc_ih = isa_intr_establish(ia->ia_ic, ia->ia_irq, IST_EDGE, 371 IPL_NET, iyintr, sc); 372 373 #if NRND > 0 374 rnd_attach_source(&sc->rnd_source, sc->sc_dev.dv_xname, 375 RND_TYPE_NET, 0); 376 #endif 377 378 temp = bus_space_read_1(iot, ioh, INT_NO_REG); 379 bus_space_write_1(iot, ioh, INT_NO_REG, (temp & 0xf8) | sc->mappedirq); 380 } 381 382 void 383 iystop(sc) 384 struct iy_softc *sc; 385 { 386 bus_space_tag_t iot; 387 bus_space_handle_t ioh; 388 #ifdef IYDEBUG 389 u_int p, v; 390 #endif 391 392 iot = sc->sc_iot; 393 ioh = sc->sc_ioh; 394 395 bus_space_write_1(iot, ioh, COMMAND_REG, RCV_DISABLE_CMD); 396 397 bus_space_write_1(iot, ioh, INT_MASK_REG, ALL_INTS); 398 bus_space_write_1(iot, ioh, STATUS_REG, ALL_INTS); 399 400 bus_space_write_1(iot, ioh, COMMAND_REG, RESET_CMD); 401 delay(200); 402 #ifdef IYDEBUG 403 printf("%s: dumping tx chain (st 0x%x end 0x%x last 0x%x)\n", 404 sc->sc_dev.dv_xname, sc->tx_start, sc->tx_end, sc->tx_last); 405 p = sc->tx_last; 406 if (!p) 407 p = sc->tx_start; 408 do { 409 char sbuf[128]; 410 411 bus_space_write_2(iot, ioh, HOST_ADDR_REG, p); 412 413 v = le16toh(bus_space_read_stream_2(iot, ioh, MEM_PORT_REG)); 414 bitmask_snprintf(v, "\020\006Ab\010Dn", sbuf, sizeof(sbuf)); 415 printf("0x%04x: %s ", p, sbuf); 416 417 v = le16toh(bus_space_read_stream_2(iot, ioh, MEM_PORT_REG)); 418 bitmask_snprintf(v, "\020\6MAX_COL\7HRT_BEAT\010TX_DEF\011UND_RUN\012JERR\013LST_CRS\014LTCOL\016TX_OK\020COLL", 419 sbuf, sizeof(sbuf)); 420 printf("0x%s", sbuf); 421 422 p = le16toh(bus_space_read_stream_2(iot, ioh, MEM_PORT_REG)); 423 printf(" 0x%04x", p); 424 425 v = le16toh(bus_space_read_stream_2(iot, ioh, MEM_PORT_REG)); 426 bitmask_snprintf(v, "\020\020Ch", sbuf, sizeof(sbuf)); 427 printf(" 0x%s\n", sbuf); 428 429 } while (v & 0x8000); 430 #endif 431 sc->tx_start = sc->tx_end = sc->rx_size; 432 sc->tx_last = 0; 433 sc->sc_ethercom.ec_if.if_flags &= ~(IFF_RUNNING|IFF_OACTIVE); 434 } 435 436 void 437 iyreset(sc) 438 struct iy_softc *sc; 439 { 440 int s; 441 s = splnet(); 442 iystop(sc); 443 iyinit(sc); 444 splx(s); 445 } 446 447 void 448 iyinit(sc) 449 struct iy_softc *sc; 450 { 451 int i; 452 unsigned temp; 453 struct ifnet *ifp; 454 bus_space_tag_t iot; 455 bus_space_handle_t ioh; 456 457 iot = sc->sc_iot; 458 ioh = sc->sc_ioh; 459 460 ifp = &sc->sc_ethercom.ec_if; 461 #ifdef IYDEBUG 462 printf("ifp is %p\n", ifp); 463 #endif 464 465 bus_space_write_1(iot, ioh, 0, BANK_SEL(2)); 466 467 temp = bus_space_read_1(iot, ioh, EEPROM_REG); 468 if (temp & 0x10) 469 bus_space_write_1(iot, ioh, EEPROM_REG, temp & ~0x10); 470 471 for (i=0; i<6; ++i) { 472 bus_space_write_1(iot, ioh, I_ADD(i), LLADDR(ifp->if_sadl)[i]); 473 } 474 475 temp = bus_space_read_1(iot, ioh, REG1); 476 bus_space_write_1(iot, ioh, REG1, 477 temp | /* XMT_CHAIN_INT | XMT_CHAIN_ERRSTOP | */ RCV_DISCARD_BAD); 478 479 if (ifp->if_flags & (IFF_PROMISC|IFF_ALLMULTI)) { 480 temp = MATCH_ALL; 481 } else 482 temp = MATCH_ID; 483 484 bus_space_write_1(iot, ioh, RECV_MODES_REG, temp); 485 486 #ifdef IYDEBUG 487 { 488 char sbuf[128]; 489 490 bitmask_snprintf(temp, "\020\1PRMSC\2NOBRDST\3SEECRC\4LENGTH\5NOSaIns\6MultiIA", 491 sbuf, sizeof(sbuf)); 492 printf("%s: RECV_MODES set to %s\n", sc->sc_dev.dv_xname, sbuf); 493 } 494 #endif 495 /* XXX VOODOO */ 496 temp = bus_space_read_1(iot, ioh, MEDIA_SELECT); 497 bus_space_write_1(iot, ioh, MEDIA_SELECT, temp); 498 /* XXX END OF VOODOO */ 499 500 501 delay(500000); /* for the hardware to test for the connector */ 502 503 temp = bus_space_read_1(iot, ioh, MEDIA_SELECT); 504 #ifdef IYDEBUG 505 { 506 char sbuf[128]; 507 508 bitmask_snprintf(temp, "\020\1LnkInDis\2PolCor\3TPE\4JabberDis\5NoAport\6BNC", 509 sbuf, sizeof(sbuf)); 510 printf("%s: media select was 0x%s ", sc->sc_dev.dv_xname, sbuf); 511 } 512 #endif 513 temp = (temp & TEST_MODE_MASK); 514 515 switch(IFM_SUBTYPE(sc->iy_ifmedia.ifm_media)) { 516 case IFM_10_5: 517 temp &= ~ (BNC_BIT | TPE_BIT); 518 break; 519 520 case IFM_10_2: 521 temp = (temp & ~TPE_BIT) | BNC_BIT; 522 break; 523 524 case IFM_10_T: 525 temp = (temp & ~BNC_BIT) | TPE_BIT; 526 break; 527 default: 528 /* nothing; leave as it is */ 529 } 530 switch (temp & (BNC_BIT | TPE_BIT)) { 531 case BNC_BIT: 532 sc->iy_media = IFM_ETHER | IFM_10_2; 533 break; 534 case TPE_BIT: 535 sc->iy_media = IFM_ETHER | IFM_10_T; 536 break; 537 default: 538 sc->iy_media = IFM_ETHER | IFM_10_5; 539 } 540 541 bus_space_write_1(iot, ioh, MEDIA_SELECT, temp); 542 #ifdef IYDEBUG 543 { 544 char sbuf[128]; 545 546 bitmask_snprintf(temp, "\020\1LnkInDis\2PolCor\3TPE\4JabberDis\5NoAport\6BNC", 547 sbuf, sizeof(sbuf)); 548 printf("changed to 0x%s\n", sbuf); 549 } 550 #endif 551 552 bus_space_write_1(iot, ioh, 0, BANK_SEL(0)); 553 bus_space_write_1(iot, ioh, INT_MASK_REG, ALL_INTS); 554 bus_space_write_1(iot, ioh, 0, BANK_SEL(1)); 555 556 temp = bus_space_read_1(iot, ioh, INT_NO_REG); 557 bus_space_write_1(iot, ioh, INT_NO_REG, (temp & 0xf8) | sc->mappedirq); 558 559 #ifdef IYDEBUG 560 { 561 char sbuf[128]; 562 563 bitmask_snprintf(temp, "\020\4bad_irq\010flash/boot present", 564 sbuf, sizeof(sbuf)); 565 printf("%s: int no was %s\n", sc->sc_dev.dv_xname, sbuf); 566 567 temp = bus_space_read_1(iot, ioh, INT_NO_REG); 568 bitmask_snprintf(temp, "\020\4bad_irq\010flash/boot present", 569 sbuf, sizeof(sbuf)); 570 printf("%s: int no now %s\n", sc->sc_dev.dv_xname, sbuf); 571 } 572 #endif 573 574 bus_space_write_1(iot, ioh, RCV_LOWER_LIMIT_REG, 0); 575 bus_space_write_1(iot, ioh, RCV_UPPER_LIMIT_REG, (sc->rx_size -2) >>8); 576 bus_space_write_1(iot, ioh, XMT_LOWER_LIMIT_REG, sc->rx_size >>8); 577 bus_space_write_1(iot, ioh, XMT_UPPER_LIMIT_REG, (sc->sram - 2) >>8); 578 579 temp = bus_space_read_1(iot, ioh, REG1); 580 #ifdef IYDEBUG 581 { 582 char sbuf[128]; 583 584 bitmask_snprintf(temp, "\020\2WORD_WIDTH\010INT_ENABLE", 585 sbuf, sizeof(sbuf)); 586 printf("%s: HW access is %s\n", sc->sc_dev.dv_xname, sbuf); 587 } 588 #endif 589 bus_space_write_1(iot, ioh, REG1, temp | INT_ENABLE); /* XXX what about WORD_WIDTH? */ 590 591 #ifdef IYDEBUG 592 { 593 char sbuf[128]; 594 595 temp = bus_space_read_1(iot, ioh, REG1); 596 bitmask_snprintf(temp, "\020\2WORD_WIDTH\010INT_ENABLE", 597 sbuf, sizeof(sbuf)); 598 printf("%s: HW access is %s\n", sc->sc_dev.dv_xname, sbuf); 599 } 600 #endif 601 602 bus_space_write_1(iot, ioh, 0, BANK_SEL(0)); 603 604 bus_space_write_1(iot, ioh, INT_MASK_REG, ALL_INTS & ~(RX_BIT|TX_BIT)); 605 bus_space_write_1(iot, ioh, STATUS_REG, ALL_INTS); /* clear ints */ 606 607 bus_space_write_1(iot, ioh, RCV_COPY_THRESHOLD, 0); 608 609 bus_space_write_2(iot, ioh, RCV_START_LOW, 0); 610 bus_space_write_2(iot, ioh, RCV_STOP_LOW, sc->rx_size - 2); 611 sc->rx_start = 0; 612 613 bus_space_write_1(iot, ioh, 0, SEL_RESET_CMD); 614 delay(200); 615 616 bus_space_write_2(iot, ioh, XMT_ADDR_REG, sc->rx_size); 617 618 sc->tx_start = sc->tx_end = sc->rx_size; 619 sc->tx_last = 0; 620 621 bus_space_write_1(iot, ioh, 0, RCV_ENABLE_CMD); 622 623 ifp->if_flags |= IFF_RUNNING; 624 ifp->if_flags &= ~IFF_OACTIVE; 625 } 626 627 void 628 iystart(ifp) 629 struct ifnet *ifp; 630 { 631 struct iy_softc *sc; 632 633 634 struct mbuf *m0, *m; 635 u_int len, pad, last, end; 636 u_int llen, residual; 637 int avail; 638 caddr_t data; 639 u_int16_t resval, stat; 640 bus_space_tag_t iot; 641 bus_space_handle_t ioh; 642 643 #ifdef IYDEBUG 644 printf("iystart called\n"); 645 #endif 646 sc = ifp->if_softc; 647 648 if ((ifp->if_flags & (IFF_RUNNING | IFF_OACTIVE)) != IFF_RUNNING) 649 return; 650 651 iot = sc->sc_iot; 652 ioh = sc->sc_ioh; 653 654 for (;;) { 655 IFQ_POLL(&ifp->if_snd, m0); 656 if (m0 == NULL) 657 break; 658 #ifdef IYDEBUG 659 printf("%s: trying to write another packet to the hardware\n", 660 sc->sc_dev.dv_xname); 661 #endif 662 663 /* We need to use m->m_pkthdr.len, so require the header */ 664 if ((m0->m_flags & M_PKTHDR) == 0) 665 panic("iystart: no header mbuf"); 666 667 len = m0->m_pkthdr.len; 668 pad = len & 1; 669 670 #ifdef IYDEBUG 671 printf("%s: length is %d.\n", sc->sc_dev.dv_xname, len); 672 #endif 673 if (len < (ETHER_MIN_LEN - ETHER_CRC_LEN)) { 674 pad = ETHER_MIN_LEN - ETHER_CRC_LEN - len; 675 } 676 677 if (len + pad > ETHER_MAX_LEN) { 678 /* packet is obviously too large: toss it */ 679 ++ifp->if_oerrors; 680 IF_DEQUEUE(&ifp->if_snd, m0); 681 m_freem(m0); 682 continue; 683 } 684 685 #if NBPFILTER > 0 686 if (ifp->if_bpf) 687 bpf_mtap(ifp->if_bpf, m0); 688 #endif 689 690 avail = sc->tx_start - sc->tx_end; 691 if (avail <= 0) 692 avail += sc->tx_size; 693 694 #ifdef IYDEBUG 695 printf("%s: avail is %d.\n", sc->sc_dev.dv_xname, avail); 696 #endif 697 /* 698 * we MUST RUN at splnet here --- 699 * XXX todo: or even turn off the boards ints ??? hm... 700 */ 701 702 /* See if there is room to put another packet in the buffer. */ 703 704 if ((len+pad+2*I595_XMT_HDRLEN) > avail) { 705 #ifdef IYDEBUG 706 printf("%s: len = %d, avail = %d, setting OACTIVE\n", 707 sc->sc_dev.dv_xname, len, avail); 708 #endif 709 ifp->if_flags |= IFF_OACTIVE; 710 return; 711 } 712 713 /* we know it fits in the hardware now, so dequeue it */ 714 IFQ_DEQUEUE(&ifp->if_snd, m0); 715 716 last = sc->tx_end; 717 end = last + pad + len + I595_XMT_HDRLEN; 718 719 if (end >= sc->sram) { 720 if ((sc->sram - last) <= I595_XMT_HDRLEN) { 721 /* keep header in one piece */ 722 last = sc->rx_size; 723 end = last + pad + len + I595_XMT_HDRLEN; 724 } else 725 end -= sc->tx_size; 726 } 727 728 bus_space_write_2(iot, ioh, HOST_ADDR_REG, last); 729 bus_space_write_stream_2(iot, ioh, MEM_PORT_REG, 730 htole16(XMT_CMD)); 731 732 bus_space_write_2(iot, ioh, MEM_PORT_REG, 0); 733 bus_space_write_2(iot, ioh, MEM_PORT_REG, 0); 734 735 bus_space_write_stream_2(iot, ioh, MEM_PORT_REG, 736 htole16(len + pad)); 737 738 residual = resval = 0; 739 740 while ((m = m0)!=0) { 741 data = mtod(m, caddr_t); 742 llen = m->m_len; 743 if (residual) { 744 #ifdef IYDEBUG 745 printf("%s: merging residual with next mbuf.\n", 746 sc->sc_dev.dv_xname); 747 #endif 748 resval |= *data << 8; 749 bus_space_write_stream_2(iot, ioh, 750 MEM_PORT_REG, resval); 751 --llen; 752 ++data; 753 } 754 if (llen > 1) 755 bus_space_write_multi_stream_2(iot, ioh, 756 MEM_PORT_REG, data, llen>>1); 757 residual = llen & 1; 758 if (residual) { 759 resval = *(data + llen - 1); 760 #ifdef IYDEBUG 761 printf("%s: got odd mbuf to send.\n", 762 sc->sc_dev.dv_xname); 763 #endif 764 } 765 766 MFREE(m, m0); 767 } 768 769 if (residual) 770 bus_space_write_stream_2(iot, ioh, MEM_PORT_REG, 771 resval); 772 773 pad >>= 1; 774 while (pad-- > 0) 775 bus_space_write_stream_2(iot, ioh, MEM_PORT_REG, 0); 776 777 #ifdef IYDEBUG 778 printf("%s: new last = 0x%x, end = 0x%x.\n", 779 sc->sc_dev.dv_xname, last, end); 780 printf("%s: old start = 0x%x, end = 0x%x, last = 0x%x\n", 781 sc->sc_dev.dv_xname, sc->tx_start, sc->tx_end, sc->tx_last); 782 #endif 783 784 if (sc->tx_start != sc->tx_end) { 785 bus_space_write_2(iot, ioh, HOST_ADDR_REG, 786 sc->tx_last + XMT_COUNT); 787 788 /* 789 * XXX We keep stat in le order, to potentially save 790 * a byte swap. 791 */ 792 stat = bus_space_read_stream_2(iot, ioh, MEM_PORT_REG); 793 794 bus_space_write_2(iot, ioh, HOST_ADDR_REG, 795 sc->tx_last + XMT_CHAIN); 796 797 bus_space_write_stream_2(iot, ioh, MEM_PORT_REG, 798 htole16(last)); 799 800 bus_space_write_stream_2(iot, ioh, MEM_PORT_REG, 801 stat | htole16(CHAIN)); 802 #ifdef IYDEBUG 803 printf("%s: setting 0x%x to 0x%x\n", 804 sc->sc_dev.dv_xname, sc->tx_last + XMT_COUNT, 805 le16toh(stat) | CHAIN); 806 #endif 807 } 808 stat = bus_space_read_2(iot, ioh, MEM_PORT_REG); /* dummy read */ 809 810 /* XXX todo: enable ints here if disabled */ 811 812 ++ifp->if_opackets; 813 814 if (sc->tx_start == sc->tx_end) { 815 bus_space_write_2(iot, ioh, XMT_ADDR_REG, last); 816 bus_space_write_1(iot, ioh, 0, XMT_CMD); 817 sc->tx_start = last; 818 #ifdef IYDEBUG 819 printf("%s: writing 0x%x to XAR and giving XCMD\n", 820 sc->sc_dev.dv_xname, last); 821 #endif 822 } else { 823 bus_space_write_1(iot, ioh, 0, RESUME_XMT_CMD); 824 #ifdef IYDEBUG 825 printf("%s: giving RESUME_XCMD\n", 826 sc->sc_dev.dv_xname); 827 #endif 828 } 829 sc->tx_last = last; 830 sc->tx_end = end; 831 } 832 } 833 834 835 static __inline void 836 eepromwritebit(iot, ioh, what) 837 bus_space_tag_t iot; 838 bus_space_handle_t ioh; 839 int what; 840 { 841 bus_space_write_1(iot, ioh, EEPROM_REG, what); 842 delay(1); 843 bus_space_write_1(iot, ioh, EEPROM_REG, what|EESK); 844 delay(1); 845 bus_space_write_1(iot, ioh, EEPROM_REG, what); 846 delay(1); 847 } 848 849 static __inline int 850 eepromreadbit(iot, ioh) 851 bus_space_tag_t iot; 852 bus_space_handle_t ioh; 853 { 854 int b; 855 856 bus_space_write_1(iot, ioh, EEPROM_REG, EECS|EESK); 857 delay(1); 858 b = bus_space_read_1(iot, ioh, EEPROM_REG); 859 bus_space_write_1(iot, ioh, EEPROM_REG, EECS); 860 delay(1); 861 862 return ((b & EEDO) != 0); 863 } 864 865 static u_int16_t 866 eepromread(iot, ioh, offset) 867 bus_space_tag_t iot; 868 bus_space_handle_t ioh; 869 int offset; 870 { 871 volatile int i; 872 volatile int j; 873 volatile u_int16_t readval; 874 875 bus_space_write_1(iot, ioh, 0, BANK_SEL(2)); 876 delay(1); 877 bus_space_write_1(iot, ioh, EEPROM_REG, EECS); /* XXXX??? */ 878 delay(1); 879 880 eepromwritebit(iot, ioh, EECS|EEDI); 881 eepromwritebit(iot, ioh, EECS|EEDI); 882 eepromwritebit(iot, ioh, EECS); 883 884 for (j=5; j>=0; --j) { 885 if ((offset>>j) & 1) 886 eepromwritebit(iot, ioh, EECS|EEDI); 887 else 888 eepromwritebit(iot, ioh, EECS); 889 } 890 891 for (readval=0, i=0; i<16; ++i) { 892 readval<<=1; 893 readval |= eepromreadbit(iot, ioh); 894 } 895 896 bus_space_write_1(iot, ioh, EEPROM_REG, 0|EESK); 897 delay(1); 898 bus_space_write_1(iot, ioh, EEPROM_REG, 0); 899 900 bus_space_write_1(iot, ioh, COMMAND_REG, BANK_SEL(0)); 901 902 return readval; 903 } 904 905 /* 906 * Device timeout/watchdog routine. Entered if the device neglects to generate 907 * an interrupt after a transmit has been started on it. 908 */ 909 void 910 iywatchdog(ifp) 911 struct ifnet *ifp; 912 { 913 struct iy_softc *sc = ifp->if_softc; 914 915 log(LOG_ERR, "%s: device timeout\n", sc->sc_dev.dv_xname); 916 ++sc->sc_ethercom.ec_if.if_oerrors; 917 iyreset(sc); 918 } 919 920 /* 921 * What to do upon receipt of an interrupt. 922 */ 923 int 924 iyintr(arg) 925 void *arg; 926 { 927 struct iy_softc *sc = arg; 928 bus_space_tag_t iot; 929 bus_space_handle_t ioh; 930 931 u_short status; 932 933 iot = sc->sc_iot; 934 ioh = sc->sc_ioh; 935 936 status = bus_space_read_1(iot, ioh, STATUS_REG); 937 #ifdef IYDEBUG 938 if (status & ALL_INTS) { 939 char sbuf[128]; 940 941 bitmask_snprintf(status, "\020\1RX_STP\2RX\3TX\4EXEC", 942 sbuf, sizeof(sbuf)); 943 printf("%s: got interupt %s", sc->sc_dev.dv_xname, sbuf); 944 945 if (status & EXEC_INT) { 946 bitmask_snprintf(bus_space_read_1(iot, ioh, 0), 947 "\020\6ABORT", sbuf, sizeof(sbuf)); 948 printf(" event %s\n", sbuf); 949 } else 950 printf("\n"); 951 } 952 #endif 953 if ((status & (RX_INT | TX_INT)) == 0) 954 return 0; 955 956 if (status & RX_INT) { 957 iy_intr_rx(sc); 958 bus_space_write_1(iot, ioh, STATUS_REG, RX_INT); 959 } 960 if (status & TX_INT) { 961 iy_intr_tx(sc); 962 bus_space_write_1(iot, ioh, STATUS_REG, TX_INT); 963 } 964 965 #if NRND > 0 966 rnd_add_uint32(&sc->rnd_source, status); 967 #endif 968 969 return 1; 970 } 971 972 void 973 iyget(sc, iot, ioh, rxlen) 974 struct iy_softc *sc; 975 bus_space_tag_t iot; 976 bus_space_handle_t ioh; 977 int rxlen; 978 { 979 struct mbuf *m, *top, **mp; 980 struct ifnet *ifp; 981 int len; 982 983 ifp = &sc->sc_ethercom.ec_if; 984 985 MGETHDR(m, M_DONTWAIT, MT_DATA); 986 if (m == 0) 987 goto dropped; 988 m->m_pkthdr.rcvif = ifp; 989 m->m_pkthdr.len = rxlen; 990 len = MHLEN; 991 top = 0; 992 mp = ⊤ 993 994 while (rxlen > 0) { 995 if (top) { 996 MGET(m, M_DONTWAIT, MT_DATA); 997 if (m == 0) { 998 m_freem(top); 999 goto dropped; 1000 } 1001 len = MLEN; 1002 } 1003 if (rxlen >= MINCLSIZE) { 1004 MCLGET(m, M_DONTWAIT); 1005 if ((m->m_flags & M_EXT) == 0) { 1006 m_free(m); 1007 m_freem(top); 1008 goto dropped; 1009 } 1010 len = MCLBYTES; 1011 } 1012 len = min(rxlen, len); 1013 if (len > 1) { 1014 len &= ~1; 1015 1016 bus_space_read_multi_stream_2(iot, ioh, MEM_PORT_REG, 1017 mtod(m, caddr_t), len/2); 1018 } else { 1019 #ifdef IYDEBUG 1020 printf("%s: received odd mbuf\n", sc->sc_dev.dv_xname); 1021 #endif 1022 *(mtod(m, caddr_t)) = bus_space_read_stream_2(iot, ioh, 1023 MEM_PORT_REG); 1024 } 1025 m->m_len = len; 1026 rxlen -= len; 1027 *mp = m; 1028 mp = &m->m_next; 1029 } 1030 /* XXX receive the top here */ 1031 ++ifp->if_ipackets; 1032 1033 #if NBPFILTER > 0 1034 if (ifp->if_bpf) 1035 bpf_mtap(ifp->if_bpf, top); 1036 #endif 1037 (*ifp->if_input)(ifp, top); 1038 return; 1039 1040 dropped: 1041 ++ifp->if_ierrors; 1042 return; 1043 } 1044 1045 void 1046 iy_intr_rx(sc) 1047 struct iy_softc *sc; 1048 { 1049 struct ifnet *ifp; 1050 bus_space_tag_t iot; 1051 bus_space_handle_t ioh; 1052 1053 u_int rxadrs, rxevnt, rxstatus, rxnext, rxlen; 1054 1055 iot = sc->sc_iot; 1056 ioh = sc->sc_ioh; 1057 ifp = &sc->sc_ethercom.ec_if; 1058 1059 rxadrs = sc->rx_start; 1060 bus_space_write_2(iot, ioh, HOST_ADDR_REG, rxadrs); 1061 rxevnt = le16toh(bus_space_read_stream_2(iot, ioh, MEM_PORT_REG)); 1062 rxnext = 0; 1063 1064 while (rxevnt == RCV_DONE) { 1065 rxstatus = le16toh(bus_space_read_stream_2(iot, ioh, 1066 MEM_PORT_REG)); 1067 rxnext = le16toh(bus_space_read_stream_2(iot, ioh, 1068 MEM_PORT_REG)); 1069 rxlen = le16toh(bus_space_read_stream_2(iot, ioh, 1070 MEM_PORT_REG)); 1071 #ifdef IYDEBUG 1072 { 1073 char sbuf[128]; 1074 1075 bitmask_snprintf(rxstatus, "\020\1RCLD\2IA_MCH\010SHORT\011OVRN\013ALGERR\014CRCERR\015LENERR\016RCVOK\020TYP", 1076 sbuf, sizeof(sbuf)); 1077 printf("%s: pck at 0x%04x stat %s next 0x%x len 0x%x\n", 1078 sc->sc_dev.dv_xname, rxadrs, sbuf, rxnext, rxlen); 1079 } 1080 #endif 1081 iyget(sc, iot, ioh, rxlen); 1082 1083 /* move stop address */ 1084 bus_space_write_2(iot, ioh, RCV_STOP_LOW, 1085 rxnext == 0 ? sc->rx_size - 2 : rxnext - 2); 1086 1087 bus_space_write_2(iot, ioh, HOST_ADDR_REG, rxnext); 1088 rxadrs = rxnext; 1089 rxevnt = le16toh(bus_space_read_stream_2(iot, ioh, 1090 MEM_PORT_REG)); 1091 } 1092 sc->rx_start = rxnext; 1093 } 1094 1095 void 1096 iy_intr_tx(sc) 1097 struct iy_softc *sc; 1098 { 1099 bus_space_tag_t iot; 1100 bus_space_handle_t ioh; 1101 struct ifnet *ifp; 1102 u_int txstatus, txstat2, txlen, txnext; 1103 1104 ifp = &sc->sc_ethercom.ec_if; 1105 iot = sc->sc_iot; 1106 ioh = sc->sc_ioh; 1107 1108 while (sc->tx_start != sc->tx_end) { 1109 bus_space_write_2(iot, ioh, HOST_ADDR_REG, sc->tx_start); 1110 txstatus = le16toh(bus_space_read_stream_2(iot, ioh, 1111 MEM_PORT_REG)); 1112 1113 if ((txstatus & (TX_DONE|CMD_MASK)) != (TX_DONE|XMT_CMD)) 1114 break; 1115 1116 txstat2 = le16toh(bus_space_read_stream_2(iot, ioh, 1117 MEM_PORT_REG)); 1118 txnext = le16toh(bus_space_read_stream_2(iot, ioh, 1119 MEM_PORT_REG)); 1120 txlen = le16toh(bus_space_read_stream_2(iot, ioh, 1121 MEM_PORT_REG)); 1122 #ifdef IYDEBUG 1123 { 1124 char sbuf[128]; 1125 1126 bitmask_snprintf(txstat2, "\020\6MAX_COL\7HRT_BEAT\010TX_DEF\011UND_RUN\012JERR\013LST_CRS\014LTCOL\016TX_OK\020COLL", 1127 sbuf, sizeof(sbuf)); 1128 printf("txstat 0x%x stat2 0x%s next 0x%x len 0x%x\n", 1129 txstatus, sbuf, txnext, txlen); 1130 } 1131 #endif 1132 if (txlen & CHAIN) 1133 sc->tx_start = txnext; 1134 else 1135 sc->tx_start = sc->tx_end; 1136 ifp->if_flags &= ~IFF_OACTIVE; 1137 1138 if (txstat2 & 0x0020) 1139 ifp->if_collisions += 16; 1140 else 1141 ifp->if_collisions += txstat2 & 0x000f; 1142 1143 if ((txstat2 & 0x2000) == 0) 1144 ++ifp->if_oerrors; 1145 } 1146 /* Nearly done. Tell feeders we may be able to accept more data... */ 1147 ifp->if_flags &= ~IFF_OACTIVE; 1148 1149 /* and get more data. */ 1150 iystart(ifp); 1151 } 1152 1153 int 1154 iyioctl(ifp, cmd, data) 1155 struct ifnet *ifp; 1156 u_long cmd; 1157 caddr_t data; 1158 { 1159 struct iy_softc *sc; 1160 struct ifaddr *ifa; 1161 struct ifreq *ifr; 1162 int s, error = 0; 1163 1164 sc = ifp->if_softc; 1165 ifa = (struct ifaddr *)data; 1166 ifr = (struct ifreq *)data; 1167 1168 #ifdef IYDEBUG 1169 printf("iyioctl called with ifp 0x%p (%s) cmd 0x%lx data 0x%p\n", 1170 ifp, ifp->if_xname, cmd, data); 1171 #endif 1172 1173 s = splnet(); 1174 1175 switch (cmd) { 1176 1177 case SIOCSIFADDR: 1178 ifp->if_flags |= IFF_UP; 1179 1180 switch (ifa->ifa_addr->sa_family) { 1181 #ifdef INET 1182 case AF_INET: 1183 iyinit(sc); 1184 arp_ifinit(ifp, ifa); 1185 break; 1186 #endif 1187 #ifdef NS 1188 /* XXX - This code is probably wrong. */ 1189 case AF_NS: 1190 { 1191 struct ns_addr *ina = &IA_SNS(ifa)->sns_addr; 1192 1193 if (ns_nullhost(*ina)) 1194 ina->x_host = *(union ns_host *) 1195 LLADDR(ifp->if_sadl); 1196 else 1197 bcopy(ina->x_host.c_host, LLADDR(ifp->if_sadl), 1198 ETHER_ADDR_LEN); 1199 /* Set new address. */ 1200 iyinit(sc); 1201 break; 1202 } 1203 #endif /* NS */ 1204 default: 1205 iyinit(sc); 1206 break; 1207 } 1208 break; 1209 1210 case SIOCSIFFLAGS: 1211 sc->promisc = ifp->if_flags & (IFF_PROMISC | IFF_ALLMULTI); 1212 if ((ifp->if_flags & IFF_UP) == 0 && 1213 (ifp->if_flags & IFF_RUNNING) != 0) { 1214 /* 1215 * If interface is marked down and it is running, then 1216 * stop it. 1217 */ 1218 iystop(sc); 1219 ifp->if_flags &= ~IFF_RUNNING; 1220 } else if ((ifp->if_flags & IFF_UP) != 0 && 1221 (ifp->if_flags & IFF_RUNNING) == 0) { 1222 /* 1223 * If interface is marked up and it is stopped, then 1224 * start it. 1225 */ 1226 iyinit(sc); 1227 } else { 1228 /* 1229 * Reset the interface to pick up changes in any other 1230 * flags that affect hardware registers. 1231 */ 1232 iystop(sc); 1233 iyinit(sc); 1234 } 1235 #ifdef IYDEBUGX 1236 if (ifp->if_flags & IFF_DEBUG) 1237 sc->sc_debug = IFY_ALL; 1238 else 1239 sc->sc_debug = 0; 1240 #endif 1241 break; 1242 1243 case SIOCADDMULTI: 1244 case SIOCDELMULTI: 1245 error = (cmd == SIOCADDMULTI) ? 1246 ether_addmulti(ifr, &sc->sc_ethercom): 1247 ether_delmulti(ifr, &sc->sc_ethercom); 1248 1249 if (error == ENETRESET) { 1250 /* 1251 * Multicast list has changed; set the hardware filter 1252 * accordingly. 1253 */ 1254 iyreset(sc); /* XXX can't make it work otherwise */ 1255 iy_mc_reset(sc); 1256 error = 0; 1257 } 1258 break; 1259 1260 case SIOCSIFMEDIA: 1261 case SIOCGIFMEDIA: 1262 error = ifmedia_ioctl(ifp, ifr, &sc->iy_ifmedia, cmd); 1263 break; 1264 default: 1265 error = EINVAL; 1266 } 1267 splx(s); 1268 return error; 1269 } 1270 1271 int 1272 iy_mediachange(ifp) 1273 struct ifnet *ifp; 1274 { 1275 struct iy_softc *sc = ifp->if_softc; 1276 1277 if (IFM_TYPE(sc->iy_ifmedia.ifm_media) != IFM_ETHER) 1278 return EINVAL; 1279 switch(IFM_SUBTYPE(sc->iy_ifmedia.ifm_media)) { 1280 case IFM_10_5: 1281 case IFM_10_2: 1282 case IFM_10_T: 1283 case IFM_AUTO: 1284 iystop(sc); 1285 iyinit(sc); 1286 return 0; 1287 default: 1288 return EINVAL; 1289 } 1290 } 1291 1292 void 1293 iy_mediastatus(ifp, ifmr) 1294 struct ifnet *ifp; 1295 struct ifmediareq *ifmr; 1296 { 1297 struct iy_softc *sc = ifp->if_softc; 1298 1299 ifmr->ifm_active = sc->iy_media; 1300 ifmr->ifm_status = IFM_AVALID | IFM_ACTIVE; 1301 } 1302 1303 1304 static void 1305 iy_mc_setup(sc) 1306 struct iy_softc *sc; 1307 { 1308 struct ether_multi *enm; 1309 struct ether_multistep step; 1310 struct ethercom *ecp; 1311 struct ifnet *ifp; 1312 bus_space_tag_t iot; 1313 bus_space_handle_t ioh; 1314 int avail, last /*, end*/ , len; 1315 int timeout; 1316 volatile u_int16_t dum; 1317 u_int8_t temp; 1318 1319 1320 ecp = &sc->sc_ethercom; 1321 ifp = &ecp->ec_if; 1322 1323 iot = sc->sc_iot; 1324 ioh = sc->sc_ioh; 1325 1326 len = 6 * ecp->ec_multicnt; 1327 1328 avail = sc->tx_start - sc->tx_end; 1329 if (avail <= 0) 1330 avail += sc->tx_size; 1331 if (ifp->if_flags & IFF_DEBUG) 1332 printf("%s: iy_mc_setup called, %d addresses, " 1333 "%d/%d bytes needed/avail\n", ifp->if_xname, 1334 ecp->ec_multicnt, len + I595_XMT_HDRLEN, avail); 1335 1336 last = sc->rx_size; 1337 1338 bus_space_write_1(iot, ioh, 0, BANK_SEL(2)); 1339 bus_space_write_1(iot, ioh, RECV_MODES_REG, MATCH_ID); 1340 /* XXX VOODOO */ 1341 temp = bus_space_read_1(iot, ioh, MEDIA_SELECT); 1342 bus_space_write_1(iot, ioh, MEDIA_SELECT, temp); 1343 /* XXX END OF VOODOO */ 1344 bus_space_write_1(iot, ioh, 0, BANK_SEL(0)); 1345 bus_space_write_2(iot, ioh, HOST_ADDR_REG, last); 1346 bus_space_write_stream_2(iot, ioh, MEM_PORT_REG, htole16(MC_SETUP_CMD)); 1347 bus_space_write_2(iot, ioh, MEM_PORT_REG, 0); 1348 bus_space_write_2(iot, ioh, MEM_PORT_REG, 0); 1349 bus_space_write_stream_2(iot, ioh, MEM_PORT_REG, htole16(len)); 1350 1351 ETHER_FIRST_MULTI(step, ecp, enm); 1352 while(enm) { 1353 bus_space_write_multi_stream_2(iot, ioh, MEM_PORT_REG, 1354 enm->enm_addrlo, 3); 1355 1356 ETHER_NEXT_MULTI(step, enm); 1357 } 1358 dum = bus_space_read_2(iot, ioh, MEM_PORT_REG); /* dummy read */ 1359 bus_space_write_2(iot, ioh, XMT_ADDR_REG, last); 1360 bus_space_write_1(iot, ioh, 0, MC_SETUP_CMD); 1361 1362 1363 sc->tx_start = sc->rx_size; 1364 sc->tx_end = sc->rx_size + I595_XMT_HDRLEN + len; 1365 1366 for (timeout=0; timeout<100; timeout++) { 1367 DELAY(2); 1368 if ((bus_space_read_1(iot, ioh, STATUS_REG) & EXEC_INT) == 0) 1369 continue; 1370 1371 temp = bus_space_read_1(iot, ioh, 0); 1372 bus_space_write_1(iot, ioh, STATUS_REG, EXEC_INT); 1373 #ifdef DIAGNOSTIC 1374 if (temp & 0x20) { 1375 printf("%s: mc setup failed, %d usec\n", 1376 sc->sc_dev.dv_xname, timeout * 2); 1377 } else if (((temp & 0x0f) == 0x03) && 1378 (ifp->if_flags & IFF_DEBUG)) { 1379 printf("%s: mc setup done, %d usec\n", 1380 sc->sc_dev.dv_xname, timeout * 2); 1381 } 1382 #endif 1383 break; 1384 } 1385 sc->tx_start = sc->tx_end; 1386 ifp->if_flags &= ~IFF_OACTIVE; 1387 1388 } 1389 1390 static void 1391 iy_mc_reset(sc) 1392 struct iy_softc *sc; 1393 { 1394 struct ether_multi *enm; 1395 struct ether_multistep step; 1396 struct ethercom *ecp; 1397 struct ifnet *ifp; 1398 bus_space_tag_t iot; 1399 bus_space_handle_t ioh; 1400 u_int16_t temp; 1401 1402 ecp = &sc->sc_ethercom; 1403 ifp = &ecp->ec_if; 1404 1405 iot = sc->sc_iot; 1406 ioh = sc->sc_ioh; 1407 1408 if (ecp->ec_multicnt > 63) { 1409 ifp->if_flags |= IFF_ALLMULTI; 1410 1411 } else if (ecp->ec_multicnt > 0) { 1412 /* 1413 * Step through the list of addresses. 1414 */ 1415 ETHER_FIRST_MULTI(step, ecp, enm); 1416 while(enm) { 1417 if (bcmp(enm->enm_addrlo, enm->enm_addrhi, 6) != 0) { 1418 ifp->if_flags |= IFF_ALLMULTI; 1419 goto setupmulti; 1420 } 1421 ETHER_NEXT_MULTI(step, enm); 1422 } 1423 /* OK, we really need to do it now: */ 1424 #if 0 1425 if ((ifp->if_flags & (IFF_RUNNING | IFF_OACTIVE)) 1426 != IFF_RUNNING) { 1427 ifp->if_flags |= IFF_OACTIVE; 1428 sc->want_mc_setup = 1; 1429 return; 1430 } 1431 #endif 1432 iy_mc_setup(sc); 1433 } else { 1434 ifp->if_flags &= ~IFF_ALLMULTI; 1435 } 1436 1437 setupmulti: 1438 bus_space_write_1(iot, ioh, 0, BANK_SEL(2)); 1439 if (ifp->if_flags & (IFF_PROMISC|IFF_ALLMULTI)) { 1440 temp = MATCH_ALL; 1441 } else 1442 temp = MATCH_ID; 1443 1444 bus_space_write_1(iot, ioh, RECV_MODES_REG, temp); 1445 /* XXX VOODOO */ 1446 temp = bus_space_read_1(iot, ioh, MEDIA_SELECT); 1447 bus_space_write_1(iot, ioh, MEDIA_SELECT, temp); 1448 /* XXX END OF VOODOO */ 1449 1450 /* XXX TBD: setup hardware for all multicasts */ 1451 bus_space_write_1(iot, ioh, 0, BANK_SEL(0)); 1452 return; 1453 } 1454 1455 #ifdef IYDEBUGX 1456 void 1457 print_rbd(rbd) 1458 volatile struct ie_recv_buf_desc *rbd; 1459 { 1460 printf("RBD at %08lx:\nactual %04x, next %04x, buffer %08x\n" 1461 "length %04x, mbz %04x\n", (u_long)rbd, rbd->ie_rbd_actual, 1462 rbd->ie_rbd_next, rbd->ie_rbd_buffer, rbd->ie_rbd_length, 1463 rbd->mbz); 1464 } 1465 #endif 1466 1467 void 1468 iyprobemem(sc) 1469 struct iy_softc *sc; 1470 { 1471 bus_space_tag_t iot; 1472 bus_space_handle_t ioh; 1473 int testing; 1474 1475 iot = sc->sc_iot; 1476 ioh = sc->sc_ioh; 1477 1478 bus_space_write_1(iot, ioh, COMMAND_REG, BANK_SEL(0)); 1479 delay(1); 1480 bus_space_write_2(iot, ioh, HOST_ADDR_REG, 4096-2); 1481 bus_space_write_2(iot, ioh, MEM_PORT_REG, 0); 1482 1483 for (testing=65536; testing >= 4096; testing >>= 1) { 1484 bus_space_write_2(iot, ioh, HOST_ADDR_REG, testing-2); 1485 bus_space_write_2(iot, ioh, MEM_PORT_REG, 0xdead); 1486 bus_space_write_2(iot, ioh, HOST_ADDR_REG, testing-2); 1487 if (bus_space_read_2(iot, ioh, MEM_PORT_REG) != 0xdead) { 1488 #ifdef IYMEMDEBUG 1489 printf("%s: Didn't keep 0xdead at 0x%x\n", 1490 sc->sc_dev.dv_xname, testing-2); 1491 #endif 1492 continue; 1493 } 1494 1495 bus_space_write_2(iot, ioh, HOST_ADDR_REG, testing-2); 1496 bus_space_write_2(iot, ioh, MEM_PORT_REG, 0xbeef); 1497 bus_space_write_2(iot, ioh, HOST_ADDR_REG, testing-2); 1498 if (bus_space_read_2(iot, ioh, MEM_PORT_REG) != 0xbeef) { 1499 #ifdef IYMEMDEBUG 1500 printf("%s: Didn't keep 0xbeef at 0x%x\n", 1501 sc->sc_dev.dv_xname, testing-2); 1502 #endif 1503 continue; 1504 } 1505 1506 bus_space_write_2(iot, ioh, HOST_ADDR_REG, 0); 1507 bus_space_write_2(iot, ioh, MEM_PORT_REG, 0); 1508 bus_space_write_2(iot, ioh, HOST_ADDR_REG, testing >> 1); 1509 bus_space_write_2(iot, ioh, MEM_PORT_REG, testing >> 1); 1510 bus_space_write_2(iot, ioh, HOST_ADDR_REG, 0); 1511 if (bus_space_read_2(iot, ioh, MEM_PORT_REG) == (testing >> 1)) { 1512 #ifdef IYMEMDEBUG 1513 printf("%s: 0x%x alias of 0x0\n", 1514 sc->sc_dev.dv_xname, testing >> 1); 1515 #endif 1516 continue; 1517 } 1518 1519 break; 1520 } 1521 1522 sc->sram = testing; 1523 1524 switch(testing) { 1525 case 65536: 1526 /* 4 NFS packets + overhead RX, 2 NFS + overhead TX */ 1527 sc->rx_size = 44*1024; 1528 break; 1529 1530 case 32768: 1531 /* 2 NFS packets + overhead RX, 1 NFS + overhead TX */ 1532 sc->rx_size = 22*1024; 1533 break; 1534 1535 case 16384: 1536 /* 1 NFS packet + overhead RX, 4 big packets TX */ 1537 sc->rx_size = 10*1024; 1538 break; 1539 default: 1540 sc->rx_size = testing/2; 1541 break; 1542 } 1543 sc->tx_size = testing - sc->rx_size; 1544 } 1545 1546 static int 1547 eepromreadall(iot, ioh, wordp, maxi) 1548 bus_space_tag_t iot; 1549 bus_space_handle_t ioh; 1550 u_int16_t *wordp; 1551 int maxi; 1552 { 1553 int i; 1554 u_int16_t checksum, tmp; 1555 1556 checksum = 0; 1557 1558 for (i=0; i<EEPP_LENGTH; ++i) { 1559 tmp = eepromread(iot, ioh, i); 1560 checksum += tmp; 1561 if (i<maxi) 1562 wordp[i] = tmp; 1563 } 1564 1565 if (checksum != EEPP_CHKSUM) { 1566 #ifdef IYDEBUG 1567 printf("wrong EEPROM checksum 0x%x should be 0x%x\n", 1568 checksum, EEPP_CHKSUM); 1569 #endif 1570 return 1; 1571 } 1572 return 0; 1573 } 1574
Indexes created Fri Sep 26 08:10:20 GMT 2025