if_iy.c revision 1.52
1 /* $NetBSD: if_iy.c,v 1.52 2001/03/23 13:15:27 is Exp $ */ 2 /* #define IYDEBUG */ 3 /* #define IYMEMDEBUG */ 4 5 /*- 6 * Copyright (c) 1996,2001 The NetBSD Foundation, Inc. 7 * All rights reserved. 8 * 9 * This code is derived from software contributed to The NetBSD Foundation 10 * by Ignatios Souvatzis. 11 * 12 * Redistribution and use in source and binary forms, with or without 13 * modification, are permitted provided that the following conditions 14 * are met: 15 * 1. Redistributions of source code must retain the above copyright 16 * notice, this list of conditions and the following disclaimer. 17 * 2. Redistributions in binary form must reproduce the above copyright 18 * notice, this list of conditions and the following disclaimer in the 19 * documentation and/or other materials provided with the distribution. 20 * 3. All advertising materials mentioning features or use of this software 21 * must display the following acknowledgement: 22 * This product includes software developed by the NetBSD 23 * Foundation, Inc. and its contributors. 24 * 4. Neither the name of The NetBSD Foundation nor the names of its 25 * contributors may be used to endorse or promote products derived 26 * from this software without specific prior written permission. 27 * 28 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 29 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 30 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 31 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 32 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 33 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 34 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 35 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 36 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 37 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 38 * POSSIBILITY OF SUCH DAMAGE. 39 */ 40 41 /* 42 * Supported hardware: 43 * 44 * - Intel EtherExpress Pro/10. 45 * - possibly other boards using the i82595 chip and no special tweaks. 46 */ 47 48 #include "opt_inet.h" 49 #include "opt_ns.h" 50 #include "bpfilter.h" 51 #include "rnd.h" 52 53 #include <sys/param.h> 54 #include <sys/systm.h> 55 #include <sys/mbuf.h> 56 #include <sys/buf.h> 57 #include <sys/protosw.h> 58 #include <sys/socket.h> 59 #include <sys/ioctl.h> 60 #include <sys/errno.h> 61 #include <sys/syslog.h> 62 #include <sys/device.h> 63 #include <sys/endian.h> 64 #if NRND > 0 65 #include <sys/rnd.h> 66 #endif 67 68 #include <net/if.h> 69 #include <net/if_types.h> 70 #include <net/if_dl.h> 71 72 #include <net/if_ether.h> 73 74 #if NBPFILTER > 0 75 #include <net/bpf.h> 76 #include <net/bpfdesc.h> 77 #endif 78 79 #ifdef INET 80 #include <netinet/in.h> 81 #include <netinet/in_systm.h> 82 #include <netinet/in_var.h> 83 #include <netinet/ip.h> 84 #include <netinet/if_inarp.h> 85 #endif 86 87 #ifdef NS 88 #include <netns/ns.h> 89 #include <netns/ns_if.h> 90 #endif 91 92 #if defined(SIOCSIFMEDIA) 93 #include <net/if_media.h> 94 #endif 95 96 #include <machine/cpu.h> 97 #include <machine/bus.h> 98 #include <machine/intr.h> 99 100 #include <dev/isa/isareg.h> 101 #include <dev/isa/isavar.h> 102 #include <dev/ic/i82595reg.h> 103 104 /* XXX why isn't this centralized? */ 105 #ifndef __BUS_SPACE_HAS_STREAM_METHODS 106 #define bus_space_write_stream_2 bus_space_write_2 107 #define bus_space_write_multi_stream_2 bus_space_write_multi_2 108 #define bus_space_read_stream_2 bus_space_read_2 109 #define bus_space_read_multi_stream_2 bus_space_read_multi_2 110 #endif /* __BUS_SPACE_HAS_STREAM_METHODS */ 111 112 /* 113 * Ethernet status, per interface. 114 */ 115 struct iy_softc { 116 struct device sc_dev; 117 void *sc_ih; 118 119 bus_space_tag_t sc_iot; 120 bus_space_handle_t sc_ioh; 121 122 struct ethercom sc_ethercom; 123 124 struct ifmedia iy_ifmedia; 125 int iy_media; 126 127 int mappedirq; 128 129 int hard_vers; 130 131 int promisc; 132 133 int sram, tx_size, rx_size; 134 135 int tx_start, tx_end, tx_last; 136 int rx_start; 137 138 int doing_mc_setup; 139 #ifdef IYDEBUG 140 int sc_debug; 141 #endif 142 143 #if NRND > 0 144 rndsource_element_t rnd_source; 145 #endif 146 }; 147 148 void iywatchdog __P((struct ifnet *)); 149 int iyioctl __P((struct ifnet *, u_long, caddr_t)); 150 int iyintr __P((void *)); 151 void iyinit __P((struct iy_softc *)); 152 void iystop __P((struct iy_softc *)); 153 void iystart __P((struct ifnet *)); 154 155 void iy_intr_rx __P((struct iy_softc *)); 156 void iy_intr_tx __P((struct iy_softc *)); 157 158 void iyreset __P((struct iy_softc *)); 159 void iy_readframe __P((struct iy_softc *, int)); 160 void iy_drop_packet_buffer __P((struct iy_softc *)); 161 void iy_find_mem_size __P((struct iy_softc *)); 162 void iyrint __P((struct iy_softc *)); 163 void iytint __P((struct iy_softc *)); 164 void iyxmit __P((struct iy_softc *)); 165 static void iy_mc_setup __P((struct iy_softc *)); 166 static void iy_mc_reset __P((struct iy_softc *)); 167 void iyget __P((struct iy_softc *, bus_space_tag_t, bus_space_handle_t, int)); 168 void iyprobemem __P((struct iy_softc *)); 169 static __inline void eepromwritebit __P((bus_space_tag_t, bus_space_handle_t, 170 int)); 171 static __inline int eepromreadbit __P((bus_space_tag_t, bus_space_handle_t)); 172 173 #ifdef IYDEBUGX 174 void print_rbd __P((volatile struct iy_recv_buf_desc *)); 175 176 int in_ifrint = 0; 177 int in_iftint = 0; 178 #endif 179 180 int iy_mediachange __P((struct ifnet *)); 181 void iy_mediastatus __P((struct ifnet *, struct ifmediareq *)); 182 183 int iyprobe __P((struct device *, struct cfdata *, void *)); 184 void iyattach __P((struct device *, struct device *, void *)); 185 186 static u_int16_t eepromread __P((bus_space_tag_t, bus_space_handle_t, int)); 187 188 static int eepromreadall __P((bus_space_tag_t, bus_space_handle_t, u_int16_t *, 189 int)); 190 191 struct cfattach iy_ca = { 192 sizeof(struct iy_softc), iyprobe, iyattach 193 }; 194 195 static u_int8_t eepro_irqmap[] = EEPP_INTMAP; 196 static u_int8_t eepro_revirqmap[] = EEPP_RINTMAP; 197 198 int 199 iyprobe(parent, match, aux) 200 struct device *parent; 201 struct cfdata *match; 202 void *aux; 203 { 204 struct isa_attach_args *ia = aux; 205 u_int16_t eaddr[8]; 206 207 bus_space_tag_t iot; 208 bus_space_handle_t ioh; 209 210 u_int8_t c, d; 211 212 iot = ia->ia_iot; 213 214 if (ia->ia_iobase == IOBASEUNK) 215 return 0; 216 217 if (bus_space_map(iot, ia->ia_iobase, 16, 0, &ioh)) 218 return 0; 219 220 /* try to find the round robin sig: */ 221 222 c = bus_space_read_1(iot, ioh, ID_REG); 223 if ((c & ID_REG_MASK) != ID_REG_SIG) 224 goto out; 225 226 d = bus_space_read_1(iot, ioh, ID_REG); 227 if ((d & ID_REG_MASK) != ID_REG_SIG) 228 goto out; 229 230 if (((d-c) & R_ROBIN_BITS) != 0x40) 231 goto out; 232 233 d = bus_space_read_1(iot, ioh, ID_REG); 234 if ((d & ID_REG_MASK) != ID_REG_SIG) 235 goto out; 236 237 if (((d-c) & R_ROBIN_BITS) != 0x80) 238 goto out; 239 240 d = bus_space_read_1(iot, ioh, ID_REG); 241 if ((d & ID_REG_MASK) != ID_REG_SIG) 242 goto out; 243 244 if (((d-c) & R_ROBIN_BITS) != 0xC0) 245 goto out; 246 247 d = bus_space_read_1(iot, ioh, ID_REG); 248 if ((d & ID_REG_MASK) != ID_REG_SIG) 249 goto out; 250 251 if (((d-c) & R_ROBIN_BITS) != 0x00) 252 goto out; 253 254 #ifdef IYDEBUG 255 printf("iyprobe verified working ID reg.\n"); 256 #endif 257 258 if (eepromreadall(iot, ioh, eaddr, 8)) 259 goto out; 260 261 if (ia->ia_irq == IRQUNK) 262 ia->ia_irq = eepro_irqmap[eaddr[EEPPW1] & EEPP_Int]; 263 264 if (ia->ia_irq >= sizeof(eepro_revirqmap)) 265 goto out; 266 267 if (eepro_revirqmap[ia->ia_irq] == 0xff) 268 goto out; 269 270 /* now lets reset the chip */ 271 272 bus_space_write_1(iot, ioh, COMMAND_REG, RESET_CMD); 273 delay(200); 274 275 ia->ia_iosize = 16; 276 277 bus_space_unmap(iot, ioh, 16); 278 return 1; /* found */ 279 out: 280 bus_space_unmap(iot, ioh, 16); 281 return 0; 282 } 283 284 void 285 iyattach(parent, self, aux) 286 struct device *parent, *self; 287 void *aux; 288 { 289 struct iy_softc *sc = (void *)self; 290 struct isa_attach_args *ia = aux; 291 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 292 bus_space_tag_t iot; 293 bus_space_handle_t ioh; 294 unsigned temp; 295 u_int16_t eaddr[8]; 296 u_int8_t myaddr[ETHER_ADDR_LEN]; 297 int eirq; 298 299 iot = ia->ia_iot; 300 301 if (bus_space_map(iot, ia->ia_iobase, 16, 0, &ioh)) { 302 printf(": can't map i/o space\n"); 303 return; 304 } 305 306 sc->sc_iot = iot; 307 sc->sc_ioh = ioh; 308 309 sc->mappedirq = eepro_revirqmap[ia->ia_irq]; 310 311 /* now let's reset the chip */ 312 313 bus_space_write_1(iot, ioh, COMMAND_REG, RESET_CMD); 314 delay(200); 315 316 iyprobemem(sc); 317 318 bcopy(sc->sc_dev.dv_xname, ifp->if_xname, IFNAMSIZ); 319 ifp->if_softc = sc; 320 ifp->if_start = iystart; 321 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_NOTRAILERS 322 | IFF_MULTICAST; 323 324 sc->doing_mc_setup = 0; 325 326 ifp->if_ioctl = iyioctl; 327 ifp->if_watchdog = iywatchdog; 328 329 IFQ_SET_READY(&ifp->if_snd); 330 331 (void)eepromreadall(iot, ioh, eaddr, 8); 332 sc->hard_vers = eaddr[EEPW6] & EEPP_BoardRev; 333 334 #ifdef DIAGNOSTICS 335 if ((eaddr[EEPPEther0] != 336 eepromread(iot, ioh, EEPPEther0a)) && 337 (eaddr[EEPPEther1] != 338 eepromread(iot, ioh, EEPPEther1a)) && 339 (eaddr[EEPPEther2] != 340 eepromread(iot, ioh, EEPPEther2a))) 341 342 printf("EEPROM Ethernet address differs from copy\n"); 343 #endif 344 345 myaddr[1] = eaddr[EEPPEther0] & 0xFF; 346 myaddr[0] = eaddr[EEPPEther0] >> 8; 347 myaddr[3] = eaddr[EEPPEther1] & 0xFF; 348 myaddr[2] = eaddr[EEPPEther1] >> 8; 349 myaddr[5] = eaddr[EEPPEther2] & 0xFF; 350 myaddr[4] = eaddr[EEPPEther2] >> 8; 351 352 ifmedia_init(&sc->iy_ifmedia, 0, iy_mediachange, iy_mediastatus); 353 ifmedia_add(&sc->iy_ifmedia, IFM_ETHER | IFM_10_2, 0, NULL); 354 ifmedia_add(&sc->iy_ifmedia, IFM_ETHER | IFM_10_5, 0, NULL); 355 ifmedia_add(&sc->iy_ifmedia, IFM_ETHER | IFM_10_T, 0, NULL); 356 ifmedia_add(&sc->iy_ifmedia, IFM_ETHER | IFM_AUTO, 0, NULL); 357 ifmedia_set(&sc->iy_ifmedia, IFM_ETHER | IFM_AUTO); 358 /* Attach the interface. */ 359 if_attach(ifp); 360 ether_ifattach(ifp, myaddr); 361 printf(": address %s, rev. %d, %d kB\n", 362 ether_sprintf(myaddr), 363 sc->hard_vers, sc->sram/1024); 364 365 eirq = eepro_irqmap[eaddr[EEPPW1] & EEPP_Int]; 366 if (eirq != ia->ia_irq) 367 printf("%s: EEPROM irq setting %d ignored\n", 368 sc->sc_dev.dv_xname, eirq); 369 370 sc->sc_ih = isa_intr_establish(ia->ia_ic, ia->ia_irq, IST_EDGE, 371 IPL_NET, iyintr, sc); 372 373 #if NRND > 0 374 rnd_attach_source(&sc->rnd_source, sc->sc_dev.dv_xname, 375 RND_TYPE_NET, 0); 376 #endif 377 378 temp = bus_space_read_1(iot, ioh, INT_NO_REG); 379 bus_space_write_1(iot, ioh, INT_NO_REG, (temp & 0xf8) | sc->mappedirq); 380 } 381 382 void 383 iystop(sc) 384 struct iy_softc *sc; 385 { 386 bus_space_tag_t iot; 387 bus_space_handle_t ioh; 388 #ifdef IYDEBUG 389 u_int p, v; 390 #endif 391 392 iot = sc->sc_iot; 393 ioh = sc->sc_ioh; 394 395 bus_space_write_1(iot, ioh, COMMAND_REG, RCV_DISABLE_CMD); 396 397 bus_space_write_1(iot, ioh, INT_MASK_REG, ALL_INTS); 398 bus_space_write_1(iot, ioh, STATUS_REG, ALL_INTS); 399 400 bus_space_write_1(iot, ioh, COMMAND_REG, RESET_CMD); 401 delay(200); 402 #ifdef IYDEBUG 403 printf("%s: dumping tx chain (st 0x%x end 0x%x last 0x%x)\n", 404 sc->sc_dev.dv_xname, sc->tx_start, sc->tx_end, sc->tx_last); 405 p = sc->tx_last; 406 if (!p) 407 p = sc->tx_start; 408 do { 409 char sbuf[128]; 410 411 bus_space_write_2(iot, ioh, HOST_ADDR_REG, p); 412 413 v = le16toh(bus_space_read_stream_2(iot, ioh, MEM_PORT_REG)); 414 bitmask_snprintf(v, "\020\006Ab\010Dn", sbuf, sizeof(sbuf)); 415 printf("0x%04x: %s ", p, sbuf); 416 417 v = le16toh(bus_space_read_stream_2(iot, ioh, MEM_PORT_REG)); 418 bitmask_snprintf(v, "\020\6MAX_COL\7HRT_BEAT\010TX_DEF\011UND_RUN\012JERR\013LST_CRS\014LTCOL\016TX_OK\020COLL", 419 sbuf, sizeof(sbuf)); 420 printf("0x%s", sbuf); 421 422 p = le16toh(bus_space_read_stream_2(iot, ioh, MEM_PORT_REG)); 423 printf(" 0x%04x", p); 424 425 v = le16toh(bus_space_read_stream_2(iot, ioh, MEM_PORT_REG)); 426 bitmask_snprintf(v, "\020\020Ch", sbuf, sizeof(sbuf)); 427 printf(" 0x%s\n", sbuf); 428 429 } while (v & 0x8000); 430 #endif 431 sc->tx_start = sc->tx_end = sc->rx_size; 432 sc->tx_last = 0; 433 sc->sc_ethercom.ec_if.if_flags &= ~(IFF_RUNNING|IFF_OACTIVE); 434 } 435 436 void 437 iyreset(sc) 438 struct iy_softc *sc; 439 { 440 int s; 441 s = splnet(); 442 iystop(sc); 443 iyinit(sc); 444 splx(s); 445 } 446 447 void 448 iyinit(sc) 449 struct iy_softc *sc; 450 { 451 int i; 452 unsigned temp; 453 struct ifnet *ifp; 454 bus_space_tag_t iot; 455 bus_space_handle_t ioh; 456 457 iot = sc->sc_iot; 458 ioh = sc->sc_ioh; 459 460 ifp = &sc->sc_ethercom.ec_if; 461 #ifdef IYDEBUG 462 printf("ifp is %p\n", ifp); 463 #endif 464 465 bus_space_write_1(iot, ioh, 0, BANK_SEL(2)); 466 467 temp = bus_space_read_1(iot, ioh, EEPROM_REG); 468 if (temp & 0x10) 469 bus_space_write_1(iot, ioh, EEPROM_REG, temp & ~0x10); 470 471 for (i=0; i<6; ++i) { 472 bus_space_write_1(iot, ioh, I_ADD(i), LLADDR(ifp->if_sadl)[i]); 473 } 474 475 temp = bus_space_read_1(iot, ioh, REG1); 476 bus_space_write_1(iot, ioh, REG1, 477 temp | /* XMT_CHAIN_INT | XMT_CHAIN_ERRSTOP | */ RCV_DISCARD_BAD); 478 479 if (ifp->if_flags & (IFF_PROMISC|IFF_ALLMULTI)) { 480 temp = MATCH_ALL; 481 } else 482 temp = MATCH_BRDCST; 483 484 bus_space_write_1(iot, ioh, RECV_MODES_REG, temp); 485 486 #ifdef IYDEBUG 487 { 488 char sbuf[128]; 489 490 bitmask_snprintf(temp, "\020\1PRMSC\2NOBRDST\3SEECRC\4LENGTH\5NOSaIns\6MultiIA", 491 sbuf, sizeof(sbuf)); 492 printf("%s: RECV_MODES set to %s\n", sc->sc_dev.dv_xname, sbuf); 493 } 494 #endif 495 /* XXX VOODOO */ 496 temp = bus_space_read_1(iot, ioh, MEDIA_SELECT); 497 bus_space_write_1(iot, ioh, MEDIA_SELECT, temp); 498 /* XXX END OF VOODOO */ 499 500 501 delay(500000); /* for the hardware to test for the connector */ 502 503 temp = bus_space_read_1(iot, ioh, MEDIA_SELECT); 504 #ifdef IYDEBUG 505 { 506 char sbuf[128]; 507 508 bitmask_snprintf(temp, "\020\1LnkInDis\2PolCor\3TPE\4JabberDis\5NoAport\6BNC", 509 sbuf, sizeof(sbuf)); 510 printf("%s: media select was 0x%s ", sc->sc_dev.dv_xname, sbuf); 511 } 512 #endif 513 temp = (temp & TEST_MODE_MASK); 514 515 switch(IFM_SUBTYPE(sc->iy_ifmedia.ifm_media)) { 516 case IFM_10_5: 517 temp &= ~ (BNC_BIT | TPE_BIT); 518 break; 519 520 case IFM_10_2: 521 temp = (temp & ~TPE_BIT) | BNC_BIT; 522 break; 523 524 case IFM_10_T: 525 temp = (temp & ~BNC_BIT) | TPE_BIT; 526 break; 527 default: 528 /* nothing; leave as it is */ 529 } 530 switch (temp & (BNC_BIT | TPE_BIT)) { 531 case BNC_BIT: 532 sc->iy_media = IFM_ETHER | IFM_10_2; 533 break; 534 case TPE_BIT: 535 sc->iy_media = IFM_ETHER | IFM_10_T; 536 break; 537 default: 538 sc->iy_media = IFM_ETHER | IFM_10_5; 539 } 540 541 bus_space_write_1(iot, ioh, MEDIA_SELECT, temp); 542 #ifdef IYDEBUG 543 { 544 char sbuf[128]; 545 546 bitmask_snprintf(temp, "\020\1LnkInDis\2PolCor\3TPE\4JabberDis\5NoAport\6BNC", 547 sbuf, sizeof(sbuf)); 548 printf("changed to 0x%s\n", sbuf); 549 } 550 #endif 551 552 bus_space_write_1(iot, ioh, 0, BANK_SEL(0)); 553 bus_space_write_1(iot, ioh, INT_MASK_REG, ALL_INTS); 554 bus_space_write_1(iot, ioh, 0, BANK_SEL(1)); 555 556 temp = bus_space_read_1(iot, ioh, INT_NO_REG); 557 bus_space_write_1(iot, ioh, INT_NO_REG, (temp & 0xf8) | sc->mappedirq); 558 559 #ifdef IYDEBUG 560 { 561 char sbuf[128]; 562 563 bitmask_snprintf(temp, "\020\4bad_irq\010flash/boot present", 564 sbuf, sizeof(sbuf)); 565 printf("%s: int no was %s\n", sc->sc_dev.dv_xname, sbuf); 566 567 temp = bus_space_read_1(iot, ioh, INT_NO_REG); 568 bitmask_snprintf(temp, "\020\4bad_irq\010flash/boot present", 569 sbuf, sizeof(sbuf)); 570 printf("%s: int no now %s\n", sc->sc_dev.dv_xname, sbuf); 571 } 572 #endif 573 574 bus_space_write_1(iot, ioh, RCV_LOWER_LIMIT_REG, 0); 575 bus_space_write_1(iot, ioh, RCV_UPPER_LIMIT_REG, (sc->rx_size -2) >>8); 576 bus_space_write_1(iot, ioh, XMT_LOWER_LIMIT_REG, sc->rx_size >>8); 577 bus_space_write_1(iot, ioh, XMT_UPPER_LIMIT_REG, (sc->sram - 2) >>8); 578 579 temp = bus_space_read_1(iot, ioh, REG1); 580 #ifdef IYDEBUG 581 { 582 char sbuf[128]; 583 584 bitmask_snprintf(temp, "\020\2WORD_WIDTH\010INT_ENABLE", 585 sbuf, sizeof(sbuf)); 586 printf("%s: HW access is %s\n", sc->sc_dev.dv_xname, sbuf); 587 } 588 #endif 589 bus_space_write_1(iot, ioh, REG1, temp | INT_ENABLE); /* XXX what about WORD_WIDTH? */ 590 591 #ifdef IYDEBUG 592 { 593 char sbuf[128]; 594 595 temp = bus_space_read_1(iot, ioh, REG1); 596 bitmask_snprintf(temp, "\020\2WORD_WIDTH\010INT_ENABLE", 597 sbuf, sizeof(sbuf)); 598 printf("%s: HW access is %s\n", sc->sc_dev.dv_xname, sbuf); 599 } 600 #endif 601 602 bus_space_write_1(iot, ioh, 0, BANK_SEL(0)); 603 604 bus_space_write_1(iot, ioh, INT_MASK_REG, ALL_INTS & ~(RX_BIT|TX_BIT)); 605 bus_space_write_1(iot, ioh, STATUS_REG, ALL_INTS); /* clear ints */ 606 607 bus_space_write_1(iot, ioh, RCV_COPY_THRESHOLD, 0); 608 609 bus_space_write_2(iot, ioh, RCV_START_LOW, 0); 610 bus_space_write_2(iot, ioh, RCV_STOP_LOW, sc->rx_size - 2); 611 sc->rx_start = 0; 612 613 bus_space_write_1(iot, ioh, 0, SEL_RESET_CMD); 614 delay(200); 615 616 bus_space_write_2(iot, ioh, XMT_ADDR_REG, sc->rx_size); 617 618 sc->tx_start = sc->tx_end = sc->rx_size; 619 sc->tx_last = 0; 620 621 bus_space_write_1(iot, ioh, 0, RCV_ENABLE_CMD); 622 623 ifp->if_flags |= IFF_RUNNING; 624 ifp->if_flags &= ~IFF_OACTIVE; 625 } 626 627 void 628 iystart(ifp) 629 struct ifnet *ifp; 630 { 631 struct iy_softc *sc; 632 633 634 struct mbuf *m0, *m; 635 u_int len, pad, last, end; 636 u_int llen, residual; 637 int avail; 638 caddr_t data; 639 unsigned temp; 640 u_int16_t resval, stat; 641 bus_space_tag_t iot; 642 bus_space_handle_t ioh; 643 644 #ifdef IYDEBUG 645 printf("iystart called\n"); 646 #endif 647 sc = ifp->if_softc; 648 649 if ((ifp->if_flags & (IFF_RUNNING | IFF_OACTIVE)) != IFF_RUNNING) 650 return; 651 652 iy_intr_tx(sc); 653 654 iot = sc->sc_iot; 655 ioh = sc->sc_ioh; 656 657 for (;;) { 658 IFQ_POLL(&ifp->if_snd, m0); 659 if (m0 == NULL) 660 break; 661 #ifdef IYDEBUG 662 printf("%s: trying to write another packet to the hardware\n", 663 sc->sc_dev.dv_xname); 664 #endif 665 666 /* We need to use m->m_pkthdr.len, so require the header */ 667 if ((m0->m_flags & M_PKTHDR) == 0) 668 panic("iystart: no header mbuf"); 669 670 len = m0->m_pkthdr.len; 671 pad = len & 1; 672 673 #ifdef IYDEBUG 674 printf("%s: length is %d.\n", sc->sc_dev.dv_xname, len); 675 #endif 676 if (len < (ETHER_MIN_LEN - ETHER_CRC_LEN)) { 677 pad = ETHER_MIN_LEN - ETHER_CRC_LEN - len; 678 } 679 680 if (len + pad > ETHER_MAX_LEN) { 681 /* packet is obviously too large: toss it */ 682 ++ifp->if_oerrors; 683 IF_DEQUEUE(&ifp->if_snd, m0); 684 m_freem(m0); 685 continue; 686 } 687 688 #if NBPFILTER > 0 689 if (ifp->if_bpf) 690 bpf_mtap(ifp->if_bpf, m0); 691 #endif 692 693 avail = sc->tx_start - sc->tx_end; 694 if (avail <= 0) 695 avail += sc->tx_size; 696 697 #ifdef IYDEBUG 698 printf("%s: avail is %d.\n", sc->sc_dev.dv_xname, avail); 699 #endif 700 /* 701 * we MUST RUN at splnet here --- 702 * XXX todo: or even turn off the boards ints ??? hm... 703 */ 704 705 /* See if there is room to put another packet in the buffer. */ 706 707 if ((len+pad+2*I595_XMT_HDRLEN) > avail) { 708 #ifdef IYDEBUG 709 printf("%s: len = %d, avail = %d, setting OACTIVE\n", 710 sc->sc_dev.dv_xname, len, avail); 711 #endif 712 /* mark interface as full ... */ 713 ifp->if_flags |= IFF_OACTIVE; 714 715 /* and wait for any transmission result */ 716 bus_space_write_1(iot, ioh, 0, BANK_SEL(2)); 717 718 temp = bus_space_read_1(iot, ioh, REG1); 719 bus_space_write_1(iot, ioh, REG1, 720 temp & ~XMT_CHAIN_INT); 721 722 bus_space_write_1(iot, ioh, 0, BANK_SEL(0)); 723 724 return; 725 } 726 727 /* we know it fits in the hardware now, so dequeue it */ 728 IFQ_DEQUEUE(&ifp->if_snd, m0); 729 730 last = sc->tx_end; 731 end = last + pad + len + I595_XMT_HDRLEN; 732 733 if (end >= sc->sram) { 734 if ((sc->sram - last) <= I595_XMT_HDRLEN) { 735 /* keep header in one piece */ 736 last = sc->rx_size; 737 end = last + pad + len + I595_XMT_HDRLEN; 738 } else 739 end -= sc->tx_size; 740 } 741 742 bus_space_write_2(iot, ioh, HOST_ADDR_REG, last); 743 bus_space_write_stream_2(iot, ioh, MEM_PORT_REG, 744 htole16(XMT_CMD)); 745 746 bus_space_write_2(iot, ioh, MEM_PORT_REG, 0); 747 bus_space_write_2(iot, ioh, MEM_PORT_REG, 0); 748 749 bus_space_write_stream_2(iot, ioh, MEM_PORT_REG, 750 htole16(len + pad)); 751 752 residual = resval = 0; 753 754 while ((m = m0)!=0) { 755 data = mtod(m, caddr_t); 756 llen = m->m_len; 757 if (residual) { 758 #ifdef IYDEBUG 759 printf("%s: merging residual with next mbuf.\n", 760 sc->sc_dev.dv_xname); 761 #endif 762 resval |= *data << 8; 763 bus_space_write_stream_2(iot, ioh, 764 MEM_PORT_REG, resval); 765 --llen; 766 ++data; 767 } 768 if (llen > 1) 769 bus_space_write_multi_stream_2(iot, ioh, 770 MEM_PORT_REG, data, llen>>1); 771 residual = llen & 1; 772 if (residual) { 773 resval = *(data + llen - 1); 774 #ifdef IYDEBUG 775 printf("%s: got odd mbuf to send.\n", 776 sc->sc_dev.dv_xname); 777 #endif 778 } 779 780 MFREE(m, m0); 781 } 782 783 if (residual) 784 bus_space_write_stream_2(iot, ioh, MEM_PORT_REG, 785 resval); 786 787 pad >>= 1; 788 while (pad-- > 0) 789 bus_space_write_stream_2(iot, ioh, MEM_PORT_REG, 0); 790 791 #ifdef IYDEBUG 792 printf("%s: new last = 0x%x, end = 0x%x.\n", 793 sc->sc_dev.dv_xname, last, end); 794 printf("%s: old start = 0x%x, end = 0x%x, last = 0x%x\n", 795 sc->sc_dev.dv_xname, sc->tx_start, sc->tx_end, sc->tx_last); 796 #endif 797 798 if (sc->tx_start != sc->tx_end) { 799 bus_space_write_2(iot, ioh, HOST_ADDR_REG, 800 sc->tx_last + XMT_COUNT); 801 802 /* 803 * XXX We keep stat in le order, to potentially save 804 * a byte swap. 805 */ 806 stat = bus_space_read_stream_2(iot, ioh, MEM_PORT_REG); 807 808 bus_space_write_2(iot, ioh, HOST_ADDR_REG, 809 sc->tx_last + XMT_CHAIN); 810 811 bus_space_write_stream_2(iot, ioh, MEM_PORT_REG, 812 htole16(last)); 813 814 bus_space_write_stream_2(iot, ioh, MEM_PORT_REG, 815 stat | htole16(CHAIN)); 816 #ifdef IYDEBUG 817 printf("%s: setting 0x%x to 0x%x\n", 818 sc->sc_dev.dv_xname, sc->tx_last + XMT_COUNT, 819 le16toh(stat) | CHAIN); 820 #endif 821 } 822 stat = bus_space_read_2(iot, ioh, MEM_PORT_REG); /* dummy read */ 823 824 /* XXX todo: enable ints here if disabled */ 825 826 ++ifp->if_opackets; 827 828 if (sc->tx_start == sc->tx_end) { 829 bus_space_write_2(iot, ioh, XMT_ADDR_REG, last); 830 bus_space_write_1(iot, ioh, 0, XMT_CMD); 831 sc->tx_start = last; 832 #ifdef IYDEBUG 833 printf("%s: writing 0x%x to XAR and giving XCMD\n", 834 sc->sc_dev.dv_xname, last); 835 #endif 836 } else { 837 bus_space_write_1(iot, ioh, 0, RESUME_XMT_CMD); 838 #ifdef IYDEBUG 839 printf("%s: giving RESUME_XCMD\n", 840 sc->sc_dev.dv_xname); 841 #endif 842 } 843 sc->tx_last = last; 844 sc->tx_end = end; 845 } 846 /* and wait only for end of transmission chain */ 847 bus_space_write_1(iot, ioh, 0, BANK_SEL(2)); 848 849 temp = bus_space_read_1(iot, ioh, REG1); 850 bus_space_write_1(iot, ioh, REG1, temp | XMT_CHAIN_INT); 851 852 bus_space_write_1(iot, ioh, 0, BANK_SEL(0)); 853 } 854 855 856 static __inline void 857 eepromwritebit(iot, ioh, what) 858 bus_space_tag_t iot; 859 bus_space_handle_t ioh; 860 int what; 861 { 862 bus_space_write_1(iot, ioh, EEPROM_REG, what); 863 delay(1); 864 bus_space_write_1(iot, ioh, EEPROM_REG, what|EESK); 865 delay(1); 866 bus_space_write_1(iot, ioh, EEPROM_REG, what); 867 delay(1); 868 } 869 870 static __inline int 871 eepromreadbit(iot, ioh) 872 bus_space_tag_t iot; 873 bus_space_handle_t ioh; 874 { 875 int b; 876 877 bus_space_write_1(iot, ioh, EEPROM_REG, EECS|EESK); 878 delay(1); 879 b = bus_space_read_1(iot, ioh, EEPROM_REG); 880 bus_space_write_1(iot, ioh, EEPROM_REG, EECS); 881 delay(1); 882 883 return ((b & EEDO) != 0); 884 } 885 886 static u_int16_t 887 eepromread(iot, ioh, offset) 888 bus_space_tag_t iot; 889 bus_space_handle_t ioh; 890 int offset; 891 { 892 volatile int i; 893 volatile int j; 894 volatile u_int16_t readval; 895 896 bus_space_write_1(iot, ioh, 0, BANK_SEL(2)); 897 delay(1); 898 bus_space_write_1(iot, ioh, EEPROM_REG, EECS); /* XXXX??? */ 899 delay(1); 900 901 eepromwritebit(iot, ioh, EECS|EEDI); 902 eepromwritebit(iot, ioh, EECS|EEDI); 903 eepromwritebit(iot, ioh, EECS); 904 905 for (j=5; j>=0; --j) { 906 if ((offset>>j) & 1) 907 eepromwritebit(iot, ioh, EECS|EEDI); 908 else 909 eepromwritebit(iot, ioh, EECS); 910 } 911 912 for (readval=0, i=0; i<16; ++i) { 913 readval<<=1; 914 readval |= eepromreadbit(iot, ioh); 915 } 916 917 bus_space_write_1(iot, ioh, EEPROM_REG, 0|EESK); 918 delay(1); 919 bus_space_write_1(iot, ioh, EEPROM_REG, 0); 920 921 bus_space_write_1(iot, ioh, COMMAND_REG, BANK_SEL(0)); 922 923 return readval; 924 } 925 926 /* 927 * Device timeout/watchdog routine. Entered if the device neglects to generate 928 * an interrupt after a transmit has been started on it. 929 */ 930 void 931 iywatchdog(ifp) 932 struct ifnet *ifp; 933 { 934 struct iy_softc *sc = ifp->if_softc; 935 936 log(LOG_ERR, "%s: device timeout\n", sc->sc_dev.dv_xname); 937 ++sc->sc_ethercom.ec_if.if_oerrors; 938 iyreset(sc); 939 } 940 941 /* 942 * What to do upon receipt of an interrupt. 943 */ 944 int 945 iyintr(arg) 946 void *arg; 947 { 948 struct iy_softc *sc; 949 struct ifnet *ifp; 950 bus_space_tag_t iot; 951 bus_space_handle_t ioh; 952 953 u_short status; 954 955 sc = arg; 956 iot = sc->sc_iot; 957 ioh = sc->sc_ioh; 958 959 ifp = &sc->sc_ethercom.ec_if; 960 961 status = bus_space_read_1(iot, ioh, STATUS_REG); 962 #ifdef IYDEBUG 963 if (status & ALL_INTS) { 964 char sbuf[128]; 965 966 bitmask_snprintf(status, "\020\1RX_STP\2RX\3TX\4EXEC", 967 sbuf, sizeof(sbuf)); 968 printf("%s: got interupt %s", sc->sc_dev.dv_xname, sbuf); 969 970 if (status & EXEC_INT) { 971 bitmask_snprintf(bus_space_read_1(iot, ioh, 0), 972 "\020\6ABORT", sbuf, sizeof(sbuf)); 973 printf(" event %s\n", sbuf); 974 } else 975 printf("\n"); 976 } 977 #endif 978 if ((status & (RX_INT | TX_INT)) == 0) 979 return 0; 980 981 if (status & RX_INT) { 982 iy_intr_rx(sc); 983 bus_space_write_1(iot, ioh, STATUS_REG, RX_INT); 984 } 985 if (status & TX_INT) { 986 /* Tell feeders we may be able to accept more data... */ 987 ifp->if_flags &= ~IFF_OACTIVE; 988 /* and get more data. */ 989 iystart(ifp); 990 bus_space_write_1(iot, ioh, STATUS_REG, TX_INT); 991 } 992 993 #if NRND > 0 994 rnd_add_uint32(&sc->rnd_source, status); 995 #endif 996 997 return 1; 998 } 999 1000 void 1001 iyget(sc, iot, ioh, rxlen) 1002 struct iy_softc *sc; 1003 bus_space_tag_t iot; 1004 bus_space_handle_t ioh; 1005 int rxlen; 1006 { 1007 struct mbuf *m, *top, **mp; 1008 struct ifnet *ifp; 1009 int len; 1010 1011 ifp = &sc->sc_ethercom.ec_if; 1012 1013 MGETHDR(m, M_DONTWAIT, MT_DATA); 1014 if (m == 0) 1015 goto dropped; 1016 m->m_pkthdr.rcvif = ifp; 1017 m->m_pkthdr.len = rxlen; 1018 len = MHLEN; 1019 top = 0; 1020 mp = ⊤ 1021 1022 while (rxlen > 0) { 1023 if (top) { 1024 MGET(m, M_DONTWAIT, MT_DATA); 1025 if (m == 0) { 1026 m_freem(top); 1027 goto dropped; 1028 } 1029 len = MLEN; 1030 } 1031 if (rxlen >= MINCLSIZE) { 1032 MCLGET(m, M_DONTWAIT); 1033 if ((m->m_flags & M_EXT) == 0) { 1034 m_free(m); 1035 m_freem(top); 1036 goto dropped; 1037 } 1038 len = MCLBYTES; 1039 } 1040 len = min(rxlen, len); 1041 if (len > 1) { 1042 len &= ~1; 1043 1044 bus_space_read_multi_stream_2(iot, ioh, MEM_PORT_REG, 1045 mtod(m, caddr_t), len/2); 1046 } else { 1047 #ifdef IYDEBUG 1048 printf("%s: received odd mbuf\n", sc->sc_dev.dv_xname); 1049 #endif 1050 *(mtod(m, caddr_t)) = bus_space_read_stream_2(iot, ioh, 1051 MEM_PORT_REG); 1052 } 1053 m->m_len = len; 1054 rxlen -= len; 1055 *mp = m; 1056 mp = &m->m_next; 1057 } 1058 /* XXX receive the top here */ 1059 ++ifp->if_ipackets; 1060 1061 #if NBPFILTER > 0 1062 if (ifp->if_bpf) 1063 bpf_mtap(ifp->if_bpf, top); 1064 #endif 1065 (*ifp->if_input)(ifp, top); 1066 return; 1067 1068 dropped: 1069 ++ifp->if_ierrors; 1070 return; 1071 } 1072 1073 void 1074 iy_intr_rx(sc) 1075 struct iy_softc *sc; 1076 { 1077 struct ifnet *ifp; 1078 bus_space_tag_t iot; 1079 bus_space_handle_t ioh; 1080 1081 u_int rxadrs, rxevnt, rxstatus, rxnext, rxlen; 1082 1083 iot = sc->sc_iot; 1084 ioh = sc->sc_ioh; 1085 ifp = &sc->sc_ethercom.ec_if; 1086 1087 rxadrs = sc->rx_start; 1088 bus_space_write_2(iot, ioh, HOST_ADDR_REG, rxadrs); 1089 rxevnt = le16toh(bus_space_read_stream_2(iot, ioh, MEM_PORT_REG)); 1090 rxnext = 0; 1091 1092 while (rxevnt == RCV_DONE) { 1093 rxstatus = le16toh(bus_space_read_stream_2(iot, ioh, 1094 MEM_PORT_REG)); 1095 rxnext = le16toh(bus_space_read_stream_2(iot, ioh, 1096 MEM_PORT_REG)); 1097 rxlen = le16toh(bus_space_read_stream_2(iot, ioh, 1098 MEM_PORT_REG)); 1099 #ifdef IYDEBUG 1100 { 1101 char sbuf[128]; 1102 1103 bitmask_snprintf(rxstatus, "\020\1RCLD\2IA_MCH\010SHORT\011OVRN\013ALGERR\014CRCERR\015LENERR\016RCVOK\020TYP", 1104 sbuf, sizeof(sbuf)); 1105 printf("%s: pck at 0x%04x stat %s next 0x%x len 0x%x\n", 1106 sc->sc_dev.dv_xname, rxadrs, sbuf, rxnext, rxlen); 1107 } 1108 #endif 1109 iyget(sc, iot, ioh, rxlen); 1110 1111 /* move stop address */ 1112 bus_space_write_2(iot, ioh, RCV_STOP_LOW, 1113 rxnext == 0 ? sc->rx_size - 2 : rxnext - 2); 1114 1115 bus_space_write_2(iot, ioh, HOST_ADDR_REG, rxnext); 1116 rxadrs = rxnext; 1117 rxevnt = le16toh(bus_space_read_stream_2(iot, ioh, 1118 MEM_PORT_REG)); 1119 } 1120 sc->rx_start = rxnext; 1121 } 1122 1123 void 1124 iy_intr_tx(sc) 1125 struct iy_softc *sc; 1126 { 1127 bus_space_tag_t iot; 1128 bus_space_handle_t ioh; 1129 struct ifnet *ifp; 1130 u_int txstatus, txstat2, txlen, txnext; 1131 1132 ifp = &sc->sc_ethercom.ec_if; 1133 iot = sc->sc_iot; 1134 ioh = sc->sc_ioh; 1135 1136 while (sc->tx_start != sc->tx_end) { 1137 bus_space_write_2(iot, ioh, HOST_ADDR_REG, sc->tx_start); 1138 txstatus = le16toh(bus_space_read_stream_2(iot, ioh, 1139 MEM_PORT_REG)); 1140 1141 if ((txstatus & (TX_DONE|CMD_MASK)) != (TX_DONE|XMT_CMD)) 1142 break; 1143 1144 txstat2 = le16toh(bus_space_read_stream_2(iot, ioh, 1145 MEM_PORT_REG)); 1146 txnext = le16toh(bus_space_read_stream_2(iot, ioh, 1147 MEM_PORT_REG)); 1148 txlen = le16toh(bus_space_read_stream_2(iot, ioh, 1149 MEM_PORT_REG)); 1150 #ifdef IYDEBUG 1151 { 1152 char sbuf[128]; 1153 1154 bitmask_snprintf(txstat2, "\020\6MAX_COL\7HRT_BEAT\010TX_DEF\011UND_RUN\012JERR\013LST_CRS\014LTCOL\016TX_OK\020COLL", 1155 sbuf, sizeof(sbuf)); 1156 printf("txstat 0x%x stat2 0x%s next 0x%x len 0x%x\n", 1157 txstatus, sbuf, txnext, txlen); 1158 } 1159 #endif 1160 if (txlen & CHAIN) 1161 sc->tx_start = txnext; 1162 else 1163 sc->tx_start = sc->tx_end; 1164 ifp->if_flags &= ~IFF_OACTIVE; 1165 1166 if (txstat2 & 0x0020) 1167 ifp->if_collisions += 16; 1168 else 1169 ifp->if_collisions += txstat2 & 0x000f; 1170 1171 if ((txstat2 & 0x2000) == 0) 1172 ++ifp->if_oerrors; 1173 } 1174 } 1175 1176 int 1177 iyioctl(ifp, cmd, data) 1178 struct ifnet *ifp; 1179 u_long cmd; 1180 caddr_t data; 1181 { 1182 struct iy_softc *sc; 1183 struct ifaddr *ifa; 1184 struct ifreq *ifr; 1185 int s, error = 0; 1186 1187 sc = ifp->if_softc; 1188 ifa = (struct ifaddr *)data; 1189 ifr = (struct ifreq *)data; 1190 1191 #ifdef IYDEBUG 1192 printf("iyioctl called with ifp 0x%p (%s) cmd 0x%lx data 0x%p\n", 1193 ifp, ifp->if_xname, cmd, data); 1194 #endif 1195 1196 s = splnet(); 1197 1198 switch (cmd) { 1199 1200 case SIOCSIFADDR: 1201 ifp->if_flags |= IFF_UP; 1202 1203 switch (ifa->ifa_addr->sa_family) { 1204 #ifdef INET 1205 case AF_INET: 1206 iyinit(sc); 1207 arp_ifinit(ifp, ifa); 1208 break; 1209 #endif 1210 #ifdef NS 1211 /* XXX - This code is probably wrong. */ 1212 case AF_NS: 1213 { 1214 struct ns_addr *ina = &IA_SNS(ifa)->sns_addr; 1215 1216 if (ns_nullhost(*ina)) 1217 ina->x_host = *(union ns_host *) 1218 LLADDR(ifp->if_sadl); 1219 else 1220 bcopy(ina->x_host.c_host, LLADDR(ifp->if_sadl), 1221 ETHER_ADDR_LEN); 1222 /* Set new address. */ 1223 iyinit(sc); 1224 break; 1225 } 1226 #endif /* NS */ 1227 default: 1228 iyinit(sc); 1229 break; 1230 } 1231 break; 1232 1233 case SIOCSIFFLAGS: 1234 sc->promisc = ifp->if_flags & (IFF_PROMISC | IFF_ALLMULTI); 1235 if ((ifp->if_flags & IFF_UP) == 0 && 1236 (ifp->if_flags & IFF_RUNNING) != 0) { 1237 /* 1238 * If interface is marked down and it is running, then 1239 * stop it. 1240 */ 1241 iystop(sc); 1242 ifp->if_flags &= ~IFF_RUNNING; 1243 } else if ((ifp->if_flags & IFF_UP) != 0 && 1244 (ifp->if_flags & IFF_RUNNING) == 0) { 1245 /* 1246 * If interface is marked up and it is stopped, then 1247 * start it. 1248 */ 1249 iyinit(sc); 1250 } else { 1251 /* 1252 * Reset the interface to pick up changes in any other 1253 * flags that affect hardware registers. 1254 */ 1255 iystop(sc); 1256 iyinit(sc); 1257 } 1258 #ifdef IYDEBUGX 1259 if (ifp->if_flags & IFF_DEBUG) 1260 sc->sc_debug = IFY_ALL; 1261 else 1262 sc->sc_debug = 0; 1263 #endif 1264 break; 1265 1266 case SIOCADDMULTI: 1267 case SIOCDELMULTI: 1268 error = (cmd == SIOCADDMULTI) ? 1269 ether_addmulti(ifr, &sc->sc_ethercom): 1270 ether_delmulti(ifr, &sc->sc_ethercom); 1271 1272 if (error == ENETRESET) { 1273 /* 1274 * Multicast list has changed; set the hardware filter 1275 * accordingly. 1276 */ 1277 iyreset(sc); /* XXX can't make it work otherwise */ 1278 iy_mc_reset(sc); 1279 error = 0; 1280 } 1281 break; 1282 1283 case SIOCSIFMEDIA: 1284 case SIOCGIFMEDIA: 1285 error = ifmedia_ioctl(ifp, ifr, &sc->iy_ifmedia, cmd); 1286 break; 1287 default: 1288 error = EINVAL; 1289 } 1290 splx(s); 1291 return error; 1292 } 1293 1294 int 1295 iy_mediachange(ifp) 1296 struct ifnet *ifp; 1297 { 1298 struct iy_softc *sc = ifp->if_softc; 1299 1300 if (IFM_TYPE(sc->iy_ifmedia.ifm_media) != IFM_ETHER) 1301 return EINVAL; 1302 switch(IFM_SUBTYPE(sc->iy_ifmedia.ifm_media)) { 1303 case IFM_10_5: 1304 case IFM_10_2: 1305 case IFM_10_T: 1306 case IFM_AUTO: 1307 iystop(sc); 1308 iyinit(sc); 1309 return 0; 1310 default: 1311 return EINVAL; 1312 } 1313 } 1314 1315 void 1316 iy_mediastatus(ifp, ifmr) 1317 struct ifnet *ifp; 1318 struct ifmediareq *ifmr; 1319 { 1320 struct iy_softc *sc = ifp->if_softc; 1321 1322 ifmr->ifm_active = sc->iy_media; 1323 ifmr->ifm_status = IFM_AVALID | IFM_ACTIVE; 1324 } 1325 1326 1327 static void 1328 iy_mc_setup(sc) 1329 struct iy_softc *sc; 1330 { 1331 struct ether_multi *enm; 1332 struct ether_multistep step; 1333 struct ethercom *ecp; 1334 struct ifnet *ifp; 1335 bus_space_tag_t iot; 1336 bus_space_handle_t ioh; 1337 int avail, last /*, end*/ , len; 1338 int timeout; 1339 volatile u_int16_t dum; 1340 u_int8_t temp; 1341 1342 1343 ecp = &sc->sc_ethercom; 1344 ifp = &ecp->ec_if; 1345 1346 iot = sc->sc_iot; 1347 ioh = sc->sc_ioh; 1348 1349 len = 6 * ecp->ec_multicnt; 1350 1351 avail = sc->tx_start - sc->tx_end; 1352 if (avail <= 0) 1353 avail += sc->tx_size; 1354 if (ifp->if_flags & IFF_DEBUG) 1355 printf("%s: iy_mc_setup called, %d addresses, " 1356 "%d/%d bytes needed/avail\n", ifp->if_xname, 1357 ecp->ec_multicnt, len + I595_XMT_HDRLEN, avail); 1358 1359 last = sc->rx_size; 1360 1361 bus_space_write_1(iot, ioh, 0, BANK_SEL(2)); 1362 bus_space_write_1(iot, ioh, RECV_MODES_REG, MATCH_BRDCST); 1363 /* XXX VOODOO */ 1364 temp = bus_space_read_1(iot, ioh, MEDIA_SELECT); 1365 bus_space_write_1(iot, ioh, MEDIA_SELECT, temp); 1366 /* XXX END OF VOODOO */ 1367 bus_space_write_1(iot, ioh, 0, BANK_SEL(0)); 1368 bus_space_write_2(iot, ioh, HOST_ADDR_REG, last); 1369 bus_space_write_stream_2(iot, ioh, MEM_PORT_REG, htole16(MC_SETUP_CMD)); 1370 bus_space_write_2(iot, ioh, MEM_PORT_REG, 0); 1371 bus_space_write_2(iot, ioh, MEM_PORT_REG, 0); 1372 bus_space_write_stream_2(iot, ioh, MEM_PORT_REG, htole16(len)); 1373 1374 ETHER_FIRST_MULTI(step, ecp, enm); 1375 while(enm) { 1376 bus_space_write_multi_stream_2(iot, ioh, MEM_PORT_REG, 1377 enm->enm_addrlo, 3); 1378 1379 ETHER_NEXT_MULTI(step, enm); 1380 } 1381 dum = bus_space_read_2(iot, ioh, MEM_PORT_REG); /* dummy read */ 1382 bus_space_write_2(iot, ioh, XMT_ADDR_REG, last); 1383 bus_space_write_1(iot, ioh, 0, MC_SETUP_CMD); 1384 1385 1386 sc->tx_start = sc->rx_size; 1387 sc->tx_end = sc->rx_size + I595_XMT_HDRLEN + len; 1388 1389 for (timeout=0; timeout<100; timeout++) { 1390 DELAY(2); 1391 if ((bus_space_read_1(iot, ioh, STATUS_REG) & EXEC_INT) == 0) 1392 continue; 1393 1394 temp = bus_space_read_1(iot, ioh, 0); 1395 bus_space_write_1(iot, ioh, STATUS_REG, EXEC_INT); 1396 #ifdef DIAGNOSTIC 1397 if (temp & 0x20) { 1398 printf("%s: mc setup failed, %d usec\n", 1399 sc->sc_dev.dv_xname, timeout * 2); 1400 } else if (((temp & 0x0f) == 0x03) && 1401 (ifp->if_flags & IFF_DEBUG)) { 1402 printf("%s: mc setup done, %d usec\n", 1403 sc->sc_dev.dv_xname, timeout * 2); 1404 } 1405 #endif 1406 break; 1407 } 1408 sc->tx_start = sc->tx_end; 1409 ifp->if_flags &= ~IFF_OACTIVE; 1410 1411 } 1412 1413 static void 1414 iy_mc_reset(sc) 1415 struct iy_softc *sc; 1416 { 1417 struct ether_multi *enm; 1418 struct ether_multistep step; 1419 struct ethercom *ecp; 1420 struct ifnet *ifp; 1421 bus_space_tag_t iot; 1422 bus_space_handle_t ioh; 1423 u_int16_t temp; 1424 1425 ecp = &sc->sc_ethercom; 1426 ifp = &ecp->ec_if; 1427 1428 iot = sc->sc_iot; 1429 ioh = sc->sc_ioh; 1430 1431 if (ecp->ec_multicnt > 63) { 1432 ifp->if_flags |= IFF_ALLMULTI; 1433 1434 } else if (ecp->ec_multicnt > 0) { 1435 /* 1436 * Step through the list of addresses. 1437 */ 1438 ETHER_FIRST_MULTI(step, ecp, enm); 1439 while(enm) { 1440 if (bcmp(enm->enm_addrlo, enm->enm_addrhi, 6) != 0) { 1441 ifp->if_flags |= IFF_ALLMULTI; 1442 goto setupmulti; 1443 } 1444 ETHER_NEXT_MULTI(step, enm); 1445 } 1446 /* OK, we really need to do it now: */ 1447 #if 0 1448 if ((ifp->if_flags & (IFF_RUNNING | IFF_OACTIVE)) 1449 != IFF_RUNNING) { 1450 ifp->if_flags |= IFF_OACTIVE; 1451 sc->want_mc_setup = 1; 1452 return; 1453 } 1454 #endif 1455 iy_mc_setup(sc); 1456 } else { 1457 ifp->if_flags &= ~IFF_ALLMULTI; 1458 } 1459 1460 setupmulti: 1461 bus_space_write_1(iot, ioh, 0, BANK_SEL(2)); 1462 if (ifp->if_flags & (IFF_PROMISC|IFF_ALLMULTI)) { 1463 temp = MATCH_ALL; 1464 } else 1465 temp = MATCH_BRDCST; 1466 1467 bus_space_write_1(iot, ioh, RECV_MODES_REG, temp); 1468 /* XXX VOODOO */ 1469 temp = bus_space_read_1(iot, ioh, MEDIA_SELECT); 1470 bus_space_write_1(iot, ioh, MEDIA_SELECT, temp); 1471 /* XXX END OF VOODOO */ 1472 1473 /* XXX TBD: setup hardware for all multicasts */ 1474 bus_space_write_1(iot, ioh, 0, BANK_SEL(0)); 1475 return; 1476 } 1477 1478 #ifdef IYDEBUGX 1479 void 1480 print_rbd(rbd) 1481 volatile struct ie_recv_buf_desc *rbd; 1482 { 1483 printf("RBD at %08lx:\nactual %04x, next %04x, buffer %08x\n" 1484 "length %04x, mbz %04x\n", (u_long)rbd, rbd->ie_rbd_actual, 1485 rbd->ie_rbd_next, rbd->ie_rbd_buffer, rbd->ie_rbd_length, 1486 rbd->mbz); 1487 } 1488 #endif 1489 1490 void 1491 iyprobemem(sc) 1492 struct iy_softc *sc; 1493 { 1494 bus_space_tag_t iot; 1495 bus_space_handle_t ioh; 1496 int testing; 1497 1498 iot = sc->sc_iot; 1499 ioh = sc->sc_ioh; 1500 1501 bus_space_write_1(iot, ioh, COMMAND_REG, BANK_SEL(0)); 1502 delay(1); 1503 bus_space_write_2(iot, ioh, HOST_ADDR_REG, 4096-2); 1504 bus_space_write_2(iot, ioh, MEM_PORT_REG, 0); 1505 1506 for (testing=65536; testing >= 4096; testing >>= 1) { 1507 bus_space_write_2(iot, ioh, HOST_ADDR_REG, testing-2); 1508 bus_space_write_2(iot, ioh, MEM_PORT_REG, 0xdead); 1509 bus_space_write_2(iot, ioh, HOST_ADDR_REG, testing-2); 1510 if (bus_space_read_2(iot, ioh, MEM_PORT_REG) != 0xdead) { 1511 #ifdef IYMEMDEBUG 1512 printf("%s: Didn't keep 0xdead at 0x%x\n", 1513 sc->sc_dev.dv_xname, testing-2); 1514 #endif 1515 continue; 1516 } 1517 1518 bus_space_write_2(iot, ioh, HOST_ADDR_REG, testing-2); 1519 bus_space_write_2(iot, ioh, MEM_PORT_REG, 0xbeef); 1520 bus_space_write_2(iot, ioh, HOST_ADDR_REG, testing-2); 1521 if (bus_space_read_2(iot, ioh, MEM_PORT_REG) != 0xbeef) { 1522 #ifdef IYMEMDEBUG 1523 printf("%s: Didn't keep 0xbeef at 0x%x\n", 1524 sc->sc_dev.dv_xname, testing-2); 1525 #endif 1526 continue; 1527 } 1528 1529 bus_space_write_2(iot, ioh, HOST_ADDR_REG, 0); 1530 bus_space_write_2(iot, ioh, MEM_PORT_REG, 0); 1531 bus_space_write_2(iot, ioh, HOST_ADDR_REG, testing >> 1); 1532 bus_space_write_2(iot, ioh, MEM_PORT_REG, testing >> 1); 1533 bus_space_write_2(iot, ioh, HOST_ADDR_REG, 0); 1534 if (bus_space_read_2(iot, ioh, MEM_PORT_REG) == (testing >> 1)) { 1535 #ifdef IYMEMDEBUG 1536 printf("%s: 0x%x alias of 0x0\n", 1537 sc->sc_dev.dv_xname, testing >> 1); 1538 #endif 1539 continue; 1540 } 1541 1542 break; 1543 } 1544 1545 sc->sram = testing; 1546 1547 switch(testing) { 1548 case 65536: 1549 /* 4 NFS packets + overhead RX, 2 NFS + overhead TX */ 1550 sc->rx_size = 44*1024; 1551 break; 1552 1553 case 32768: 1554 /* 2 NFS packets + overhead RX, 1 NFS + overhead TX */ 1555 sc->rx_size = 22*1024; 1556 break; 1557 1558 case 16384: 1559 /* 1 NFS packet + overhead RX, 4 big packets TX */ 1560 sc->rx_size = 10*1024; 1561 break; 1562 default: 1563 sc->rx_size = testing/2; 1564 break; 1565 } 1566 sc->tx_size = testing - sc->rx_size; 1567 } 1568 1569 static int 1570 eepromreadall(iot, ioh, wordp, maxi) 1571 bus_space_tag_t iot; 1572 bus_space_handle_t ioh; 1573 u_int16_t *wordp; 1574 int maxi; 1575 { 1576 int i; 1577 u_int16_t checksum, tmp; 1578 1579 checksum = 0; 1580 1581 for (i=0; i<EEPP_LENGTH; ++i) { 1582 tmp = eepromread(iot, ioh, i); 1583 checksum += tmp; 1584 if (i<maxi) 1585 wordp[i] = tmp; 1586 } 1587 1588 if (checksum != EEPP_CHKSUM) { 1589 #ifdef IYDEBUG 1590 printf("wrong EEPROM checksum 0x%x should be 0x%x\n", 1591 checksum, EEPP_CHKSUM); 1592 #endif 1593 return 1; 1594 } 1595 return 0; 1596 } 1597
Indexes created Fri Sep 26 08:10:20 GMT 2025