if_iy.c revision 1.56
1 /* $NetBSD: if_iy.c,v 1.56 2001/11/13 08:01:19 lukem Exp $ */ 2 /* #define IYDEBUG */ 3 /* #define IYMEMDEBUG */ 4 5 /*- 6 * Copyright (c) 1996,2001 The NetBSD Foundation, Inc. 7 * All rights reserved. 8 * 9 * This code is derived from software contributed to The NetBSD Foundation 10 * by Ignatios Souvatzis. 11 * 12 * Redistribution and use in source and binary forms, with or without 13 * modification, are permitted provided that the following conditions 14 * are met: 15 * 1. Redistributions of source code must retain the above copyright 16 * notice, this list of conditions and the following disclaimer. 17 * 2. Redistributions in binary form must reproduce the above copyright 18 * notice, this list of conditions and the following disclaimer in the 19 * documentation and/or other materials provided with the distribution. 20 * 3. All advertising materials mentioning features or use of this software 21 * must display the following acknowledgement: 22 * This product includes software developed by the NetBSD 23 * Foundation, Inc. and its contributors. 24 * 4. Neither the name of The NetBSD Foundation nor the names of its 25 * contributors may be used to endorse or promote products derived 26 * from this software without specific prior written permission. 27 * 28 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 29 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 30 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 31 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 32 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 33 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 34 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 35 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 36 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 37 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 38 * POSSIBILITY OF SUCH DAMAGE. 39 */ 40 41 /* 42 * Supported hardware: 43 * 44 * - Intel EtherExpress Pro/10. 45 * - possibly other boards using the i82595 chip and no special tweaks. 46 */ 47 48 #include <sys/cdefs.h> 49 __KERNEL_RCSID(0, "$NetBSD: if_iy.c,v 1.56 2001/11/13 08:01:19 lukem Exp $"); 50 51 #include "opt_inet.h" 52 #include "opt_ns.h" 53 #include "bpfilter.h" 54 #include "rnd.h" 55 56 #include <sys/param.h> 57 #include <sys/systm.h> 58 #include <sys/mbuf.h> 59 #include <sys/buf.h> 60 #include <sys/protosw.h> 61 #include <sys/socket.h> 62 #include <sys/ioctl.h> 63 #include <sys/errno.h> 64 #include <sys/syslog.h> 65 #include <sys/device.h> 66 #include <sys/endian.h> 67 #if NRND > 0 68 #include <sys/rnd.h> 69 #endif 70 71 #include <net/if.h> 72 #include <net/if_types.h> 73 #include <net/if_dl.h> 74 75 #include <net/if_ether.h> 76 77 #if NBPFILTER > 0 78 #include <net/bpf.h> 79 #include <net/bpfdesc.h> 80 #endif 81 82 #ifdef INET 83 #include <netinet/in.h> 84 #include <netinet/in_systm.h> 85 #include <netinet/in_var.h> 86 #include <netinet/ip.h> 87 #include <netinet/if_inarp.h> 88 #endif 89 90 #ifdef NS 91 #include <netns/ns.h> 92 #include <netns/ns_if.h> 93 #endif 94 95 #if defined(SIOCSIFMEDIA) 96 #include <net/if_media.h> 97 #endif 98 99 #include <machine/cpu.h> 100 #include <machine/bus.h> 101 #include <machine/intr.h> 102 103 #include <dev/isa/isareg.h> 104 #include <dev/isa/isavar.h> 105 #include <dev/ic/i82595reg.h> 106 107 /* XXX why isn't this centralized? */ 108 #ifndef __BUS_SPACE_HAS_STREAM_METHODS 109 #define bus_space_write_stream_2 bus_space_write_2 110 #define bus_space_write_multi_stream_2 bus_space_write_multi_2 111 #define bus_space_read_stream_2 bus_space_read_2 112 #define bus_space_read_multi_stream_2 bus_space_read_multi_2 113 #endif /* __BUS_SPACE_HAS_STREAM_METHODS */ 114 115 /* 116 * Ethernet status, per interface. 117 */ 118 struct iy_softc { 119 struct device sc_dev; 120 void *sc_ih; 121 122 bus_space_tag_t sc_iot; 123 bus_space_handle_t sc_ioh; 124 125 struct ethercom sc_ethercom; 126 127 struct ifmedia iy_ifmedia; 128 int iy_media; 129 130 int mappedirq; 131 132 int hard_vers; 133 134 int promisc; 135 136 int sram, tx_size, rx_size; 137 138 int tx_start, tx_end, tx_last; 139 int rx_start; 140 141 int doing_mc_setup; 142 #ifdef IYDEBUG 143 int sc_debug; 144 #endif 145 146 #if NRND > 0 147 rndsource_element_t rnd_source; 148 #endif 149 }; 150 151 void iywatchdog __P((struct ifnet *)); 152 int iyioctl __P((struct ifnet *, u_long, caddr_t)); 153 int iyintr __P((void *)); 154 void iyinit __P((struct iy_softc *)); 155 void iystop __P((struct iy_softc *)); 156 void iystart __P((struct ifnet *)); 157 158 void iy_intr_rx __P((struct iy_softc *)); 159 void iy_intr_tx __P((struct iy_softc *)); 160 161 void iyreset __P((struct iy_softc *)); 162 void iy_readframe __P((struct iy_softc *, int)); 163 void iy_drop_packet_buffer __P((struct iy_softc *)); 164 void iy_find_mem_size __P((struct iy_softc *)); 165 void iyrint __P((struct iy_softc *)); 166 void iytint __P((struct iy_softc *)); 167 void iyxmit __P((struct iy_softc *)); 168 static void iy_mc_setup __P((struct iy_softc *)); 169 static void iy_mc_reset __P((struct iy_softc *)); 170 void iyget __P((struct iy_softc *, bus_space_tag_t, bus_space_handle_t, int)); 171 void iyprobemem __P((struct iy_softc *)); 172 static __inline void eepromwritebit __P((bus_space_tag_t, bus_space_handle_t, 173 int)); 174 static __inline int eepromreadbit __P((bus_space_tag_t, bus_space_handle_t)); 175 176 #ifdef IYDEBUGX 177 void print_rbd __P((volatile struct iy_recv_buf_desc *)); 178 179 int in_ifrint = 0; 180 int in_iftint = 0; 181 #endif 182 183 int iy_mediachange __P((struct ifnet *)); 184 void iy_mediastatus __P((struct ifnet *, struct ifmediareq *)); 185 186 int iyprobe __P((struct device *, struct cfdata *, void *)); 187 void iyattach __P((struct device *, struct device *, void *)); 188 189 static u_int16_t eepromread __P((bus_space_tag_t, bus_space_handle_t, int)); 190 191 static int eepromreadall __P((bus_space_tag_t, bus_space_handle_t, u_int16_t *, 192 int)); 193 194 struct cfattach iy_ca = { 195 sizeof(struct iy_softc), iyprobe, iyattach 196 }; 197 198 static u_int8_t eepro_irqmap[] = EEPP_INTMAP; 199 static u_int8_t eepro_revirqmap[] = EEPP_RINTMAP; 200 201 int 202 iyprobe(parent, match, aux) 203 struct device *parent; 204 struct cfdata *match; 205 void *aux; 206 { 207 struct isa_attach_args *ia = aux; 208 u_int16_t eaddr[8]; 209 210 bus_space_tag_t iot; 211 bus_space_handle_t ioh; 212 213 u_int8_t c, d; 214 215 iot = ia->ia_iot; 216 217 if (ia->ia_iobase == IOBASEUNK) 218 return 0; 219 220 if (bus_space_map(iot, ia->ia_iobase, 16, 0, &ioh)) 221 return 0; 222 223 /* try to find the round robin sig: */ 224 225 c = bus_space_read_1(iot, ioh, ID_REG); 226 if ((c & ID_REG_MASK) != ID_REG_SIG) 227 goto out; 228 229 d = bus_space_read_1(iot, ioh, ID_REG); 230 if ((d & ID_REG_MASK) != ID_REG_SIG) 231 goto out; 232 233 if (((d-c) & R_ROBIN_BITS) != 0x40) 234 goto out; 235 236 d = bus_space_read_1(iot, ioh, ID_REG); 237 if ((d & ID_REG_MASK) != ID_REG_SIG) 238 goto out; 239 240 if (((d-c) & R_ROBIN_BITS) != 0x80) 241 goto out; 242 243 d = bus_space_read_1(iot, ioh, ID_REG); 244 if ((d & ID_REG_MASK) != ID_REG_SIG) 245 goto out; 246 247 if (((d-c) & R_ROBIN_BITS) != 0xC0) 248 goto out; 249 250 d = bus_space_read_1(iot, ioh, ID_REG); 251 if ((d & ID_REG_MASK) != ID_REG_SIG) 252 goto out; 253 254 if (((d-c) & R_ROBIN_BITS) != 0x00) 255 goto out; 256 257 #ifdef IYDEBUG 258 printf("iyprobe verified working ID reg.\n"); 259 #endif 260 261 if (eepromreadall(iot, ioh, eaddr, 8)) 262 goto out; 263 264 if (ia->ia_irq == IRQUNK) 265 ia->ia_irq = eepro_irqmap[eaddr[EEPPW1] & EEPP_Int]; 266 267 if (ia->ia_irq >= sizeof(eepro_revirqmap)) 268 goto out; 269 270 if (eepro_revirqmap[ia->ia_irq] == 0xff) 271 goto out; 272 273 /* now lets reset the chip */ 274 275 bus_space_write_1(iot, ioh, COMMAND_REG, RESET_CMD); 276 delay(200); 277 278 ia->ia_iosize = 16; 279 280 bus_space_unmap(iot, ioh, 16); 281 return 1; /* found */ 282 out: 283 bus_space_unmap(iot, ioh, 16); 284 return 0; 285 } 286 287 void 288 iyattach(parent, self, aux) 289 struct device *parent, *self; 290 void *aux; 291 { 292 struct iy_softc *sc = (void *)self; 293 struct isa_attach_args *ia = aux; 294 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 295 bus_space_tag_t iot; 296 bus_space_handle_t ioh; 297 unsigned temp; 298 u_int16_t eaddr[8]; 299 u_int8_t myaddr[ETHER_ADDR_LEN]; 300 int eirq; 301 302 iot = ia->ia_iot; 303 304 if (bus_space_map(iot, ia->ia_iobase, 16, 0, &ioh)) { 305 printf(": can't map i/o space\n"); 306 return; 307 } 308 309 sc->sc_iot = iot; 310 sc->sc_ioh = ioh; 311 312 sc->mappedirq = eepro_revirqmap[ia->ia_irq]; 313 314 /* now let's reset the chip */ 315 316 bus_space_write_1(iot, ioh, COMMAND_REG, RESET_CMD); 317 delay(200); 318 319 iyprobemem(sc); 320 321 strcpy(ifp->if_xname, sc->sc_dev.dv_xname); 322 ifp->if_softc = sc; 323 ifp->if_start = iystart; 324 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_NOTRAILERS 325 | IFF_MULTICAST; 326 327 sc->doing_mc_setup = 0; 328 329 ifp->if_ioctl = iyioctl; 330 ifp->if_watchdog = iywatchdog; 331 332 IFQ_SET_READY(&ifp->if_snd); 333 334 (void)eepromreadall(iot, ioh, eaddr, 8); 335 sc->hard_vers = eaddr[EEPW6] & EEPP_BoardRev; 336 337 #ifdef DIAGNOSTICS 338 if ((eaddr[EEPPEther0] != 339 eepromread(iot, ioh, EEPPEther0a)) && 340 (eaddr[EEPPEther1] != 341 eepromread(iot, ioh, EEPPEther1a)) && 342 (eaddr[EEPPEther2] != 343 eepromread(iot, ioh, EEPPEther2a))) 344 345 printf("EEPROM Ethernet address differs from copy\n"); 346 #endif 347 348 myaddr[1] = eaddr[EEPPEther0] & 0xFF; 349 myaddr[0] = eaddr[EEPPEther0] >> 8; 350 myaddr[3] = eaddr[EEPPEther1] & 0xFF; 351 myaddr[2] = eaddr[EEPPEther1] >> 8; 352 myaddr[5] = eaddr[EEPPEther2] & 0xFF; 353 myaddr[4] = eaddr[EEPPEther2] >> 8; 354 355 ifmedia_init(&sc->iy_ifmedia, 0, iy_mediachange, iy_mediastatus); 356 ifmedia_add(&sc->iy_ifmedia, IFM_ETHER | IFM_10_2, 0, NULL); 357 ifmedia_add(&sc->iy_ifmedia, IFM_ETHER | IFM_10_5, 0, NULL); 358 ifmedia_add(&sc->iy_ifmedia, IFM_ETHER | IFM_10_T, 0, NULL); 359 ifmedia_add(&sc->iy_ifmedia, IFM_ETHER | IFM_AUTO, 0, NULL); 360 ifmedia_set(&sc->iy_ifmedia, IFM_ETHER | IFM_AUTO); 361 /* Attach the interface. */ 362 if_attach(ifp); 363 ether_ifattach(ifp, myaddr); 364 printf(": address %s, rev. %d, %d kB\n", 365 ether_sprintf(myaddr), 366 sc->hard_vers, sc->sram/1024); 367 368 eirq = eepro_irqmap[eaddr[EEPPW1] & EEPP_Int]; 369 if (eirq != ia->ia_irq) 370 printf("%s: EEPROM irq setting %d ignored\n", 371 sc->sc_dev.dv_xname, eirq); 372 373 sc->sc_ih = isa_intr_establish(ia->ia_ic, ia->ia_irq, IST_EDGE, 374 IPL_NET, iyintr, sc); 375 376 #if NRND > 0 377 rnd_attach_source(&sc->rnd_source, sc->sc_dev.dv_xname, 378 RND_TYPE_NET, 0); 379 #endif 380 381 temp = bus_space_read_1(iot, ioh, INT_NO_REG); 382 bus_space_write_1(iot, ioh, INT_NO_REG, (temp & 0xf8) | sc->mappedirq); 383 } 384 385 void 386 iystop(sc) 387 struct iy_softc *sc; 388 { 389 bus_space_tag_t iot; 390 bus_space_handle_t ioh; 391 #ifdef IYDEBUG 392 u_int p, v; 393 #endif 394 395 iot = sc->sc_iot; 396 ioh = sc->sc_ioh; 397 398 bus_space_write_1(iot, ioh, COMMAND_REG, RCV_DISABLE_CMD); 399 400 bus_space_write_1(iot, ioh, INT_MASK_REG, ALL_INTS); 401 bus_space_write_1(iot, ioh, STATUS_REG, ALL_INTS); 402 403 bus_space_write_1(iot, ioh, COMMAND_REG, RESET_CMD); 404 delay(200); 405 #ifdef IYDEBUG 406 printf("%s: dumping tx chain (st 0x%x end 0x%x last 0x%x)\n", 407 sc->sc_dev.dv_xname, sc->tx_start, sc->tx_end, sc->tx_last); 408 p = sc->tx_last; 409 if (!p) 410 p = sc->tx_start; 411 do { 412 char sbuf[128]; 413 414 bus_space_write_2(iot, ioh, HOST_ADDR_REG, p); 415 416 v = le16toh(bus_space_read_stream_2(iot, ioh, MEM_PORT_REG)); 417 bitmask_snprintf(v, "\020\006Ab\010Dn", sbuf, sizeof(sbuf)); 418 printf("0x%04x: %s ", p, sbuf); 419 420 v = le16toh(bus_space_read_stream_2(iot, ioh, MEM_PORT_REG)); 421 bitmask_snprintf(v, "\020\6MAX_COL\7HRT_BEAT\010TX_DEF\011UND_RUN\012JERR\013LST_CRS\014LTCOL\016TX_OK\020COLL", 422 sbuf, sizeof(sbuf)); 423 printf("0x%s", sbuf); 424 425 p = le16toh(bus_space_read_stream_2(iot, ioh, MEM_PORT_REG)); 426 printf(" 0x%04x", p); 427 428 v = le16toh(bus_space_read_stream_2(iot, ioh, MEM_PORT_REG)); 429 bitmask_snprintf(v, "\020\020Ch", sbuf, sizeof(sbuf)); 430 printf(" 0x%s\n", sbuf); 431 432 } while (v & 0x8000); 433 #endif 434 sc->tx_start = sc->tx_end = sc->rx_size; 435 sc->tx_last = 0; 436 sc->sc_ethercom.ec_if.if_flags &= ~(IFF_RUNNING|IFF_OACTIVE); 437 } 438 439 void 440 iyreset(sc) 441 struct iy_softc *sc; 442 { 443 int s; 444 s = splnet(); 445 iystop(sc); 446 iyinit(sc); 447 splx(s); 448 } 449 450 void 451 iyinit(sc) 452 struct iy_softc *sc; 453 { 454 int i; 455 unsigned temp; 456 struct ifnet *ifp; 457 bus_space_tag_t iot; 458 bus_space_handle_t ioh; 459 460 iot = sc->sc_iot; 461 ioh = sc->sc_ioh; 462 463 ifp = &sc->sc_ethercom.ec_if; 464 #ifdef IYDEBUG 465 printf("ifp is %p\n", ifp); 466 #endif 467 468 bus_space_write_1(iot, ioh, 0, BANK_SEL(2)); 469 470 temp = bus_space_read_1(iot, ioh, EEPROM_REG); 471 if (temp & 0x10) 472 bus_space_write_1(iot, ioh, EEPROM_REG, temp & ~0x10); 473 474 for (i=0; i<6; ++i) { 475 bus_space_write_1(iot, ioh, I_ADD(i), LLADDR(ifp->if_sadl)[i]); 476 } 477 478 temp = bus_space_read_1(iot, ioh, REG1); 479 bus_space_write_1(iot, ioh, REG1, 480 temp | /* XMT_CHAIN_INT | XMT_CHAIN_ERRSTOP | */ RCV_DISCARD_BAD); 481 482 if (ifp->if_flags & (IFF_PROMISC|IFF_ALLMULTI)) { 483 temp = MATCH_ALL; 484 } else 485 temp = MATCH_BRDCST; 486 487 bus_space_write_1(iot, ioh, RECV_MODES_REG, temp); 488 489 #ifdef IYDEBUG 490 { 491 char sbuf[128]; 492 493 bitmask_snprintf(temp, "\020\1PRMSC\2NOBRDST\3SEECRC\4LENGTH\5NOSaIns\6MultiIA", 494 sbuf, sizeof(sbuf)); 495 printf("%s: RECV_MODES set to %s\n", sc->sc_dev.dv_xname, sbuf); 496 } 497 #endif 498 /* XXX VOODOO */ 499 temp = bus_space_read_1(iot, ioh, MEDIA_SELECT); 500 bus_space_write_1(iot, ioh, MEDIA_SELECT, temp); 501 /* XXX END OF VOODOO */ 502 503 504 delay(500000); /* for the hardware to test for the connector */ 505 506 temp = bus_space_read_1(iot, ioh, MEDIA_SELECT); 507 #ifdef IYDEBUG 508 { 509 char sbuf[128]; 510 511 bitmask_snprintf(temp, "\020\1LnkInDis\2PolCor\3TPE\4JabberDis\5NoAport\6BNC", 512 sbuf, sizeof(sbuf)); 513 printf("%s: media select was 0x%s ", sc->sc_dev.dv_xname, sbuf); 514 } 515 #endif 516 temp = (temp & TEST_MODE_MASK); 517 518 switch(IFM_SUBTYPE(sc->iy_ifmedia.ifm_media)) { 519 case IFM_10_5: 520 temp &= ~ (BNC_BIT | TPE_BIT); 521 break; 522 523 case IFM_10_2: 524 temp = (temp & ~TPE_BIT) | BNC_BIT; 525 break; 526 527 case IFM_10_T: 528 temp = (temp & ~BNC_BIT) | TPE_BIT; 529 break; 530 default: 531 ; 532 /* nothing; leave as it is */ 533 } 534 switch (temp & (BNC_BIT | TPE_BIT)) { 535 case BNC_BIT: 536 sc->iy_media = IFM_ETHER | IFM_10_2; 537 break; 538 case TPE_BIT: 539 sc->iy_media = IFM_ETHER | IFM_10_T; 540 break; 541 default: 542 sc->iy_media = IFM_ETHER | IFM_10_5; 543 } 544 545 bus_space_write_1(iot, ioh, MEDIA_SELECT, temp); 546 #ifdef IYDEBUG 547 { 548 char sbuf[128]; 549 550 bitmask_snprintf(temp, "\020\1LnkInDis\2PolCor\3TPE\4JabberDis\5NoAport\6BNC", 551 sbuf, sizeof(sbuf)); 552 printf("changed to 0x%s\n", sbuf); 553 } 554 #endif 555 556 bus_space_write_1(iot, ioh, 0, BANK_SEL(0)); 557 bus_space_write_1(iot, ioh, INT_MASK_REG, ALL_INTS); 558 bus_space_write_1(iot, ioh, 0, BANK_SEL(1)); 559 560 temp = bus_space_read_1(iot, ioh, INT_NO_REG); 561 bus_space_write_1(iot, ioh, INT_NO_REG, (temp & 0xf8) | sc->mappedirq); 562 563 #ifdef IYDEBUG 564 { 565 char sbuf[128]; 566 567 bitmask_snprintf(temp, "\020\4bad_irq\010flash/boot present", 568 sbuf, sizeof(sbuf)); 569 printf("%s: int no was %s\n", sc->sc_dev.dv_xname, sbuf); 570 571 temp = bus_space_read_1(iot, ioh, INT_NO_REG); 572 bitmask_snprintf(temp, "\020\4bad_irq\010flash/boot present", 573 sbuf, sizeof(sbuf)); 574 printf("%s: int no now %s\n", sc->sc_dev.dv_xname, sbuf); 575 } 576 #endif 577 578 bus_space_write_1(iot, ioh, RCV_LOWER_LIMIT_REG, 0); 579 bus_space_write_1(iot, ioh, RCV_UPPER_LIMIT_REG, (sc->rx_size -2) >>8); 580 bus_space_write_1(iot, ioh, XMT_LOWER_LIMIT_REG, sc->rx_size >>8); 581 bus_space_write_1(iot, ioh, XMT_UPPER_LIMIT_REG, (sc->sram - 2) >>8); 582 583 temp = bus_space_read_1(iot, ioh, REG1); 584 #ifdef IYDEBUG 585 { 586 char sbuf[128]; 587 588 bitmask_snprintf(temp, "\020\2WORD_WIDTH\010INT_ENABLE", 589 sbuf, sizeof(sbuf)); 590 printf("%s: HW access is %s\n", sc->sc_dev.dv_xname, sbuf); 591 } 592 #endif 593 bus_space_write_1(iot, ioh, REG1, temp | INT_ENABLE); /* XXX what about WORD_WIDTH? */ 594 595 #ifdef IYDEBUG 596 { 597 char sbuf[128]; 598 599 temp = bus_space_read_1(iot, ioh, REG1); 600 bitmask_snprintf(temp, "\020\2WORD_WIDTH\010INT_ENABLE", 601 sbuf, sizeof(sbuf)); 602 printf("%s: HW access is %s\n", sc->sc_dev.dv_xname, sbuf); 603 } 604 #endif 605 606 bus_space_write_1(iot, ioh, 0, BANK_SEL(0)); 607 608 bus_space_write_1(iot, ioh, INT_MASK_REG, ALL_INTS & ~(RX_BIT|TX_BIT)); 609 bus_space_write_1(iot, ioh, STATUS_REG, ALL_INTS); /* clear ints */ 610 611 bus_space_write_1(iot, ioh, RCV_COPY_THRESHOLD, 0); 612 613 bus_space_write_2(iot, ioh, RCV_START_LOW, 0); 614 bus_space_write_2(iot, ioh, RCV_STOP_LOW, sc->rx_size - 2); 615 sc->rx_start = 0; 616 617 bus_space_write_1(iot, ioh, 0, SEL_RESET_CMD); 618 delay(200); 619 620 bus_space_write_2(iot, ioh, XMT_ADDR_REG, sc->rx_size); 621 622 sc->tx_start = sc->tx_end = sc->rx_size; 623 sc->tx_last = 0; 624 625 bus_space_write_1(iot, ioh, 0, RCV_ENABLE_CMD); 626 627 ifp->if_flags |= IFF_RUNNING; 628 ifp->if_flags &= ~IFF_OACTIVE; 629 } 630 631 void 632 iystart(ifp) 633 struct ifnet *ifp; 634 { 635 struct iy_softc *sc; 636 637 638 struct mbuf *m0, *m; 639 u_int len, pad, last, end; 640 u_int llen, residual; 641 int avail; 642 caddr_t data; 643 unsigned temp; 644 u_int16_t resval, stat; 645 bus_space_tag_t iot; 646 bus_space_handle_t ioh; 647 648 #ifdef IYDEBUG 649 printf("iystart called\n"); 650 #endif 651 sc = ifp->if_softc; 652 653 if ((ifp->if_flags & (IFF_RUNNING | IFF_OACTIVE)) != IFF_RUNNING) 654 return; 655 656 iy_intr_tx(sc); 657 658 iot = sc->sc_iot; 659 ioh = sc->sc_ioh; 660 661 for (;;) { 662 IFQ_POLL(&ifp->if_snd, m0); 663 if (m0 == NULL) 664 break; 665 #ifdef IYDEBUG 666 printf("%s: trying to write another packet to the hardware\n", 667 sc->sc_dev.dv_xname); 668 #endif 669 670 /* We need to use m->m_pkthdr.len, so require the header */ 671 if ((m0->m_flags & M_PKTHDR) == 0) 672 panic("iystart: no header mbuf"); 673 674 len = m0->m_pkthdr.len; 675 pad = len & 1; 676 677 #ifdef IYDEBUG 678 printf("%s: length is %d.\n", sc->sc_dev.dv_xname, len); 679 #endif 680 if (len < (ETHER_MIN_LEN - ETHER_CRC_LEN)) { 681 pad = ETHER_MIN_LEN - ETHER_CRC_LEN - len; 682 } 683 684 if (len + pad > ETHER_MAX_LEN) { 685 /* packet is obviously too large: toss it */ 686 ++ifp->if_oerrors; 687 IF_DEQUEUE(&ifp->if_snd, m0); 688 m_freem(m0); 689 continue; 690 } 691 692 #if NBPFILTER > 0 693 if (ifp->if_bpf) 694 bpf_mtap(ifp->if_bpf, m0); 695 #endif 696 697 avail = sc->tx_start - sc->tx_end; 698 if (avail <= 0) 699 avail += sc->tx_size; 700 701 #ifdef IYDEBUG 702 printf("%s: avail is %d.\n", sc->sc_dev.dv_xname, avail); 703 #endif 704 /* 705 * we MUST RUN at splnet here --- 706 * XXX todo: or even turn off the boards ints ??? hm... 707 */ 708 709 /* See if there is room to put another packet in the buffer. */ 710 711 if ((len+pad+2*I595_XMT_HDRLEN) > avail) { 712 #ifdef IYDEBUG 713 printf("%s: len = %d, avail = %d, setting OACTIVE\n", 714 sc->sc_dev.dv_xname, len, avail); 715 #endif 716 /* mark interface as full ... */ 717 ifp->if_flags |= IFF_OACTIVE; 718 719 /* and wait for any transmission result */ 720 bus_space_write_1(iot, ioh, 0, BANK_SEL(2)); 721 722 temp = bus_space_read_1(iot, ioh, REG1); 723 bus_space_write_1(iot, ioh, REG1, 724 temp & ~XMT_CHAIN_INT); 725 726 bus_space_write_1(iot, ioh, 0, BANK_SEL(0)); 727 728 return; 729 } 730 731 /* we know it fits in the hardware now, so dequeue it */ 732 IFQ_DEQUEUE(&ifp->if_snd, m0); 733 734 last = sc->tx_end; 735 end = last + pad + len + I595_XMT_HDRLEN; 736 737 if (end >= sc->sram) { 738 if ((sc->sram - last) <= I595_XMT_HDRLEN) { 739 /* keep header in one piece */ 740 last = sc->rx_size; 741 end = last + pad + len + I595_XMT_HDRLEN; 742 } else 743 end -= sc->tx_size; 744 } 745 746 bus_space_write_2(iot, ioh, HOST_ADDR_REG, last); 747 bus_space_write_stream_2(iot, ioh, MEM_PORT_REG, 748 htole16(XMT_CMD)); 749 750 bus_space_write_2(iot, ioh, MEM_PORT_REG, 0); 751 bus_space_write_2(iot, ioh, MEM_PORT_REG, 0); 752 753 bus_space_write_stream_2(iot, ioh, MEM_PORT_REG, 754 htole16(len + pad)); 755 756 residual = resval = 0; 757 758 while ((m = m0)!=0) { 759 data = mtod(m, caddr_t); 760 llen = m->m_len; 761 if (residual) { 762 #ifdef IYDEBUG 763 printf("%s: merging residual with next mbuf.\n", 764 sc->sc_dev.dv_xname); 765 #endif 766 resval |= *data << 8; 767 bus_space_write_stream_2(iot, ioh, 768 MEM_PORT_REG, resval); 769 --llen; 770 ++data; 771 } 772 if (llen > 1) 773 bus_space_write_multi_stream_2(iot, ioh, 774 MEM_PORT_REG, data, llen>>1); 775 residual = llen & 1; 776 if (residual) { 777 resval = *(data + llen - 1); 778 #ifdef IYDEBUG 779 printf("%s: got odd mbuf to send.\n", 780 sc->sc_dev.dv_xname); 781 #endif 782 } 783 784 MFREE(m, m0); 785 } 786 787 if (residual) 788 bus_space_write_stream_2(iot, ioh, MEM_PORT_REG, 789 resval); 790 791 pad >>= 1; 792 while (pad-- > 0) 793 bus_space_write_stream_2(iot, ioh, MEM_PORT_REG, 0); 794 795 #ifdef IYDEBUG 796 printf("%s: new last = 0x%x, end = 0x%x.\n", 797 sc->sc_dev.dv_xname, last, end); 798 printf("%s: old start = 0x%x, end = 0x%x, last = 0x%x\n", 799 sc->sc_dev.dv_xname, sc->tx_start, sc->tx_end, sc->tx_last); 800 #endif 801 802 if (sc->tx_start != sc->tx_end) { 803 bus_space_write_2(iot, ioh, HOST_ADDR_REG, 804 sc->tx_last + XMT_COUNT); 805 806 /* 807 * XXX We keep stat in le order, to potentially save 808 * a byte swap. 809 */ 810 stat = bus_space_read_stream_2(iot, ioh, MEM_PORT_REG); 811 812 bus_space_write_2(iot, ioh, HOST_ADDR_REG, 813 sc->tx_last + XMT_CHAIN); 814 815 bus_space_write_stream_2(iot, ioh, MEM_PORT_REG, 816 htole16(last)); 817 818 bus_space_write_stream_2(iot, ioh, MEM_PORT_REG, 819 stat | htole16(CHAIN)); 820 #ifdef IYDEBUG 821 printf("%s: setting 0x%x to 0x%x\n", 822 sc->sc_dev.dv_xname, sc->tx_last + XMT_COUNT, 823 le16toh(stat) | CHAIN); 824 #endif 825 } 826 stat = bus_space_read_2(iot, ioh, MEM_PORT_REG); /* dummy read */ 827 828 /* XXX todo: enable ints here if disabled */ 829 830 ++ifp->if_opackets; 831 832 if (sc->tx_start == sc->tx_end) { 833 bus_space_write_2(iot, ioh, XMT_ADDR_REG, last); 834 bus_space_write_1(iot, ioh, 0, XMT_CMD); 835 sc->tx_start = last; 836 #ifdef IYDEBUG 837 printf("%s: writing 0x%x to XAR and giving XCMD\n", 838 sc->sc_dev.dv_xname, last); 839 #endif 840 } else { 841 bus_space_write_1(iot, ioh, 0, RESUME_XMT_CMD); 842 #ifdef IYDEBUG 843 printf("%s: giving RESUME_XCMD\n", 844 sc->sc_dev.dv_xname); 845 #endif 846 } 847 sc->tx_last = last; 848 sc->tx_end = end; 849 } 850 /* and wait only for end of transmission chain */ 851 bus_space_write_1(iot, ioh, 0, BANK_SEL(2)); 852 853 temp = bus_space_read_1(iot, ioh, REG1); 854 bus_space_write_1(iot, ioh, REG1, temp | XMT_CHAIN_INT); 855 856 bus_space_write_1(iot, ioh, 0, BANK_SEL(0)); 857 } 858 859 860 static __inline void 861 eepromwritebit(iot, ioh, what) 862 bus_space_tag_t iot; 863 bus_space_handle_t ioh; 864 int what; 865 { 866 bus_space_write_1(iot, ioh, EEPROM_REG, what); 867 delay(1); 868 bus_space_write_1(iot, ioh, EEPROM_REG, what|EESK); 869 delay(1); 870 bus_space_write_1(iot, ioh, EEPROM_REG, what); 871 delay(1); 872 } 873 874 static __inline int 875 eepromreadbit(iot, ioh) 876 bus_space_tag_t iot; 877 bus_space_handle_t ioh; 878 { 879 int b; 880 881 bus_space_write_1(iot, ioh, EEPROM_REG, EECS|EESK); 882 delay(1); 883 b = bus_space_read_1(iot, ioh, EEPROM_REG); 884 bus_space_write_1(iot, ioh, EEPROM_REG, EECS); 885 delay(1); 886 887 return ((b & EEDO) != 0); 888 } 889 890 static u_int16_t 891 eepromread(iot, ioh, offset) 892 bus_space_tag_t iot; 893 bus_space_handle_t ioh; 894 int offset; 895 { 896 volatile int i; 897 volatile int j; 898 volatile u_int16_t readval; 899 900 bus_space_write_1(iot, ioh, 0, BANK_SEL(2)); 901 delay(1); 902 bus_space_write_1(iot, ioh, EEPROM_REG, EECS); /* XXXX??? */ 903 delay(1); 904 905 eepromwritebit(iot, ioh, EECS|EEDI); 906 eepromwritebit(iot, ioh, EECS|EEDI); 907 eepromwritebit(iot, ioh, EECS); 908 909 for (j=5; j>=0; --j) { 910 if ((offset>>j) & 1) 911 eepromwritebit(iot, ioh, EECS|EEDI); 912 else 913 eepromwritebit(iot, ioh, EECS); 914 } 915 916 for (readval=0, i=0; i<16; ++i) { 917 readval<<=1; 918 readval |= eepromreadbit(iot, ioh); 919 } 920 921 bus_space_write_1(iot, ioh, EEPROM_REG, 0|EESK); 922 delay(1); 923 bus_space_write_1(iot, ioh, EEPROM_REG, 0); 924 925 bus_space_write_1(iot, ioh, COMMAND_REG, BANK_SEL(0)); 926 927 return readval; 928 } 929 930 /* 931 * Device timeout/watchdog routine. Entered if the device neglects to generate 932 * an interrupt after a transmit has been started on it. 933 */ 934 void 935 iywatchdog(ifp) 936 struct ifnet *ifp; 937 { 938 struct iy_softc *sc = ifp->if_softc; 939 940 log(LOG_ERR, "%s: device timeout\n", sc->sc_dev.dv_xname); 941 ++sc->sc_ethercom.ec_if.if_oerrors; 942 iyreset(sc); 943 } 944 945 /* 946 * What to do upon receipt of an interrupt. 947 */ 948 int 949 iyintr(arg) 950 void *arg; 951 { 952 struct iy_softc *sc; 953 struct ifnet *ifp; 954 bus_space_tag_t iot; 955 bus_space_handle_t ioh; 956 957 u_short status; 958 959 sc = arg; 960 iot = sc->sc_iot; 961 ioh = sc->sc_ioh; 962 963 ifp = &sc->sc_ethercom.ec_if; 964 965 status = bus_space_read_1(iot, ioh, STATUS_REG); 966 #ifdef IYDEBUG 967 if (status & ALL_INTS) { 968 char sbuf[128]; 969 970 bitmask_snprintf(status, "\020\1RX_STP\2RX\3TX\4EXEC", 971 sbuf, sizeof(sbuf)); 972 printf("%s: got interupt %s", sc->sc_dev.dv_xname, sbuf); 973 974 if (status & EXEC_INT) { 975 bitmask_snprintf(bus_space_read_1(iot, ioh, 0), 976 "\020\6ABORT", sbuf, sizeof(sbuf)); 977 printf(" event %s\n", sbuf); 978 } else 979 printf("\n"); 980 } 981 #endif 982 if ((status & (RX_INT | TX_INT)) == 0) 983 return 0; 984 985 if (status & RX_INT) { 986 iy_intr_rx(sc); 987 bus_space_write_1(iot, ioh, STATUS_REG, RX_INT); 988 } 989 if (status & TX_INT) { 990 /* Tell feeders we may be able to accept more data... */ 991 ifp->if_flags &= ~IFF_OACTIVE; 992 /* and get more data. */ 993 iystart(ifp); 994 bus_space_write_1(iot, ioh, STATUS_REG, TX_INT); 995 } 996 997 #if NRND > 0 998 rnd_add_uint32(&sc->rnd_source, status); 999 #endif 1000 1001 return 1; 1002 } 1003 1004 void 1005 iyget(sc, iot, ioh, rxlen) 1006 struct iy_softc *sc; 1007 bus_space_tag_t iot; 1008 bus_space_handle_t ioh; 1009 int rxlen; 1010 { 1011 struct mbuf *m, *top, **mp; 1012 struct ifnet *ifp; 1013 int len; 1014 1015 ifp = &sc->sc_ethercom.ec_if; 1016 1017 MGETHDR(m, M_DONTWAIT, MT_DATA); 1018 if (m == 0) 1019 goto dropped; 1020 m->m_pkthdr.rcvif = ifp; 1021 m->m_pkthdr.len = rxlen; 1022 len = MHLEN; 1023 top = 0; 1024 mp = ⊤ 1025 1026 while (rxlen > 0) { 1027 if (top) { 1028 MGET(m, M_DONTWAIT, MT_DATA); 1029 if (m == 0) { 1030 m_freem(top); 1031 goto dropped; 1032 } 1033 len = MLEN; 1034 } 1035 if (rxlen >= MINCLSIZE) { 1036 MCLGET(m, M_DONTWAIT); 1037 if ((m->m_flags & M_EXT) == 0) { 1038 m_free(m); 1039 m_freem(top); 1040 goto dropped; 1041 } 1042 len = MCLBYTES; 1043 } 1044 len = min(rxlen, len); 1045 if (len > 1) { 1046 len &= ~1; 1047 1048 bus_space_read_multi_stream_2(iot, ioh, MEM_PORT_REG, 1049 mtod(m, caddr_t), len/2); 1050 } else { 1051 #ifdef IYDEBUG 1052 printf("%s: received odd mbuf\n", sc->sc_dev.dv_xname); 1053 #endif 1054 *(mtod(m, caddr_t)) = bus_space_read_stream_2(iot, ioh, 1055 MEM_PORT_REG); 1056 } 1057 m->m_len = len; 1058 rxlen -= len; 1059 *mp = m; 1060 mp = &m->m_next; 1061 } 1062 /* XXX receive the top here */ 1063 ++ifp->if_ipackets; 1064 1065 #if NBPFILTER > 0 1066 if (ifp->if_bpf) 1067 bpf_mtap(ifp->if_bpf, top); 1068 #endif 1069 (*ifp->if_input)(ifp, top); 1070 return; 1071 1072 dropped: 1073 ++ifp->if_ierrors; 1074 return; 1075 } 1076 1077 void 1078 iy_intr_rx(sc) 1079 struct iy_softc *sc; 1080 { 1081 struct ifnet *ifp; 1082 bus_space_tag_t iot; 1083 bus_space_handle_t ioh; 1084 1085 u_int rxadrs, rxevnt, rxstatus, rxnext, rxlen; 1086 1087 iot = sc->sc_iot; 1088 ioh = sc->sc_ioh; 1089 ifp = &sc->sc_ethercom.ec_if; 1090 1091 rxadrs = sc->rx_start; 1092 bus_space_write_2(iot, ioh, HOST_ADDR_REG, rxadrs); 1093 rxevnt = le16toh(bus_space_read_stream_2(iot, ioh, MEM_PORT_REG)); 1094 rxnext = 0; 1095 1096 while (rxevnt == RCV_DONE) { 1097 rxstatus = le16toh(bus_space_read_stream_2(iot, ioh, 1098 MEM_PORT_REG)); 1099 rxnext = le16toh(bus_space_read_stream_2(iot, ioh, 1100 MEM_PORT_REG)); 1101 rxlen = le16toh(bus_space_read_stream_2(iot, ioh, 1102 MEM_PORT_REG)); 1103 #ifdef IYDEBUG 1104 { 1105 char sbuf[128]; 1106 1107 bitmask_snprintf(rxstatus, "\020\1RCLD\2IA_MCH\010SHORT\011OVRN\013ALGERR\014CRCERR\015LENERR\016RCVOK\020TYP", 1108 sbuf, sizeof(sbuf)); 1109 printf("%s: pck at 0x%04x stat %s next 0x%x len 0x%x\n", 1110 sc->sc_dev.dv_xname, rxadrs, sbuf, rxnext, rxlen); 1111 } 1112 #endif 1113 iyget(sc, iot, ioh, rxlen); 1114 1115 /* move stop address */ 1116 bus_space_write_2(iot, ioh, RCV_STOP_LOW, 1117 rxnext == 0 ? sc->rx_size - 2 : rxnext - 2); 1118 1119 bus_space_write_2(iot, ioh, HOST_ADDR_REG, rxnext); 1120 rxadrs = rxnext; 1121 rxevnt = le16toh(bus_space_read_stream_2(iot, ioh, 1122 MEM_PORT_REG)); 1123 } 1124 sc->rx_start = rxnext; 1125 } 1126 1127 void 1128 iy_intr_tx(sc) 1129 struct iy_softc *sc; 1130 { 1131 bus_space_tag_t iot; 1132 bus_space_handle_t ioh; 1133 struct ifnet *ifp; 1134 u_int txstatus, txstat2, txlen, txnext; 1135 1136 ifp = &sc->sc_ethercom.ec_if; 1137 iot = sc->sc_iot; 1138 ioh = sc->sc_ioh; 1139 1140 while (sc->tx_start != sc->tx_end) { 1141 bus_space_write_2(iot, ioh, HOST_ADDR_REG, sc->tx_start); 1142 txstatus = le16toh(bus_space_read_stream_2(iot, ioh, 1143 MEM_PORT_REG)); 1144 1145 if ((txstatus & (TX_DONE|CMD_MASK)) != (TX_DONE|XMT_CMD)) 1146 break; 1147 1148 txstat2 = le16toh(bus_space_read_stream_2(iot, ioh, 1149 MEM_PORT_REG)); 1150 txnext = le16toh(bus_space_read_stream_2(iot, ioh, 1151 MEM_PORT_REG)); 1152 txlen = le16toh(bus_space_read_stream_2(iot, ioh, 1153 MEM_PORT_REG)); 1154 #ifdef IYDEBUG 1155 { 1156 char sbuf[128]; 1157 1158 bitmask_snprintf(txstat2, "\020\6MAX_COL\7HRT_BEAT\010TX_DEF\011UND_RUN\012JERR\013LST_CRS\014LTCOL\016TX_OK\020COLL", 1159 sbuf, sizeof(sbuf)); 1160 printf("txstat 0x%x stat2 0x%s next 0x%x len 0x%x\n", 1161 txstatus, sbuf, txnext, txlen); 1162 } 1163 #endif 1164 if (txlen & CHAIN) 1165 sc->tx_start = txnext; 1166 else 1167 sc->tx_start = sc->tx_end; 1168 ifp->if_flags &= ~IFF_OACTIVE; 1169 1170 if (txstat2 & 0x0020) 1171 ifp->if_collisions += 16; 1172 else 1173 ifp->if_collisions += txstat2 & 0x000f; 1174 1175 if ((txstat2 & 0x2000) == 0) 1176 ++ifp->if_oerrors; 1177 } 1178 } 1179 1180 int 1181 iyioctl(ifp, cmd, data) 1182 struct ifnet *ifp; 1183 u_long cmd; 1184 caddr_t data; 1185 { 1186 struct iy_softc *sc; 1187 struct ifaddr *ifa; 1188 struct ifreq *ifr; 1189 int s, error = 0; 1190 1191 sc = ifp->if_softc; 1192 ifa = (struct ifaddr *)data; 1193 ifr = (struct ifreq *)data; 1194 1195 #ifdef IYDEBUG 1196 printf("iyioctl called with ifp 0x%p (%s) cmd 0x%lx data 0x%p\n", 1197 ifp, ifp->if_xname, cmd, data); 1198 #endif 1199 1200 s = splnet(); 1201 1202 switch (cmd) { 1203 1204 case SIOCSIFADDR: 1205 ifp->if_flags |= IFF_UP; 1206 1207 switch (ifa->ifa_addr->sa_family) { 1208 #ifdef INET 1209 case AF_INET: 1210 iyinit(sc); 1211 arp_ifinit(ifp, ifa); 1212 break; 1213 #endif 1214 #ifdef NS 1215 /* XXX - This code is probably wrong. */ 1216 case AF_NS: 1217 { 1218 struct ns_addr *ina = &IA_SNS(ifa)->sns_addr; 1219 1220 if (ns_nullhost(*ina)) 1221 ina->x_host = *(union ns_host *) 1222 LLADDR(ifp->if_sadl); 1223 else 1224 memcpy(LLADDR(ifp->if_sadl), ina->x_host.c_host, 1225 ETHER_ADDR_LEN); 1226 /* Set new address. */ 1227 iyinit(sc); 1228 break; 1229 } 1230 #endif /* NS */ 1231 default: 1232 iyinit(sc); 1233 break; 1234 } 1235 break; 1236 1237 case SIOCSIFFLAGS: 1238 sc->promisc = ifp->if_flags & (IFF_PROMISC | IFF_ALLMULTI); 1239 if ((ifp->if_flags & IFF_UP) == 0 && 1240 (ifp->if_flags & IFF_RUNNING) != 0) { 1241 /* 1242 * If interface is marked down and it is running, then 1243 * stop it. 1244 */ 1245 iystop(sc); 1246 ifp->if_flags &= ~IFF_RUNNING; 1247 } else if ((ifp->if_flags & IFF_UP) != 0 && 1248 (ifp->if_flags & IFF_RUNNING) == 0) { 1249 /* 1250 * If interface is marked up and it is stopped, then 1251 * start it. 1252 */ 1253 iyinit(sc); 1254 } else { 1255 /* 1256 * Reset the interface to pick up changes in any other 1257 * flags that affect hardware registers. 1258 */ 1259 iystop(sc); 1260 iyinit(sc); 1261 } 1262 #ifdef IYDEBUGX 1263 if (ifp->if_flags & IFF_DEBUG) 1264 sc->sc_debug = IFY_ALL; 1265 else 1266 sc->sc_debug = 0; 1267 #endif 1268 break; 1269 1270 case SIOCADDMULTI: 1271 case SIOCDELMULTI: 1272 error = (cmd == SIOCADDMULTI) ? 1273 ether_addmulti(ifr, &sc->sc_ethercom): 1274 ether_delmulti(ifr, &sc->sc_ethercom); 1275 1276 if (error == ENETRESET) { 1277 /* 1278 * Multicast list has changed; set the hardware filter 1279 * accordingly. 1280 */ 1281 iyreset(sc); /* XXX can't make it work otherwise */ 1282 iy_mc_reset(sc); 1283 error = 0; 1284 } 1285 break; 1286 1287 case SIOCSIFMEDIA: 1288 case SIOCGIFMEDIA: 1289 error = ifmedia_ioctl(ifp, ifr, &sc->iy_ifmedia, cmd); 1290 break; 1291 default: 1292 error = EINVAL; 1293 } 1294 splx(s); 1295 return error; 1296 } 1297 1298 int 1299 iy_mediachange(ifp) 1300 struct ifnet *ifp; 1301 { 1302 struct iy_softc *sc = ifp->if_softc; 1303 1304 if (IFM_TYPE(sc->iy_ifmedia.ifm_media) != IFM_ETHER) 1305 return EINVAL; 1306 switch(IFM_SUBTYPE(sc->iy_ifmedia.ifm_media)) { 1307 case IFM_10_5: 1308 case IFM_10_2: 1309 case IFM_10_T: 1310 case IFM_AUTO: 1311 iystop(sc); 1312 iyinit(sc); 1313 return 0; 1314 default: 1315 return EINVAL; 1316 } 1317 } 1318 1319 void 1320 iy_mediastatus(ifp, ifmr) 1321 struct ifnet *ifp; 1322 struct ifmediareq *ifmr; 1323 { 1324 struct iy_softc *sc = ifp->if_softc; 1325 1326 ifmr->ifm_active = sc->iy_media; 1327 ifmr->ifm_status = IFM_AVALID | IFM_ACTIVE; 1328 } 1329 1330 1331 static void 1332 iy_mc_setup(sc) 1333 struct iy_softc *sc; 1334 { 1335 struct ether_multi *enm; 1336 struct ether_multistep step; 1337 struct ethercom *ecp; 1338 struct ifnet *ifp; 1339 bus_space_tag_t iot; 1340 bus_space_handle_t ioh; 1341 int avail, last /*, end*/ , len; 1342 int timeout; 1343 volatile u_int16_t dum; 1344 u_int8_t temp; 1345 1346 1347 ecp = &sc->sc_ethercom; 1348 ifp = &ecp->ec_if; 1349 1350 iot = sc->sc_iot; 1351 ioh = sc->sc_ioh; 1352 1353 len = 6 * ecp->ec_multicnt; 1354 1355 avail = sc->tx_start - sc->tx_end; 1356 if (avail <= 0) 1357 avail += sc->tx_size; 1358 if (ifp->if_flags & IFF_DEBUG) 1359 printf("%s: iy_mc_setup called, %d addresses, " 1360 "%d/%d bytes needed/avail\n", ifp->if_xname, 1361 ecp->ec_multicnt, len + I595_XMT_HDRLEN, avail); 1362 1363 last = sc->rx_size; 1364 1365 bus_space_write_1(iot, ioh, 0, BANK_SEL(2)); 1366 bus_space_write_1(iot, ioh, RECV_MODES_REG, MATCH_BRDCST); 1367 /* XXX VOODOO */ 1368 temp = bus_space_read_1(iot, ioh, MEDIA_SELECT); 1369 bus_space_write_1(iot, ioh, MEDIA_SELECT, temp); 1370 /* XXX END OF VOODOO */ 1371 bus_space_write_1(iot, ioh, 0, BANK_SEL(0)); 1372 bus_space_write_2(iot, ioh, HOST_ADDR_REG, last); 1373 bus_space_write_stream_2(iot, ioh, MEM_PORT_REG, htole16(MC_SETUP_CMD)); 1374 bus_space_write_2(iot, ioh, MEM_PORT_REG, 0); 1375 bus_space_write_2(iot, ioh, MEM_PORT_REG, 0); 1376 bus_space_write_stream_2(iot, ioh, MEM_PORT_REG, htole16(len)); 1377 1378 ETHER_FIRST_MULTI(step, ecp, enm); 1379 while(enm) { 1380 bus_space_write_multi_stream_2(iot, ioh, MEM_PORT_REG, 1381 enm->enm_addrlo, 3); 1382 1383 ETHER_NEXT_MULTI(step, enm); 1384 } 1385 dum = bus_space_read_2(iot, ioh, MEM_PORT_REG); /* dummy read */ 1386 bus_space_write_2(iot, ioh, XMT_ADDR_REG, last); 1387 bus_space_write_1(iot, ioh, 0, MC_SETUP_CMD); 1388 1389 1390 sc->tx_start = sc->rx_size; 1391 sc->tx_end = sc->rx_size + I595_XMT_HDRLEN + len; 1392 1393 for (timeout=0; timeout<100; timeout++) { 1394 DELAY(2); 1395 if ((bus_space_read_1(iot, ioh, STATUS_REG) & EXEC_INT) == 0) 1396 continue; 1397 1398 temp = bus_space_read_1(iot, ioh, 0); 1399 bus_space_write_1(iot, ioh, STATUS_REG, EXEC_INT); 1400 #ifdef DIAGNOSTIC 1401 if (temp & 0x20) { 1402 printf("%s: mc setup failed, %d usec\n", 1403 sc->sc_dev.dv_xname, timeout * 2); 1404 } else if (((temp & 0x0f) == 0x03) && 1405 (ifp->if_flags & IFF_DEBUG)) { 1406 printf("%s: mc setup done, %d usec\n", 1407 sc->sc_dev.dv_xname, timeout * 2); 1408 } 1409 #endif 1410 break; 1411 } 1412 sc->tx_start = sc->tx_end; 1413 ifp->if_flags &= ~IFF_OACTIVE; 1414 1415 } 1416 1417 static void 1418 iy_mc_reset(sc) 1419 struct iy_softc *sc; 1420 { 1421 struct ether_multi *enm; 1422 struct ether_multistep step; 1423 struct ethercom *ecp; 1424 struct ifnet *ifp; 1425 bus_space_tag_t iot; 1426 bus_space_handle_t ioh; 1427 u_int16_t temp; 1428 1429 ecp = &sc->sc_ethercom; 1430 ifp = &ecp->ec_if; 1431 1432 iot = sc->sc_iot; 1433 ioh = sc->sc_ioh; 1434 1435 if (ecp->ec_multicnt > 63) { 1436 ifp->if_flags |= IFF_ALLMULTI; 1437 1438 } else if (ecp->ec_multicnt > 0) { 1439 /* 1440 * Step through the list of addresses. 1441 */ 1442 ETHER_FIRST_MULTI(step, ecp, enm); 1443 while(enm) { 1444 if (memcmp(enm->enm_addrlo, enm->enm_addrhi, 6) != 0) { 1445 ifp->if_flags |= IFF_ALLMULTI; 1446 goto setupmulti; 1447 } 1448 ETHER_NEXT_MULTI(step, enm); 1449 } 1450 /* OK, we really need to do it now: */ 1451 #if 0 1452 if ((ifp->if_flags & (IFF_RUNNING | IFF_OACTIVE)) 1453 != IFF_RUNNING) { 1454 ifp->if_flags |= IFF_OACTIVE; 1455 sc->want_mc_setup = 1; 1456 return; 1457 } 1458 #endif 1459 iy_mc_setup(sc); 1460 } else { 1461 ifp->if_flags &= ~IFF_ALLMULTI; 1462 } 1463 1464 setupmulti: 1465 bus_space_write_1(iot, ioh, 0, BANK_SEL(2)); 1466 if (ifp->if_flags & (IFF_PROMISC|IFF_ALLMULTI)) { 1467 temp = MATCH_ALL; 1468 } else 1469 temp = MATCH_BRDCST; 1470 1471 bus_space_write_1(iot, ioh, RECV_MODES_REG, temp); 1472 /* XXX VOODOO */ 1473 temp = bus_space_read_1(iot, ioh, MEDIA_SELECT); 1474 bus_space_write_1(iot, ioh, MEDIA_SELECT, temp); 1475 /* XXX END OF VOODOO */ 1476 1477 /* XXX TBD: setup hardware for all multicasts */ 1478 bus_space_write_1(iot, ioh, 0, BANK_SEL(0)); 1479 return; 1480 } 1481 1482 #ifdef IYDEBUGX 1483 void 1484 print_rbd(rbd) 1485 volatile struct ie_recv_buf_desc *rbd; 1486 { 1487 printf("RBD at %08lx:\nactual %04x, next %04x, buffer %08x\n" 1488 "length %04x, mbz %04x\n", (u_long)rbd, rbd->ie_rbd_actual, 1489 rbd->ie_rbd_next, rbd->ie_rbd_buffer, rbd->ie_rbd_length, 1490 rbd->mbz); 1491 } 1492 #endif 1493 1494 void 1495 iyprobemem(sc) 1496 struct iy_softc *sc; 1497 { 1498 bus_space_tag_t iot; 1499 bus_space_handle_t ioh; 1500 int testing; 1501 1502 iot = sc->sc_iot; 1503 ioh = sc->sc_ioh; 1504 1505 bus_space_write_1(iot, ioh, COMMAND_REG, BANK_SEL(0)); 1506 delay(1); 1507 bus_space_write_2(iot, ioh, HOST_ADDR_REG, 4096-2); 1508 bus_space_write_2(iot, ioh, MEM_PORT_REG, 0); 1509 1510 for (testing=65536; testing >= 4096; testing >>= 1) { 1511 bus_space_write_2(iot, ioh, HOST_ADDR_REG, testing-2); 1512 bus_space_write_2(iot, ioh, MEM_PORT_REG, 0xdead); 1513 bus_space_write_2(iot, ioh, HOST_ADDR_REG, testing-2); 1514 if (bus_space_read_2(iot, ioh, MEM_PORT_REG) != 0xdead) { 1515 #ifdef IYMEMDEBUG 1516 printf("%s: Didn't keep 0xdead at 0x%x\n", 1517 sc->sc_dev.dv_xname, testing-2); 1518 #endif 1519 continue; 1520 } 1521 1522 bus_space_write_2(iot, ioh, HOST_ADDR_REG, testing-2); 1523 bus_space_write_2(iot, ioh, MEM_PORT_REG, 0xbeef); 1524 bus_space_write_2(iot, ioh, HOST_ADDR_REG, testing-2); 1525 if (bus_space_read_2(iot, ioh, MEM_PORT_REG) != 0xbeef) { 1526 #ifdef IYMEMDEBUG 1527 printf("%s: Didn't keep 0xbeef at 0x%x\n", 1528 sc->sc_dev.dv_xname, testing-2); 1529 #endif 1530 continue; 1531 } 1532 1533 bus_space_write_2(iot, ioh, HOST_ADDR_REG, 0); 1534 bus_space_write_2(iot, ioh, MEM_PORT_REG, 0); 1535 bus_space_write_2(iot, ioh, HOST_ADDR_REG, testing >> 1); 1536 bus_space_write_2(iot, ioh, MEM_PORT_REG, testing >> 1); 1537 bus_space_write_2(iot, ioh, HOST_ADDR_REG, 0); 1538 if (bus_space_read_2(iot, ioh, MEM_PORT_REG) == (testing >> 1)) { 1539 #ifdef IYMEMDEBUG 1540 printf("%s: 0x%x alias of 0x0\n", 1541 sc->sc_dev.dv_xname, testing >> 1); 1542 #endif 1543 continue; 1544 } 1545 1546 break; 1547 } 1548 1549 sc->sram = testing; 1550 1551 switch(testing) { 1552 case 65536: 1553 /* 4 NFS packets + overhead RX, 2 NFS + overhead TX */ 1554 sc->rx_size = 44*1024; 1555 break; 1556 1557 case 32768: 1558 /* 2 NFS packets + overhead RX, 1 NFS + overhead TX */ 1559 sc->rx_size = 22*1024; 1560 break; 1561 1562 case 16384: 1563 /* 1 NFS packet + overhead RX, 4 big packets TX */ 1564 sc->rx_size = 10*1024; 1565 break; 1566 default: 1567 sc->rx_size = testing/2; 1568 break; 1569 } 1570 sc->tx_size = testing - sc->rx_size; 1571 } 1572 1573 static int 1574 eepromreadall(iot, ioh, wordp, maxi) 1575 bus_space_tag_t iot; 1576 bus_space_handle_t ioh; 1577 u_int16_t *wordp; 1578 int maxi; 1579 { 1580 int i; 1581 u_int16_t checksum, tmp; 1582 1583 checksum = 0; 1584 1585 for (i=0; i<EEPP_LENGTH; ++i) { 1586 tmp = eepromread(iot, ioh, i); 1587 checksum += tmp; 1588 if (i<maxi) 1589 wordp[i] = tmp; 1590 } 1591 1592 if (checksum != EEPP_CHKSUM) { 1593 #ifdef IYDEBUG 1594 printf("wrong EEPROM checksum 0x%x should be 0x%x\n", 1595 checksum, EEPP_CHKSUM); 1596 #endif 1597 return 1; 1598 } 1599 return 0; 1600 } 1601
Indexes created Thu Sep 25 16:09:42 GMT 2025