if_iy.c revision 1.78
1 /* $NetBSD: if_iy.c,v 1.78 2007/10/19 12:00:18 ad Exp $ */ 2 /* #define IYDEBUG */ 3 /* #define IYMEMDEBUG */ 4 5 /*- 6 * Copyright (c) 1996,2001 The NetBSD Foundation, Inc. 7 * All rights reserved. 8 * 9 * This code is derived from software contributed to The NetBSD Foundation 10 * by Ignatios Souvatzis. 11 * 12 * Redistribution and use in source and binary forms, with or without 13 * modification, are permitted provided that the following conditions 14 * are met: 15 * 1. Redistributions of source code must retain the above copyright 16 * notice, this list of conditions and the following disclaimer. 17 * 2. Redistributions in binary form must reproduce the above copyright 18 * notice, this list of conditions and the following disclaimer in the 19 * documentation and/or other materials provided with the distribution. 20 * 3. All advertising materials mentioning features or use of this software 21 * must display the following acknowledgement: 22 * This product includes software developed by the NetBSD 23 * Foundation, Inc. and its contributors. 24 * 4. Neither the name of The NetBSD Foundation nor the names of its 25 * contributors may be used to endorse or promote products derived 26 * from this software without specific prior written permission. 27 * 28 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 29 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 30 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 31 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 32 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 33 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 34 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 35 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 36 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 37 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 38 * POSSIBILITY OF SUCH DAMAGE. 39 */ 40 41 /* 42 * Supported hardware: 43 * 44 * - Intel EtherExpress Pro/10. 45 * - possibly other boards using the i82595 chip and no special tweaks. 46 */ 47 48 #include <sys/cdefs.h> 49 __KERNEL_RCSID(0, "$NetBSD: if_iy.c,v 1.78 2007/10/19 12:00:18 ad Exp $"); 50 51 #include "opt_inet.h" 52 #include "bpfilter.h" 53 #include "rnd.h" 54 55 #include <sys/param.h> 56 #include <sys/systm.h> 57 #include <sys/mbuf.h> 58 #include <sys/buf.h> 59 #include <sys/protosw.h> 60 #include <sys/socket.h> 61 #include <sys/ioctl.h> 62 #include <sys/errno.h> 63 #include <sys/syslog.h> 64 #include <sys/device.h> 65 #include <sys/endian.h> 66 #if NRND > 0 67 #include <sys/rnd.h> 68 #endif 69 70 #include <net/if.h> 71 #include <net/if_types.h> 72 #include <net/if_dl.h> 73 74 #include <net/if_ether.h> 75 76 #if NBPFILTER > 0 77 #include <net/bpf.h> 78 #include <net/bpfdesc.h> 79 #endif 80 81 #ifdef INET 82 #include <netinet/in.h> 83 #include <netinet/in_systm.h> 84 #include <netinet/in_var.h> 85 #include <netinet/ip.h> 86 #include <netinet/if_inarp.h> 87 #endif 88 89 90 #if defined(SIOCSIFMEDIA) 91 #include <net/if_media.h> 92 #endif 93 94 #include <sys/cpu.h> 95 #include <sys/bus.h> 96 #include <sys/intr.h> 97 98 #include <dev/isa/isareg.h> 99 #include <dev/isa/isavar.h> 100 #include <dev/ic/i82595reg.h> 101 102 /* XXX why isn't this centralized? */ 103 #ifndef __BUS_SPACE_HAS_STREAM_METHODS 104 #define bus_space_write_stream_2 bus_space_write_2 105 #define bus_space_write_multi_stream_2 bus_space_write_multi_2 106 #define bus_space_read_stream_2 bus_space_read_2 107 #define bus_space_read_multi_stream_2 bus_space_read_multi_2 108 #endif /* __BUS_SPACE_HAS_STREAM_METHODS */ 109 110 /* 111 * Ethernet status, per interface. 112 */ 113 struct iy_softc { 114 struct device sc_dev; 115 void *sc_ih; 116 117 bus_space_tag_t sc_iot; 118 bus_space_handle_t sc_ioh; 119 120 struct ethercom sc_ethercom; 121 122 struct ifmedia iy_ifmedia; 123 int iy_media; 124 125 int mappedirq; 126 127 int hard_vers; 128 129 int promisc; 130 131 int sram, tx_size, rx_size; 132 133 int tx_start, tx_end, tx_last; 134 int rx_start; 135 136 int doing_mc_setup; 137 #ifdef IYDEBUG 138 int sc_debug; 139 #endif 140 141 #if NRND > 0 142 rndsource_element_t rnd_source; 143 #endif 144 }; 145 146 void iywatchdog(struct ifnet *); 147 int iyioctl(struct ifnet *, u_long, void *); 148 int iyintr(void *); 149 void iyinit(struct iy_softc *); 150 void iystop(struct iy_softc *); 151 void iystart(struct ifnet *); 152 153 void iy_intr_rx(struct iy_softc *); 154 void iy_intr_tx(struct iy_softc *); 155 156 void iyreset(struct iy_softc *); 157 void iy_readframe(struct iy_softc *, int); 158 void iy_drop_packet_buffer(struct iy_softc *); 159 void iy_find_mem_size(struct iy_softc *); 160 void iyrint(struct iy_softc *); 161 void iytint(struct iy_softc *); 162 void iyxmit(struct iy_softc *); 163 static void iy_mc_setup(struct iy_softc *); 164 static void iy_mc_reset(struct iy_softc *); 165 void iyget(struct iy_softc *, bus_space_tag_t, bus_space_handle_t, int); 166 void iyprobemem(struct iy_softc *); 167 static inline void eepromwritebit(bus_space_tag_t, bus_space_handle_t, int); 168 static inline int eepromreadbit(bus_space_tag_t, bus_space_handle_t); 169 170 #ifdef IYDEBUGX 171 void print_rbd(volatile struct iy_recv_buf_desc *); 172 173 int in_ifrint = 0; 174 int in_iftint = 0; 175 #endif 176 177 int iy_mediachange(struct ifnet *); 178 void iy_mediastatus(struct ifnet *, struct ifmediareq *); 179 180 int iyprobe(struct device *, struct cfdata *, void *); 181 void iyattach(struct device *, struct device *, void *); 182 183 static u_int16_t eepromread(bus_space_tag_t, bus_space_handle_t, int); 184 185 static int eepromreadall(bus_space_tag_t, bus_space_handle_t, u_int16_t *, 186 int); 187 188 CFATTACH_DECL(iy, sizeof(struct iy_softc), 189 iyprobe, iyattach, NULL, NULL); 190 191 static u_int8_t eepro_irqmap[] = EEPP_INTMAP; 192 static u_int8_t eepro_revirqmap[] = EEPP_RINTMAP; 193 194 int 195 iyprobe(struct device *parent, struct cfdata *match, 196 void *aux) 197 { 198 struct isa_attach_args *ia = aux; 199 u_int16_t eaddr[8]; 200 bus_space_tag_t iot; 201 bus_space_handle_t ioh; 202 u_int8_t c, d; 203 int irq; 204 205 if (ia->ia_nio < 1) 206 return (0); 207 if (ia->ia_nirq < 1) 208 return (0); 209 210 if (ISA_DIRECT_CONFIG(ia)) 211 return (0); 212 213 iot = ia->ia_iot; 214 215 if (ia->ia_io[0].ir_addr == ISA_UNKNOWN_PORT) 216 return 0; 217 218 if (bus_space_map(iot, ia->ia_io[0].ir_addr, 16, 0, &ioh)) 219 return 0; 220 221 /* try to find the round robin sig: */ 222 223 c = bus_space_read_1(iot, ioh, ID_REG); 224 if ((c & ID_REG_MASK) != ID_REG_SIG) 225 goto out; 226 227 d = bus_space_read_1(iot, ioh, ID_REG); 228 if ((d & ID_REG_MASK) != ID_REG_SIG) 229 goto out; 230 231 if (((d-c) & R_ROBIN_BITS) != 0x40) 232 goto out; 233 234 d = bus_space_read_1(iot, ioh, ID_REG); 235 if ((d & ID_REG_MASK) != ID_REG_SIG) 236 goto out; 237 238 if (((d-c) & R_ROBIN_BITS) != 0x80) 239 goto out; 240 241 d = bus_space_read_1(iot, ioh, ID_REG); 242 if ((d & ID_REG_MASK) != ID_REG_SIG) 243 goto out; 244 245 if (((d-c) & R_ROBIN_BITS) != 0xC0) 246 goto out; 247 248 d = bus_space_read_1(iot, ioh, ID_REG); 249 if ((d & ID_REG_MASK) != ID_REG_SIG) 250 goto out; 251 252 if (((d-c) & R_ROBIN_BITS) != 0x00) 253 goto out; 254 255 #ifdef IYDEBUG 256 printf("iyprobe verified working ID reg.\n"); 257 #endif 258 259 if (eepromreadall(iot, ioh, eaddr, 8)) 260 goto out; 261 262 if (ia->ia_irq[0].ir_irq == ISA_UNKNOWN_IRQ) 263 irq = eepro_irqmap[eaddr[EEPPW1] & EEPP_Int]; 264 else 265 irq = ia->ia_irq[0].ir_irq; 266 267 if (irq >= sizeof(eepro_revirqmap)) 268 goto out; 269 270 if (eepro_revirqmap[irq] == 0xff) 271 goto out; 272 273 /* now lets reset the chip */ 274 275 bus_space_write_1(iot, ioh, COMMAND_REG, RESET_CMD); 276 delay(200); 277 278 ia->ia_nio = 1; 279 ia->ia_io[0].ir_size = 16; 280 281 ia->ia_nirq = 1; 282 ia->ia_irq[0].ir_irq = irq; 283 284 ia->ia_niomem = 0; 285 ia->ia_ndrq = 0; 286 287 bus_space_unmap(iot, ioh, 16); 288 return 1; /* found */ 289 out: 290 bus_space_unmap(iot, ioh, 16); 291 return 0; 292 } 293 294 void 295 iyattach(struct device *parent, struct device *self, void *aux) 296 { 297 struct iy_softc *sc = (void *)self; 298 struct isa_attach_args *ia = aux; 299 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 300 bus_space_tag_t iot; 301 bus_space_handle_t ioh; 302 unsigned temp; 303 u_int16_t eaddr[8]; 304 u_int8_t myaddr[ETHER_ADDR_LEN]; 305 int eirq; 306 307 iot = ia->ia_iot; 308 309 if (bus_space_map(iot, ia->ia_io[0].ir_addr, 16, 0, &ioh)) { 310 printf(": can't map i/o space\n"); 311 return; 312 } 313 314 sc->sc_iot = iot; 315 sc->sc_ioh = ioh; 316 317 sc->mappedirq = eepro_revirqmap[ia->ia_irq[0].ir_irq]; 318 319 /* now let's reset the chip */ 320 321 bus_space_write_1(iot, ioh, COMMAND_REG, RESET_CMD); 322 delay(200); 323 324 iyprobemem(sc); 325 326 strcpy(ifp->if_xname, sc->sc_dev.dv_xname); 327 ifp->if_softc = sc; 328 ifp->if_start = iystart; 329 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_NOTRAILERS 330 | IFF_MULTICAST; 331 332 sc->doing_mc_setup = 0; 333 334 ifp->if_ioctl = iyioctl; 335 ifp->if_watchdog = iywatchdog; 336 337 IFQ_SET_READY(&ifp->if_snd); 338 339 (void)eepromreadall(iot, ioh, eaddr, 8); 340 sc->hard_vers = eaddr[EEPW6] & EEPP_BoardRev; 341 342 #ifdef DIAGNOSTICS 343 if ((eaddr[EEPPEther0] != 344 eepromread(iot, ioh, EEPPEther0a)) && 345 (eaddr[EEPPEther1] != 346 eepromread(iot, ioh, EEPPEther1a)) && 347 (eaddr[EEPPEther2] != 348 eepromread(iot, ioh, EEPPEther2a))) 349 350 printf("EEPROM Ethernet address differs from copy\n"); 351 #endif 352 353 myaddr[1] = eaddr[EEPPEther0] & 0xFF; 354 myaddr[0] = eaddr[EEPPEther0] >> 8; 355 myaddr[3] = eaddr[EEPPEther1] & 0xFF; 356 myaddr[2] = eaddr[EEPPEther1] >> 8; 357 myaddr[5] = eaddr[EEPPEther2] & 0xFF; 358 myaddr[4] = eaddr[EEPPEther2] >> 8; 359 360 ifmedia_init(&sc->iy_ifmedia, 0, iy_mediachange, iy_mediastatus); 361 ifmedia_add(&sc->iy_ifmedia, IFM_ETHER | IFM_10_2, 0, NULL); 362 ifmedia_add(&sc->iy_ifmedia, IFM_ETHER | IFM_10_5, 0, NULL); 363 ifmedia_add(&sc->iy_ifmedia, IFM_ETHER | IFM_10_T, 0, NULL); 364 ifmedia_add(&sc->iy_ifmedia, IFM_ETHER | IFM_AUTO, 0, NULL); 365 ifmedia_set(&sc->iy_ifmedia, IFM_ETHER | IFM_AUTO); 366 /* Attach the interface. */ 367 if_attach(ifp); 368 ether_ifattach(ifp, myaddr); 369 printf(": address %s, rev. %d, %d kB\n", 370 ether_sprintf(myaddr), 371 sc->hard_vers, sc->sram/1024); 372 373 eirq = eepro_irqmap[eaddr[EEPPW1] & EEPP_Int]; 374 if (eirq != ia->ia_irq[0].ir_irq) 375 printf("%s: EEPROM irq setting %d ignored\n", 376 sc->sc_dev.dv_xname, eirq); 377 378 sc->sc_ih = isa_intr_establish(ia->ia_ic, ia->ia_irq[0].ir_irq, 379 IST_EDGE, IPL_NET, iyintr, sc); 380 381 #if NRND > 0 382 rnd_attach_source(&sc->rnd_source, sc->sc_dev.dv_xname, 383 RND_TYPE_NET, 0); 384 #endif 385 386 temp = bus_space_read_1(iot, ioh, INT_NO_REG); 387 bus_space_write_1(iot, ioh, INT_NO_REG, (temp & 0xf8) | sc->mappedirq); 388 } 389 390 void 391 iystop(sc) 392 struct iy_softc *sc; 393 { 394 bus_space_tag_t iot; 395 bus_space_handle_t ioh; 396 #ifdef IYDEBUG 397 u_int p, v; 398 #endif 399 400 iot = sc->sc_iot; 401 ioh = sc->sc_ioh; 402 403 bus_space_write_1(iot, ioh, COMMAND_REG, RCV_DISABLE_CMD); 404 405 bus_space_write_1(iot, ioh, INT_MASK_REG, ALL_INTS); 406 bus_space_write_1(iot, ioh, STATUS_REG, ALL_INTS); 407 408 bus_space_write_1(iot, ioh, COMMAND_REG, RESET_CMD); 409 delay(200); 410 #ifdef IYDEBUG 411 printf("%s: dumping tx chain (st 0x%x end 0x%x last 0x%x)\n", 412 sc->sc_dev.dv_xname, sc->tx_start, sc->tx_end, sc->tx_last); 413 p = sc->tx_last; 414 if (!p) 415 p = sc->tx_start; 416 do { 417 char sbuf[128]; 418 419 bus_space_write_2(iot, ioh, HOST_ADDR_REG, p); 420 421 v = le16toh(bus_space_read_stream_2(iot, ioh, MEM_PORT_REG)); 422 bitmask_snprintf(v, "\020\006Ab\010Dn", sbuf, sizeof(sbuf)); 423 printf("0x%04x: %s ", p, sbuf); 424 425 v = le16toh(bus_space_read_stream_2(iot, ioh, MEM_PORT_REG)); 426 bitmask_snprintf(v, "\020\6MAX_COL\7HRT_BEAT\010TX_DEF\011UND_RUN\012JERR\013LST_CRS\014LTCOL\016TX_OK\020COLL", 427 sbuf, sizeof(sbuf)); 428 printf("0x%s", sbuf); 429 430 p = le16toh(bus_space_read_stream_2(iot, ioh, MEM_PORT_REG)); 431 printf(" 0x%04x", p); 432 433 v = le16toh(bus_space_read_stream_2(iot, ioh, MEM_PORT_REG)); 434 bitmask_snprintf(v, "\020\020Ch", sbuf, sizeof(sbuf)); 435 printf(" 0x%s\n", sbuf); 436 437 } while (v & 0x8000); 438 #endif 439 sc->tx_start = sc->tx_end = sc->rx_size; 440 sc->tx_last = 0; 441 sc->sc_ethercom.ec_if.if_flags &= ~(IFF_RUNNING|IFF_OACTIVE); 442 } 443 444 void 445 iyreset(sc) 446 struct iy_softc *sc; 447 { 448 int s; 449 s = splnet(); 450 iystop(sc); 451 iyinit(sc); 452 splx(s); 453 } 454 455 void 456 iyinit(sc) 457 struct iy_softc *sc; 458 { 459 int i; 460 unsigned temp; 461 struct ifnet *ifp; 462 bus_space_tag_t iot; 463 bus_space_handle_t ioh; 464 465 iot = sc->sc_iot; 466 ioh = sc->sc_ioh; 467 468 ifp = &sc->sc_ethercom.ec_if; 469 #ifdef IYDEBUG 470 printf("ifp is %p\n", ifp); 471 #endif 472 473 bus_space_write_1(iot, ioh, 0, BANK_SEL(2)); 474 475 temp = bus_space_read_1(iot, ioh, EEPROM_REG); 476 if (temp & 0x10) 477 bus_space_write_1(iot, ioh, EEPROM_REG, temp & ~0x10); 478 479 for (i=0; i<6; ++i) { 480 bus_space_write_1(iot, ioh, I_ADD(i), CLLADDR(ifp->if_sadl)[i]); 481 } 482 483 temp = bus_space_read_1(iot, ioh, REG1); 484 bus_space_write_1(iot, ioh, REG1, 485 temp | /* XMT_CHAIN_INT | XMT_CHAIN_ERRSTOP | */ RCV_DISCARD_BAD); 486 487 if (ifp->if_flags & (IFF_PROMISC|IFF_ALLMULTI)) { 488 temp = MATCH_ALL; 489 } else 490 temp = MATCH_BRDCST; 491 492 bus_space_write_1(iot, ioh, RECV_MODES_REG, temp); 493 494 #ifdef IYDEBUG 495 { 496 char sbuf[128]; 497 498 bitmask_snprintf(temp, "\020\1PRMSC\2NOBRDST\3SEECRC\4LENGTH\5NOSaIns\6MultiIA", 499 sbuf, sizeof(sbuf)); 500 printf("%s: RECV_MODES set to %s\n", sc->sc_dev.dv_xname, sbuf); 501 } 502 #endif 503 /* XXX VOODOO */ 504 temp = bus_space_read_1(iot, ioh, MEDIA_SELECT); 505 bus_space_write_1(iot, ioh, MEDIA_SELECT, temp); 506 /* XXX END OF VOODOO */ 507 508 509 delay(500000); /* for the hardware to test for the connector */ 510 511 temp = bus_space_read_1(iot, ioh, MEDIA_SELECT); 512 #ifdef IYDEBUG 513 { 514 char sbuf[128]; 515 516 bitmask_snprintf(temp, "\020\1LnkInDis\2PolCor\3TPE\4JabberDis\5NoAport\6BNC", 517 sbuf, sizeof(sbuf)); 518 printf("%s: media select was 0x%s ", sc->sc_dev.dv_xname, sbuf); 519 } 520 #endif 521 temp = (temp & TEST_MODE_MASK); 522 523 switch(IFM_SUBTYPE(sc->iy_ifmedia.ifm_media)) { 524 case IFM_10_5: 525 temp &= ~ (BNC_BIT | TPE_BIT); 526 break; 527 528 case IFM_10_2: 529 temp = (temp & ~TPE_BIT) | BNC_BIT; 530 break; 531 532 case IFM_10_T: 533 temp = (temp & ~BNC_BIT) | TPE_BIT; 534 break; 535 default: 536 ; 537 /* nothing; leave as it is */ 538 } 539 switch (temp & (BNC_BIT | TPE_BIT)) { 540 case BNC_BIT: 541 sc->iy_media = IFM_ETHER | IFM_10_2; 542 break; 543 case TPE_BIT: 544 sc->iy_media = IFM_ETHER | IFM_10_T; 545 break; 546 default: 547 sc->iy_media = IFM_ETHER | IFM_10_5; 548 } 549 550 bus_space_write_1(iot, ioh, MEDIA_SELECT, temp); 551 #ifdef IYDEBUG 552 { 553 char sbuf[128]; 554 555 bitmask_snprintf(temp, "\020\1LnkInDis\2PolCor\3TPE\4JabberDis\5NoAport\6BNC", 556 sbuf, sizeof(sbuf)); 557 printf("changed to 0x%s\n", sbuf); 558 } 559 #endif 560 561 bus_space_write_1(iot, ioh, 0, BANK_SEL(0)); 562 bus_space_write_1(iot, ioh, INT_MASK_REG, ALL_INTS); 563 bus_space_write_1(iot, ioh, 0, BANK_SEL(1)); 564 565 temp = bus_space_read_1(iot, ioh, INT_NO_REG); 566 bus_space_write_1(iot, ioh, INT_NO_REG, (temp & 0xf8) | sc->mappedirq); 567 568 #ifdef IYDEBUG 569 { 570 char sbuf[128]; 571 572 bitmask_snprintf(temp, "\020\4bad_irq\010flash/boot present", 573 sbuf, sizeof(sbuf)); 574 printf("%s: int no was %s\n", sc->sc_dev.dv_xname, sbuf); 575 576 temp = bus_space_read_1(iot, ioh, INT_NO_REG); 577 bitmask_snprintf(temp, "\020\4bad_irq\010flash/boot present", 578 sbuf, sizeof(sbuf)); 579 printf("%s: int no now %s\n", sc->sc_dev.dv_xname, sbuf); 580 } 581 #endif 582 583 bus_space_write_1(iot, ioh, RCV_LOWER_LIMIT_REG, 0); 584 bus_space_write_1(iot, ioh, RCV_UPPER_LIMIT_REG, (sc->rx_size -2) >>8); 585 bus_space_write_1(iot, ioh, XMT_LOWER_LIMIT_REG, sc->rx_size >>8); 586 bus_space_write_1(iot, ioh, XMT_UPPER_LIMIT_REG, (sc->sram - 2) >>8); 587 588 temp = bus_space_read_1(iot, ioh, REG1); 589 #ifdef IYDEBUG 590 { 591 char sbuf[128]; 592 593 bitmask_snprintf(temp, "\020\2WORD_WIDTH\010INT_ENABLE", 594 sbuf, sizeof(sbuf)); 595 printf("%s: HW access is %s\n", sc->sc_dev.dv_xname, sbuf); 596 } 597 #endif 598 bus_space_write_1(iot, ioh, REG1, temp | INT_ENABLE); /* XXX what about WORD_WIDTH? */ 599 600 #ifdef IYDEBUG 601 { 602 char sbuf[128]; 603 604 temp = bus_space_read_1(iot, ioh, REG1); 605 bitmask_snprintf(temp, "\020\2WORD_WIDTH\010INT_ENABLE", 606 sbuf, sizeof(sbuf)); 607 printf("%s: HW access is %s\n", sc->sc_dev.dv_xname, sbuf); 608 } 609 #endif 610 611 bus_space_write_1(iot, ioh, 0, BANK_SEL(0)); 612 613 bus_space_write_1(iot, ioh, INT_MASK_REG, ALL_INTS & ~(RX_BIT|TX_BIT)); 614 bus_space_write_1(iot, ioh, STATUS_REG, ALL_INTS); /* clear ints */ 615 616 bus_space_write_1(iot, ioh, RCV_COPY_THRESHOLD, 0); 617 618 bus_space_write_2(iot, ioh, RCV_START_LOW, 0); 619 bus_space_write_2(iot, ioh, RCV_STOP_LOW, sc->rx_size - 2); 620 sc->rx_start = 0; 621 622 bus_space_write_1(iot, ioh, 0, SEL_RESET_CMD); 623 delay(200); 624 625 bus_space_write_2(iot, ioh, XMT_ADDR_REG, sc->rx_size); 626 627 sc->tx_start = sc->tx_end = sc->rx_size; 628 sc->tx_last = 0; 629 630 bus_space_write_1(iot, ioh, 0, RCV_ENABLE_CMD); 631 632 ifp->if_flags |= IFF_RUNNING; 633 ifp->if_flags &= ~IFF_OACTIVE; 634 } 635 636 void 637 iystart(ifp) 638 struct ifnet *ifp; 639 { 640 struct iy_softc *sc; 641 642 643 struct mbuf *m0, *m; 644 u_int len, pad, last, end; 645 u_int llen, residual; 646 int avail; 647 char *data; 648 unsigned temp; 649 u_int16_t resval, stat; 650 bus_space_tag_t iot; 651 bus_space_handle_t ioh; 652 653 #ifdef IYDEBUG 654 printf("iystart called\n"); 655 #endif 656 sc = ifp->if_softc; 657 658 if ((ifp->if_flags & (IFF_RUNNING | IFF_OACTIVE)) != IFF_RUNNING) 659 return; 660 661 iy_intr_tx(sc); 662 663 iot = sc->sc_iot; 664 ioh = sc->sc_ioh; 665 666 for (;;) { 667 IFQ_POLL(&ifp->if_snd, m0); 668 if (m0 == NULL) 669 break; 670 #ifdef IYDEBUG 671 printf("%s: trying to write another packet to the hardware\n", 672 sc->sc_dev.dv_xname); 673 #endif 674 675 /* We need to use m->m_pkthdr.len, so require the header */ 676 if ((m0->m_flags & M_PKTHDR) == 0) 677 panic("iystart: no header mbuf"); 678 679 len = m0->m_pkthdr.len; 680 pad = len & 1; 681 682 #ifdef IYDEBUG 683 printf("%s: length is %d.\n", sc->sc_dev.dv_xname, len); 684 #endif 685 if (len < (ETHER_MIN_LEN - ETHER_CRC_LEN)) { 686 pad = ETHER_MIN_LEN - ETHER_CRC_LEN - len; 687 } 688 689 if (len + pad > ETHER_MAX_LEN) { 690 /* packet is obviously too large: toss it */ 691 ++ifp->if_oerrors; 692 IFQ_DEQUEUE(&ifp->if_snd, m0); 693 m_freem(m0); 694 continue; 695 } 696 697 #if NBPFILTER > 0 698 if (ifp->if_bpf) 699 bpf_mtap(ifp->if_bpf, m0); 700 #endif 701 702 avail = sc->tx_start - sc->tx_end; 703 if (avail <= 0) 704 avail += sc->tx_size; 705 706 #ifdef IYDEBUG 707 printf("%s: avail is %d.\n", sc->sc_dev.dv_xname, avail); 708 #endif 709 /* 710 * we MUST RUN at splnet here --- 711 * XXX todo: or even turn off the boards ints ??? hm... 712 */ 713 714 /* See if there is room to put another packet in the buffer. */ 715 716 if ((len+pad+2*I595_XMT_HDRLEN) > avail) { 717 #ifdef IYDEBUG 718 printf("%s: len = %d, avail = %d, setting OACTIVE\n", 719 sc->sc_dev.dv_xname, len, avail); 720 #endif 721 /* mark interface as full ... */ 722 ifp->if_flags |= IFF_OACTIVE; 723 724 /* and wait for any transmission result */ 725 bus_space_write_1(iot, ioh, 0, BANK_SEL(2)); 726 727 temp = bus_space_read_1(iot, ioh, REG1); 728 bus_space_write_1(iot, ioh, REG1, 729 temp & ~XMT_CHAIN_INT); 730 731 bus_space_write_1(iot, ioh, 0, BANK_SEL(0)); 732 733 return; 734 } 735 736 /* we know it fits in the hardware now, so dequeue it */ 737 IFQ_DEQUEUE(&ifp->if_snd, m0); 738 739 last = sc->tx_end; 740 end = last + pad + len + I595_XMT_HDRLEN; 741 742 if (end >= sc->sram) { 743 if ((sc->sram - last) <= I595_XMT_HDRLEN) { 744 /* keep header in one piece */ 745 last = sc->rx_size; 746 end = last + pad + len + I595_XMT_HDRLEN; 747 } else 748 end -= sc->tx_size; 749 } 750 751 bus_space_write_2(iot, ioh, HOST_ADDR_REG, last); 752 bus_space_write_stream_2(iot, ioh, MEM_PORT_REG, 753 htole16(XMT_CMD)); 754 755 bus_space_write_2(iot, ioh, MEM_PORT_REG, 0); 756 bus_space_write_2(iot, ioh, MEM_PORT_REG, 0); 757 758 bus_space_write_stream_2(iot, ioh, MEM_PORT_REG, 759 htole16(len + pad)); 760 761 residual = resval = 0; 762 763 while ((m = m0)!=0) { 764 data = mtod(m, void *); 765 llen = m->m_len; 766 if (residual) { 767 #ifdef IYDEBUG 768 printf("%s: merging residual with next mbuf.\n", 769 sc->sc_dev.dv_xname); 770 #endif 771 resval |= *data << 8; 772 bus_space_write_stream_2(iot, ioh, 773 MEM_PORT_REG, resval); 774 --llen; 775 ++data; 776 } 777 /* 778 * XXX ALIGNMENT LOSSAGE HERE. 779 */ 780 if (llen > 1) 781 bus_space_write_multi_stream_2(iot, ioh, 782 MEM_PORT_REG, (u_int16_t *) data, 783 llen>>1); 784 residual = llen & 1; 785 if (residual) { 786 resval = *(data + llen - 1); 787 #ifdef IYDEBUG 788 printf("%s: got odd mbuf to send.\n", 789 sc->sc_dev.dv_xname); 790 #endif 791 } 792 793 MFREE(m, m0); 794 } 795 796 if (residual) 797 bus_space_write_stream_2(iot, ioh, MEM_PORT_REG, 798 resval); 799 800 pad >>= 1; 801 while (pad-- > 0) 802 bus_space_write_stream_2(iot, ioh, MEM_PORT_REG, 0); 803 804 #ifdef IYDEBUG 805 printf("%s: new last = 0x%x, end = 0x%x.\n", 806 sc->sc_dev.dv_xname, last, end); 807 printf("%s: old start = 0x%x, end = 0x%x, last = 0x%x\n", 808 sc->sc_dev.dv_xname, sc->tx_start, sc->tx_end, sc->tx_last); 809 #endif 810 811 if (sc->tx_start != sc->tx_end) { 812 bus_space_write_2(iot, ioh, HOST_ADDR_REG, 813 sc->tx_last + XMT_COUNT); 814 815 /* 816 * XXX We keep stat in le order, to potentially save 817 * a byte swap. 818 */ 819 stat = bus_space_read_stream_2(iot, ioh, MEM_PORT_REG); 820 821 bus_space_write_2(iot, ioh, HOST_ADDR_REG, 822 sc->tx_last + XMT_CHAIN); 823 824 bus_space_write_stream_2(iot, ioh, MEM_PORT_REG, 825 htole16(last)); 826 827 bus_space_write_stream_2(iot, ioh, MEM_PORT_REG, 828 stat | htole16(CHAIN)); 829 #ifdef IYDEBUG 830 printf("%s: setting 0x%x to 0x%x\n", 831 sc->sc_dev.dv_xname, sc->tx_last + XMT_COUNT, 832 le16toh(stat) | CHAIN); 833 #endif 834 } 835 stat = bus_space_read_2(iot, ioh, MEM_PORT_REG); /* dummy read */ 836 837 /* XXX todo: enable ints here if disabled */ 838 839 ++ifp->if_opackets; 840 841 if (sc->tx_start == sc->tx_end) { 842 bus_space_write_2(iot, ioh, XMT_ADDR_REG, last); 843 bus_space_write_1(iot, ioh, 0, XMT_CMD); 844 sc->tx_start = last; 845 #ifdef IYDEBUG 846 printf("%s: writing 0x%x to XAR and giving XCMD\n", 847 sc->sc_dev.dv_xname, last); 848 #endif 849 } else { 850 bus_space_write_1(iot, ioh, 0, RESUME_XMT_CMD); 851 #ifdef IYDEBUG 852 printf("%s: giving RESUME_XCMD\n", 853 sc->sc_dev.dv_xname); 854 #endif 855 } 856 sc->tx_last = last; 857 sc->tx_end = end; 858 } 859 /* and wait only for end of transmission chain */ 860 bus_space_write_1(iot, ioh, 0, BANK_SEL(2)); 861 862 temp = bus_space_read_1(iot, ioh, REG1); 863 bus_space_write_1(iot, ioh, REG1, temp | XMT_CHAIN_INT); 864 865 bus_space_write_1(iot, ioh, 0, BANK_SEL(0)); 866 } 867 868 869 static inline void 870 eepromwritebit(iot, ioh, what) 871 bus_space_tag_t iot; 872 bus_space_handle_t ioh; 873 int what; 874 { 875 bus_space_write_1(iot, ioh, EEPROM_REG, what); 876 delay(1); 877 bus_space_write_1(iot, ioh, EEPROM_REG, what|EESK); 878 delay(1); 879 bus_space_write_1(iot, ioh, EEPROM_REG, what); 880 delay(1); 881 } 882 883 static inline int 884 eepromreadbit(iot, ioh) 885 bus_space_tag_t iot; 886 bus_space_handle_t ioh; 887 { 888 int b; 889 890 bus_space_write_1(iot, ioh, EEPROM_REG, EECS|EESK); 891 delay(1); 892 b = bus_space_read_1(iot, ioh, EEPROM_REG); 893 bus_space_write_1(iot, ioh, EEPROM_REG, EECS); 894 delay(1); 895 896 return ((b & EEDO) != 0); 897 } 898 899 static u_int16_t 900 eepromread(iot, ioh, offset) 901 bus_space_tag_t iot; 902 bus_space_handle_t ioh; 903 int offset; 904 { 905 volatile int i; 906 volatile int j; 907 volatile u_int16_t readval; 908 909 bus_space_write_1(iot, ioh, 0, BANK_SEL(2)); 910 delay(1); 911 bus_space_write_1(iot, ioh, EEPROM_REG, EECS); /* XXXX??? */ 912 delay(1); 913 914 eepromwritebit(iot, ioh, EECS|EEDI); 915 eepromwritebit(iot, ioh, EECS|EEDI); 916 eepromwritebit(iot, ioh, EECS); 917 918 for (j=5; j>=0; --j) { 919 if ((offset>>j) & 1) 920 eepromwritebit(iot, ioh, EECS|EEDI); 921 else 922 eepromwritebit(iot, ioh, EECS); 923 } 924 925 for (readval=0, i=0; i<16; ++i) { 926 readval<<=1; 927 readval |= eepromreadbit(iot, ioh); 928 } 929 930 bus_space_write_1(iot, ioh, EEPROM_REG, 0|EESK); 931 delay(1); 932 bus_space_write_1(iot, ioh, EEPROM_REG, 0); 933 934 bus_space_write_1(iot, ioh, COMMAND_REG, BANK_SEL(0)); 935 936 return readval; 937 } 938 939 /* 940 * Device timeout/watchdog routine. Entered if the device neglects to generate 941 * an interrupt after a transmit has been started on it. 942 */ 943 void 944 iywatchdog(ifp) 945 struct ifnet *ifp; 946 { 947 struct iy_softc *sc = ifp->if_softc; 948 949 log(LOG_ERR, "%s: device timeout\n", sc->sc_dev.dv_xname); 950 ++sc->sc_ethercom.ec_if.if_oerrors; 951 iyreset(sc); 952 } 953 954 /* 955 * What to do upon receipt of an interrupt. 956 */ 957 int 958 iyintr(arg) 959 void *arg; 960 { 961 struct iy_softc *sc; 962 struct ifnet *ifp; 963 bus_space_tag_t iot; 964 bus_space_handle_t ioh; 965 966 u_short status; 967 968 sc = arg; 969 iot = sc->sc_iot; 970 ioh = sc->sc_ioh; 971 972 ifp = &sc->sc_ethercom.ec_if; 973 974 status = bus_space_read_1(iot, ioh, STATUS_REG); 975 #ifdef IYDEBUG 976 if (status & ALL_INTS) { 977 char sbuf[128]; 978 979 bitmask_snprintf(status, "\020\1RX_STP\2RX\3TX\4EXEC", 980 sbuf, sizeof(sbuf)); 981 printf("%s: got interrupt %s", sc->sc_dev.dv_xname, sbuf); 982 983 if (status & EXEC_INT) { 984 bitmask_snprintf(bus_space_read_1(iot, ioh, 0), 985 "\020\6ABORT", sbuf, sizeof(sbuf)); 986 printf(" event %s\n", sbuf); 987 } else 988 printf("\n"); 989 } 990 #endif 991 if ((status & (RX_INT | TX_INT)) == 0) 992 return 0; 993 994 if (status & RX_INT) { 995 iy_intr_rx(sc); 996 bus_space_write_1(iot, ioh, STATUS_REG, RX_INT); 997 } 998 if (status & TX_INT) { 999 /* Tell feeders we may be able to accept more data... */ 1000 ifp->if_flags &= ~IFF_OACTIVE; 1001 /* and get more data. */ 1002 iystart(ifp); 1003 bus_space_write_1(iot, ioh, STATUS_REG, TX_INT); 1004 } 1005 1006 #if NRND > 0 1007 rnd_add_uint32(&sc->rnd_source, status); 1008 #endif 1009 1010 return 1; 1011 } 1012 1013 void 1014 iyget(sc, iot, ioh, rxlen) 1015 struct iy_softc *sc; 1016 bus_space_tag_t iot; 1017 bus_space_handle_t ioh; 1018 int rxlen; 1019 { 1020 struct mbuf *m, *top, **mp; 1021 struct ifnet *ifp; 1022 int len; 1023 1024 ifp = &sc->sc_ethercom.ec_if; 1025 1026 MGETHDR(m, M_DONTWAIT, MT_DATA); 1027 if (m == 0) 1028 goto dropped; 1029 m->m_pkthdr.rcvif = ifp; 1030 m->m_pkthdr.len = rxlen; 1031 len = MHLEN; 1032 top = 0; 1033 mp = ⊤ 1034 1035 while (rxlen > 0) { 1036 if (top) { 1037 MGET(m, M_DONTWAIT, MT_DATA); 1038 if (m == 0) { 1039 m_freem(top); 1040 goto dropped; 1041 } 1042 len = MLEN; 1043 } 1044 if (rxlen >= MINCLSIZE) { 1045 MCLGET(m, M_DONTWAIT); 1046 if ((m->m_flags & M_EXT) == 0) { 1047 m_free(m); 1048 m_freem(top); 1049 goto dropped; 1050 } 1051 len = MCLBYTES; 1052 } 1053 len = min(rxlen, len); 1054 /* 1055 * XXX ALIGNMENT LOSSAGE HERE. 1056 */ 1057 if (len > 1) { 1058 len &= ~1; 1059 1060 bus_space_read_multi_stream_2(iot, ioh, MEM_PORT_REG, 1061 mtod(m, u_int16_t *), len/2); 1062 } else { 1063 #ifdef IYDEBUG 1064 printf("%s: received odd mbuf\n", sc->sc_dev.dv_xname); 1065 #endif 1066 *(mtod(m, char *)) = bus_space_read_stream_2(iot, ioh, 1067 MEM_PORT_REG); 1068 } 1069 m->m_len = len; 1070 rxlen -= len; 1071 *mp = m; 1072 mp = &m->m_next; 1073 } 1074 1075 if (top == NULL) 1076 return; 1077 1078 /* XXX receive the top here */ 1079 ++ifp->if_ipackets; 1080 1081 1082 #if NBPFILTER > 0 1083 if (ifp->if_bpf) 1084 bpf_mtap(ifp->if_bpf, top); 1085 #endif 1086 (*ifp->if_input)(ifp, top); 1087 return; 1088 1089 dropped: 1090 ++ifp->if_ierrors; 1091 return; 1092 } 1093 1094 void 1095 iy_intr_rx(sc) 1096 struct iy_softc *sc; 1097 { 1098 bus_space_tag_t iot; 1099 bus_space_handle_t ioh; 1100 1101 u_int rxadrs, rxevnt, rxstatus, rxnext, rxlen; 1102 1103 iot = sc->sc_iot; 1104 ioh = sc->sc_ioh; 1105 1106 rxadrs = sc->rx_start; 1107 bus_space_write_2(iot, ioh, HOST_ADDR_REG, rxadrs); 1108 rxevnt = le16toh(bus_space_read_stream_2(iot, ioh, MEM_PORT_REG)); 1109 rxnext = 0; 1110 1111 while (rxevnt == RCV_DONE) { 1112 rxstatus = le16toh(bus_space_read_stream_2(iot, ioh, 1113 MEM_PORT_REG)); 1114 rxnext = le16toh(bus_space_read_stream_2(iot, ioh, 1115 MEM_PORT_REG)); 1116 rxlen = le16toh(bus_space_read_stream_2(iot, ioh, 1117 MEM_PORT_REG)); 1118 #ifdef IYDEBUG 1119 { 1120 char sbuf[128]; 1121 1122 bitmask_snprintf(rxstatus, "\020\1RCLD\2IA_MCH\010SHORT\011OVRN\013ALGERR\014CRCERR\015LENERR\016RCVOK\020TYP", 1123 sbuf, sizeof(sbuf)); 1124 printf("%s: pck at 0x%04x stat %s next 0x%x len 0x%x\n", 1125 sc->sc_dev.dv_xname, rxadrs, sbuf, rxnext, rxlen); 1126 } 1127 #endif 1128 iyget(sc, iot, ioh, rxlen); 1129 1130 /* move stop address */ 1131 bus_space_write_2(iot, ioh, RCV_STOP_LOW, 1132 rxnext == 0 ? sc->rx_size - 2 : rxnext - 2); 1133 1134 bus_space_write_2(iot, ioh, HOST_ADDR_REG, rxnext); 1135 rxadrs = rxnext; 1136 rxevnt = le16toh(bus_space_read_stream_2(iot, ioh, 1137 MEM_PORT_REG)); 1138 } 1139 sc->rx_start = rxnext; 1140 } 1141 1142 void 1143 iy_intr_tx(sc) 1144 struct iy_softc *sc; 1145 { 1146 bus_space_tag_t iot; 1147 bus_space_handle_t ioh; 1148 struct ifnet *ifp; 1149 u_int txstatus, txstat2, txlen, txnext; 1150 1151 ifp = &sc->sc_ethercom.ec_if; 1152 iot = sc->sc_iot; 1153 ioh = sc->sc_ioh; 1154 1155 while (sc->tx_start != sc->tx_end) { 1156 bus_space_write_2(iot, ioh, HOST_ADDR_REG, sc->tx_start); 1157 txstatus = le16toh(bus_space_read_stream_2(iot, ioh, 1158 MEM_PORT_REG)); 1159 1160 if ((txstatus & (TX_DONE|CMD_MASK)) != (TX_DONE|XMT_CMD)) 1161 break; 1162 1163 txstat2 = le16toh(bus_space_read_stream_2(iot, ioh, 1164 MEM_PORT_REG)); 1165 txnext = le16toh(bus_space_read_stream_2(iot, ioh, 1166 MEM_PORT_REG)); 1167 txlen = le16toh(bus_space_read_stream_2(iot, ioh, 1168 MEM_PORT_REG)); 1169 #ifdef IYDEBUG 1170 { 1171 char sbuf[128]; 1172 1173 bitmask_snprintf(txstat2, "\020\6MAX_COL\7HRT_BEAT\010TX_DEF\011UND_RUN\012JERR\013LST_CRS\014LTCOL\016TX_OK\020COLL", 1174 sbuf, sizeof(sbuf)); 1175 printf("txstat 0x%x stat2 0x%s next 0x%x len 0x%x\n", 1176 txstatus, sbuf, txnext, txlen); 1177 } 1178 #endif 1179 if (txlen & CHAIN) 1180 sc->tx_start = txnext; 1181 else 1182 sc->tx_start = sc->tx_end; 1183 ifp->if_flags &= ~IFF_OACTIVE; 1184 1185 if (txstat2 & 0x0020) 1186 ifp->if_collisions += 16; 1187 else 1188 ifp->if_collisions += txstat2 & 0x000f; 1189 1190 if ((txstat2 & 0x2000) == 0) 1191 ++ifp->if_oerrors; 1192 } 1193 } 1194 1195 int 1196 iyioctl(ifp, cmd, data) 1197 struct ifnet *ifp; 1198 u_long cmd; 1199 void *data; 1200 { 1201 struct iy_softc *sc; 1202 struct ifaddr *ifa; 1203 struct ifreq *ifr; 1204 int s, error = 0; 1205 1206 sc = ifp->if_softc; 1207 ifa = (struct ifaddr *)data; 1208 ifr = (struct ifreq *)data; 1209 1210 #ifdef IYDEBUG 1211 printf("iyioctl called with ifp %p (%s) cmd 0x%lx data %p\n", 1212 ifp, ifp->if_xname, cmd, data); 1213 #endif 1214 1215 s = splnet(); 1216 1217 switch (cmd) { 1218 1219 case SIOCSIFADDR: 1220 ifp->if_flags |= IFF_UP; 1221 1222 switch (ifa->ifa_addr->sa_family) { 1223 #ifdef INET 1224 case AF_INET: 1225 iyinit(sc); 1226 arp_ifinit(ifp, ifa); 1227 break; 1228 #endif 1229 default: 1230 iyinit(sc); 1231 break; 1232 } 1233 break; 1234 1235 case SIOCSIFFLAGS: 1236 sc->promisc = ifp->if_flags & (IFF_PROMISC | IFF_ALLMULTI); 1237 if ((ifp->if_flags & IFF_UP) == 0 && 1238 (ifp->if_flags & IFF_RUNNING) != 0) { 1239 /* 1240 * If interface is marked down and it is running, then 1241 * stop it. 1242 */ 1243 iystop(sc); 1244 ifp->if_flags &= ~IFF_RUNNING; 1245 } else if ((ifp->if_flags & IFF_UP) != 0 && 1246 (ifp->if_flags & IFF_RUNNING) == 0) { 1247 /* 1248 * If interface is marked up and it is stopped, then 1249 * start it. 1250 */ 1251 iyinit(sc); 1252 } else { 1253 /* 1254 * Reset the interface to pick up changes in any other 1255 * flags that affect hardware registers. 1256 */ 1257 iystop(sc); 1258 iyinit(sc); 1259 } 1260 #ifdef IYDEBUGX 1261 if (ifp->if_flags & IFF_DEBUG) 1262 sc->sc_debug = IFY_ALL; 1263 else 1264 sc->sc_debug = 0; 1265 #endif 1266 break; 1267 1268 case SIOCADDMULTI: 1269 case SIOCDELMULTI: 1270 if ((error = ether_ioctl(ifp, cmd, data)) == ENETRESET) { 1271 /* 1272 * Multicast list has changed; set the hardware filter 1273 * accordingly. 1274 */ 1275 if (ifp->if_flags & IFF_RUNNING) { 1276 /* XXX can't make it work otherwise */ 1277 iyreset(sc); 1278 iy_mc_reset(sc); 1279 } 1280 error = 0; 1281 } 1282 break; 1283 1284 case SIOCSIFMEDIA: 1285 case SIOCGIFMEDIA: 1286 error = ifmedia_ioctl(ifp, ifr, &sc->iy_ifmedia, cmd); 1287 break; 1288 default: 1289 error = EINVAL; 1290 } 1291 splx(s); 1292 return error; 1293 } 1294 1295 int 1296 iy_mediachange(ifp) 1297 struct ifnet *ifp; 1298 { 1299 struct iy_softc *sc = ifp->if_softc; 1300 1301 if (IFM_TYPE(sc->iy_ifmedia.ifm_media) != IFM_ETHER) 1302 return EINVAL; 1303 switch(IFM_SUBTYPE(sc->iy_ifmedia.ifm_media)) { 1304 case IFM_10_5: 1305 case IFM_10_2: 1306 case IFM_10_T: 1307 case IFM_AUTO: 1308 iystop(sc); 1309 iyinit(sc); 1310 return 0; 1311 default: 1312 return EINVAL; 1313 } 1314 } 1315 1316 void 1317 iy_mediastatus(ifp, ifmr) 1318 struct ifnet *ifp; 1319 struct ifmediareq *ifmr; 1320 { 1321 struct iy_softc *sc = ifp->if_softc; 1322 1323 ifmr->ifm_active = sc->iy_media; 1324 ifmr->ifm_status = IFM_AVALID | IFM_ACTIVE; 1325 } 1326 1327 1328 static void 1329 iy_mc_setup(sc) 1330 struct iy_softc *sc; 1331 { 1332 struct ether_multi *enm; 1333 struct ether_multistep step; 1334 struct ethercom *ecp; 1335 struct ifnet *ifp; 1336 bus_space_tag_t iot; 1337 bus_space_handle_t ioh; 1338 int avail, last /*, end*/ , len; 1339 int timeout; 1340 volatile u_int16_t dum; 1341 u_int8_t temp; 1342 1343 1344 ecp = &sc->sc_ethercom; 1345 ifp = &ecp->ec_if; 1346 1347 iot = sc->sc_iot; 1348 ioh = sc->sc_ioh; 1349 1350 len = 6 * ecp->ec_multicnt; 1351 1352 avail = sc->tx_start - sc->tx_end; 1353 if (avail <= 0) 1354 avail += sc->tx_size; 1355 if (ifp->if_flags & IFF_DEBUG) 1356 printf("%s: iy_mc_setup called, %d addresses, " 1357 "%d/%d bytes needed/avail\n", ifp->if_xname, 1358 ecp->ec_multicnt, len + I595_XMT_HDRLEN, avail); 1359 1360 last = sc->rx_size; 1361 1362 bus_space_write_1(iot, ioh, 0, BANK_SEL(2)); 1363 bus_space_write_1(iot, ioh, RECV_MODES_REG, MATCH_BRDCST); 1364 /* XXX VOODOO */ 1365 temp = bus_space_read_1(iot, ioh, MEDIA_SELECT); 1366 bus_space_write_1(iot, ioh, MEDIA_SELECT, temp); 1367 /* XXX END OF VOODOO */ 1368 bus_space_write_1(iot, ioh, 0, BANK_SEL(0)); 1369 bus_space_write_2(iot, ioh, HOST_ADDR_REG, last); 1370 bus_space_write_stream_2(iot, ioh, MEM_PORT_REG, htole16(MC_SETUP_CMD)); 1371 bus_space_write_2(iot, ioh, MEM_PORT_REG, 0); 1372 bus_space_write_2(iot, ioh, MEM_PORT_REG, 0); 1373 bus_space_write_stream_2(iot, ioh, MEM_PORT_REG, htole16(len)); 1374 1375 ETHER_FIRST_MULTI(step, ecp, enm); 1376 while(enm) { 1377 /* 1378 * XXX ALIGNMENT LOSSAGE HERE? 1379 */ 1380 bus_space_write_multi_stream_2(iot, ioh, MEM_PORT_REG, 1381 (u_int16_t *) enm->enm_addrlo, 3); 1382 1383 ETHER_NEXT_MULTI(step, enm); 1384 } 1385 dum = bus_space_read_2(iot, ioh, MEM_PORT_REG); /* dummy read */ 1386 bus_space_write_2(iot, ioh, XMT_ADDR_REG, last); 1387 bus_space_write_1(iot, ioh, 0, MC_SETUP_CMD); 1388 1389 1390 sc->tx_start = sc->rx_size; 1391 sc->tx_end = sc->rx_size + I595_XMT_HDRLEN + len; 1392 1393 for (timeout=0; timeout<100; timeout++) { 1394 DELAY(2); 1395 if ((bus_space_read_1(iot, ioh, STATUS_REG) & EXEC_INT) == 0) 1396 continue; 1397 1398 temp = bus_space_read_1(iot, ioh, 0); 1399 bus_space_write_1(iot, ioh, STATUS_REG, EXEC_INT); 1400 #ifdef DIAGNOSTIC 1401 if (temp & 0x20) { 1402 printf("%s: mc setup failed, %d usec\n", 1403 sc->sc_dev.dv_xname, timeout * 2); 1404 } else if (((temp & 0x0f) == 0x03) && 1405 (ifp->if_flags & IFF_DEBUG)) { 1406 printf("%s: mc setup done, %d usec\n", 1407 sc->sc_dev.dv_xname, timeout * 2); 1408 } 1409 #endif 1410 break; 1411 } 1412 sc->tx_start = sc->tx_end; 1413 ifp->if_flags &= ~IFF_OACTIVE; 1414 1415 } 1416 1417 static void 1418 iy_mc_reset(sc) 1419 struct iy_softc *sc; 1420 { 1421 struct ether_multi *enm; 1422 struct ether_multistep step; 1423 struct ethercom *ecp; 1424 struct ifnet *ifp; 1425 bus_space_tag_t iot; 1426 bus_space_handle_t ioh; 1427 u_int16_t temp; 1428 1429 ecp = &sc->sc_ethercom; 1430 ifp = &ecp->ec_if; 1431 1432 iot = sc->sc_iot; 1433 ioh = sc->sc_ioh; 1434 1435 if (ecp->ec_multicnt > 63) { 1436 ifp->if_flags |= IFF_ALLMULTI; 1437 1438 } else if (ecp->ec_multicnt > 0) { 1439 /* 1440 * Step through the list of addresses. 1441 */ 1442 ETHER_FIRST_MULTI(step, ecp, enm); 1443 while(enm) { 1444 if (memcmp(enm->enm_addrlo, enm->enm_addrhi, 6) != 0) { 1445 ifp->if_flags |= IFF_ALLMULTI; 1446 goto setupmulti; 1447 } 1448 ETHER_NEXT_MULTI(step, enm); 1449 } 1450 /* OK, we really need to do it now: */ 1451 #if 0 1452 if ((ifp->if_flags & (IFF_RUNNING | IFF_OACTIVE)) 1453 != IFF_RUNNING) { 1454 ifp->if_flags |= IFF_OACTIVE; 1455 sc->want_mc_setup = 1; 1456 return; 1457 } 1458 #endif 1459 iy_mc_setup(sc); 1460 } else { 1461 ifp->if_flags &= ~IFF_ALLMULTI; 1462 } 1463 1464 setupmulti: 1465 bus_space_write_1(iot, ioh, 0, BANK_SEL(2)); 1466 if (ifp->if_flags & (IFF_PROMISC|IFF_ALLMULTI)) { 1467 temp = MATCH_ALL; 1468 } else 1469 temp = MATCH_BRDCST; 1470 1471 bus_space_write_1(iot, ioh, RECV_MODES_REG, temp); 1472 /* XXX VOODOO */ 1473 temp = bus_space_read_1(iot, ioh, MEDIA_SELECT); 1474 bus_space_write_1(iot, ioh, MEDIA_SELECT, temp); 1475 /* XXX END OF VOODOO */ 1476 1477 /* XXX TBD: setup hardware for all multicasts */ 1478 bus_space_write_1(iot, ioh, 0, BANK_SEL(0)); 1479 return; 1480 } 1481 1482 #ifdef IYDEBUGX 1483 void 1484 print_rbd(rbd) 1485 volatile struct ie_recv_buf_desc *rbd; 1486 { 1487 printf("RBD at %08lx:\nactual %04x, next %04x, buffer %08x\n" 1488 "length %04x, mbz %04x\n", (u_long)rbd, rbd->ie_rbd_actual, 1489 rbd->ie_rbd_next, rbd->ie_rbd_buffer, rbd->ie_rbd_length, 1490 rbd->mbz); 1491 } 1492 #endif 1493 1494 void 1495 iyprobemem(sc) 1496 struct iy_softc *sc; 1497 { 1498 bus_space_tag_t iot; 1499 bus_space_handle_t ioh; 1500 int testing; 1501 1502 iot = sc->sc_iot; 1503 ioh = sc->sc_ioh; 1504 1505 bus_space_write_1(iot, ioh, COMMAND_REG, BANK_SEL(0)); 1506 delay(1); 1507 bus_space_write_2(iot, ioh, HOST_ADDR_REG, 4096-2); 1508 bus_space_write_2(iot, ioh, MEM_PORT_REG, 0); 1509 1510 for (testing=65536; testing >= 4096; testing >>= 1) { 1511 bus_space_write_2(iot, ioh, HOST_ADDR_REG, testing-2); 1512 bus_space_write_2(iot, ioh, MEM_PORT_REG, 0xdead); 1513 bus_space_write_2(iot, ioh, HOST_ADDR_REG, testing-2); 1514 if (bus_space_read_2(iot, ioh, MEM_PORT_REG) != 0xdead) { 1515 #ifdef IYMEMDEBUG 1516 printf("%s: Didn't keep 0xdead at 0x%x\n", 1517 sc->sc_dev.dv_xname, testing-2); 1518 #endif 1519 continue; 1520 } 1521 1522 bus_space_write_2(iot, ioh, HOST_ADDR_REG, testing-2); 1523 bus_space_write_2(iot, ioh, MEM_PORT_REG, 0xbeef); 1524 bus_space_write_2(iot, ioh, HOST_ADDR_REG, testing-2); 1525 if (bus_space_read_2(iot, ioh, MEM_PORT_REG) != 0xbeef) { 1526 #ifdef IYMEMDEBUG 1527 printf("%s: Didn't keep 0xbeef at 0x%x\n", 1528 sc->sc_dev.dv_xname, testing-2); 1529 #endif 1530 continue; 1531 } 1532 1533 bus_space_write_2(iot, ioh, HOST_ADDR_REG, 0); 1534 bus_space_write_2(iot, ioh, MEM_PORT_REG, 0); 1535 bus_space_write_2(iot, ioh, HOST_ADDR_REG, testing >> 1); 1536 bus_space_write_2(iot, ioh, MEM_PORT_REG, testing >> 1); 1537 bus_space_write_2(iot, ioh, HOST_ADDR_REG, 0); 1538 if (bus_space_read_2(iot, ioh, MEM_PORT_REG) == (testing >> 1)) { 1539 #ifdef IYMEMDEBUG 1540 printf("%s: 0x%x alias of 0x0\n", 1541 sc->sc_dev.dv_xname, testing >> 1); 1542 #endif 1543 continue; 1544 } 1545 1546 break; 1547 } 1548 1549 sc->sram = testing; 1550 1551 switch(testing) { 1552 case 65536: 1553 /* 4 NFS packets + overhead RX, 2 NFS + overhead TX */ 1554 sc->rx_size = 44*1024; 1555 break; 1556 1557 case 32768: 1558 /* 2 NFS packets + overhead RX, 1 NFS + overhead TX */ 1559 sc->rx_size = 22*1024; 1560 break; 1561 1562 case 16384: 1563 /* 1 NFS packet + overhead RX, 4 big packets TX */ 1564 sc->rx_size = 10*1024; 1565 break; 1566 default: 1567 sc->rx_size = testing/2; 1568 break; 1569 } 1570 sc->tx_size = testing - sc->rx_size; 1571 } 1572 1573 static int 1574 eepromreadall(iot, ioh, wordp, maxi) 1575 bus_space_tag_t iot; 1576 bus_space_handle_t ioh; 1577 u_int16_t *wordp; 1578 int maxi; 1579 { 1580 int i; 1581 u_int16_t checksum, tmp; 1582 1583 checksum = 0; 1584 1585 for (i=0; i<EEPP_LENGTH; ++i) { 1586 tmp = eepromread(iot, ioh, i); 1587 checksum += tmp; 1588 if (i<maxi) 1589 wordp[i] = tmp; 1590 } 1591 1592 if (checksum != EEPP_CHKSUM) { 1593 #ifdef IYDEBUG 1594 printf("wrong EEPROM checksum 0x%x should be 0x%x\n", 1595 checksum, EEPP_CHKSUM); 1596 #endif 1597 return 1; 1598 } 1599 return 0; 1600 } 1601
Indexes created Thu Sep 25 16:09:42 GMT 2025