if_iy.c revision 1.78.16.1
1 /* $NetBSD: if_iy.c,v 1.78.16.1 2008/06/02 13:23:31 mjf Exp $ */ 2 /* #define IYDEBUG */ 3 /* #define IYMEMDEBUG */ 4 5 /*- 6 * Copyright (c) 1996,2001 The NetBSD Foundation, Inc. 7 * All rights reserved. 8 * 9 * This code is derived from software contributed to The NetBSD Foundation 10 * by Ignatios Souvatzis. 11 * 12 * Redistribution and use in source and binary forms, with or without 13 * modification, are permitted provided that the following conditions 14 * are met: 15 * 1. Redistributions of source code must retain the above copyright 16 * notice, this list of conditions and the following disclaimer. 17 * 2. Redistributions in binary form must reproduce the above copyright 18 * notice, this list of conditions and the following disclaimer in the 19 * documentation and/or other materials provided with the distribution. 20 * 21 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 22 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 23 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 24 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 25 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 26 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 27 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 28 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 29 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 30 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 31 * POSSIBILITY OF SUCH DAMAGE. 32 */ 33 34 /* 35 * Supported hardware: 36 * 37 * - Intel EtherExpress Pro/10. 38 * - possibly other boards using the i82595 chip and no special tweaks. 39 */ 40 41 #include <sys/cdefs.h> 42 __KERNEL_RCSID(0, "$NetBSD: if_iy.c,v 1.78.16.1 2008/06/02 13:23:31 mjf Exp $"); 43 44 #include "opt_inet.h" 45 #include "bpfilter.h" 46 #include "rnd.h" 47 48 #include <sys/param.h> 49 #include <sys/systm.h> 50 #include <sys/mbuf.h> 51 #include <sys/buf.h> 52 #include <sys/protosw.h> 53 #include <sys/socket.h> 54 #include <sys/ioctl.h> 55 #include <sys/errno.h> 56 #include <sys/syslog.h> 57 #include <sys/device.h> 58 #include <sys/endian.h> 59 #if NRND > 0 60 #include <sys/rnd.h> 61 #endif 62 63 #include <net/if.h> 64 #include <net/if_types.h> 65 #include <net/if_dl.h> 66 67 #include <net/if_ether.h> 68 69 #if NBPFILTER > 0 70 #include <net/bpf.h> 71 #include <net/bpfdesc.h> 72 #endif 73 74 #ifdef INET 75 #include <netinet/in.h> 76 #include <netinet/in_systm.h> 77 #include <netinet/in_var.h> 78 #include <netinet/ip.h> 79 #include <netinet/if_inarp.h> 80 #endif 81 82 83 #if defined(SIOCSIFMEDIA) 84 #include <net/if_media.h> 85 #endif 86 87 #include <sys/cpu.h> 88 #include <sys/bus.h> 89 #include <sys/intr.h> 90 91 #include <dev/isa/isareg.h> 92 #include <dev/isa/isavar.h> 93 #include <dev/ic/i82595reg.h> 94 95 /* XXX why isn't this centralized? */ 96 #ifndef __BUS_SPACE_HAS_STREAM_METHODS 97 #define bus_space_write_stream_2 bus_space_write_2 98 #define bus_space_write_multi_stream_2 bus_space_write_multi_2 99 #define bus_space_read_stream_2 bus_space_read_2 100 #define bus_space_read_multi_stream_2 bus_space_read_multi_2 101 #endif /* __BUS_SPACE_HAS_STREAM_METHODS */ 102 103 /* 104 * Ethernet status, per interface. 105 */ 106 struct iy_softc { 107 struct device sc_dev; 108 void *sc_ih; 109 110 bus_space_tag_t sc_iot; 111 bus_space_handle_t sc_ioh; 112 113 struct ethercom sc_ethercom; 114 115 struct ifmedia iy_ifmedia; 116 int iy_media; 117 118 int mappedirq; 119 120 int hard_vers; 121 122 int promisc; 123 124 int sram, tx_size, rx_size; 125 126 int tx_start, tx_end, tx_last; 127 int rx_start; 128 129 int doing_mc_setup; 130 #ifdef IYDEBUG 131 int sc_debug; 132 #endif 133 134 #if NRND > 0 135 rndsource_element_t rnd_source; 136 #endif 137 }; 138 139 void iywatchdog(struct ifnet *); 140 int iyioctl(struct ifnet *, u_long, void *); 141 int iyintr(void *); 142 void iyinit(struct iy_softc *); 143 void iystop(struct iy_softc *); 144 void iystart(struct ifnet *); 145 146 void iy_intr_rx(struct iy_softc *); 147 void iy_intr_tx(struct iy_softc *); 148 149 void iyreset(struct iy_softc *); 150 void iy_readframe(struct iy_softc *, int); 151 void iy_drop_packet_buffer(struct iy_softc *); 152 void iy_find_mem_size(struct iy_softc *); 153 void iyrint(struct iy_softc *); 154 void iytint(struct iy_softc *); 155 void iyxmit(struct iy_softc *); 156 static void iy_mc_setup(struct iy_softc *); 157 static void iy_mc_reset(struct iy_softc *); 158 void iyget(struct iy_softc *, bus_space_tag_t, bus_space_handle_t, int); 159 void iyprobemem(struct iy_softc *); 160 static inline void eepromwritebit(bus_space_tag_t, bus_space_handle_t, int); 161 static inline int eepromreadbit(bus_space_tag_t, bus_space_handle_t); 162 163 #ifdef IYDEBUGX 164 void print_rbd(volatile struct iy_recv_buf_desc *); 165 166 int in_ifrint = 0; 167 int in_iftint = 0; 168 #endif 169 170 int iy_mediachange(struct ifnet *); 171 void iy_mediastatus(struct ifnet *, struct ifmediareq *); 172 173 int iyprobe(struct device *, struct cfdata *, void *); 174 void iyattach(struct device *, struct device *, void *); 175 176 static u_int16_t eepromread(bus_space_tag_t, bus_space_handle_t, int); 177 178 static int eepromreadall(bus_space_tag_t, bus_space_handle_t, u_int16_t *, 179 int); 180 181 CFATTACH_DECL(iy, sizeof(struct iy_softc), 182 iyprobe, iyattach, NULL, NULL); 183 184 static u_int8_t eepro_irqmap[] = EEPP_INTMAP; 185 static u_int8_t eepro_revirqmap[] = EEPP_RINTMAP; 186 187 int 188 iyprobe(struct device *parent, struct cfdata *match, 189 void *aux) 190 { 191 struct isa_attach_args *ia = aux; 192 u_int16_t eaddr[8]; 193 bus_space_tag_t iot; 194 bus_space_handle_t ioh; 195 u_int8_t c, d; 196 int irq; 197 198 if (ia->ia_nio < 1) 199 return (0); 200 if (ia->ia_nirq < 1) 201 return (0); 202 203 if (ISA_DIRECT_CONFIG(ia)) 204 return (0); 205 206 iot = ia->ia_iot; 207 208 if (ia->ia_io[0].ir_addr == ISA_UNKNOWN_PORT) 209 return 0; 210 211 if (bus_space_map(iot, ia->ia_io[0].ir_addr, 16, 0, &ioh)) 212 return 0; 213 214 /* try to find the round robin sig: */ 215 216 c = bus_space_read_1(iot, ioh, ID_REG); 217 if ((c & ID_REG_MASK) != ID_REG_SIG) 218 goto out; 219 220 d = bus_space_read_1(iot, ioh, ID_REG); 221 if ((d & ID_REG_MASK) != ID_REG_SIG) 222 goto out; 223 224 if (((d-c) & R_ROBIN_BITS) != 0x40) 225 goto out; 226 227 d = bus_space_read_1(iot, ioh, ID_REG); 228 if ((d & ID_REG_MASK) != ID_REG_SIG) 229 goto out; 230 231 if (((d-c) & R_ROBIN_BITS) != 0x80) 232 goto out; 233 234 d = bus_space_read_1(iot, ioh, ID_REG); 235 if ((d & ID_REG_MASK) != ID_REG_SIG) 236 goto out; 237 238 if (((d-c) & R_ROBIN_BITS) != 0xC0) 239 goto out; 240 241 d = bus_space_read_1(iot, ioh, ID_REG); 242 if ((d & ID_REG_MASK) != ID_REG_SIG) 243 goto out; 244 245 if (((d-c) & R_ROBIN_BITS) != 0x00) 246 goto out; 247 248 #ifdef IYDEBUG 249 printf("iyprobe verified working ID reg.\n"); 250 #endif 251 252 if (eepromreadall(iot, ioh, eaddr, 8)) 253 goto out; 254 255 if (ia->ia_irq[0].ir_irq == ISA_UNKNOWN_IRQ) 256 irq = eepro_irqmap[eaddr[EEPPW1] & EEPP_Int]; 257 else 258 irq = ia->ia_irq[0].ir_irq; 259 260 if (irq >= sizeof(eepro_revirqmap)) 261 goto out; 262 263 if (eepro_revirqmap[irq] == 0xff) 264 goto out; 265 266 /* now lets reset the chip */ 267 268 bus_space_write_1(iot, ioh, COMMAND_REG, RESET_CMD); 269 delay(200); 270 271 ia->ia_nio = 1; 272 ia->ia_io[0].ir_size = 16; 273 274 ia->ia_nirq = 1; 275 ia->ia_irq[0].ir_irq = irq; 276 277 ia->ia_niomem = 0; 278 ia->ia_ndrq = 0; 279 280 bus_space_unmap(iot, ioh, 16); 281 return 1; /* found */ 282 out: 283 bus_space_unmap(iot, ioh, 16); 284 return 0; 285 } 286 287 void 288 iyattach(struct device *parent, struct device *self, void *aux) 289 { 290 struct iy_softc *sc = (void *)self; 291 struct isa_attach_args *ia = aux; 292 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 293 bus_space_tag_t iot; 294 bus_space_handle_t ioh; 295 unsigned temp; 296 u_int16_t eaddr[8]; 297 u_int8_t myaddr[ETHER_ADDR_LEN]; 298 int eirq; 299 300 iot = ia->ia_iot; 301 302 if (bus_space_map(iot, ia->ia_io[0].ir_addr, 16, 0, &ioh)) { 303 printf(": can't map i/o space\n"); 304 return; 305 } 306 307 sc->sc_iot = iot; 308 sc->sc_ioh = ioh; 309 310 sc->mappedirq = eepro_revirqmap[ia->ia_irq[0].ir_irq]; 311 312 /* now let's reset the chip */ 313 314 bus_space_write_1(iot, ioh, COMMAND_REG, RESET_CMD); 315 delay(200); 316 317 iyprobemem(sc); 318 319 strlcpy(ifp->if_xname, device_xname(&sc->sc_dev), IFNAMSIZ); 320 ifp->if_softc = sc; 321 ifp->if_start = iystart; 322 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_NOTRAILERS 323 | IFF_MULTICAST; 324 325 sc->doing_mc_setup = 0; 326 327 ifp->if_ioctl = iyioctl; 328 ifp->if_watchdog = iywatchdog; 329 330 IFQ_SET_READY(&ifp->if_snd); 331 332 (void)eepromreadall(iot, ioh, eaddr, 8); 333 sc->hard_vers = eaddr[EEPW6] & EEPP_BoardRev; 334 335 #ifdef DIAGNOSTICS 336 if ((eaddr[EEPPEther0] != 337 eepromread(iot, ioh, EEPPEther0a)) && 338 (eaddr[EEPPEther1] != 339 eepromread(iot, ioh, EEPPEther1a)) && 340 (eaddr[EEPPEther2] != 341 eepromread(iot, ioh, EEPPEther2a))) 342 343 printf("EEPROM Ethernet address differs from copy\n"); 344 #endif 345 346 myaddr[1] = eaddr[EEPPEther0] & 0xFF; 347 myaddr[0] = eaddr[EEPPEther0] >> 8; 348 myaddr[3] = eaddr[EEPPEther1] & 0xFF; 349 myaddr[2] = eaddr[EEPPEther1] >> 8; 350 myaddr[5] = eaddr[EEPPEther2] & 0xFF; 351 myaddr[4] = eaddr[EEPPEther2] >> 8; 352 353 ifmedia_init(&sc->iy_ifmedia, 0, iy_mediachange, iy_mediastatus); 354 ifmedia_add(&sc->iy_ifmedia, IFM_ETHER | IFM_10_2, 0, NULL); 355 ifmedia_add(&sc->iy_ifmedia, IFM_ETHER | IFM_10_5, 0, NULL); 356 ifmedia_add(&sc->iy_ifmedia, IFM_ETHER | IFM_10_T, 0, NULL); 357 ifmedia_add(&sc->iy_ifmedia, IFM_ETHER | IFM_AUTO, 0, NULL); 358 ifmedia_set(&sc->iy_ifmedia, IFM_ETHER | IFM_AUTO); 359 /* Attach the interface. */ 360 if_attach(ifp); 361 ether_ifattach(ifp, myaddr); 362 printf(": address %s, rev. %d, %d kB\n", 363 ether_sprintf(myaddr), 364 sc->hard_vers, sc->sram/1024); 365 366 eirq = eepro_irqmap[eaddr[EEPPW1] & EEPP_Int]; 367 if (eirq != ia->ia_irq[0].ir_irq) 368 printf("%s: EEPROM irq setting %d ignored\n", 369 device_xname(&sc->sc_dev), eirq); 370 371 sc->sc_ih = isa_intr_establish(ia->ia_ic, ia->ia_irq[0].ir_irq, 372 IST_EDGE, IPL_NET, iyintr, sc); 373 374 #if NRND > 0 375 rnd_attach_source(&sc->rnd_source, device_xname(&sc->sc_dev), 376 RND_TYPE_NET, 0); 377 #endif 378 379 temp = bus_space_read_1(iot, ioh, INT_NO_REG); 380 bus_space_write_1(iot, ioh, INT_NO_REG, (temp & 0xf8) | sc->mappedirq); 381 } 382 383 void 384 iystop(sc) 385 struct iy_softc *sc; 386 { 387 bus_space_tag_t iot; 388 bus_space_handle_t ioh; 389 #ifdef IYDEBUG 390 u_int p, v; 391 #endif 392 393 iot = sc->sc_iot; 394 ioh = sc->sc_ioh; 395 396 bus_space_write_1(iot, ioh, COMMAND_REG, RCV_DISABLE_CMD); 397 398 bus_space_write_1(iot, ioh, INT_MASK_REG, ALL_INTS); 399 bus_space_write_1(iot, ioh, STATUS_REG, ALL_INTS); 400 401 bus_space_write_1(iot, ioh, COMMAND_REG, RESET_CMD); 402 delay(200); 403 #ifdef IYDEBUG 404 printf("%s: dumping tx chain (st 0x%x end 0x%x last 0x%x)\n", 405 device_xname(&sc->sc_dev), sc->tx_start, sc->tx_end, sc->tx_last); 406 p = sc->tx_last; 407 if (!p) 408 p = sc->tx_start; 409 do { 410 char sbuf[128]; 411 412 bus_space_write_2(iot, ioh, HOST_ADDR_REG, p); 413 414 v = le16toh(bus_space_read_stream_2(iot, ioh, MEM_PORT_REG)); 415 bitmask_snprintf(v, "\020\006Ab\010Dn", sbuf, sizeof(sbuf)); 416 printf("0x%04x: %s ", p, sbuf); 417 418 v = le16toh(bus_space_read_stream_2(iot, ioh, MEM_PORT_REG)); 419 bitmask_snprintf(v, "\020\6MAX_COL\7HRT_BEAT\010TX_DEF\011UND_RUN\012JERR\013LST_CRS\014LTCOL\016TX_OK\020COLL", 420 sbuf, sizeof(sbuf)); 421 printf("0x%s", sbuf); 422 423 p = le16toh(bus_space_read_stream_2(iot, ioh, MEM_PORT_REG)); 424 printf(" 0x%04x", p); 425 426 v = le16toh(bus_space_read_stream_2(iot, ioh, MEM_PORT_REG)); 427 bitmask_snprintf(v, "\020\020Ch", sbuf, sizeof(sbuf)); 428 printf(" 0x%s\n", sbuf); 429 430 } while (v & 0x8000); 431 #endif 432 sc->tx_start = sc->tx_end = sc->rx_size; 433 sc->tx_last = 0; 434 sc->sc_ethercom.ec_if.if_flags &= ~(IFF_RUNNING|IFF_OACTIVE); 435 } 436 437 void 438 iyreset(sc) 439 struct iy_softc *sc; 440 { 441 int s; 442 s = splnet(); 443 iystop(sc); 444 iyinit(sc); 445 splx(s); 446 } 447 448 void 449 iyinit(sc) 450 struct iy_softc *sc; 451 { 452 int i; 453 unsigned temp; 454 struct ifnet *ifp; 455 bus_space_tag_t iot; 456 bus_space_handle_t ioh; 457 458 iot = sc->sc_iot; 459 ioh = sc->sc_ioh; 460 461 ifp = &sc->sc_ethercom.ec_if; 462 #ifdef IYDEBUG 463 printf("ifp is %p\n", ifp); 464 #endif 465 466 bus_space_write_1(iot, ioh, 0, BANK_SEL(2)); 467 468 temp = bus_space_read_1(iot, ioh, EEPROM_REG); 469 if (temp & 0x10) 470 bus_space_write_1(iot, ioh, EEPROM_REG, temp & ~0x10); 471 472 for (i=0; i<6; ++i) { 473 bus_space_write_1(iot, ioh, I_ADD(i), CLLADDR(ifp->if_sadl)[i]); 474 } 475 476 temp = bus_space_read_1(iot, ioh, REG1); 477 bus_space_write_1(iot, ioh, REG1, 478 temp | /* XMT_CHAIN_INT | XMT_CHAIN_ERRSTOP | */ RCV_DISCARD_BAD); 479 480 if (ifp->if_flags & (IFF_PROMISC|IFF_ALLMULTI)) { 481 temp = MATCH_ALL; 482 } else 483 temp = MATCH_BRDCST; 484 485 bus_space_write_1(iot, ioh, RECV_MODES_REG, temp); 486 487 #ifdef IYDEBUG 488 { 489 char sbuf[128]; 490 491 bitmask_snprintf(temp, "\020\1PRMSC\2NOBRDST\3SEECRC\4LENGTH\5NOSaIns\6MultiIA", 492 sbuf, sizeof(sbuf)); 493 printf("%s: RECV_MODES set to %s\n", device_xname(&sc->sc_dev), sbuf); 494 } 495 #endif 496 /* XXX VOODOO */ 497 temp = bus_space_read_1(iot, ioh, MEDIA_SELECT); 498 bus_space_write_1(iot, ioh, MEDIA_SELECT, temp); 499 /* XXX END OF VOODOO */ 500 501 502 delay(500000); /* for the hardware to test for the connector */ 503 504 temp = bus_space_read_1(iot, ioh, MEDIA_SELECT); 505 #ifdef IYDEBUG 506 { 507 char sbuf[128]; 508 509 bitmask_snprintf(temp, "\020\1LnkInDis\2PolCor\3TPE\4JabberDis\5NoAport\6BNC", 510 sbuf, sizeof(sbuf)); 511 printf("%s: media select was 0x%s ", device_xname(&sc->sc_dev), sbuf); 512 } 513 #endif 514 temp = (temp & TEST_MODE_MASK); 515 516 switch(IFM_SUBTYPE(sc->iy_ifmedia.ifm_media)) { 517 case IFM_10_5: 518 temp &= ~ (BNC_BIT | TPE_BIT); 519 break; 520 521 case IFM_10_2: 522 temp = (temp & ~TPE_BIT) | BNC_BIT; 523 break; 524 525 case IFM_10_T: 526 temp = (temp & ~BNC_BIT) | TPE_BIT; 527 break; 528 default: 529 ; 530 /* nothing; leave as it is */ 531 } 532 switch (temp & (BNC_BIT | TPE_BIT)) { 533 case BNC_BIT: 534 sc->iy_media = IFM_ETHER | IFM_10_2; 535 break; 536 case TPE_BIT: 537 sc->iy_media = IFM_ETHER | IFM_10_T; 538 break; 539 default: 540 sc->iy_media = IFM_ETHER | IFM_10_5; 541 } 542 543 bus_space_write_1(iot, ioh, MEDIA_SELECT, temp); 544 #ifdef IYDEBUG 545 { 546 char sbuf[128]; 547 548 bitmask_snprintf(temp, "\020\1LnkInDis\2PolCor\3TPE\4JabberDis\5NoAport\6BNC", 549 sbuf, sizeof(sbuf)); 550 printf("changed to 0x%s\n", sbuf); 551 } 552 #endif 553 554 bus_space_write_1(iot, ioh, 0, BANK_SEL(0)); 555 bus_space_write_1(iot, ioh, INT_MASK_REG, ALL_INTS); 556 bus_space_write_1(iot, ioh, 0, BANK_SEL(1)); 557 558 temp = bus_space_read_1(iot, ioh, INT_NO_REG); 559 bus_space_write_1(iot, ioh, INT_NO_REG, (temp & 0xf8) | sc->mappedirq); 560 561 #ifdef IYDEBUG 562 { 563 char sbuf[128]; 564 565 bitmask_snprintf(temp, "\020\4bad_irq\010flash/boot present", 566 sbuf, sizeof(sbuf)); 567 printf("%s: int no was %s\n", device_xname(&sc->sc_dev), sbuf); 568 569 temp = bus_space_read_1(iot, ioh, INT_NO_REG); 570 bitmask_snprintf(temp, "\020\4bad_irq\010flash/boot present", 571 sbuf, sizeof(sbuf)); 572 printf("%s: int no now %s\n", device_xname(&sc->sc_dev), sbuf); 573 } 574 #endif 575 576 bus_space_write_1(iot, ioh, RCV_LOWER_LIMIT_REG, 0); 577 bus_space_write_1(iot, ioh, RCV_UPPER_LIMIT_REG, (sc->rx_size -2) >>8); 578 bus_space_write_1(iot, ioh, XMT_LOWER_LIMIT_REG, sc->rx_size >>8); 579 bus_space_write_1(iot, ioh, XMT_UPPER_LIMIT_REG, (sc->sram - 2) >>8); 580 581 temp = bus_space_read_1(iot, ioh, REG1); 582 #ifdef IYDEBUG 583 { 584 char sbuf[128]; 585 586 bitmask_snprintf(temp, "\020\2WORD_WIDTH\010INT_ENABLE", 587 sbuf, sizeof(sbuf)); 588 printf("%s: HW access is %s\n", device_xname(&sc->sc_dev), sbuf); 589 } 590 #endif 591 bus_space_write_1(iot, ioh, REG1, temp | INT_ENABLE); /* XXX what about WORD_WIDTH? */ 592 593 #ifdef IYDEBUG 594 { 595 char sbuf[128]; 596 597 temp = bus_space_read_1(iot, ioh, REG1); 598 bitmask_snprintf(temp, "\020\2WORD_WIDTH\010INT_ENABLE", 599 sbuf, sizeof(sbuf)); 600 printf("%s: HW access is %s\n", device_xname(&sc->sc_dev), sbuf); 601 } 602 #endif 603 604 bus_space_write_1(iot, ioh, 0, BANK_SEL(0)); 605 606 bus_space_write_1(iot, ioh, INT_MASK_REG, ALL_INTS & ~(RX_BIT|TX_BIT)); 607 bus_space_write_1(iot, ioh, STATUS_REG, ALL_INTS); /* clear ints */ 608 609 bus_space_write_1(iot, ioh, RCV_COPY_THRESHOLD, 0); 610 611 bus_space_write_2(iot, ioh, RCV_START_LOW, 0); 612 bus_space_write_2(iot, ioh, RCV_STOP_LOW, sc->rx_size - 2); 613 sc->rx_start = 0; 614 615 bus_space_write_1(iot, ioh, 0, SEL_RESET_CMD); 616 delay(200); 617 618 bus_space_write_2(iot, ioh, XMT_ADDR_REG, sc->rx_size); 619 620 sc->tx_start = sc->tx_end = sc->rx_size; 621 sc->tx_last = 0; 622 623 bus_space_write_1(iot, ioh, 0, RCV_ENABLE_CMD); 624 625 ifp->if_flags |= IFF_RUNNING; 626 ifp->if_flags &= ~IFF_OACTIVE; 627 } 628 629 void 630 iystart(ifp) 631 struct ifnet *ifp; 632 { 633 struct iy_softc *sc; 634 635 636 struct mbuf *m0, *m; 637 u_int len, pad, last, end; 638 u_int llen, residual; 639 int avail; 640 char *data; 641 unsigned temp; 642 u_int16_t resval, stat; 643 bus_space_tag_t iot; 644 bus_space_handle_t ioh; 645 646 #ifdef IYDEBUG 647 printf("iystart called\n"); 648 #endif 649 sc = ifp->if_softc; 650 651 if ((ifp->if_flags & (IFF_RUNNING | IFF_OACTIVE)) != IFF_RUNNING) 652 return; 653 654 iy_intr_tx(sc); 655 656 iot = sc->sc_iot; 657 ioh = sc->sc_ioh; 658 659 for (;;) { 660 IFQ_POLL(&ifp->if_snd, m0); 661 if (m0 == NULL) 662 break; 663 #ifdef IYDEBUG 664 printf("%s: trying to write another packet to the hardware\n", 665 device_xname(&sc->sc_dev)); 666 #endif 667 668 /* We need to use m->m_pkthdr.len, so require the header */ 669 if ((m0->m_flags & M_PKTHDR) == 0) 670 panic("iystart: no header mbuf"); 671 672 len = m0->m_pkthdr.len; 673 pad = len & 1; 674 675 #ifdef IYDEBUG 676 printf("%s: length is %d.\n", device_xname(&sc->sc_dev), len); 677 #endif 678 if (len < (ETHER_MIN_LEN - ETHER_CRC_LEN)) { 679 pad = ETHER_MIN_LEN - ETHER_CRC_LEN - len; 680 } 681 682 if (len + pad > ETHER_MAX_LEN) { 683 /* packet is obviously too large: toss it */ 684 ++ifp->if_oerrors; 685 IFQ_DEQUEUE(&ifp->if_snd, m0); 686 m_freem(m0); 687 continue; 688 } 689 690 #if NBPFILTER > 0 691 if (ifp->if_bpf) 692 bpf_mtap(ifp->if_bpf, m0); 693 #endif 694 695 avail = sc->tx_start - sc->tx_end; 696 if (avail <= 0) 697 avail += sc->tx_size; 698 699 #ifdef IYDEBUG 700 printf("%s: avail is %d.\n", device_xname(&sc->sc_dev), avail); 701 #endif 702 /* 703 * we MUST RUN at splnet here --- 704 * XXX todo: or even turn off the boards ints ??? hm... 705 */ 706 707 /* See if there is room to put another packet in the buffer. */ 708 709 if ((len+pad+2*I595_XMT_HDRLEN) > avail) { 710 #ifdef IYDEBUG 711 printf("%s: len = %d, avail = %d, setting OACTIVE\n", 712 device_xname(&sc->sc_dev), len, avail); 713 #endif 714 /* mark interface as full ... */ 715 ifp->if_flags |= IFF_OACTIVE; 716 717 /* and wait for any transmission result */ 718 bus_space_write_1(iot, ioh, 0, BANK_SEL(2)); 719 720 temp = bus_space_read_1(iot, ioh, REG1); 721 bus_space_write_1(iot, ioh, REG1, 722 temp & ~XMT_CHAIN_INT); 723 724 bus_space_write_1(iot, ioh, 0, BANK_SEL(0)); 725 726 return; 727 } 728 729 /* we know it fits in the hardware now, so dequeue it */ 730 IFQ_DEQUEUE(&ifp->if_snd, m0); 731 732 last = sc->tx_end; 733 end = last + pad + len + I595_XMT_HDRLEN; 734 735 if (end >= sc->sram) { 736 if ((sc->sram - last) <= I595_XMT_HDRLEN) { 737 /* keep header in one piece */ 738 last = sc->rx_size; 739 end = last + pad + len + I595_XMT_HDRLEN; 740 } else 741 end -= sc->tx_size; 742 } 743 744 bus_space_write_2(iot, ioh, HOST_ADDR_REG, last); 745 bus_space_write_stream_2(iot, ioh, MEM_PORT_REG, 746 htole16(XMT_CMD)); 747 748 bus_space_write_2(iot, ioh, MEM_PORT_REG, 0); 749 bus_space_write_2(iot, ioh, MEM_PORT_REG, 0); 750 751 bus_space_write_stream_2(iot, ioh, MEM_PORT_REG, 752 htole16(len + pad)); 753 754 residual = resval = 0; 755 756 while ((m = m0)!=0) { 757 data = mtod(m, void *); 758 llen = m->m_len; 759 if (residual) { 760 #ifdef IYDEBUG 761 printf("%s: merging residual with next mbuf.\n", 762 device_xname(&sc->sc_dev)); 763 #endif 764 resval |= *data << 8; 765 bus_space_write_stream_2(iot, ioh, 766 MEM_PORT_REG, resval); 767 --llen; 768 ++data; 769 } 770 /* 771 * XXX ALIGNMENT LOSSAGE HERE. 772 */ 773 if (llen > 1) 774 bus_space_write_multi_stream_2(iot, ioh, 775 MEM_PORT_REG, (u_int16_t *) data, 776 llen>>1); 777 residual = llen & 1; 778 if (residual) { 779 resval = *(data + llen - 1); 780 #ifdef IYDEBUG 781 printf("%s: got odd mbuf to send.\n", 782 device_xname(&sc->sc_dev)); 783 #endif 784 } 785 786 MFREE(m, m0); 787 } 788 789 if (residual) 790 bus_space_write_stream_2(iot, ioh, MEM_PORT_REG, 791 resval); 792 793 pad >>= 1; 794 while (pad-- > 0) 795 bus_space_write_stream_2(iot, ioh, MEM_PORT_REG, 0); 796 797 #ifdef IYDEBUG 798 printf("%s: new last = 0x%x, end = 0x%x.\n", 799 device_xname(&sc->sc_dev), last, end); 800 printf("%s: old start = 0x%x, end = 0x%x, last = 0x%x\n", 801 device_xname(&sc->sc_dev), sc->tx_start, sc->tx_end, sc->tx_last); 802 #endif 803 804 if (sc->tx_start != sc->tx_end) { 805 bus_space_write_2(iot, ioh, HOST_ADDR_REG, 806 sc->tx_last + XMT_COUNT); 807 808 /* 809 * XXX We keep stat in le order, to potentially save 810 * a byte swap. 811 */ 812 stat = bus_space_read_stream_2(iot, ioh, MEM_PORT_REG); 813 814 bus_space_write_2(iot, ioh, HOST_ADDR_REG, 815 sc->tx_last + XMT_CHAIN); 816 817 bus_space_write_stream_2(iot, ioh, MEM_PORT_REG, 818 htole16(last)); 819 820 bus_space_write_stream_2(iot, ioh, MEM_PORT_REG, 821 stat | htole16(CHAIN)); 822 #ifdef IYDEBUG 823 printf("%s: setting 0x%x to 0x%x\n", 824 device_xname(&sc->sc_dev), sc->tx_last + XMT_COUNT, 825 le16toh(stat) | CHAIN); 826 #endif 827 } 828 stat = bus_space_read_2(iot, ioh, MEM_PORT_REG); /* dummy read */ 829 830 /* XXX todo: enable ints here if disabled */ 831 832 ++ifp->if_opackets; 833 834 if (sc->tx_start == sc->tx_end) { 835 bus_space_write_2(iot, ioh, XMT_ADDR_REG, last); 836 bus_space_write_1(iot, ioh, 0, XMT_CMD); 837 sc->tx_start = last; 838 #ifdef IYDEBUG 839 printf("%s: writing 0x%x to XAR and giving XCMD\n", 840 device_xname(&sc->sc_dev), last); 841 #endif 842 } else { 843 bus_space_write_1(iot, ioh, 0, RESUME_XMT_CMD); 844 #ifdef IYDEBUG 845 printf("%s: giving RESUME_XCMD\n", 846 device_xname(&sc->sc_dev)); 847 #endif 848 } 849 sc->tx_last = last; 850 sc->tx_end = end; 851 } 852 /* and wait only for end of transmission chain */ 853 bus_space_write_1(iot, ioh, 0, BANK_SEL(2)); 854 855 temp = bus_space_read_1(iot, ioh, REG1); 856 bus_space_write_1(iot, ioh, REG1, temp | XMT_CHAIN_INT); 857 858 bus_space_write_1(iot, ioh, 0, BANK_SEL(0)); 859 } 860 861 862 static inline void 863 eepromwritebit(iot, ioh, what) 864 bus_space_tag_t iot; 865 bus_space_handle_t ioh; 866 int what; 867 { 868 bus_space_write_1(iot, ioh, EEPROM_REG, what); 869 delay(1); 870 bus_space_write_1(iot, ioh, EEPROM_REG, what|EESK); 871 delay(1); 872 bus_space_write_1(iot, ioh, EEPROM_REG, what); 873 delay(1); 874 } 875 876 static inline int 877 eepromreadbit(iot, ioh) 878 bus_space_tag_t iot; 879 bus_space_handle_t ioh; 880 { 881 int b; 882 883 bus_space_write_1(iot, ioh, EEPROM_REG, EECS|EESK); 884 delay(1); 885 b = bus_space_read_1(iot, ioh, EEPROM_REG); 886 bus_space_write_1(iot, ioh, EEPROM_REG, EECS); 887 delay(1); 888 889 return ((b & EEDO) != 0); 890 } 891 892 static u_int16_t 893 eepromread(iot, ioh, offset) 894 bus_space_tag_t iot; 895 bus_space_handle_t ioh; 896 int offset; 897 { 898 volatile int i; 899 volatile int j; 900 volatile u_int16_t readval; 901 902 bus_space_write_1(iot, ioh, 0, BANK_SEL(2)); 903 delay(1); 904 bus_space_write_1(iot, ioh, EEPROM_REG, EECS); /* XXXX??? */ 905 delay(1); 906 907 eepromwritebit(iot, ioh, EECS|EEDI); 908 eepromwritebit(iot, ioh, EECS|EEDI); 909 eepromwritebit(iot, ioh, EECS); 910 911 for (j=5; j>=0; --j) { 912 if ((offset>>j) & 1) 913 eepromwritebit(iot, ioh, EECS|EEDI); 914 else 915 eepromwritebit(iot, ioh, EECS); 916 } 917 918 for (readval=0, i=0; i<16; ++i) { 919 readval<<=1; 920 readval |= eepromreadbit(iot, ioh); 921 } 922 923 bus_space_write_1(iot, ioh, EEPROM_REG, 0|EESK); 924 delay(1); 925 bus_space_write_1(iot, ioh, EEPROM_REG, 0); 926 927 bus_space_write_1(iot, ioh, COMMAND_REG, BANK_SEL(0)); 928 929 return readval; 930 } 931 932 /* 933 * Device timeout/watchdog routine. Entered if the device neglects to generate 934 * an interrupt after a transmit has been started on it. 935 */ 936 void 937 iywatchdog(ifp) 938 struct ifnet *ifp; 939 { 940 struct iy_softc *sc = ifp->if_softc; 941 942 log(LOG_ERR, "%s: device timeout\n", device_xname(&sc->sc_dev)); 943 ++sc->sc_ethercom.ec_if.if_oerrors; 944 iyreset(sc); 945 } 946 947 /* 948 * What to do upon receipt of an interrupt. 949 */ 950 int 951 iyintr(arg) 952 void *arg; 953 { 954 struct iy_softc *sc; 955 struct ifnet *ifp; 956 bus_space_tag_t iot; 957 bus_space_handle_t ioh; 958 959 u_short status; 960 961 sc = arg; 962 iot = sc->sc_iot; 963 ioh = sc->sc_ioh; 964 965 ifp = &sc->sc_ethercom.ec_if; 966 967 status = bus_space_read_1(iot, ioh, STATUS_REG); 968 #ifdef IYDEBUG 969 if (status & ALL_INTS) { 970 char sbuf[128]; 971 972 bitmask_snprintf(status, "\020\1RX_STP\2RX\3TX\4EXEC", 973 sbuf, sizeof(sbuf)); 974 printf("%s: got interrupt %s", device_xname(&sc->sc_dev), sbuf); 975 976 if (status & EXEC_INT) { 977 bitmask_snprintf(bus_space_read_1(iot, ioh, 0), 978 "\020\6ABORT", sbuf, sizeof(sbuf)); 979 printf(" event %s\n", sbuf); 980 } else 981 printf("\n"); 982 } 983 #endif 984 if ((status & (RX_INT | TX_INT)) == 0) 985 return 0; 986 987 if (status & RX_INT) { 988 iy_intr_rx(sc); 989 bus_space_write_1(iot, ioh, STATUS_REG, RX_INT); 990 } 991 if (status & TX_INT) { 992 /* Tell feeders we may be able to accept more data... */ 993 ifp->if_flags &= ~IFF_OACTIVE; 994 /* and get more data. */ 995 iystart(ifp); 996 bus_space_write_1(iot, ioh, STATUS_REG, TX_INT); 997 } 998 999 #if NRND > 0 1000 rnd_add_uint32(&sc->rnd_source, status); 1001 #endif 1002 1003 return 1; 1004 } 1005 1006 void 1007 iyget(sc, iot, ioh, rxlen) 1008 struct iy_softc *sc; 1009 bus_space_tag_t iot; 1010 bus_space_handle_t ioh; 1011 int rxlen; 1012 { 1013 struct mbuf *m, *top, **mp; 1014 struct ifnet *ifp; 1015 int len; 1016 1017 ifp = &sc->sc_ethercom.ec_if; 1018 1019 MGETHDR(m, M_DONTWAIT, MT_DATA); 1020 if (m == 0) 1021 goto dropped; 1022 m->m_pkthdr.rcvif = ifp; 1023 m->m_pkthdr.len = rxlen; 1024 len = MHLEN; 1025 top = 0; 1026 mp = ⊤ 1027 1028 while (rxlen > 0) { 1029 if (top) { 1030 MGET(m, M_DONTWAIT, MT_DATA); 1031 if (m == 0) { 1032 m_freem(top); 1033 goto dropped; 1034 } 1035 len = MLEN; 1036 } 1037 if (rxlen >= MINCLSIZE) { 1038 MCLGET(m, M_DONTWAIT); 1039 if ((m->m_flags & M_EXT) == 0) { 1040 m_free(m); 1041 m_freem(top); 1042 goto dropped; 1043 } 1044 len = MCLBYTES; 1045 } 1046 len = min(rxlen, len); 1047 /* 1048 * XXX ALIGNMENT LOSSAGE HERE. 1049 */ 1050 if (len > 1) { 1051 len &= ~1; 1052 1053 bus_space_read_multi_stream_2(iot, ioh, MEM_PORT_REG, 1054 mtod(m, u_int16_t *), len/2); 1055 } else { 1056 #ifdef IYDEBUG 1057 printf("%s: received odd mbuf\n", device_xname(&sc->sc_dev)); 1058 #endif 1059 *(mtod(m, char *)) = bus_space_read_stream_2(iot, ioh, 1060 MEM_PORT_REG); 1061 } 1062 m->m_len = len; 1063 rxlen -= len; 1064 *mp = m; 1065 mp = &m->m_next; 1066 } 1067 1068 if (top == NULL) 1069 return; 1070 1071 /* XXX receive the top here */ 1072 ++ifp->if_ipackets; 1073 1074 1075 #if NBPFILTER > 0 1076 if (ifp->if_bpf) 1077 bpf_mtap(ifp->if_bpf, top); 1078 #endif 1079 (*ifp->if_input)(ifp, top); 1080 return; 1081 1082 dropped: 1083 ++ifp->if_ierrors; 1084 return; 1085 } 1086 1087 void 1088 iy_intr_rx(sc) 1089 struct iy_softc *sc; 1090 { 1091 bus_space_tag_t iot; 1092 bus_space_handle_t ioh; 1093 1094 u_int rxadrs, rxevnt, rxstatus, rxnext, rxlen; 1095 1096 iot = sc->sc_iot; 1097 ioh = sc->sc_ioh; 1098 1099 rxadrs = sc->rx_start; 1100 bus_space_write_2(iot, ioh, HOST_ADDR_REG, rxadrs); 1101 rxevnt = le16toh(bus_space_read_stream_2(iot, ioh, MEM_PORT_REG)); 1102 rxnext = 0; 1103 1104 while (rxevnt == RCV_DONE) { 1105 rxstatus = le16toh(bus_space_read_stream_2(iot, ioh, 1106 MEM_PORT_REG)); 1107 rxnext = le16toh(bus_space_read_stream_2(iot, ioh, 1108 MEM_PORT_REG)); 1109 rxlen = le16toh(bus_space_read_stream_2(iot, ioh, 1110 MEM_PORT_REG)); 1111 #ifdef IYDEBUG 1112 { 1113 char sbuf[128]; 1114 1115 bitmask_snprintf(rxstatus, "\020\1RCLD\2IA_MCH\010SHORT\011OVRN\013ALGERR\014CRCERR\015LENERR\016RCVOK\020TYP", 1116 sbuf, sizeof(sbuf)); 1117 printf("%s: pck at 0x%04x stat %s next 0x%x len 0x%x\n", 1118 device_xname(&sc->sc_dev), rxadrs, sbuf, rxnext, rxlen); 1119 } 1120 #endif 1121 iyget(sc, iot, ioh, rxlen); 1122 1123 /* move stop address */ 1124 bus_space_write_2(iot, ioh, RCV_STOP_LOW, 1125 rxnext == 0 ? sc->rx_size - 2 : rxnext - 2); 1126 1127 bus_space_write_2(iot, ioh, HOST_ADDR_REG, rxnext); 1128 rxadrs = rxnext; 1129 rxevnt = le16toh(bus_space_read_stream_2(iot, ioh, 1130 MEM_PORT_REG)); 1131 } 1132 sc->rx_start = rxnext; 1133 } 1134 1135 void 1136 iy_intr_tx(sc) 1137 struct iy_softc *sc; 1138 { 1139 bus_space_tag_t iot; 1140 bus_space_handle_t ioh; 1141 struct ifnet *ifp; 1142 u_int txstatus, txstat2, txlen, txnext; 1143 1144 ifp = &sc->sc_ethercom.ec_if; 1145 iot = sc->sc_iot; 1146 ioh = sc->sc_ioh; 1147 1148 while (sc->tx_start != sc->tx_end) { 1149 bus_space_write_2(iot, ioh, HOST_ADDR_REG, sc->tx_start); 1150 txstatus = le16toh(bus_space_read_stream_2(iot, ioh, 1151 MEM_PORT_REG)); 1152 1153 if ((txstatus & (TX_DONE|CMD_MASK)) != (TX_DONE|XMT_CMD)) 1154 break; 1155 1156 txstat2 = le16toh(bus_space_read_stream_2(iot, ioh, 1157 MEM_PORT_REG)); 1158 txnext = le16toh(bus_space_read_stream_2(iot, ioh, 1159 MEM_PORT_REG)); 1160 txlen = le16toh(bus_space_read_stream_2(iot, ioh, 1161 MEM_PORT_REG)); 1162 #ifdef IYDEBUG 1163 { 1164 char sbuf[128]; 1165 1166 bitmask_snprintf(txstat2, "\020\6MAX_COL\7HRT_BEAT\010TX_DEF\011UND_RUN\012JERR\013LST_CRS\014LTCOL\016TX_OK\020COLL", 1167 sbuf, sizeof(sbuf)); 1168 printf("txstat 0x%x stat2 0x%s next 0x%x len 0x%x\n", 1169 txstatus, sbuf, txnext, txlen); 1170 } 1171 #endif 1172 if (txlen & CHAIN) 1173 sc->tx_start = txnext; 1174 else 1175 sc->tx_start = sc->tx_end; 1176 ifp->if_flags &= ~IFF_OACTIVE; 1177 1178 if (txstat2 & 0x0020) 1179 ifp->if_collisions += 16; 1180 else 1181 ifp->if_collisions += txstat2 & 0x000f; 1182 1183 if ((txstat2 & 0x2000) == 0) 1184 ++ifp->if_oerrors; 1185 } 1186 } 1187 1188 int 1189 iyioctl(ifp, cmd, data) 1190 struct ifnet *ifp; 1191 u_long cmd; 1192 void *data; 1193 { 1194 struct iy_softc *sc; 1195 struct ifaddr *ifa; 1196 struct ifreq *ifr; 1197 int s, error = 0; 1198 1199 sc = ifp->if_softc; 1200 ifa = (struct ifaddr *)data; 1201 ifr = (struct ifreq *)data; 1202 1203 #ifdef IYDEBUG 1204 printf("iyioctl called with ifp %p (%s) cmd 0x%lx data %p\n", 1205 ifp, ifp->if_xname, cmd, data); 1206 #endif 1207 1208 s = splnet(); 1209 1210 switch (cmd) { 1211 1212 case SIOCSIFADDR: 1213 ifp->if_flags |= IFF_UP; 1214 1215 switch (ifa->ifa_addr->sa_family) { 1216 #ifdef INET 1217 case AF_INET: 1218 iyinit(sc); 1219 arp_ifinit(ifp, ifa); 1220 break; 1221 #endif 1222 default: 1223 iyinit(sc); 1224 break; 1225 } 1226 break; 1227 1228 case SIOCSIFFLAGS: 1229 sc->promisc = ifp->if_flags & (IFF_PROMISC | IFF_ALLMULTI); 1230 if ((ifp->if_flags & IFF_UP) == 0 && 1231 (ifp->if_flags & IFF_RUNNING) != 0) { 1232 /* 1233 * If interface is marked down and it is running, then 1234 * stop it. 1235 */ 1236 iystop(sc); 1237 ifp->if_flags &= ~IFF_RUNNING; 1238 } else if ((ifp->if_flags & IFF_UP) != 0 && 1239 (ifp->if_flags & IFF_RUNNING) == 0) { 1240 /* 1241 * If interface is marked up and it is stopped, then 1242 * start it. 1243 */ 1244 iyinit(sc); 1245 } else { 1246 /* 1247 * Reset the interface to pick up changes in any other 1248 * flags that affect hardware registers. 1249 */ 1250 iystop(sc); 1251 iyinit(sc); 1252 } 1253 #ifdef IYDEBUGX 1254 if (ifp->if_flags & IFF_DEBUG) 1255 sc->sc_debug = IFY_ALL; 1256 else 1257 sc->sc_debug = 0; 1258 #endif 1259 break; 1260 1261 case SIOCADDMULTI: 1262 case SIOCDELMULTI: 1263 if ((error = ether_ioctl(ifp, cmd, data)) == ENETRESET) { 1264 /* 1265 * Multicast list has changed; set the hardware filter 1266 * accordingly. 1267 */ 1268 if (ifp->if_flags & IFF_RUNNING) { 1269 /* XXX can't make it work otherwise */ 1270 iyreset(sc); 1271 iy_mc_reset(sc); 1272 } 1273 error = 0; 1274 } 1275 break; 1276 1277 case SIOCSIFMEDIA: 1278 case SIOCGIFMEDIA: 1279 error = ifmedia_ioctl(ifp, ifr, &sc->iy_ifmedia, cmd); 1280 break; 1281 default: 1282 error = EINVAL; 1283 } 1284 splx(s); 1285 return error; 1286 } 1287 1288 int 1289 iy_mediachange(ifp) 1290 struct ifnet *ifp; 1291 { 1292 struct iy_softc *sc = ifp->if_softc; 1293 1294 if (IFM_TYPE(sc->iy_ifmedia.ifm_media) != IFM_ETHER) 1295 return EINVAL; 1296 switch(IFM_SUBTYPE(sc->iy_ifmedia.ifm_media)) { 1297 case IFM_10_5: 1298 case IFM_10_2: 1299 case IFM_10_T: 1300 case IFM_AUTO: 1301 iystop(sc); 1302 iyinit(sc); 1303 return 0; 1304 default: 1305 return EINVAL; 1306 } 1307 } 1308 1309 void 1310 iy_mediastatus(ifp, ifmr) 1311 struct ifnet *ifp; 1312 struct ifmediareq *ifmr; 1313 { 1314 struct iy_softc *sc = ifp->if_softc; 1315 1316 ifmr->ifm_active = sc->iy_media; 1317 ifmr->ifm_status = IFM_AVALID | IFM_ACTIVE; 1318 } 1319 1320 1321 static void 1322 iy_mc_setup(sc) 1323 struct iy_softc *sc; 1324 { 1325 struct ether_multi *enm; 1326 struct ether_multistep step; 1327 struct ethercom *ecp; 1328 struct ifnet *ifp; 1329 bus_space_tag_t iot; 1330 bus_space_handle_t ioh; 1331 int avail, last /*, end*/ , len; 1332 int timeout; 1333 volatile u_int16_t dum; 1334 u_int8_t temp; 1335 1336 1337 ecp = &sc->sc_ethercom; 1338 ifp = &ecp->ec_if; 1339 1340 iot = sc->sc_iot; 1341 ioh = sc->sc_ioh; 1342 1343 len = 6 * ecp->ec_multicnt; 1344 1345 avail = sc->tx_start - sc->tx_end; 1346 if (avail <= 0) 1347 avail += sc->tx_size; 1348 if (ifp->if_flags & IFF_DEBUG) 1349 printf("%s: iy_mc_setup called, %d addresses, " 1350 "%d/%d bytes needed/avail\n", ifp->if_xname, 1351 ecp->ec_multicnt, len + I595_XMT_HDRLEN, avail); 1352 1353 last = sc->rx_size; 1354 1355 bus_space_write_1(iot, ioh, 0, BANK_SEL(2)); 1356 bus_space_write_1(iot, ioh, RECV_MODES_REG, MATCH_BRDCST); 1357 /* XXX VOODOO */ 1358 temp = bus_space_read_1(iot, ioh, MEDIA_SELECT); 1359 bus_space_write_1(iot, ioh, MEDIA_SELECT, temp); 1360 /* XXX END OF VOODOO */ 1361 bus_space_write_1(iot, ioh, 0, BANK_SEL(0)); 1362 bus_space_write_2(iot, ioh, HOST_ADDR_REG, last); 1363 bus_space_write_stream_2(iot, ioh, MEM_PORT_REG, htole16(MC_SETUP_CMD)); 1364 bus_space_write_2(iot, ioh, MEM_PORT_REG, 0); 1365 bus_space_write_2(iot, ioh, MEM_PORT_REG, 0); 1366 bus_space_write_stream_2(iot, ioh, MEM_PORT_REG, htole16(len)); 1367 1368 ETHER_FIRST_MULTI(step, ecp, enm); 1369 while(enm) { 1370 /* 1371 * XXX ALIGNMENT LOSSAGE HERE? 1372 */ 1373 bus_space_write_multi_stream_2(iot, ioh, MEM_PORT_REG, 1374 (u_int16_t *) enm->enm_addrlo, 3); 1375 1376 ETHER_NEXT_MULTI(step, enm); 1377 } 1378 dum = bus_space_read_2(iot, ioh, MEM_PORT_REG); /* dummy read */ 1379 bus_space_write_2(iot, ioh, XMT_ADDR_REG, last); 1380 bus_space_write_1(iot, ioh, 0, MC_SETUP_CMD); 1381 1382 1383 sc->tx_start = sc->rx_size; 1384 sc->tx_end = sc->rx_size + I595_XMT_HDRLEN + len; 1385 1386 for (timeout=0; timeout<100; timeout++) { 1387 DELAY(2); 1388 if ((bus_space_read_1(iot, ioh, STATUS_REG) & EXEC_INT) == 0) 1389 continue; 1390 1391 temp = bus_space_read_1(iot, ioh, 0); 1392 bus_space_write_1(iot, ioh, STATUS_REG, EXEC_INT); 1393 #ifdef DIAGNOSTIC 1394 if (temp & 0x20) { 1395 aprint_error_dev(&sc->sc_dev, "mc setup failed, %d usec\n", 1396 timeout * 2); 1397 } else if (((temp & 0x0f) == 0x03) && 1398 (ifp->if_flags & IFF_DEBUG)) { 1399 printf("%s: mc setup done, %d usec\n", 1400 device_xname(&sc->sc_dev), timeout * 2); 1401 } 1402 #endif 1403 break; 1404 } 1405 sc->tx_start = sc->tx_end; 1406 ifp->if_flags &= ~IFF_OACTIVE; 1407 1408 } 1409 1410 static void 1411 iy_mc_reset(sc) 1412 struct iy_softc *sc; 1413 { 1414 struct ether_multi *enm; 1415 struct ether_multistep step; 1416 struct ethercom *ecp; 1417 struct ifnet *ifp; 1418 bus_space_tag_t iot; 1419 bus_space_handle_t ioh; 1420 u_int16_t temp; 1421 1422 ecp = &sc->sc_ethercom; 1423 ifp = &ecp->ec_if; 1424 1425 iot = sc->sc_iot; 1426 ioh = sc->sc_ioh; 1427 1428 if (ecp->ec_multicnt > 63) { 1429 ifp->if_flags |= IFF_ALLMULTI; 1430 1431 } else if (ecp->ec_multicnt > 0) { 1432 /* 1433 * Step through the list of addresses. 1434 */ 1435 ETHER_FIRST_MULTI(step, ecp, enm); 1436 while(enm) { 1437 if (memcmp(enm->enm_addrlo, enm->enm_addrhi, 6) != 0) { 1438 ifp->if_flags |= IFF_ALLMULTI; 1439 goto setupmulti; 1440 } 1441 ETHER_NEXT_MULTI(step, enm); 1442 } 1443 /* OK, we really need to do it now: */ 1444 #if 0 1445 if ((ifp->if_flags & (IFF_RUNNING | IFF_OACTIVE)) 1446 != IFF_RUNNING) { 1447 ifp->if_flags |= IFF_OACTIVE; 1448 sc->want_mc_setup = 1; 1449 return; 1450 } 1451 #endif 1452 iy_mc_setup(sc); 1453 } else { 1454 ifp->if_flags &= ~IFF_ALLMULTI; 1455 } 1456 1457 setupmulti: 1458 bus_space_write_1(iot, ioh, 0, BANK_SEL(2)); 1459 if (ifp->if_flags & (IFF_PROMISC|IFF_ALLMULTI)) { 1460 temp = MATCH_ALL; 1461 } else 1462 temp = MATCH_BRDCST; 1463 1464 bus_space_write_1(iot, ioh, RECV_MODES_REG, temp); 1465 /* XXX VOODOO */ 1466 temp = bus_space_read_1(iot, ioh, MEDIA_SELECT); 1467 bus_space_write_1(iot, ioh, MEDIA_SELECT, temp); 1468 /* XXX END OF VOODOO */ 1469 1470 /* XXX TBD: setup hardware for all multicasts */ 1471 bus_space_write_1(iot, ioh, 0, BANK_SEL(0)); 1472 return; 1473 } 1474 1475 #ifdef IYDEBUGX 1476 void 1477 print_rbd(rbd) 1478 volatile struct ie_recv_buf_desc *rbd; 1479 { 1480 printf("RBD at %08lx:\nactual %04x, next %04x, buffer %08x\n" 1481 "length %04x, mbz %04x\n", (u_long)rbd, rbd->ie_rbd_actual, 1482 rbd->ie_rbd_next, rbd->ie_rbd_buffer, rbd->ie_rbd_length, 1483 rbd->mbz); 1484 } 1485 #endif 1486 1487 void 1488 iyprobemem(sc) 1489 struct iy_softc *sc; 1490 { 1491 bus_space_tag_t iot; 1492 bus_space_handle_t ioh; 1493 int testing; 1494 1495 iot = sc->sc_iot; 1496 ioh = sc->sc_ioh; 1497 1498 bus_space_write_1(iot, ioh, COMMAND_REG, BANK_SEL(0)); 1499 delay(1); 1500 bus_space_write_2(iot, ioh, HOST_ADDR_REG, 4096-2); 1501 bus_space_write_2(iot, ioh, MEM_PORT_REG, 0); 1502 1503 for (testing=65536; testing >= 4096; testing >>= 1) { 1504 bus_space_write_2(iot, ioh, HOST_ADDR_REG, testing-2); 1505 bus_space_write_2(iot, ioh, MEM_PORT_REG, 0xdead); 1506 bus_space_write_2(iot, ioh, HOST_ADDR_REG, testing-2); 1507 if (bus_space_read_2(iot, ioh, MEM_PORT_REG) != 0xdead) { 1508 #ifdef IYMEMDEBUG 1509 printf("%s: Didn't keep 0xdead at 0x%x\n", 1510 device_xname(&sc->sc_dev), testing-2); 1511 #endif 1512 continue; 1513 } 1514 1515 bus_space_write_2(iot, ioh, HOST_ADDR_REG, testing-2); 1516 bus_space_write_2(iot, ioh, MEM_PORT_REG, 0xbeef); 1517 bus_space_write_2(iot, ioh, HOST_ADDR_REG, testing-2); 1518 if (bus_space_read_2(iot, ioh, MEM_PORT_REG) != 0xbeef) { 1519 #ifdef IYMEMDEBUG 1520 printf("%s: Didn't keep 0xbeef at 0x%x\n", 1521 device_xname(&sc->sc_dev), testing-2); 1522 #endif 1523 continue; 1524 } 1525 1526 bus_space_write_2(iot, ioh, HOST_ADDR_REG, 0); 1527 bus_space_write_2(iot, ioh, MEM_PORT_REG, 0); 1528 bus_space_write_2(iot, ioh, HOST_ADDR_REG, testing >> 1); 1529 bus_space_write_2(iot, ioh, MEM_PORT_REG, testing >> 1); 1530 bus_space_write_2(iot, ioh, HOST_ADDR_REG, 0); 1531 if (bus_space_read_2(iot, ioh, MEM_PORT_REG) == (testing >> 1)) { 1532 #ifdef IYMEMDEBUG 1533 printf("%s: 0x%x alias of 0x0\n", 1534 device_xname(&sc->sc_dev), testing >> 1); 1535 #endif 1536 continue; 1537 } 1538 1539 break; 1540 } 1541 1542 sc->sram = testing; 1543 1544 switch(testing) { 1545 case 65536: 1546 /* 4 NFS packets + overhead RX, 2 NFS + overhead TX */ 1547 sc->rx_size = 44*1024; 1548 break; 1549 1550 case 32768: 1551 /* 2 NFS packets + overhead RX, 1 NFS + overhead TX */ 1552 sc->rx_size = 22*1024; 1553 break; 1554 1555 case 16384: 1556 /* 1 NFS packet + overhead RX, 4 big packets TX */ 1557 sc->rx_size = 10*1024; 1558 break; 1559 default: 1560 sc->rx_size = testing/2; 1561 break; 1562 } 1563 sc->tx_size = testing - sc->rx_size; 1564 } 1565 1566 static int 1567 eepromreadall(iot, ioh, wordp, maxi) 1568 bus_space_tag_t iot; 1569 bus_space_handle_t ioh; 1570 u_int16_t *wordp; 1571 int maxi; 1572 { 1573 int i; 1574 u_int16_t checksum, tmp; 1575 1576 checksum = 0; 1577 1578 for (i=0; i<EEPP_LENGTH; ++i) { 1579 tmp = eepromread(iot, ioh, i); 1580 checksum += tmp; 1581 if (i<maxi) 1582 wordp[i] = tmp; 1583 } 1584 1585 if (checksum != EEPP_CHKSUM) { 1586 #ifdef IYDEBUG 1587 printf("wrong EEPROM checksum 0x%x should be 0x%x\n", 1588 checksum, EEPP_CHKSUM); 1589 #endif 1590 return 1; 1591 } 1592 return 0; 1593 } 1594
Indexes created Wed Oct 01 15:09:59 GMT 2025