if_iy.c revision 1.82
1 /* $NetBSD: if_iy.c,v 1.82 2008/12/16 22:35:32 christos Exp $ */ 2 /* #define IYDEBUG */ 3 /* #define IYMEMDEBUG */ 4 5 /*- 6 * Copyright (c) 1996,2001 The NetBSD Foundation, Inc. 7 * All rights reserved. 8 * 9 * This code is derived from software contributed to The NetBSD Foundation 10 * by Ignatios Souvatzis. 11 * 12 * Redistribution and use in source and binary forms, with or without 13 * modification, are permitted provided that the following conditions 14 * are met: 15 * 1. Redistributions of source code must retain the above copyright 16 * notice, this list of conditions and the following disclaimer. 17 * 2. Redistributions in binary form must reproduce the above copyright 18 * notice, this list of conditions and the following disclaimer in the 19 * documentation and/or other materials provided with the distribution. 20 * 21 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 22 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 23 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 24 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 25 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 26 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 27 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 28 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 29 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 30 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 31 * POSSIBILITY OF SUCH DAMAGE. 32 */ 33 34 /* 35 * Supported hardware: 36 * 37 * - Intel EtherExpress Pro/10. 38 * - possibly other boards using the i82595 chip and no special tweaks. 39 */ 40 41 #include <sys/cdefs.h> 42 __KERNEL_RCSID(0, "$NetBSD: if_iy.c,v 1.82 2008/12/16 22:35:32 christos Exp $"); 43 44 #include "opt_inet.h" 45 #include "bpfilter.h" 46 #include "rnd.h" 47 48 #include <sys/param.h> 49 #include <sys/systm.h> 50 #include <sys/mbuf.h> 51 #include <sys/buf.h> 52 #include <sys/protosw.h> 53 #include <sys/socket.h> 54 #include <sys/ioctl.h> 55 #include <sys/errno.h> 56 #include <sys/syslog.h> 57 #include <sys/device.h> 58 #include <sys/endian.h> 59 #if NRND > 0 60 #include <sys/rnd.h> 61 #endif 62 63 #include <net/if.h> 64 #include <net/if_types.h> 65 #include <net/if_dl.h> 66 67 #include <net/if_ether.h> 68 69 #if NBPFILTER > 0 70 #include <net/bpf.h> 71 #include <net/bpfdesc.h> 72 #endif 73 74 #ifdef INET 75 #include <netinet/in.h> 76 #include <netinet/in_systm.h> 77 #include <netinet/in_var.h> 78 #include <netinet/ip.h> 79 #include <netinet/if_inarp.h> 80 #endif 81 82 83 #if defined(SIOCSIFMEDIA) 84 #include <net/if_media.h> 85 #endif 86 87 #include <sys/cpu.h> 88 #include <sys/bus.h> 89 #include <sys/intr.h> 90 91 #include <dev/isa/isareg.h> 92 #include <dev/isa/isavar.h> 93 #include <dev/ic/i82595reg.h> 94 95 /* XXX why isn't this centralized? */ 96 #ifndef __BUS_SPACE_HAS_STREAM_METHODS 97 #define bus_space_write_stream_2 bus_space_write_2 98 #define bus_space_write_multi_stream_2 bus_space_write_multi_2 99 #define bus_space_read_stream_2 bus_space_read_2 100 #define bus_space_read_multi_stream_2 bus_space_read_multi_2 101 #endif /* __BUS_SPACE_HAS_STREAM_METHODS */ 102 103 /* 104 * Ethernet status, per interface. 105 */ 106 struct iy_softc { 107 struct device sc_dev; 108 void *sc_ih; 109 110 bus_space_tag_t sc_iot; 111 bus_space_handle_t sc_ioh; 112 113 struct ethercom sc_ethercom; 114 115 struct ifmedia iy_ifmedia; 116 int iy_media; 117 118 int mappedirq; 119 120 int hard_vers; 121 122 int promisc; 123 124 int sram, tx_size, rx_size; 125 126 int tx_start, tx_end, tx_last; 127 int rx_start; 128 129 int doing_mc_setup; 130 #ifdef IYDEBUG 131 int sc_debug; 132 #endif 133 134 #if NRND > 0 135 rndsource_element_t rnd_source; 136 #endif 137 }; 138 139 void iywatchdog(struct ifnet *); 140 int iyioctl(struct ifnet *, u_long, void *); 141 int iyintr(void *); 142 void iyinit(struct iy_softc *); 143 void iystop(struct iy_softc *); 144 void iystart(struct ifnet *); 145 146 void iy_intr_rx(struct iy_softc *); 147 void iy_intr_tx(struct iy_softc *); 148 149 void iyreset(struct iy_softc *); 150 void iy_readframe(struct iy_softc *, int); 151 void iy_drop_packet_buffer(struct iy_softc *); 152 void iy_find_mem_size(struct iy_softc *); 153 void iyrint(struct iy_softc *); 154 void iytint(struct iy_softc *); 155 void iyxmit(struct iy_softc *); 156 static void iy_mc_setup(struct iy_softc *); 157 static void iy_mc_reset(struct iy_softc *); 158 void iyget(struct iy_softc *, bus_space_tag_t, bus_space_handle_t, int); 159 void iyprobemem(struct iy_softc *); 160 static inline void eepromwritebit(bus_space_tag_t, bus_space_handle_t, int); 161 static inline int eepromreadbit(bus_space_tag_t, bus_space_handle_t); 162 163 #ifdef IYDEBUGX 164 void print_rbd(volatile struct iy_recv_buf_desc *); 165 166 int in_ifrint = 0; 167 int in_iftint = 0; 168 #endif 169 170 int iy_mediachange(struct ifnet *); 171 void iy_mediastatus(struct ifnet *, struct ifmediareq *); 172 173 int iyprobe(struct device *, struct cfdata *, void *); 174 void iyattach(struct device *, struct device *, void *); 175 176 static u_int16_t eepromread(bus_space_tag_t, bus_space_handle_t, int); 177 178 static int eepromreadall(bus_space_tag_t, bus_space_handle_t, u_int16_t *, 179 int); 180 181 CFATTACH_DECL(iy, sizeof(struct iy_softc), 182 iyprobe, iyattach, NULL, NULL); 183 184 static u_int8_t eepro_irqmap[] = EEPP_INTMAP; 185 static u_int8_t eepro_revirqmap[] = EEPP_RINTMAP; 186 187 int 188 iyprobe(struct device *parent, struct cfdata *match, 189 void *aux) 190 { 191 struct isa_attach_args *ia = aux; 192 u_int16_t eaddr[8]; 193 bus_space_tag_t iot; 194 bus_space_handle_t ioh; 195 u_int8_t c, d; 196 int irq; 197 198 if (ia->ia_nio < 1) 199 return (0); 200 if (ia->ia_nirq < 1) 201 return (0); 202 203 if (ISA_DIRECT_CONFIG(ia)) 204 return (0); 205 206 iot = ia->ia_iot; 207 208 if (ia->ia_io[0].ir_addr == ISA_UNKNOWN_PORT) 209 return 0; 210 211 if (bus_space_map(iot, ia->ia_io[0].ir_addr, 16, 0, &ioh)) 212 return 0; 213 214 /* try to find the round robin sig: */ 215 216 c = bus_space_read_1(iot, ioh, ID_REG); 217 if ((c & ID_REG_MASK) != ID_REG_SIG) 218 goto out; 219 220 d = bus_space_read_1(iot, ioh, ID_REG); 221 if ((d & ID_REG_MASK) != ID_REG_SIG) 222 goto out; 223 224 if (((d-c) & R_ROBIN_BITS) != 0x40) 225 goto out; 226 227 d = bus_space_read_1(iot, ioh, ID_REG); 228 if ((d & ID_REG_MASK) != ID_REG_SIG) 229 goto out; 230 231 if (((d-c) & R_ROBIN_BITS) != 0x80) 232 goto out; 233 234 d = bus_space_read_1(iot, ioh, ID_REG); 235 if ((d & ID_REG_MASK) != ID_REG_SIG) 236 goto out; 237 238 if (((d-c) & R_ROBIN_BITS) != 0xC0) 239 goto out; 240 241 d = bus_space_read_1(iot, ioh, ID_REG); 242 if ((d & ID_REG_MASK) != ID_REG_SIG) 243 goto out; 244 245 if (((d-c) & R_ROBIN_BITS) != 0x00) 246 goto out; 247 248 #ifdef IYDEBUG 249 printf("iyprobe verified working ID reg.\n"); 250 #endif 251 252 if (eepromreadall(iot, ioh, eaddr, 8)) 253 goto out; 254 255 if (ia->ia_irq[0].ir_irq == ISA_UNKNOWN_IRQ) 256 irq = eepro_irqmap[eaddr[EEPPW1] & EEPP_Int]; 257 else 258 irq = ia->ia_irq[0].ir_irq; 259 260 if (irq >= sizeof(eepro_revirqmap)) 261 goto out; 262 263 if (eepro_revirqmap[irq] == 0xff) 264 goto out; 265 266 /* now lets reset the chip */ 267 268 bus_space_write_1(iot, ioh, COMMAND_REG, RESET_CMD); 269 delay(200); 270 271 ia->ia_nio = 1; 272 ia->ia_io[0].ir_size = 16; 273 274 ia->ia_nirq = 1; 275 ia->ia_irq[0].ir_irq = irq; 276 277 ia->ia_niomem = 0; 278 ia->ia_ndrq = 0; 279 280 bus_space_unmap(iot, ioh, 16); 281 return 1; /* found */ 282 out: 283 bus_space_unmap(iot, ioh, 16); 284 return 0; 285 } 286 287 void 288 iyattach(struct device *parent, struct device *self, void *aux) 289 { 290 struct iy_softc *sc = (void *)self; 291 struct isa_attach_args *ia = aux; 292 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 293 bus_space_tag_t iot; 294 bus_space_handle_t ioh; 295 unsigned temp; 296 u_int16_t eaddr[8]; 297 u_int8_t myaddr[ETHER_ADDR_LEN]; 298 int eirq; 299 300 iot = ia->ia_iot; 301 302 if (bus_space_map(iot, ia->ia_io[0].ir_addr, 16, 0, &ioh)) { 303 printf(": can't map i/o space\n"); 304 return; 305 } 306 307 sc->sc_iot = iot; 308 sc->sc_ioh = ioh; 309 310 sc->mappedirq = eepro_revirqmap[ia->ia_irq[0].ir_irq]; 311 312 /* now let's reset the chip */ 313 314 bus_space_write_1(iot, ioh, COMMAND_REG, RESET_CMD); 315 delay(200); 316 317 iyprobemem(sc); 318 319 strlcpy(ifp->if_xname, device_xname(&sc->sc_dev), IFNAMSIZ); 320 ifp->if_softc = sc; 321 ifp->if_start = iystart; 322 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_NOTRAILERS 323 | IFF_MULTICAST; 324 325 sc->doing_mc_setup = 0; 326 327 ifp->if_ioctl = iyioctl; 328 ifp->if_watchdog = iywatchdog; 329 330 IFQ_SET_READY(&ifp->if_snd); 331 332 (void)eepromreadall(iot, ioh, eaddr, 8); 333 sc->hard_vers = eaddr[EEPW6] & EEPP_BoardRev; 334 335 #ifdef DIAGNOSTICS 336 if ((eaddr[EEPPEther0] != 337 eepromread(iot, ioh, EEPPEther0a)) && 338 (eaddr[EEPPEther1] != 339 eepromread(iot, ioh, EEPPEther1a)) && 340 (eaddr[EEPPEther2] != 341 eepromread(iot, ioh, EEPPEther2a))) 342 343 printf("EEPROM Ethernet address differs from copy\n"); 344 #endif 345 346 myaddr[1] = eaddr[EEPPEther0] & 0xFF; 347 myaddr[0] = eaddr[EEPPEther0] >> 8; 348 myaddr[3] = eaddr[EEPPEther1] & 0xFF; 349 myaddr[2] = eaddr[EEPPEther1] >> 8; 350 myaddr[5] = eaddr[EEPPEther2] & 0xFF; 351 myaddr[4] = eaddr[EEPPEther2] >> 8; 352 353 ifmedia_init(&sc->iy_ifmedia, 0, iy_mediachange, iy_mediastatus); 354 ifmedia_add(&sc->iy_ifmedia, IFM_ETHER | IFM_10_2, 0, NULL); 355 ifmedia_add(&sc->iy_ifmedia, IFM_ETHER | IFM_10_5, 0, NULL); 356 ifmedia_add(&sc->iy_ifmedia, IFM_ETHER | IFM_10_T, 0, NULL); 357 ifmedia_add(&sc->iy_ifmedia, IFM_ETHER | IFM_AUTO, 0, NULL); 358 ifmedia_set(&sc->iy_ifmedia, IFM_ETHER | IFM_AUTO); 359 /* Attach the interface. */ 360 if_attach(ifp); 361 ether_ifattach(ifp, myaddr); 362 printf(": address %s, rev. %d, %d kB\n", 363 ether_sprintf(myaddr), 364 sc->hard_vers, sc->sram/1024); 365 366 eirq = eepro_irqmap[eaddr[EEPPW1] & EEPP_Int]; 367 if (eirq != ia->ia_irq[0].ir_irq) 368 printf("%s: EEPROM irq setting %d ignored\n", 369 device_xname(&sc->sc_dev), eirq); 370 371 sc->sc_ih = isa_intr_establish(ia->ia_ic, ia->ia_irq[0].ir_irq, 372 IST_EDGE, IPL_NET, iyintr, sc); 373 374 #if NRND > 0 375 rnd_attach_source(&sc->rnd_source, device_xname(&sc->sc_dev), 376 RND_TYPE_NET, 0); 377 #endif 378 379 temp = bus_space_read_1(iot, ioh, INT_NO_REG); 380 bus_space_write_1(iot, ioh, INT_NO_REG, (temp & 0xf8) | sc->mappedirq); 381 } 382 383 void 384 iystop(sc) 385 struct iy_softc *sc; 386 { 387 bus_space_tag_t iot; 388 bus_space_handle_t ioh; 389 #ifdef IYDEBUG 390 u_int p, v; 391 #endif 392 393 iot = sc->sc_iot; 394 ioh = sc->sc_ioh; 395 396 bus_space_write_1(iot, ioh, COMMAND_REG, RCV_DISABLE_CMD); 397 398 bus_space_write_1(iot, ioh, INT_MASK_REG, ALL_INTS); 399 bus_space_write_1(iot, ioh, STATUS_REG, ALL_INTS); 400 401 bus_space_write_1(iot, ioh, COMMAND_REG, RESET_CMD); 402 delay(200); 403 #ifdef IYDEBUG 404 printf("%s: dumping tx chain (st 0x%x end 0x%x last 0x%x)\n", 405 device_xname(&sc->sc_dev), sc->tx_start, sc->tx_end, sc->tx_last); 406 p = sc->tx_last; 407 if (!p) 408 p = sc->tx_start; 409 do { 410 char sbuf[128]; 411 412 bus_space_write_2(iot, ioh, HOST_ADDR_REG, p); 413 414 v = le16toh(bus_space_read_stream_2(iot, ioh, MEM_PORT_REG)); 415 snprintb(sbuf, sizeof(sbuf), "\020\006Ab\010Dn", v); 416 printf("0x%04x: %s ", p, sbuf); 417 418 v = le16toh(bus_space_read_stream_2(iot, ioh, MEM_PORT_REG)); 419 snprintb(sbuf, sizeof(sbuf), 420 "\020\6MAX_COL\7HRT_BEAT\010TX_DEF\011UND_RUN" 421 "\012JERR\013LST_CRS\014LTCOL\016TX_OK\020COLL", v); 422 printf("0x%s", sbuf); 423 424 p = le16toh(bus_space_read_stream_2(iot, ioh, MEM_PORT_REG)); 425 printf(" 0x%04x", p); 426 427 v = le16toh(bus_space_read_stream_2(iot, ioh, MEM_PORT_REG)); 428 snprintb(sbuf, sizeof(sbuf), "\020\020Ch", v); 429 printf(" 0x%s\n", sbuf); 430 431 } while (v & 0x8000); 432 #endif 433 sc->tx_start = sc->tx_end = sc->rx_size; 434 sc->tx_last = 0; 435 sc->sc_ethercom.ec_if.if_flags &= ~(IFF_RUNNING|IFF_OACTIVE); 436 } 437 438 void 439 iyreset(sc) 440 struct iy_softc *sc; 441 { 442 int s; 443 s = splnet(); 444 iystop(sc); 445 iyinit(sc); 446 splx(s); 447 } 448 449 void 450 iyinit(sc) 451 struct iy_softc *sc; 452 { 453 int i; 454 unsigned temp; 455 struct ifnet *ifp; 456 bus_space_tag_t iot; 457 bus_space_handle_t ioh; 458 459 iot = sc->sc_iot; 460 ioh = sc->sc_ioh; 461 462 ifp = &sc->sc_ethercom.ec_if; 463 #ifdef IYDEBUG 464 printf("ifp is %p\n", ifp); 465 #endif 466 467 bus_space_write_1(iot, ioh, 0, BANK_SEL(2)); 468 469 temp = bus_space_read_1(iot, ioh, EEPROM_REG); 470 if (temp & 0x10) 471 bus_space_write_1(iot, ioh, EEPROM_REG, temp & ~0x10); 472 473 for (i=0; i<6; ++i) { 474 bus_space_write_1(iot, ioh, I_ADD(i), CLLADDR(ifp->if_sadl)[i]); 475 } 476 477 temp = bus_space_read_1(iot, ioh, REG1); 478 bus_space_write_1(iot, ioh, REG1, 479 temp | /* XMT_CHAIN_INT | XMT_CHAIN_ERRSTOP | */ RCV_DISCARD_BAD); 480 481 if (ifp->if_flags & (IFF_PROMISC|IFF_ALLMULTI)) { 482 temp = MATCH_ALL; 483 } else 484 temp = MATCH_BRDCST; 485 486 bus_space_write_1(iot, ioh, RECV_MODES_REG, temp); 487 488 #ifdef IYDEBUG 489 { 490 char sbuf[128]; 491 492 snprintb(sbuf, sizeof(sbuf), 493 "\020\1PRMSC\2NOBRDST\3SEECRC\4LENGTH\5NOSaIns\6MultiIA", 494 temp); 495 496 printf("%s: RECV_MODES set to %s\n", device_xname(&sc->sc_dev), sbuf); 497 } 498 #endif 499 /* XXX VOODOO */ 500 temp = bus_space_read_1(iot, ioh, MEDIA_SELECT); 501 bus_space_write_1(iot, ioh, MEDIA_SELECT, temp); 502 /* XXX END OF VOODOO */ 503 504 505 delay(500000); /* for the hardware to test for the connector */ 506 507 temp = bus_space_read_1(iot, ioh, MEDIA_SELECT); 508 #ifdef IYDEBUG 509 { 510 char sbuf[128]; 511 512 snprintb(sbuf, sizeof(sbuf), 513 "\020\1LnkInDis\2PolCor\3TPE\4JabberDis\5NoAport\6BNC"); 514 printf("%s: media select was 0x%s ", device_xname(&sc->sc_dev), sbuf); 515 } 516 #endif 517 temp = (temp & TEST_MODE_MASK); 518 519 switch(IFM_SUBTYPE(sc->iy_ifmedia.ifm_media)) { 520 case IFM_10_5: 521 temp &= ~ (BNC_BIT | TPE_BIT); 522 break; 523 524 case IFM_10_2: 525 temp = (temp & ~TPE_BIT) | BNC_BIT; 526 break; 527 528 case IFM_10_T: 529 temp = (temp & ~BNC_BIT) | TPE_BIT; 530 break; 531 default: 532 ; 533 /* nothing; leave as it is */ 534 } 535 switch (temp & (BNC_BIT | TPE_BIT)) { 536 case BNC_BIT: 537 sc->iy_media = IFM_ETHER | IFM_10_2; 538 break; 539 case TPE_BIT: 540 sc->iy_media = IFM_ETHER | IFM_10_T; 541 break; 542 default: 543 sc->iy_media = IFM_ETHER | IFM_10_5; 544 } 545 546 bus_space_write_1(iot, ioh, MEDIA_SELECT, temp); 547 #ifdef IYDEBUG 548 { 549 char sbuf[128]; 550 551 snprintb(sbuf, sizeof(sbuf), 552 "\020\1LnkInDis\2PolCor\3TPE\4JabberDis\5NoAport\6BNC", 553 temp); 554 printf("changed to 0x%s\n", sbuf); 555 } 556 #endif 557 558 bus_space_write_1(iot, ioh, 0, BANK_SEL(0)); 559 bus_space_write_1(iot, ioh, INT_MASK_REG, ALL_INTS); 560 bus_space_write_1(iot, ioh, 0, BANK_SEL(1)); 561 562 temp = bus_space_read_1(iot, ioh, INT_NO_REG); 563 bus_space_write_1(iot, ioh, INT_NO_REG, (temp & 0xf8) | sc->mappedirq); 564 565 #ifdef IYDEBUG 566 { 567 char sbuf[128]; 568 569 snprintb(sbuf, sizeof(sbuf), 570 "\020\4bad_irq\010flash/boot present", temp); 571 572 printf("%s: int no was %s\n", device_xname(&sc->sc_dev), sbuf); 573 574 temp = bus_space_read_1(iot, ioh, INT_NO_REG); 575 snprintb(sbuf, sizeof(sbuf), 576 "\020\4bad_irq\010flash/boot present", temp); 577 printf("%s: int no now %s\n", device_xname(&sc->sc_dev), sbuf); 578 } 579 #endif 580 581 bus_space_write_1(iot, ioh, RCV_LOWER_LIMIT_REG, 0); 582 bus_space_write_1(iot, ioh, RCV_UPPER_LIMIT_REG, (sc->rx_size -2) >>8); 583 bus_space_write_1(iot, ioh, XMT_LOWER_LIMIT_REG, sc->rx_size >>8); 584 bus_space_write_1(iot, ioh, XMT_UPPER_LIMIT_REG, (sc->sram - 2) >>8); 585 586 temp = bus_space_read_1(iot, ioh, REG1); 587 #ifdef IYDEBUG 588 { 589 char sbuf[128]; 590 591 snprintb(sbuf, sizeof(sbuf), "\020\2WORD_WIDTH\010INT_ENABLE", 592 temp); 593 594 printf("%s: HW access is %s\n", device_xname(&sc->sc_dev), sbuf); 595 } 596 #endif 597 bus_space_write_1(iot, ioh, REG1, temp | INT_ENABLE); /* XXX what about WORD_WIDTH? */ 598 599 #ifdef IYDEBUG 600 { 601 char sbuf[128]; 602 603 temp = bus_space_read_1(iot, ioh, REG1); 604 snprintb(sbuf, sizeof(sbuf), "\020\2WORD_WIDTH\010INT_ENABLE", 605 temp); 606 printf("%s: HW access is %s\n", device_xname(&sc->sc_dev), sbuf); 607 } 608 #endif 609 610 bus_space_write_1(iot, ioh, 0, BANK_SEL(0)); 611 612 bus_space_write_1(iot, ioh, INT_MASK_REG, ALL_INTS & ~(RX_BIT|TX_BIT)); 613 bus_space_write_1(iot, ioh, STATUS_REG, ALL_INTS); /* clear ints */ 614 615 bus_space_write_1(iot, ioh, RCV_COPY_THRESHOLD, 0); 616 617 bus_space_write_2(iot, ioh, RCV_START_LOW, 0); 618 bus_space_write_2(iot, ioh, RCV_STOP_LOW, sc->rx_size - 2); 619 sc->rx_start = 0; 620 621 bus_space_write_1(iot, ioh, 0, SEL_RESET_CMD); 622 delay(200); 623 624 bus_space_write_2(iot, ioh, XMT_ADDR_REG, sc->rx_size); 625 626 sc->tx_start = sc->tx_end = sc->rx_size; 627 sc->tx_last = 0; 628 629 bus_space_write_1(iot, ioh, 0, RCV_ENABLE_CMD); 630 631 ifp->if_flags |= IFF_RUNNING; 632 ifp->if_flags &= ~IFF_OACTIVE; 633 } 634 635 void 636 iystart(ifp) 637 struct ifnet *ifp; 638 { 639 struct iy_softc *sc; 640 641 642 struct mbuf *m0, *m; 643 u_int len, pad, last, end; 644 u_int llen, residual; 645 int avail; 646 char *data; 647 unsigned temp; 648 u_int16_t resval, stat; 649 bus_space_tag_t iot; 650 bus_space_handle_t ioh; 651 652 #ifdef IYDEBUG 653 printf("iystart called\n"); 654 #endif 655 sc = ifp->if_softc; 656 657 if ((ifp->if_flags & (IFF_RUNNING | IFF_OACTIVE)) != IFF_RUNNING) 658 return; 659 660 iy_intr_tx(sc); 661 662 iot = sc->sc_iot; 663 ioh = sc->sc_ioh; 664 665 for (;;) { 666 IFQ_POLL(&ifp->if_snd, m0); 667 if (m0 == NULL) 668 break; 669 #ifdef IYDEBUG 670 printf("%s: trying to write another packet to the hardware\n", 671 device_xname(&sc->sc_dev)); 672 #endif 673 674 /* We need to use m->m_pkthdr.len, so require the header */ 675 if ((m0->m_flags & M_PKTHDR) == 0) 676 panic("iystart: no header mbuf"); 677 678 len = m0->m_pkthdr.len; 679 pad = len & 1; 680 681 #ifdef IYDEBUG 682 printf("%s: length is %d.\n", device_xname(&sc->sc_dev), len); 683 #endif 684 if (len < (ETHER_MIN_LEN - ETHER_CRC_LEN)) { 685 pad = ETHER_MIN_LEN - ETHER_CRC_LEN - len; 686 } 687 688 if (len + pad > ETHER_MAX_LEN) { 689 /* packet is obviously too large: toss it */ 690 ++ifp->if_oerrors; 691 IFQ_DEQUEUE(&ifp->if_snd, m0); 692 m_freem(m0); 693 continue; 694 } 695 696 #if NBPFILTER > 0 697 if (ifp->if_bpf) 698 bpf_mtap(ifp->if_bpf, m0); 699 #endif 700 701 avail = sc->tx_start - sc->tx_end; 702 if (avail <= 0) 703 avail += sc->tx_size; 704 705 #ifdef IYDEBUG 706 printf("%s: avail is %d.\n", device_xname(&sc->sc_dev), avail); 707 #endif 708 /* 709 * we MUST RUN at splnet here --- 710 * XXX todo: or even turn off the boards ints ??? hm... 711 */ 712 713 /* See if there is room to put another packet in the buffer. */ 714 715 if ((len+pad+2*I595_XMT_HDRLEN) > avail) { 716 #ifdef IYDEBUG 717 printf("%s: len = %d, avail = %d, setting OACTIVE\n", 718 device_xname(&sc->sc_dev), len, avail); 719 #endif 720 /* mark interface as full ... */ 721 ifp->if_flags |= IFF_OACTIVE; 722 723 /* and wait for any transmission result */ 724 bus_space_write_1(iot, ioh, 0, BANK_SEL(2)); 725 726 temp = bus_space_read_1(iot, ioh, REG1); 727 bus_space_write_1(iot, ioh, REG1, 728 temp & ~XMT_CHAIN_INT); 729 730 bus_space_write_1(iot, ioh, 0, BANK_SEL(0)); 731 732 return; 733 } 734 735 /* we know it fits in the hardware now, so dequeue it */ 736 IFQ_DEQUEUE(&ifp->if_snd, m0); 737 738 last = sc->tx_end; 739 end = last + pad + len + I595_XMT_HDRLEN; 740 741 if (end >= sc->sram) { 742 if ((sc->sram - last) <= I595_XMT_HDRLEN) { 743 /* keep header in one piece */ 744 last = sc->rx_size; 745 end = last + pad + len + I595_XMT_HDRLEN; 746 } else 747 end -= sc->tx_size; 748 } 749 750 bus_space_write_2(iot, ioh, HOST_ADDR_REG, last); 751 bus_space_write_stream_2(iot, ioh, MEM_PORT_REG, 752 htole16(XMT_CMD)); 753 754 bus_space_write_2(iot, ioh, MEM_PORT_REG, 0); 755 bus_space_write_2(iot, ioh, MEM_PORT_REG, 0); 756 757 bus_space_write_stream_2(iot, ioh, MEM_PORT_REG, 758 htole16(len + pad)); 759 760 residual = resval = 0; 761 762 while ((m = m0)!=0) { 763 data = mtod(m, void *); 764 llen = m->m_len; 765 if (residual) { 766 #ifdef IYDEBUG 767 printf("%s: merging residual with next mbuf.\n", 768 device_xname(&sc->sc_dev)); 769 #endif 770 resval |= *data << 8; 771 bus_space_write_stream_2(iot, ioh, 772 MEM_PORT_REG, resval); 773 --llen; 774 ++data; 775 } 776 /* 777 * XXX ALIGNMENT LOSSAGE HERE. 778 */ 779 if (llen > 1) 780 bus_space_write_multi_stream_2(iot, ioh, 781 MEM_PORT_REG, (u_int16_t *) data, 782 llen>>1); 783 residual = llen & 1; 784 if (residual) { 785 resval = *(data + llen - 1); 786 #ifdef IYDEBUG 787 printf("%s: got odd mbuf to send.\n", 788 device_xname(&sc->sc_dev)); 789 #endif 790 } 791 792 MFREE(m, m0); 793 } 794 795 if (residual) 796 bus_space_write_stream_2(iot, ioh, MEM_PORT_REG, 797 resval); 798 799 pad >>= 1; 800 while (pad-- > 0) 801 bus_space_write_stream_2(iot, ioh, MEM_PORT_REG, 0); 802 803 #ifdef IYDEBUG 804 printf("%s: new last = 0x%x, end = 0x%x.\n", 805 device_xname(&sc->sc_dev), last, end); 806 printf("%s: old start = 0x%x, end = 0x%x, last = 0x%x\n", 807 device_xname(&sc->sc_dev), sc->tx_start, sc->tx_end, sc->tx_last); 808 #endif 809 810 if (sc->tx_start != sc->tx_end) { 811 bus_space_write_2(iot, ioh, HOST_ADDR_REG, 812 sc->tx_last + XMT_COUNT); 813 814 /* 815 * XXX We keep stat in le order, to potentially save 816 * a byte swap. 817 */ 818 stat = bus_space_read_stream_2(iot, ioh, MEM_PORT_REG); 819 820 bus_space_write_2(iot, ioh, HOST_ADDR_REG, 821 sc->tx_last + XMT_CHAIN); 822 823 bus_space_write_stream_2(iot, ioh, MEM_PORT_REG, 824 htole16(last)); 825 826 bus_space_write_stream_2(iot, ioh, MEM_PORT_REG, 827 stat | htole16(CHAIN)); 828 #ifdef IYDEBUG 829 printf("%s: setting 0x%x to 0x%x\n", 830 device_xname(&sc->sc_dev), sc->tx_last + XMT_COUNT, 831 le16toh(stat) | CHAIN); 832 #endif 833 } 834 stat = bus_space_read_2(iot, ioh, MEM_PORT_REG); /* dummy read */ 835 836 /* XXX todo: enable ints here if disabled */ 837 838 ++ifp->if_opackets; 839 840 if (sc->tx_start == sc->tx_end) { 841 bus_space_write_2(iot, ioh, XMT_ADDR_REG, last); 842 bus_space_write_1(iot, ioh, 0, XMT_CMD); 843 sc->tx_start = last; 844 #ifdef IYDEBUG 845 printf("%s: writing 0x%x to XAR and giving XCMD\n", 846 device_xname(&sc->sc_dev), last); 847 #endif 848 } else { 849 bus_space_write_1(iot, ioh, 0, RESUME_XMT_CMD); 850 #ifdef IYDEBUG 851 printf("%s: giving RESUME_XCMD\n", 852 device_xname(&sc->sc_dev)); 853 #endif 854 } 855 sc->tx_last = last; 856 sc->tx_end = end; 857 } 858 /* and wait only for end of transmission chain */ 859 bus_space_write_1(iot, ioh, 0, BANK_SEL(2)); 860 861 temp = bus_space_read_1(iot, ioh, REG1); 862 bus_space_write_1(iot, ioh, REG1, temp | XMT_CHAIN_INT); 863 864 bus_space_write_1(iot, ioh, 0, BANK_SEL(0)); 865 } 866 867 868 static inline void 869 eepromwritebit(iot, ioh, what) 870 bus_space_tag_t iot; 871 bus_space_handle_t ioh; 872 int what; 873 { 874 bus_space_write_1(iot, ioh, EEPROM_REG, what); 875 delay(1); 876 bus_space_write_1(iot, ioh, EEPROM_REG, what|EESK); 877 delay(1); 878 bus_space_write_1(iot, ioh, EEPROM_REG, what); 879 delay(1); 880 } 881 882 static inline int 883 eepromreadbit(iot, ioh) 884 bus_space_tag_t iot; 885 bus_space_handle_t ioh; 886 { 887 int b; 888 889 bus_space_write_1(iot, ioh, EEPROM_REG, EECS|EESK); 890 delay(1); 891 b = bus_space_read_1(iot, ioh, EEPROM_REG); 892 bus_space_write_1(iot, ioh, EEPROM_REG, EECS); 893 delay(1); 894 895 return ((b & EEDO) != 0); 896 } 897 898 static u_int16_t 899 eepromread(iot, ioh, offset) 900 bus_space_tag_t iot; 901 bus_space_handle_t ioh; 902 int offset; 903 { 904 volatile int i; 905 volatile int j; 906 volatile u_int16_t readval; 907 908 bus_space_write_1(iot, ioh, 0, BANK_SEL(2)); 909 delay(1); 910 bus_space_write_1(iot, ioh, EEPROM_REG, EECS); /* XXXX??? */ 911 delay(1); 912 913 eepromwritebit(iot, ioh, EECS|EEDI); 914 eepromwritebit(iot, ioh, EECS|EEDI); 915 eepromwritebit(iot, ioh, EECS); 916 917 for (j=5; j>=0; --j) { 918 if ((offset>>j) & 1) 919 eepromwritebit(iot, ioh, EECS|EEDI); 920 else 921 eepromwritebit(iot, ioh, EECS); 922 } 923 924 for (readval=0, i=0; i<16; ++i) { 925 readval<<=1; 926 readval |= eepromreadbit(iot, ioh); 927 } 928 929 bus_space_write_1(iot, ioh, EEPROM_REG, 0|EESK); 930 delay(1); 931 bus_space_write_1(iot, ioh, EEPROM_REG, 0); 932 933 bus_space_write_1(iot, ioh, COMMAND_REG, BANK_SEL(0)); 934 935 return readval; 936 } 937 938 /* 939 * Device timeout/watchdog routine. Entered if the device neglects to generate 940 * an interrupt after a transmit has been started on it. 941 */ 942 void 943 iywatchdog(ifp) 944 struct ifnet *ifp; 945 { 946 struct iy_softc *sc = ifp->if_softc; 947 948 log(LOG_ERR, "%s: device timeout\n", device_xname(&sc->sc_dev)); 949 ++sc->sc_ethercom.ec_if.if_oerrors; 950 iyreset(sc); 951 } 952 953 /* 954 * What to do upon receipt of an interrupt. 955 */ 956 int 957 iyintr(arg) 958 void *arg; 959 { 960 struct iy_softc *sc; 961 struct ifnet *ifp; 962 bus_space_tag_t iot; 963 bus_space_handle_t ioh; 964 965 u_short status; 966 967 sc = arg; 968 iot = sc->sc_iot; 969 ioh = sc->sc_ioh; 970 971 ifp = &sc->sc_ethercom.ec_if; 972 973 status = bus_space_read_1(iot, ioh, STATUS_REG); 974 #ifdef IYDEBUG 975 if (status & ALL_INTS) { 976 char sbuf[128]; 977 978 snprintb(sbuf, sizeof(sbuf), "\020\1RX_STP\2RX\3TX\4EXEC", 979 status); 980 printf("%s: got interrupt %s", device_xname(&sc->sc_dev), sbuf); 981 982 if (status & EXEC_INT) { 983 snprintb(sbuf, sizeof(sbuf), 984 "\020\6ABORT", bus_space_read_1(iot, ioh, 0)); 985 printf(" event %s\n", sbuf); 986 } else 987 printf("\n"); 988 } 989 #endif 990 if ((status & (RX_INT | TX_INT)) == 0) 991 return 0; 992 993 if (status & RX_INT) { 994 iy_intr_rx(sc); 995 bus_space_write_1(iot, ioh, STATUS_REG, RX_INT); 996 } 997 if (status & TX_INT) { 998 /* Tell feeders we may be able to accept more data... */ 999 ifp->if_flags &= ~IFF_OACTIVE; 1000 /* and get more data. */ 1001 iystart(ifp); 1002 bus_space_write_1(iot, ioh, STATUS_REG, TX_INT); 1003 } 1004 1005 #if NRND > 0 1006 rnd_add_uint32(&sc->rnd_source, status); 1007 #endif 1008 1009 return 1; 1010 } 1011 1012 void 1013 iyget(sc, iot, ioh, rxlen) 1014 struct iy_softc *sc; 1015 bus_space_tag_t iot; 1016 bus_space_handle_t ioh; 1017 int rxlen; 1018 { 1019 struct mbuf *m, *top, **mp; 1020 struct ifnet *ifp; 1021 int len; 1022 1023 ifp = &sc->sc_ethercom.ec_if; 1024 1025 MGETHDR(m, M_DONTWAIT, MT_DATA); 1026 if (m == 0) 1027 goto dropped; 1028 m->m_pkthdr.rcvif = ifp; 1029 m->m_pkthdr.len = rxlen; 1030 len = MHLEN; 1031 top = 0; 1032 mp = ⊤ 1033 1034 while (rxlen > 0) { 1035 if (top) { 1036 MGET(m, M_DONTWAIT, MT_DATA); 1037 if (m == 0) { 1038 m_freem(top); 1039 goto dropped; 1040 } 1041 len = MLEN; 1042 } 1043 if (rxlen >= MINCLSIZE) { 1044 MCLGET(m, M_DONTWAIT); 1045 if ((m->m_flags & M_EXT) == 0) { 1046 m_free(m); 1047 m_freem(top); 1048 goto dropped; 1049 } 1050 len = MCLBYTES; 1051 } 1052 len = min(rxlen, len); 1053 /* 1054 * XXX ALIGNMENT LOSSAGE HERE. 1055 */ 1056 if (len > 1) { 1057 len &= ~1; 1058 1059 bus_space_read_multi_stream_2(iot, ioh, MEM_PORT_REG, 1060 mtod(m, u_int16_t *), len/2); 1061 } else { 1062 #ifdef IYDEBUG 1063 printf("%s: received odd mbuf\n", device_xname(&sc->sc_dev)); 1064 #endif 1065 *(mtod(m, char *)) = bus_space_read_stream_2(iot, ioh, 1066 MEM_PORT_REG); 1067 } 1068 m->m_len = len; 1069 rxlen -= len; 1070 *mp = m; 1071 mp = &m->m_next; 1072 } 1073 1074 if (top == NULL) 1075 return; 1076 1077 /* XXX receive the top here */ 1078 ++ifp->if_ipackets; 1079 1080 1081 #if NBPFILTER > 0 1082 if (ifp->if_bpf) 1083 bpf_mtap(ifp->if_bpf, top); 1084 #endif 1085 (*ifp->if_input)(ifp, top); 1086 return; 1087 1088 dropped: 1089 ++ifp->if_ierrors; 1090 return; 1091 } 1092 1093 void 1094 iy_intr_rx(sc) 1095 struct iy_softc *sc; 1096 { 1097 bus_space_tag_t iot; 1098 bus_space_handle_t ioh; 1099 1100 u_int rxadrs, rxevnt, rxstatus, rxnext, rxlen; 1101 1102 iot = sc->sc_iot; 1103 ioh = sc->sc_ioh; 1104 1105 rxadrs = sc->rx_start; 1106 bus_space_write_2(iot, ioh, HOST_ADDR_REG, rxadrs); 1107 rxevnt = le16toh(bus_space_read_stream_2(iot, ioh, MEM_PORT_REG)); 1108 rxnext = 0; 1109 1110 while (rxevnt == RCV_DONE) { 1111 rxstatus = le16toh(bus_space_read_stream_2(iot, ioh, 1112 MEM_PORT_REG)); 1113 rxnext = le16toh(bus_space_read_stream_2(iot, ioh, 1114 MEM_PORT_REG)); 1115 rxlen = le16toh(bus_space_read_stream_2(iot, ioh, 1116 MEM_PORT_REG)); 1117 #ifdef IYDEBUG 1118 { 1119 char sbuf[128]; 1120 1121 snprintb(sbuf, sizeof(sbuf), 1122 "\020\1RCLD\2IA_MCH\010SHORT\011OVRN\013ALGERR" 1123 "\014CRCERR\015LENERR\016RCVOK\020TYP", rxstatus); 1124 1125 printf("%s: pck at 0x%04x stat %s next 0x%x len 0x%x\n", 1126 device_xname(&sc->sc_dev), rxadrs, sbuf, rxnext, rxlen); 1127 } 1128 #endif 1129 iyget(sc, iot, ioh, rxlen); 1130 1131 /* move stop address */ 1132 bus_space_write_2(iot, ioh, RCV_STOP_LOW, 1133 rxnext == 0 ? sc->rx_size - 2 : rxnext - 2); 1134 1135 bus_space_write_2(iot, ioh, HOST_ADDR_REG, rxnext); 1136 rxadrs = rxnext; 1137 rxevnt = le16toh(bus_space_read_stream_2(iot, ioh, 1138 MEM_PORT_REG)); 1139 } 1140 sc->rx_start = rxnext; 1141 } 1142 1143 void 1144 iy_intr_tx(sc) 1145 struct iy_softc *sc; 1146 { 1147 bus_space_tag_t iot; 1148 bus_space_handle_t ioh; 1149 struct ifnet *ifp; 1150 u_int txstatus, txstat2, txlen, txnext; 1151 1152 ifp = &sc->sc_ethercom.ec_if; 1153 iot = sc->sc_iot; 1154 ioh = sc->sc_ioh; 1155 1156 while (sc->tx_start != sc->tx_end) { 1157 bus_space_write_2(iot, ioh, HOST_ADDR_REG, sc->tx_start); 1158 txstatus = le16toh(bus_space_read_stream_2(iot, ioh, 1159 MEM_PORT_REG)); 1160 1161 if ((txstatus & (TX_DONE|CMD_MASK)) != (TX_DONE|XMT_CMD)) 1162 break; 1163 1164 txstat2 = le16toh(bus_space_read_stream_2(iot, ioh, 1165 MEM_PORT_REG)); 1166 txnext = le16toh(bus_space_read_stream_2(iot, ioh, 1167 MEM_PORT_REG)); 1168 txlen = le16toh(bus_space_read_stream_2(iot, ioh, 1169 MEM_PORT_REG)); 1170 #ifdef IYDEBUG 1171 { 1172 char sbuf[128]; 1173 1174 snprintb(sbuf, sizeof(sbuf), 1175 "\020\6MAX_COL\7HRT_BEAT\010TX_DEF" 1176 "\011UND_RUN\012JERR\013LST_CRS" 1177 "\014LTCOL\016TX_OK\020COLL", txstat2) 1178 1179 printf("txstat 0x%x stat2 0x%s next 0x%x len 0x%x\n", 1180 txstatus, sbuf, txnext, txlen); 1181 } 1182 #endif 1183 if (txlen & CHAIN) 1184 sc->tx_start = txnext; 1185 else 1186 sc->tx_start = sc->tx_end; 1187 ifp->if_flags &= ~IFF_OACTIVE; 1188 1189 if (txstat2 & 0x0020) 1190 ifp->if_collisions += 16; 1191 else 1192 ifp->if_collisions += txstat2 & 0x000f; 1193 1194 if ((txstat2 & 0x2000) == 0) 1195 ++ifp->if_oerrors; 1196 } 1197 } 1198 1199 int 1200 iyioctl(struct ifnet *ifp, u_long cmd, void *data) 1201 { 1202 struct iy_softc *sc; 1203 struct ifaddr *ifa; 1204 struct ifreq *ifr; 1205 int s, error = 0; 1206 1207 sc = ifp->if_softc; 1208 ifa = (struct ifaddr *)data; 1209 ifr = (struct ifreq *)data; 1210 1211 #ifdef IYDEBUG 1212 printf("iyioctl called with ifp %p (%s) cmd 0x%lx data %p\n", 1213 ifp, ifp->if_xname, cmd, data); 1214 #endif 1215 1216 s = splnet(); 1217 1218 switch (cmd) { 1219 1220 case SIOCINITIFADDR: 1221 ifp->if_flags |= IFF_UP; 1222 1223 iyinit(sc); 1224 switch (ifa->ifa_addr->sa_family) { 1225 #ifdef INET 1226 case AF_INET: 1227 arp_ifinit(ifp, ifa); 1228 break; 1229 #endif 1230 default: 1231 break; 1232 } 1233 break; 1234 1235 case SIOCSIFFLAGS: 1236 if ((error = ifioctl_common(ifp, cmd, data)) != 0) 1237 break; 1238 sc->promisc = ifp->if_flags & (IFF_PROMISC | IFF_ALLMULTI); 1239 /* XXX re-use ether_ioctl() */ 1240 switch (ifp->if_flags & (IFF_UP|IFF_RUNNING)) { 1241 case IFF_RUNNING: 1242 /* 1243 * If interface is marked down and it is running, then 1244 * stop it. 1245 */ 1246 iystop(sc); 1247 ifp->if_flags &= ~IFF_RUNNING; 1248 break; 1249 case IFF_UP: 1250 /* 1251 * If interface is marked up and it is stopped, then 1252 * start it. 1253 */ 1254 iyinit(sc); 1255 break; 1256 default: 1257 /* 1258 * Reset the interface to pick up changes in any other 1259 * flags that affect hardware registers. 1260 */ 1261 iystop(sc); 1262 iyinit(sc); 1263 break; 1264 } 1265 #ifdef IYDEBUGX 1266 if (ifp->if_flags & IFF_DEBUG) 1267 sc->sc_debug = IFY_ALL; 1268 else 1269 sc->sc_debug = 0; 1270 #endif 1271 break; 1272 1273 case SIOCADDMULTI: 1274 case SIOCDELMULTI: 1275 if ((error = ether_ioctl(ifp, cmd, data)) == ENETRESET) { 1276 /* 1277 * Multicast list has changed; set the hardware filter 1278 * accordingly. 1279 */ 1280 if (ifp->if_flags & IFF_RUNNING) { 1281 /* XXX can't make it work otherwise */ 1282 iyreset(sc); 1283 iy_mc_reset(sc); 1284 } 1285 error = 0; 1286 } 1287 break; 1288 1289 case SIOCSIFMEDIA: 1290 case SIOCGIFMEDIA: 1291 error = ifmedia_ioctl(ifp, ifr, &sc->iy_ifmedia, cmd); 1292 break; 1293 default: 1294 error = ether_ioctl(ifp, cmd, data); 1295 } 1296 splx(s); 1297 return error; 1298 } 1299 1300 int 1301 iy_mediachange(ifp) 1302 struct ifnet *ifp; 1303 { 1304 struct iy_softc *sc = ifp->if_softc; 1305 1306 if (IFM_TYPE(sc->iy_ifmedia.ifm_media) != IFM_ETHER) 1307 return EINVAL; 1308 switch(IFM_SUBTYPE(sc->iy_ifmedia.ifm_media)) { 1309 case IFM_10_5: 1310 case IFM_10_2: 1311 case IFM_10_T: 1312 case IFM_AUTO: 1313 iystop(sc); 1314 iyinit(sc); 1315 return 0; 1316 default: 1317 return EINVAL; 1318 } 1319 } 1320 1321 void 1322 iy_mediastatus(ifp, ifmr) 1323 struct ifnet *ifp; 1324 struct ifmediareq *ifmr; 1325 { 1326 struct iy_softc *sc = ifp->if_softc; 1327 1328 ifmr->ifm_active = sc->iy_media; 1329 ifmr->ifm_status = IFM_AVALID | IFM_ACTIVE; 1330 } 1331 1332 1333 static void 1334 iy_mc_setup(sc) 1335 struct iy_softc *sc; 1336 { 1337 struct ether_multi *enm; 1338 struct ether_multistep step; 1339 struct ethercom *ecp; 1340 struct ifnet *ifp; 1341 bus_space_tag_t iot; 1342 bus_space_handle_t ioh; 1343 int avail, last /*, end*/ , len; 1344 int timeout; 1345 volatile u_int16_t dum; 1346 u_int8_t temp; 1347 1348 1349 ecp = &sc->sc_ethercom; 1350 ifp = &ecp->ec_if; 1351 1352 iot = sc->sc_iot; 1353 ioh = sc->sc_ioh; 1354 1355 len = 6 * ecp->ec_multicnt; 1356 1357 avail = sc->tx_start - sc->tx_end; 1358 if (avail <= 0) 1359 avail += sc->tx_size; 1360 if (ifp->if_flags & IFF_DEBUG) 1361 printf("%s: iy_mc_setup called, %d addresses, " 1362 "%d/%d bytes needed/avail\n", ifp->if_xname, 1363 ecp->ec_multicnt, len + I595_XMT_HDRLEN, avail); 1364 1365 last = sc->rx_size; 1366 1367 bus_space_write_1(iot, ioh, 0, BANK_SEL(2)); 1368 bus_space_write_1(iot, ioh, RECV_MODES_REG, MATCH_BRDCST); 1369 /* XXX VOODOO */ 1370 temp = bus_space_read_1(iot, ioh, MEDIA_SELECT); 1371 bus_space_write_1(iot, ioh, MEDIA_SELECT, temp); 1372 /* XXX END OF VOODOO */ 1373 bus_space_write_1(iot, ioh, 0, BANK_SEL(0)); 1374 bus_space_write_2(iot, ioh, HOST_ADDR_REG, last); 1375 bus_space_write_stream_2(iot, ioh, MEM_PORT_REG, htole16(MC_SETUP_CMD)); 1376 bus_space_write_2(iot, ioh, MEM_PORT_REG, 0); 1377 bus_space_write_2(iot, ioh, MEM_PORT_REG, 0); 1378 bus_space_write_stream_2(iot, ioh, MEM_PORT_REG, htole16(len)); 1379 1380 ETHER_FIRST_MULTI(step, ecp, enm); 1381 while(enm) { 1382 /* 1383 * XXX ALIGNMENT LOSSAGE HERE? 1384 */ 1385 bus_space_write_multi_stream_2(iot, ioh, MEM_PORT_REG, 1386 (u_int16_t *) enm->enm_addrlo, 3); 1387 1388 ETHER_NEXT_MULTI(step, enm); 1389 } 1390 dum = bus_space_read_2(iot, ioh, MEM_PORT_REG); /* dummy read */ 1391 bus_space_write_2(iot, ioh, XMT_ADDR_REG, last); 1392 bus_space_write_1(iot, ioh, 0, MC_SETUP_CMD); 1393 1394 1395 sc->tx_start = sc->rx_size; 1396 sc->tx_end = sc->rx_size + I595_XMT_HDRLEN + len; 1397 1398 for (timeout=0; timeout<100; timeout++) { 1399 DELAY(2); 1400 if ((bus_space_read_1(iot, ioh, STATUS_REG) & EXEC_INT) == 0) 1401 continue; 1402 1403 temp = bus_space_read_1(iot, ioh, 0); 1404 bus_space_write_1(iot, ioh, STATUS_REG, EXEC_INT); 1405 #ifdef DIAGNOSTIC 1406 if (temp & 0x20) { 1407 aprint_error_dev(&sc->sc_dev, "mc setup failed, %d usec\n", 1408 timeout * 2); 1409 } else if (((temp & 0x0f) == 0x03) && 1410 (ifp->if_flags & IFF_DEBUG)) { 1411 printf("%s: mc setup done, %d usec\n", 1412 device_xname(&sc->sc_dev), timeout * 2); 1413 } 1414 #endif 1415 break; 1416 } 1417 sc->tx_start = sc->tx_end; 1418 ifp->if_flags &= ~IFF_OACTIVE; 1419 1420 } 1421 1422 static void 1423 iy_mc_reset(sc) 1424 struct iy_softc *sc; 1425 { 1426 struct ether_multi *enm; 1427 struct ether_multistep step; 1428 struct ethercom *ecp; 1429 struct ifnet *ifp; 1430 bus_space_tag_t iot; 1431 bus_space_handle_t ioh; 1432 u_int16_t temp; 1433 1434 ecp = &sc->sc_ethercom; 1435 ifp = &ecp->ec_if; 1436 1437 iot = sc->sc_iot; 1438 ioh = sc->sc_ioh; 1439 1440 if (ecp->ec_multicnt > 63) { 1441 ifp->if_flags |= IFF_ALLMULTI; 1442 1443 } else if (ecp->ec_multicnt > 0) { 1444 /* 1445 * Step through the list of addresses. 1446 */ 1447 ETHER_FIRST_MULTI(step, ecp, enm); 1448 while(enm) { 1449 if (memcmp(enm->enm_addrlo, enm->enm_addrhi, 6) != 0) { 1450 ifp->if_flags |= IFF_ALLMULTI; 1451 goto setupmulti; 1452 } 1453 ETHER_NEXT_MULTI(step, enm); 1454 } 1455 /* OK, we really need to do it now: */ 1456 #if 0 1457 if ((ifp->if_flags & (IFF_RUNNING | IFF_OACTIVE)) 1458 != IFF_RUNNING) { 1459 ifp->if_flags |= IFF_OACTIVE; 1460 sc->want_mc_setup = 1; 1461 return; 1462 } 1463 #endif 1464 iy_mc_setup(sc); 1465 } else { 1466 ifp->if_flags &= ~IFF_ALLMULTI; 1467 } 1468 1469 setupmulti: 1470 bus_space_write_1(iot, ioh, 0, BANK_SEL(2)); 1471 if (ifp->if_flags & (IFF_PROMISC|IFF_ALLMULTI)) { 1472 temp = MATCH_ALL; 1473 } else 1474 temp = MATCH_BRDCST; 1475 1476 bus_space_write_1(iot, ioh, RECV_MODES_REG, temp); 1477 /* XXX VOODOO */ 1478 temp = bus_space_read_1(iot, ioh, MEDIA_SELECT); 1479 bus_space_write_1(iot, ioh, MEDIA_SELECT, temp); 1480 /* XXX END OF VOODOO */ 1481 1482 /* XXX TBD: setup hardware for all multicasts */ 1483 bus_space_write_1(iot, ioh, 0, BANK_SEL(0)); 1484 return; 1485 } 1486 1487 #ifdef IYDEBUGX 1488 void 1489 print_rbd(rbd) 1490 volatile struct ie_recv_buf_desc *rbd; 1491 { 1492 printf("RBD at %08lx:\nactual %04x, next %04x, buffer %08x\n" 1493 "length %04x, mbz %04x\n", (u_long)rbd, rbd->ie_rbd_actual, 1494 rbd->ie_rbd_next, rbd->ie_rbd_buffer, rbd->ie_rbd_length, 1495 rbd->mbz); 1496 } 1497 #endif 1498 1499 void 1500 iyprobemem(sc) 1501 struct iy_softc *sc; 1502 { 1503 bus_space_tag_t iot; 1504 bus_space_handle_t ioh; 1505 int testing; 1506 1507 iot = sc->sc_iot; 1508 ioh = sc->sc_ioh; 1509 1510 bus_space_write_1(iot, ioh, COMMAND_REG, BANK_SEL(0)); 1511 delay(1); 1512 bus_space_write_2(iot, ioh, HOST_ADDR_REG, 4096-2); 1513 bus_space_write_2(iot, ioh, MEM_PORT_REG, 0); 1514 1515 for (testing=65536; testing >= 4096; testing >>= 1) { 1516 bus_space_write_2(iot, ioh, HOST_ADDR_REG, testing-2); 1517 bus_space_write_2(iot, ioh, MEM_PORT_REG, 0xdead); 1518 bus_space_write_2(iot, ioh, HOST_ADDR_REG, testing-2); 1519 if (bus_space_read_2(iot, ioh, MEM_PORT_REG) != 0xdead) { 1520 #ifdef IYMEMDEBUG 1521 printf("%s: Didn't keep 0xdead at 0x%x\n", 1522 device_xname(&sc->sc_dev), testing-2); 1523 #endif 1524 continue; 1525 } 1526 1527 bus_space_write_2(iot, ioh, HOST_ADDR_REG, testing-2); 1528 bus_space_write_2(iot, ioh, MEM_PORT_REG, 0xbeef); 1529 bus_space_write_2(iot, ioh, HOST_ADDR_REG, testing-2); 1530 if (bus_space_read_2(iot, ioh, MEM_PORT_REG) != 0xbeef) { 1531 #ifdef IYMEMDEBUG 1532 printf("%s: Didn't keep 0xbeef at 0x%x\n", 1533 device_xname(&sc->sc_dev), testing-2); 1534 #endif 1535 continue; 1536 } 1537 1538 bus_space_write_2(iot, ioh, HOST_ADDR_REG, 0); 1539 bus_space_write_2(iot, ioh, MEM_PORT_REG, 0); 1540 bus_space_write_2(iot, ioh, HOST_ADDR_REG, testing >> 1); 1541 bus_space_write_2(iot, ioh, MEM_PORT_REG, testing >> 1); 1542 bus_space_write_2(iot, ioh, HOST_ADDR_REG, 0); 1543 if (bus_space_read_2(iot, ioh, MEM_PORT_REG) == (testing >> 1)) { 1544 #ifdef IYMEMDEBUG 1545 printf("%s: 0x%x alias of 0x0\n", 1546 device_xname(&sc->sc_dev), testing >> 1); 1547 #endif 1548 continue; 1549 } 1550 1551 break; 1552 } 1553 1554 sc->sram = testing; 1555 1556 switch(testing) { 1557 case 65536: 1558 /* 4 NFS packets + overhead RX, 2 NFS + overhead TX */ 1559 sc->rx_size = 44*1024; 1560 break; 1561 1562 case 32768: 1563 /* 2 NFS packets + overhead RX, 1 NFS + overhead TX */ 1564 sc->rx_size = 22*1024; 1565 break; 1566 1567 case 16384: 1568 /* 1 NFS packet + overhead RX, 4 big packets TX */ 1569 sc->rx_size = 10*1024; 1570 break; 1571 default: 1572 sc->rx_size = testing/2; 1573 break; 1574 } 1575 sc->tx_size = testing - sc->rx_size; 1576 } 1577 1578 static int 1579 eepromreadall(iot, ioh, wordp, maxi) 1580 bus_space_tag_t iot; 1581 bus_space_handle_t ioh; 1582 u_int16_t *wordp; 1583 int maxi; 1584 { 1585 int i; 1586 u_int16_t checksum, tmp; 1587 1588 checksum = 0; 1589 1590 for (i=0; i<EEPP_LENGTH; ++i) { 1591 tmp = eepromread(iot, ioh, i); 1592 checksum += tmp; 1593 if (i<maxi) 1594 wordp[i] = tmp; 1595 } 1596 1597 if (checksum != EEPP_CHKSUM) { 1598 #ifdef IYDEBUG 1599 printf("wrong EEPROM checksum 0x%x should be 0x%x\n", 1600 checksum, EEPP_CHKSUM); 1601 #endif 1602 return 1; 1603 } 1604 return 0; 1605 } 1606
Indexes created Sat Sep 27 14:09:57 GMT 2025