if_iy.c revision 1.83
1 /* $NetBSD: if_iy.c,v 1.83 2008/12/17 15:41:24 cegger Exp $ */ 2 /* #define IYDEBUG */ 3 /* #define IYMEMDEBUG */ 4 5 /*- 6 * Copyright (c) 1996,2001 The NetBSD Foundation, Inc. 7 * All rights reserved. 8 * 9 * This code is derived from software contributed to The NetBSD Foundation 10 * by Ignatios Souvatzis. 11 * 12 * Redistribution and use in source and binary forms, with or without 13 * modification, are permitted provided that the following conditions 14 * are met: 15 * 1. Redistributions of source code must retain the above copyright 16 * notice, this list of conditions and the following disclaimer. 17 * 2. Redistributions in binary form must reproduce the above copyright 18 * notice, this list of conditions and the following disclaimer in the 19 * documentation and/or other materials provided with the distribution. 20 * 21 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 22 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 23 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 24 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 25 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 26 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 27 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 28 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 29 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 30 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 31 * POSSIBILITY OF SUCH DAMAGE. 32 */ 33 34 /* 35 * Supported hardware: 36 * 37 * - Intel EtherExpress Pro/10. 38 * - possibly other boards using the i82595 chip and no special tweaks. 39 */ 40 41 #include <sys/cdefs.h> 42 __KERNEL_RCSID(0, "$NetBSD: if_iy.c,v 1.83 2008/12/17 15:41:24 cegger Exp $"); 43 44 #include "opt_inet.h" 45 #include "bpfilter.h" 46 #include "rnd.h" 47 48 #include <sys/param.h> 49 #include <sys/systm.h> 50 #include <sys/mbuf.h> 51 #include <sys/buf.h> 52 #include <sys/protosw.h> 53 #include <sys/socket.h> 54 #include <sys/ioctl.h> 55 #include <sys/errno.h> 56 #include <sys/syslog.h> 57 #include <sys/device.h> 58 #include <sys/endian.h> 59 #if NRND > 0 60 #include <sys/rnd.h> 61 #endif 62 63 #include <net/if.h> 64 #include <net/if_types.h> 65 #include <net/if_dl.h> 66 67 #include <net/if_ether.h> 68 69 #if NBPFILTER > 0 70 #include <net/bpf.h> 71 #include <net/bpfdesc.h> 72 #endif 73 74 #ifdef INET 75 #include <netinet/in.h> 76 #include <netinet/in_systm.h> 77 #include <netinet/in_var.h> 78 #include <netinet/ip.h> 79 #include <netinet/if_inarp.h> 80 #endif 81 82 83 #if defined(SIOCSIFMEDIA) 84 #include <net/if_media.h> 85 #endif 86 87 #include <sys/cpu.h> 88 #include <sys/bus.h> 89 #include <sys/intr.h> 90 91 #include <dev/isa/isareg.h> 92 #include <dev/isa/isavar.h> 93 #include <dev/ic/i82595reg.h> 94 95 /* XXX why isn't this centralized? */ 96 #ifndef __BUS_SPACE_HAS_STREAM_METHODS 97 #define bus_space_write_stream_2 bus_space_write_2 98 #define bus_space_write_multi_stream_2 bus_space_write_multi_2 99 #define bus_space_read_stream_2 bus_space_read_2 100 #define bus_space_read_multi_stream_2 bus_space_read_multi_2 101 #endif /* __BUS_SPACE_HAS_STREAM_METHODS */ 102 103 /* 104 * Ethernet status, per interface. 105 */ 106 struct iy_softc { 107 struct device sc_dev; 108 void *sc_ih; 109 110 bus_space_tag_t sc_iot; 111 bus_space_handle_t sc_ioh; 112 113 struct ethercom sc_ethercom; 114 115 struct ifmedia iy_ifmedia; 116 int iy_media; 117 118 int mappedirq; 119 120 int hard_vers; 121 122 int promisc; 123 124 int sram, tx_size, rx_size; 125 126 int tx_start, tx_end, tx_last; 127 int rx_start; 128 129 int doing_mc_setup; 130 #ifdef IYDEBUG 131 int sc_debug; 132 #endif 133 134 #if NRND > 0 135 rndsource_element_t rnd_source; 136 #endif 137 }; 138 139 void iywatchdog(struct ifnet *); 140 int iyioctl(struct ifnet *, u_long, void *); 141 int iyintr(void *); 142 void iyinit(struct iy_softc *); 143 void iystop(struct iy_softc *); 144 void iystart(struct ifnet *); 145 146 void iy_intr_rx(struct iy_softc *); 147 void iy_intr_tx(struct iy_softc *); 148 149 void iyreset(struct iy_softc *); 150 void iy_readframe(struct iy_softc *, int); 151 void iy_drop_packet_buffer(struct iy_softc *); 152 void iy_find_mem_size(struct iy_softc *); 153 void iyrint(struct iy_softc *); 154 void iytint(struct iy_softc *); 155 void iyxmit(struct iy_softc *); 156 static void iy_mc_setup(struct iy_softc *); 157 static void iy_mc_reset(struct iy_softc *); 158 void iyget(struct iy_softc *, bus_space_tag_t, bus_space_handle_t, int); 159 void iyprobemem(struct iy_softc *); 160 static inline void eepromwritebit(bus_space_tag_t, bus_space_handle_t, int); 161 static inline int eepromreadbit(bus_space_tag_t, bus_space_handle_t); 162 163 #ifdef IYDEBUGX 164 void print_rbd(volatile struct iy_recv_buf_desc *); 165 166 int in_ifrint = 0; 167 int in_iftint = 0; 168 #endif 169 170 int iy_mediachange(struct ifnet *); 171 void iy_mediastatus(struct ifnet *, struct ifmediareq *); 172 173 int iyprobe(struct device *, struct cfdata *, void *); 174 void iyattach(struct device *, struct device *, void *); 175 176 static u_int16_t eepromread(bus_space_tag_t, bus_space_handle_t, int); 177 178 static int eepromreadall(bus_space_tag_t, bus_space_handle_t, u_int16_t *, 179 int); 180 181 CFATTACH_DECL(iy, sizeof(struct iy_softc), 182 iyprobe, iyattach, NULL, NULL); 183 184 static u_int8_t eepro_irqmap[] = EEPP_INTMAP; 185 static u_int8_t eepro_revirqmap[] = EEPP_RINTMAP; 186 187 int 188 iyprobe(struct device *parent, struct cfdata *match, 189 void *aux) 190 { 191 struct isa_attach_args *ia = aux; 192 u_int16_t eaddr[8]; 193 bus_space_tag_t iot; 194 bus_space_handle_t ioh; 195 u_int8_t c, d; 196 int irq; 197 198 if (ia->ia_nio < 1) 199 return (0); 200 if (ia->ia_nirq < 1) 201 return (0); 202 203 if (ISA_DIRECT_CONFIG(ia)) 204 return (0); 205 206 iot = ia->ia_iot; 207 208 if (ia->ia_io[0].ir_addr == ISA_UNKNOWN_PORT) 209 return 0; 210 211 if (bus_space_map(iot, ia->ia_io[0].ir_addr, 16, 0, &ioh)) 212 return 0; 213 214 /* try to find the round robin sig: */ 215 216 c = bus_space_read_1(iot, ioh, ID_REG); 217 if ((c & ID_REG_MASK) != ID_REG_SIG) 218 goto out; 219 220 d = bus_space_read_1(iot, ioh, ID_REG); 221 if ((d & ID_REG_MASK) != ID_REG_SIG) 222 goto out; 223 224 if (((d-c) & R_ROBIN_BITS) != 0x40) 225 goto out; 226 227 d = bus_space_read_1(iot, ioh, ID_REG); 228 if ((d & ID_REG_MASK) != ID_REG_SIG) 229 goto out; 230 231 if (((d-c) & R_ROBIN_BITS) != 0x80) 232 goto out; 233 234 d = bus_space_read_1(iot, ioh, ID_REG); 235 if ((d & ID_REG_MASK) != ID_REG_SIG) 236 goto out; 237 238 if (((d-c) & R_ROBIN_BITS) != 0xC0) 239 goto out; 240 241 d = bus_space_read_1(iot, ioh, ID_REG); 242 if ((d & ID_REG_MASK) != ID_REG_SIG) 243 goto out; 244 245 if (((d-c) & R_ROBIN_BITS) != 0x00) 246 goto out; 247 248 #ifdef IYDEBUG 249 printf("iyprobe verified working ID reg.\n"); 250 #endif 251 252 if (eepromreadall(iot, ioh, eaddr, 8)) 253 goto out; 254 255 if (ia->ia_irq[0].ir_irq == ISA_UNKNOWN_IRQ) 256 irq = eepro_irqmap[eaddr[EEPPW1] & EEPP_Int]; 257 else 258 irq = ia->ia_irq[0].ir_irq; 259 260 if (irq >= sizeof(eepro_revirqmap)) 261 goto out; 262 263 if (eepro_revirqmap[irq] == 0xff) 264 goto out; 265 266 /* now lets reset the chip */ 267 268 bus_space_write_1(iot, ioh, COMMAND_REG, RESET_CMD); 269 delay(200); 270 271 ia->ia_nio = 1; 272 ia->ia_io[0].ir_size = 16; 273 274 ia->ia_nirq = 1; 275 ia->ia_irq[0].ir_irq = irq; 276 277 ia->ia_niomem = 0; 278 ia->ia_ndrq = 0; 279 280 bus_space_unmap(iot, ioh, 16); 281 return 1; /* found */ 282 out: 283 bus_space_unmap(iot, ioh, 16); 284 return 0; 285 } 286 287 void 288 iyattach(struct device *parent, struct device *self, void *aux) 289 { 290 struct iy_softc *sc = (void *)self; 291 struct isa_attach_args *ia = aux; 292 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 293 bus_space_tag_t iot; 294 bus_space_handle_t ioh; 295 unsigned temp; 296 u_int16_t eaddr[8]; 297 u_int8_t myaddr[ETHER_ADDR_LEN]; 298 int eirq; 299 300 iot = ia->ia_iot; 301 302 if (bus_space_map(iot, ia->ia_io[0].ir_addr, 16, 0, &ioh)) { 303 printf(": can't map i/o space\n"); 304 return; 305 } 306 307 sc->sc_iot = iot; 308 sc->sc_ioh = ioh; 309 310 sc->mappedirq = eepro_revirqmap[ia->ia_irq[0].ir_irq]; 311 312 /* now let's reset the chip */ 313 314 bus_space_write_1(iot, ioh, COMMAND_REG, RESET_CMD); 315 delay(200); 316 317 iyprobemem(sc); 318 319 strlcpy(ifp->if_xname, device_xname(&sc->sc_dev), IFNAMSIZ); 320 ifp->if_softc = sc; 321 ifp->if_start = iystart; 322 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_NOTRAILERS 323 | IFF_MULTICAST; 324 325 sc->doing_mc_setup = 0; 326 327 ifp->if_ioctl = iyioctl; 328 ifp->if_watchdog = iywatchdog; 329 330 IFQ_SET_READY(&ifp->if_snd); 331 332 (void)eepromreadall(iot, ioh, eaddr, 8); 333 sc->hard_vers = eaddr[EEPW6] & EEPP_BoardRev; 334 335 #ifdef DIAGNOSTICS 336 if ((eaddr[EEPPEther0] != 337 eepromread(iot, ioh, EEPPEther0a)) && 338 (eaddr[EEPPEther1] != 339 eepromread(iot, ioh, EEPPEther1a)) && 340 (eaddr[EEPPEther2] != 341 eepromread(iot, ioh, EEPPEther2a))) 342 343 printf("EEPROM Ethernet address differs from copy\n"); 344 #endif 345 346 myaddr[1] = eaddr[EEPPEther0] & 0xFF; 347 myaddr[0] = eaddr[EEPPEther0] >> 8; 348 myaddr[3] = eaddr[EEPPEther1] & 0xFF; 349 myaddr[2] = eaddr[EEPPEther1] >> 8; 350 myaddr[5] = eaddr[EEPPEther2] & 0xFF; 351 myaddr[4] = eaddr[EEPPEther2] >> 8; 352 353 ifmedia_init(&sc->iy_ifmedia, 0, iy_mediachange, iy_mediastatus); 354 ifmedia_add(&sc->iy_ifmedia, IFM_ETHER | IFM_10_2, 0, NULL); 355 ifmedia_add(&sc->iy_ifmedia, IFM_ETHER | IFM_10_5, 0, NULL); 356 ifmedia_add(&sc->iy_ifmedia, IFM_ETHER | IFM_10_T, 0, NULL); 357 ifmedia_add(&sc->iy_ifmedia, IFM_ETHER | IFM_AUTO, 0, NULL); 358 ifmedia_set(&sc->iy_ifmedia, IFM_ETHER | IFM_AUTO); 359 /* Attach the interface. */ 360 if_attach(ifp); 361 ether_ifattach(ifp, myaddr); 362 printf(": address %s, rev. %d, %d kB\n", 363 ether_sprintf(myaddr), 364 sc->hard_vers, sc->sram/1024); 365 366 eirq = eepro_irqmap[eaddr[EEPPW1] & EEPP_Int]; 367 if (eirq != ia->ia_irq[0].ir_irq) 368 printf("%s: EEPROM irq setting %d ignored\n", 369 device_xname(&sc->sc_dev), eirq); 370 371 sc->sc_ih = isa_intr_establish(ia->ia_ic, ia->ia_irq[0].ir_irq, 372 IST_EDGE, IPL_NET, iyintr, sc); 373 374 #if NRND > 0 375 rnd_attach_source(&sc->rnd_source, device_xname(&sc->sc_dev), 376 RND_TYPE_NET, 0); 377 #endif 378 379 temp = bus_space_read_1(iot, ioh, INT_NO_REG); 380 bus_space_write_1(iot, ioh, INT_NO_REG, (temp & 0xf8) | sc->mappedirq); 381 } 382 383 void 384 iystop(sc) 385 struct iy_softc *sc; 386 { 387 bus_space_tag_t iot; 388 bus_space_handle_t ioh; 389 #ifdef IYDEBUG 390 u_int p, v; 391 #endif 392 393 iot = sc->sc_iot; 394 ioh = sc->sc_ioh; 395 396 bus_space_write_1(iot, ioh, COMMAND_REG, RCV_DISABLE_CMD); 397 398 bus_space_write_1(iot, ioh, INT_MASK_REG, ALL_INTS); 399 bus_space_write_1(iot, ioh, STATUS_REG, ALL_INTS); 400 401 bus_space_write_1(iot, ioh, COMMAND_REG, RESET_CMD); 402 delay(200); 403 #ifdef IYDEBUG 404 printf("%s: dumping tx chain (st 0x%x end 0x%x last 0x%x)\n", 405 device_xname(&sc->sc_dev), sc->tx_start, sc->tx_end, sc->tx_last); 406 p = sc->tx_last; 407 if (!p) 408 p = sc->tx_start; 409 do { 410 char sbuf[128]; 411 412 bus_space_write_2(iot, ioh, HOST_ADDR_REG, p); 413 414 v = le16toh(bus_space_read_stream_2(iot, ioh, MEM_PORT_REG)); 415 snprintb(sbuf, sizeof(sbuf), "\020\006Ab\010Dn", v); 416 printf("0x%04x: %s ", p, sbuf); 417 418 v = le16toh(bus_space_read_stream_2(iot, ioh, MEM_PORT_REG)); 419 snprintb(sbuf, sizeof(sbuf), 420 "\020\6MAX_COL\7HRT_BEAT\010TX_DEF\011UND_RUN" 421 "\012JERR\013LST_CRS\014LTCOL\016TX_OK\020COLL", v); 422 printf("0x%s", sbuf); 423 424 p = le16toh(bus_space_read_stream_2(iot, ioh, MEM_PORT_REG)); 425 printf(" 0x%04x", p); 426 427 v = le16toh(bus_space_read_stream_2(iot, ioh, MEM_PORT_REG)); 428 snprintb(sbuf, sizeof(sbuf), "\020\020Ch", v); 429 printf(" 0x%s\n", sbuf); 430 431 } while (v & 0x8000); 432 #endif 433 sc->tx_start = sc->tx_end = sc->rx_size; 434 sc->tx_last = 0; 435 sc->sc_ethercom.ec_if.if_flags &= ~(IFF_RUNNING|IFF_OACTIVE); 436 } 437 438 void 439 iyreset(sc) 440 struct iy_softc *sc; 441 { 442 int s; 443 s = splnet(); 444 iystop(sc); 445 iyinit(sc); 446 splx(s); 447 } 448 449 void 450 iyinit(sc) 451 struct iy_softc *sc; 452 { 453 int i; 454 unsigned temp; 455 struct ifnet *ifp; 456 bus_space_tag_t iot; 457 bus_space_handle_t ioh; 458 459 iot = sc->sc_iot; 460 ioh = sc->sc_ioh; 461 462 ifp = &sc->sc_ethercom.ec_if; 463 #ifdef IYDEBUG 464 printf("ifp is %p\n", ifp); 465 #endif 466 467 bus_space_write_1(iot, ioh, 0, BANK_SEL(2)); 468 469 temp = bus_space_read_1(iot, ioh, EEPROM_REG); 470 if (temp & 0x10) 471 bus_space_write_1(iot, ioh, EEPROM_REG, temp & ~0x10); 472 473 for (i=0; i<6; ++i) { 474 bus_space_write_1(iot, ioh, I_ADD(i), CLLADDR(ifp->if_sadl)[i]); 475 } 476 477 temp = bus_space_read_1(iot, ioh, REG1); 478 bus_space_write_1(iot, ioh, REG1, 479 temp | /* XMT_CHAIN_INT | XMT_CHAIN_ERRSTOP | */ RCV_DISCARD_BAD); 480 481 if (ifp->if_flags & (IFF_PROMISC|IFF_ALLMULTI)) { 482 temp = MATCH_ALL; 483 } else 484 temp = MATCH_BRDCST; 485 486 bus_space_write_1(iot, ioh, RECV_MODES_REG, temp); 487 488 #ifdef IYDEBUG 489 { 490 char sbuf[128]; 491 492 snprintb(sbuf, sizeof(sbuf), 493 "\020\1PRMSC\2NOBRDST\3SEECRC\4LENGTH\5NOSaIns\6MultiIA", 494 temp); 495 496 printf("%s: RECV_MODES set to %s\n", device_xname(&sc->sc_dev), sbuf); 497 } 498 #endif 499 /* XXX VOODOO */ 500 temp = bus_space_read_1(iot, ioh, MEDIA_SELECT); 501 bus_space_write_1(iot, ioh, MEDIA_SELECT, temp); 502 /* XXX END OF VOODOO */ 503 504 505 delay(500000); /* for the hardware to test for the connector */ 506 507 temp = bus_space_read_1(iot, ioh, MEDIA_SELECT); 508 #ifdef IYDEBUG 509 { 510 char sbuf[128]; 511 512 snprintb(sbuf, sizeof(sbuf), 513 "\020\1LnkInDis\2PolCor\3TPE\4JabberDis\5NoAport\6BNC", 514 temp); 515 printf("%s: media select was 0x%s ", device_xname(&sc->sc_dev), sbuf); 516 } 517 #endif 518 temp = (temp & TEST_MODE_MASK); 519 520 switch(IFM_SUBTYPE(sc->iy_ifmedia.ifm_media)) { 521 case IFM_10_5: 522 temp &= ~ (BNC_BIT | TPE_BIT); 523 break; 524 525 case IFM_10_2: 526 temp = (temp & ~TPE_BIT) | BNC_BIT; 527 break; 528 529 case IFM_10_T: 530 temp = (temp & ~BNC_BIT) | TPE_BIT; 531 break; 532 default: 533 ; 534 /* nothing; leave as it is */ 535 } 536 switch (temp & (BNC_BIT | TPE_BIT)) { 537 case BNC_BIT: 538 sc->iy_media = IFM_ETHER | IFM_10_2; 539 break; 540 case TPE_BIT: 541 sc->iy_media = IFM_ETHER | IFM_10_T; 542 break; 543 default: 544 sc->iy_media = IFM_ETHER | IFM_10_5; 545 } 546 547 bus_space_write_1(iot, ioh, MEDIA_SELECT, temp); 548 #ifdef IYDEBUG 549 { 550 char sbuf[128]; 551 552 snprintb(sbuf, sizeof(sbuf), 553 "\020\1LnkInDis\2PolCor\3TPE\4JabberDis\5NoAport\6BNC", 554 temp); 555 printf("changed to 0x%s\n", sbuf); 556 } 557 #endif 558 559 bus_space_write_1(iot, ioh, 0, BANK_SEL(0)); 560 bus_space_write_1(iot, ioh, INT_MASK_REG, ALL_INTS); 561 bus_space_write_1(iot, ioh, 0, BANK_SEL(1)); 562 563 temp = bus_space_read_1(iot, ioh, INT_NO_REG); 564 bus_space_write_1(iot, ioh, INT_NO_REG, (temp & 0xf8) | sc->mappedirq); 565 566 #ifdef IYDEBUG 567 { 568 char sbuf[128]; 569 570 snprintb(sbuf, sizeof(sbuf), 571 "\020\4bad_irq\010flash/boot present", temp); 572 573 printf("%s: int no was %s\n", device_xname(&sc->sc_dev), sbuf); 574 575 temp = bus_space_read_1(iot, ioh, INT_NO_REG); 576 snprintb(sbuf, sizeof(sbuf), 577 "\020\4bad_irq\010flash/boot present", temp); 578 printf("%s: int no now %s\n", device_xname(&sc->sc_dev), sbuf); 579 } 580 #endif 581 582 bus_space_write_1(iot, ioh, RCV_LOWER_LIMIT_REG, 0); 583 bus_space_write_1(iot, ioh, RCV_UPPER_LIMIT_REG, (sc->rx_size -2) >>8); 584 bus_space_write_1(iot, ioh, XMT_LOWER_LIMIT_REG, sc->rx_size >>8); 585 bus_space_write_1(iot, ioh, XMT_UPPER_LIMIT_REG, (sc->sram - 2) >>8); 586 587 temp = bus_space_read_1(iot, ioh, REG1); 588 #ifdef IYDEBUG 589 { 590 char sbuf[128]; 591 592 snprintb(sbuf, sizeof(sbuf), "\020\2WORD_WIDTH\010INT_ENABLE", 593 temp); 594 595 printf("%s: HW access is %s\n", device_xname(&sc->sc_dev), sbuf); 596 } 597 #endif 598 bus_space_write_1(iot, ioh, REG1, temp | INT_ENABLE); /* XXX what about WORD_WIDTH? */ 599 600 #ifdef IYDEBUG 601 { 602 char sbuf[128]; 603 604 temp = bus_space_read_1(iot, ioh, REG1); 605 snprintb(sbuf, sizeof(sbuf), "\020\2WORD_WIDTH\010INT_ENABLE", 606 temp); 607 printf("%s: HW access is %s\n", device_xname(&sc->sc_dev), sbuf); 608 } 609 #endif 610 611 bus_space_write_1(iot, ioh, 0, BANK_SEL(0)); 612 613 bus_space_write_1(iot, ioh, INT_MASK_REG, ALL_INTS & ~(RX_BIT|TX_BIT)); 614 bus_space_write_1(iot, ioh, STATUS_REG, ALL_INTS); /* clear ints */ 615 616 bus_space_write_1(iot, ioh, RCV_COPY_THRESHOLD, 0); 617 618 bus_space_write_2(iot, ioh, RCV_START_LOW, 0); 619 bus_space_write_2(iot, ioh, RCV_STOP_LOW, sc->rx_size - 2); 620 sc->rx_start = 0; 621 622 bus_space_write_1(iot, ioh, 0, SEL_RESET_CMD); 623 delay(200); 624 625 bus_space_write_2(iot, ioh, XMT_ADDR_REG, sc->rx_size); 626 627 sc->tx_start = sc->tx_end = sc->rx_size; 628 sc->tx_last = 0; 629 630 bus_space_write_1(iot, ioh, 0, RCV_ENABLE_CMD); 631 632 ifp->if_flags |= IFF_RUNNING; 633 ifp->if_flags &= ~IFF_OACTIVE; 634 } 635 636 void 637 iystart(ifp) 638 struct ifnet *ifp; 639 { 640 struct iy_softc *sc; 641 642 643 struct mbuf *m0, *m; 644 u_int len, pad, last, end; 645 u_int llen, residual; 646 int avail; 647 char *data; 648 unsigned temp; 649 u_int16_t resval, stat; 650 bus_space_tag_t iot; 651 bus_space_handle_t ioh; 652 653 #ifdef IYDEBUG 654 printf("iystart called\n"); 655 #endif 656 sc = ifp->if_softc; 657 658 if ((ifp->if_flags & (IFF_RUNNING | IFF_OACTIVE)) != IFF_RUNNING) 659 return; 660 661 iy_intr_tx(sc); 662 663 iot = sc->sc_iot; 664 ioh = sc->sc_ioh; 665 666 for (;;) { 667 IFQ_POLL(&ifp->if_snd, m0); 668 if (m0 == NULL) 669 break; 670 #ifdef IYDEBUG 671 printf("%s: trying to write another packet to the hardware\n", 672 device_xname(&sc->sc_dev)); 673 #endif 674 675 /* We need to use m->m_pkthdr.len, so require the header */ 676 if ((m0->m_flags & M_PKTHDR) == 0) 677 panic("iystart: no header mbuf"); 678 679 len = m0->m_pkthdr.len; 680 pad = len & 1; 681 682 #ifdef IYDEBUG 683 printf("%s: length is %d.\n", device_xname(&sc->sc_dev), len); 684 #endif 685 if (len < (ETHER_MIN_LEN - ETHER_CRC_LEN)) { 686 pad = ETHER_MIN_LEN - ETHER_CRC_LEN - len; 687 } 688 689 if (len + pad > ETHER_MAX_LEN) { 690 /* packet is obviously too large: toss it */ 691 ++ifp->if_oerrors; 692 IFQ_DEQUEUE(&ifp->if_snd, m0); 693 m_freem(m0); 694 continue; 695 } 696 697 #if NBPFILTER > 0 698 if (ifp->if_bpf) 699 bpf_mtap(ifp->if_bpf, m0); 700 #endif 701 702 avail = sc->tx_start - sc->tx_end; 703 if (avail <= 0) 704 avail += sc->tx_size; 705 706 #ifdef IYDEBUG 707 printf("%s: avail is %d.\n", device_xname(&sc->sc_dev), avail); 708 #endif 709 /* 710 * we MUST RUN at splnet here --- 711 * XXX todo: or even turn off the boards ints ??? hm... 712 */ 713 714 /* See if there is room to put another packet in the buffer. */ 715 716 if ((len+pad+2*I595_XMT_HDRLEN) > avail) { 717 #ifdef IYDEBUG 718 printf("%s: len = %d, avail = %d, setting OACTIVE\n", 719 device_xname(&sc->sc_dev), len, avail); 720 #endif 721 /* mark interface as full ... */ 722 ifp->if_flags |= IFF_OACTIVE; 723 724 /* and wait for any transmission result */ 725 bus_space_write_1(iot, ioh, 0, BANK_SEL(2)); 726 727 temp = bus_space_read_1(iot, ioh, REG1); 728 bus_space_write_1(iot, ioh, REG1, 729 temp & ~XMT_CHAIN_INT); 730 731 bus_space_write_1(iot, ioh, 0, BANK_SEL(0)); 732 733 return; 734 } 735 736 /* we know it fits in the hardware now, so dequeue it */ 737 IFQ_DEQUEUE(&ifp->if_snd, m0); 738 739 last = sc->tx_end; 740 end = last + pad + len + I595_XMT_HDRLEN; 741 742 if (end >= sc->sram) { 743 if ((sc->sram - last) <= I595_XMT_HDRLEN) { 744 /* keep header in one piece */ 745 last = sc->rx_size; 746 end = last + pad + len + I595_XMT_HDRLEN; 747 } else 748 end -= sc->tx_size; 749 } 750 751 bus_space_write_2(iot, ioh, HOST_ADDR_REG, last); 752 bus_space_write_stream_2(iot, ioh, MEM_PORT_REG, 753 htole16(XMT_CMD)); 754 755 bus_space_write_2(iot, ioh, MEM_PORT_REG, 0); 756 bus_space_write_2(iot, ioh, MEM_PORT_REG, 0); 757 758 bus_space_write_stream_2(iot, ioh, MEM_PORT_REG, 759 htole16(len + pad)); 760 761 residual = resval = 0; 762 763 while ((m = m0)!=0) { 764 data = mtod(m, void *); 765 llen = m->m_len; 766 if (residual) { 767 #ifdef IYDEBUG 768 printf("%s: merging residual with next mbuf.\n", 769 device_xname(&sc->sc_dev)); 770 #endif 771 resval |= *data << 8; 772 bus_space_write_stream_2(iot, ioh, 773 MEM_PORT_REG, resval); 774 --llen; 775 ++data; 776 } 777 /* 778 * XXX ALIGNMENT LOSSAGE HERE. 779 */ 780 if (llen > 1) 781 bus_space_write_multi_stream_2(iot, ioh, 782 MEM_PORT_REG, (u_int16_t *) data, 783 llen>>1); 784 residual = llen & 1; 785 if (residual) { 786 resval = *(data + llen - 1); 787 #ifdef IYDEBUG 788 printf("%s: got odd mbuf to send.\n", 789 device_xname(&sc->sc_dev)); 790 #endif 791 } 792 793 MFREE(m, m0); 794 } 795 796 if (residual) 797 bus_space_write_stream_2(iot, ioh, MEM_PORT_REG, 798 resval); 799 800 pad >>= 1; 801 while (pad-- > 0) 802 bus_space_write_stream_2(iot, ioh, MEM_PORT_REG, 0); 803 804 #ifdef IYDEBUG 805 printf("%s: new last = 0x%x, end = 0x%x.\n", 806 device_xname(&sc->sc_dev), last, end); 807 printf("%s: old start = 0x%x, end = 0x%x, last = 0x%x\n", 808 device_xname(&sc->sc_dev), sc->tx_start, sc->tx_end, sc->tx_last); 809 #endif 810 811 if (sc->tx_start != sc->tx_end) { 812 bus_space_write_2(iot, ioh, HOST_ADDR_REG, 813 sc->tx_last + XMT_COUNT); 814 815 /* 816 * XXX We keep stat in le order, to potentially save 817 * a byte swap. 818 */ 819 stat = bus_space_read_stream_2(iot, ioh, MEM_PORT_REG); 820 821 bus_space_write_2(iot, ioh, HOST_ADDR_REG, 822 sc->tx_last + XMT_CHAIN); 823 824 bus_space_write_stream_2(iot, ioh, MEM_PORT_REG, 825 htole16(last)); 826 827 bus_space_write_stream_2(iot, ioh, MEM_PORT_REG, 828 stat | htole16(CHAIN)); 829 #ifdef IYDEBUG 830 printf("%s: setting 0x%x to 0x%x\n", 831 device_xname(&sc->sc_dev), sc->tx_last + XMT_COUNT, 832 le16toh(stat) | CHAIN); 833 #endif 834 } 835 stat = bus_space_read_2(iot, ioh, MEM_PORT_REG); /* dummy read */ 836 837 /* XXX todo: enable ints here if disabled */ 838 839 ++ifp->if_opackets; 840 841 if (sc->tx_start == sc->tx_end) { 842 bus_space_write_2(iot, ioh, XMT_ADDR_REG, last); 843 bus_space_write_1(iot, ioh, 0, XMT_CMD); 844 sc->tx_start = last; 845 #ifdef IYDEBUG 846 printf("%s: writing 0x%x to XAR and giving XCMD\n", 847 device_xname(&sc->sc_dev), last); 848 #endif 849 } else { 850 bus_space_write_1(iot, ioh, 0, RESUME_XMT_CMD); 851 #ifdef IYDEBUG 852 printf("%s: giving RESUME_XCMD\n", 853 device_xname(&sc->sc_dev)); 854 #endif 855 } 856 sc->tx_last = last; 857 sc->tx_end = end; 858 } 859 /* and wait only for end of transmission chain */ 860 bus_space_write_1(iot, ioh, 0, BANK_SEL(2)); 861 862 temp = bus_space_read_1(iot, ioh, REG1); 863 bus_space_write_1(iot, ioh, REG1, temp | XMT_CHAIN_INT); 864 865 bus_space_write_1(iot, ioh, 0, BANK_SEL(0)); 866 } 867 868 869 static inline void 870 eepromwritebit(iot, ioh, what) 871 bus_space_tag_t iot; 872 bus_space_handle_t ioh; 873 int what; 874 { 875 bus_space_write_1(iot, ioh, EEPROM_REG, what); 876 delay(1); 877 bus_space_write_1(iot, ioh, EEPROM_REG, what|EESK); 878 delay(1); 879 bus_space_write_1(iot, ioh, EEPROM_REG, what); 880 delay(1); 881 } 882 883 static inline int 884 eepromreadbit(iot, ioh) 885 bus_space_tag_t iot; 886 bus_space_handle_t ioh; 887 { 888 int b; 889 890 bus_space_write_1(iot, ioh, EEPROM_REG, EECS|EESK); 891 delay(1); 892 b = bus_space_read_1(iot, ioh, EEPROM_REG); 893 bus_space_write_1(iot, ioh, EEPROM_REG, EECS); 894 delay(1); 895 896 return ((b & EEDO) != 0); 897 } 898 899 static u_int16_t 900 eepromread(iot, ioh, offset) 901 bus_space_tag_t iot; 902 bus_space_handle_t ioh; 903 int offset; 904 { 905 volatile int i; 906 volatile int j; 907 volatile u_int16_t readval; 908 909 bus_space_write_1(iot, ioh, 0, BANK_SEL(2)); 910 delay(1); 911 bus_space_write_1(iot, ioh, EEPROM_REG, EECS); /* XXXX??? */ 912 delay(1); 913 914 eepromwritebit(iot, ioh, EECS|EEDI); 915 eepromwritebit(iot, ioh, EECS|EEDI); 916 eepromwritebit(iot, ioh, EECS); 917 918 for (j=5; j>=0; --j) { 919 if ((offset>>j) & 1) 920 eepromwritebit(iot, ioh, EECS|EEDI); 921 else 922 eepromwritebit(iot, ioh, EECS); 923 } 924 925 for (readval=0, i=0; i<16; ++i) { 926 readval<<=1; 927 readval |= eepromreadbit(iot, ioh); 928 } 929 930 bus_space_write_1(iot, ioh, EEPROM_REG, 0|EESK); 931 delay(1); 932 bus_space_write_1(iot, ioh, EEPROM_REG, 0); 933 934 bus_space_write_1(iot, ioh, COMMAND_REG, BANK_SEL(0)); 935 936 return readval; 937 } 938 939 /* 940 * Device timeout/watchdog routine. Entered if the device neglects to generate 941 * an interrupt after a transmit has been started on it. 942 */ 943 void 944 iywatchdog(ifp) 945 struct ifnet *ifp; 946 { 947 struct iy_softc *sc = ifp->if_softc; 948 949 log(LOG_ERR, "%s: device timeout\n", device_xname(&sc->sc_dev)); 950 ++sc->sc_ethercom.ec_if.if_oerrors; 951 iyreset(sc); 952 } 953 954 /* 955 * What to do upon receipt of an interrupt. 956 */ 957 int 958 iyintr(arg) 959 void *arg; 960 { 961 struct iy_softc *sc; 962 struct ifnet *ifp; 963 bus_space_tag_t iot; 964 bus_space_handle_t ioh; 965 966 u_short status; 967 968 sc = arg; 969 iot = sc->sc_iot; 970 ioh = sc->sc_ioh; 971 972 ifp = &sc->sc_ethercom.ec_if; 973 974 status = bus_space_read_1(iot, ioh, STATUS_REG); 975 #ifdef IYDEBUG 976 if (status & ALL_INTS) { 977 char sbuf[128]; 978 979 snprintb(sbuf, sizeof(sbuf), "\020\1RX_STP\2RX\3TX\4EXEC", 980 status); 981 printf("%s: got interrupt %s", device_xname(&sc->sc_dev), sbuf); 982 983 if (status & EXEC_INT) { 984 snprintb(sbuf, sizeof(sbuf), 985 "\020\6ABORT", bus_space_read_1(iot, ioh, 0)); 986 printf(" event %s\n", sbuf); 987 } else 988 printf("\n"); 989 } 990 #endif 991 if ((status & (RX_INT | TX_INT)) == 0) 992 return 0; 993 994 if (status & RX_INT) { 995 iy_intr_rx(sc); 996 bus_space_write_1(iot, ioh, STATUS_REG, RX_INT); 997 } 998 if (status & TX_INT) { 999 /* Tell feeders we may be able to accept more data... */ 1000 ifp->if_flags &= ~IFF_OACTIVE; 1001 /* and get more data. */ 1002 iystart(ifp); 1003 bus_space_write_1(iot, ioh, STATUS_REG, TX_INT); 1004 } 1005 1006 #if NRND > 0 1007 rnd_add_uint32(&sc->rnd_source, status); 1008 #endif 1009 1010 return 1; 1011 } 1012 1013 void 1014 iyget(sc, iot, ioh, rxlen) 1015 struct iy_softc *sc; 1016 bus_space_tag_t iot; 1017 bus_space_handle_t ioh; 1018 int rxlen; 1019 { 1020 struct mbuf *m, *top, **mp; 1021 struct ifnet *ifp; 1022 int len; 1023 1024 ifp = &sc->sc_ethercom.ec_if; 1025 1026 MGETHDR(m, M_DONTWAIT, MT_DATA); 1027 if (m == 0) 1028 goto dropped; 1029 m->m_pkthdr.rcvif = ifp; 1030 m->m_pkthdr.len = rxlen; 1031 len = MHLEN; 1032 top = 0; 1033 mp = ⊤ 1034 1035 while (rxlen > 0) { 1036 if (top) { 1037 MGET(m, M_DONTWAIT, MT_DATA); 1038 if (m == 0) { 1039 m_freem(top); 1040 goto dropped; 1041 } 1042 len = MLEN; 1043 } 1044 if (rxlen >= MINCLSIZE) { 1045 MCLGET(m, M_DONTWAIT); 1046 if ((m->m_flags & M_EXT) == 0) { 1047 m_free(m); 1048 m_freem(top); 1049 goto dropped; 1050 } 1051 len = MCLBYTES; 1052 } 1053 len = min(rxlen, len); 1054 /* 1055 * XXX ALIGNMENT LOSSAGE HERE. 1056 */ 1057 if (len > 1) { 1058 len &= ~1; 1059 1060 bus_space_read_multi_stream_2(iot, ioh, MEM_PORT_REG, 1061 mtod(m, u_int16_t *), len/2); 1062 } else { 1063 #ifdef IYDEBUG 1064 printf("%s: received odd mbuf\n", device_xname(&sc->sc_dev)); 1065 #endif 1066 *(mtod(m, char *)) = bus_space_read_stream_2(iot, ioh, 1067 MEM_PORT_REG); 1068 } 1069 m->m_len = len; 1070 rxlen -= len; 1071 *mp = m; 1072 mp = &m->m_next; 1073 } 1074 1075 if (top == NULL) 1076 return; 1077 1078 /* XXX receive the top here */ 1079 ++ifp->if_ipackets; 1080 1081 1082 #if NBPFILTER > 0 1083 if (ifp->if_bpf) 1084 bpf_mtap(ifp->if_bpf, top); 1085 #endif 1086 (*ifp->if_input)(ifp, top); 1087 return; 1088 1089 dropped: 1090 ++ifp->if_ierrors; 1091 return; 1092 } 1093 1094 void 1095 iy_intr_rx(sc) 1096 struct iy_softc *sc; 1097 { 1098 bus_space_tag_t iot; 1099 bus_space_handle_t ioh; 1100 1101 u_int rxadrs, rxevnt, rxstatus, rxnext, rxlen; 1102 1103 iot = sc->sc_iot; 1104 ioh = sc->sc_ioh; 1105 1106 rxadrs = sc->rx_start; 1107 bus_space_write_2(iot, ioh, HOST_ADDR_REG, rxadrs); 1108 rxevnt = le16toh(bus_space_read_stream_2(iot, ioh, MEM_PORT_REG)); 1109 rxnext = 0; 1110 1111 while (rxevnt == RCV_DONE) { 1112 rxstatus = le16toh(bus_space_read_stream_2(iot, ioh, 1113 MEM_PORT_REG)); 1114 rxnext = le16toh(bus_space_read_stream_2(iot, ioh, 1115 MEM_PORT_REG)); 1116 rxlen = le16toh(bus_space_read_stream_2(iot, ioh, 1117 MEM_PORT_REG)); 1118 #ifdef IYDEBUG 1119 { 1120 char sbuf[128]; 1121 1122 snprintb(sbuf, sizeof(sbuf), 1123 "\020\1RCLD\2IA_MCH\010SHORT\011OVRN\013ALGERR" 1124 "\014CRCERR\015LENERR\016RCVOK\020TYP", rxstatus); 1125 1126 printf("%s: pck at 0x%04x stat %s next 0x%x len 0x%x\n", 1127 device_xname(&sc->sc_dev), rxadrs, sbuf, rxnext, rxlen); 1128 } 1129 #endif 1130 iyget(sc, iot, ioh, rxlen); 1131 1132 /* move stop address */ 1133 bus_space_write_2(iot, ioh, RCV_STOP_LOW, 1134 rxnext == 0 ? sc->rx_size - 2 : rxnext - 2); 1135 1136 bus_space_write_2(iot, ioh, HOST_ADDR_REG, rxnext); 1137 rxadrs = rxnext; 1138 rxevnt = le16toh(bus_space_read_stream_2(iot, ioh, 1139 MEM_PORT_REG)); 1140 } 1141 sc->rx_start = rxnext; 1142 } 1143 1144 void 1145 iy_intr_tx(sc) 1146 struct iy_softc *sc; 1147 { 1148 bus_space_tag_t iot; 1149 bus_space_handle_t ioh; 1150 struct ifnet *ifp; 1151 u_int txstatus, txstat2, txlen, txnext; 1152 1153 ifp = &sc->sc_ethercom.ec_if; 1154 iot = sc->sc_iot; 1155 ioh = sc->sc_ioh; 1156 1157 while (sc->tx_start != sc->tx_end) { 1158 bus_space_write_2(iot, ioh, HOST_ADDR_REG, sc->tx_start); 1159 txstatus = le16toh(bus_space_read_stream_2(iot, ioh, 1160 MEM_PORT_REG)); 1161 1162 if ((txstatus & (TX_DONE|CMD_MASK)) != (TX_DONE|XMT_CMD)) 1163 break; 1164 1165 txstat2 = le16toh(bus_space_read_stream_2(iot, ioh, 1166 MEM_PORT_REG)); 1167 txnext = le16toh(bus_space_read_stream_2(iot, ioh, 1168 MEM_PORT_REG)); 1169 txlen = le16toh(bus_space_read_stream_2(iot, ioh, 1170 MEM_PORT_REG)); 1171 #ifdef IYDEBUG 1172 { 1173 char sbuf[128]; 1174 1175 snprintb(sbuf, sizeof(sbuf), 1176 "\020\6MAX_COL\7HRT_BEAT\010TX_DEF" 1177 "\011UND_RUN\012JERR\013LST_CRS" 1178 "\014LTCOL\016TX_OK\020COLL", txstat2); 1179 1180 printf("txstat 0x%x stat2 0x%s next 0x%x len 0x%x\n", 1181 txstatus, sbuf, txnext, txlen); 1182 } 1183 #endif 1184 if (txlen & CHAIN) 1185 sc->tx_start = txnext; 1186 else 1187 sc->tx_start = sc->tx_end; 1188 ifp->if_flags &= ~IFF_OACTIVE; 1189 1190 if (txstat2 & 0x0020) 1191 ifp->if_collisions += 16; 1192 else 1193 ifp->if_collisions += txstat2 & 0x000f; 1194 1195 if ((txstat2 & 0x2000) == 0) 1196 ++ifp->if_oerrors; 1197 } 1198 } 1199 1200 int 1201 iyioctl(struct ifnet *ifp, u_long cmd, void *data) 1202 { 1203 struct iy_softc *sc; 1204 struct ifaddr *ifa; 1205 struct ifreq *ifr; 1206 int s, error = 0; 1207 1208 sc = ifp->if_softc; 1209 ifa = (struct ifaddr *)data; 1210 ifr = (struct ifreq *)data; 1211 1212 #ifdef IYDEBUG 1213 printf("iyioctl called with ifp %p (%s) cmd 0x%lx data %p\n", 1214 ifp, ifp->if_xname, cmd, data); 1215 #endif 1216 1217 s = splnet(); 1218 1219 switch (cmd) { 1220 1221 case SIOCINITIFADDR: 1222 ifp->if_flags |= IFF_UP; 1223 1224 iyinit(sc); 1225 switch (ifa->ifa_addr->sa_family) { 1226 #ifdef INET 1227 case AF_INET: 1228 arp_ifinit(ifp, ifa); 1229 break; 1230 #endif 1231 default: 1232 break; 1233 } 1234 break; 1235 1236 case SIOCSIFFLAGS: 1237 if ((error = ifioctl_common(ifp, cmd, data)) != 0) 1238 break; 1239 sc->promisc = ifp->if_flags & (IFF_PROMISC | IFF_ALLMULTI); 1240 /* XXX re-use ether_ioctl() */ 1241 switch (ifp->if_flags & (IFF_UP|IFF_RUNNING)) { 1242 case IFF_RUNNING: 1243 /* 1244 * If interface is marked down and it is running, then 1245 * stop it. 1246 */ 1247 iystop(sc); 1248 ifp->if_flags &= ~IFF_RUNNING; 1249 break; 1250 case IFF_UP: 1251 /* 1252 * If interface is marked up and it is stopped, then 1253 * start it. 1254 */ 1255 iyinit(sc); 1256 break; 1257 default: 1258 /* 1259 * Reset the interface to pick up changes in any other 1260 * flags that affect hardware registers. 1261 */ 1262 iystop(sc); 1263 iyinit(sc); 1264 break; 1265 } 1266 #ifdef IYDEBUGX 1267 if (ifp->if_flags & IFF_DEBUG) 1268 sc->sc_debug = IFY_ALL; 1269 else 1270 sc->sc_debug = 0; 1271 #endif 1272 break; 1273 1274 case SIOCADDMULTI: 1275 case SIOCDELMULTI: 1276 if ((error = ether_ioctl(ifp, cmd, data)) == ENETRESET) { 1277 /* 1278 * Multicast list has changed; set the hardware filter 1279 * accordingly. 1280 */ 1281 if (ifp->if_flags & IFF_RUNNING) { 1282 /* XXX can't make it work otherwise */ 1283 iyreset(sc); 1284 iy_mc_reset(sc); 1285 } 1286 error = 0; 1287 } 1288 break; 1289 1290 case SIOCSIFMEDIA: 1291 case SIOCGIFMEDIA: 1292 error = ifmedia_ioctl(ifp, ifr, &sc->iy_ifmedia, cmd); 1293 break; 1294 default: 1295 error = ether_ioctl(ifp, cmd, data); 1296 } 1297 splx(s); 1298 return error; 1299 } 1300 1301 int 1302 iy_mediachange(ifp) 1303 struct ifnet *ifp; 1304 { 1305 struct iy_softc *sc = ifp->if_softc; 1306 1307 if (IFM_TYPE(sc->iy_ifmedia.ifm_media) != IFM_ETHER) 1308 return EINVAL; 1309 switch(IFM_SUBTYPE(sc->iy_ifmedia.ifm_media)) { 1310 case IFM_10_5: 1311 case IFM_10_2: 1312 case IFM_10_T: 1313 case IFM_AUTO: 1314 iystop(sc); 1315 iyinit(sc); 1316 return 0; 1317 default: 1318 return EINVAL; 1319 } 1320 } 1321 1322 void 1323 iy_mediastatus(ifp, ifmr) 1324 struct ifnet *ifp; 1325 struct ifmediareq *ifmr; 1326 { 1327 struct iy_softc *sc = ifp->if_softc; 1328 1329 ifmr->ifm_active = sc->iy_media; 1330 ifmr->ifm_status = IFM_AVALID | IFM_ACTIVE; 1331 } 1332 1333 1334 static void 1335 iy_mc_setup(sc) 1336 struct iy_softc *sc; 1337 { 1338 struct ether_multi *enm; 1339 struct ether_multistep step; 1340 struct ethercom *ecp; 1341 struct ifnet *ifp; 1342 bus_space_tag_t iot; 1343 bus_space_handle_t ioh; 1344 int avail, last /*, end*/ , len; 1345 int timeout; 1346 volatile u_int16_t dum; 1347 u_int8_t temp; 1348 1349 1350 ecp = &sc->sc_ethercom; 1351 ifp = &ecp->ec_if; 1352 1353 iot = sc->sc_iot; 1354 ioh = sc->sc_ioh; 1355 1356 len = 6 * ecp->ec_multicnt; 1357 1358 avail = sc->tx_start - sc->tx_end; 1359 if (avail <= 0) 1360 avail += sc->tx_size; 1361 if (ifp->if_flags & IFF_DEBUG) 1362 printf("%s: iy_mc_setup called, %d addresses, " 1363 "%d/%d bytes needed/avail\n", ifp->if_xname, 1364 ecp->ec_multicnt, len + I595_XMT_HDRLEN, avail); 1365 1366 last = sc->rx_size; 1367 1368 bus_space_write_1(iot, ioh, 0, BANK_SEL(2)); 1369 bus_space_write_1(iot, ioh, RECV_MODES_REG, MATCH_BRDCST); 1370 /* XXX VOODOO */ 1371 temp = bus_space_read_1(iot, ioh, MEDIA_SELECT); 1372 bus_space_write_1(iot, ioh, MEDIA_SELECT, temp); 1373 /* XXX END OF VOODOO */ 1374 bus_space_write_1(iot, ioh, 0, BANK_SEL(0)); 1375 bus_space_write_2(iot, ioh, HOST_ADDR_REG, last); 1376 bus_space_write_stream_2(iot, ioh, MEM_PORT_REG, htole16(MC_SETUP_CMD)); 1377 bus_space_write_2(iot, ioh, MEM_PORT_REG, 0); 1378 bus_space_write_2(iot, ioh, MEM_PORT_REG, 0); 1379 bus_space_write_stream_2(iot, ioh, MEM_PORT_REG, htole16(len)); 1380 1381 ETHER_FIRST_MULTI(step, ecp, enm); 1382 while(enm) { 1383 /* 1384 * XXX ALIGNMENT LOSSAGE HERE? 1385 */ 1386 bus_space_write_multi_stream_2(iot, ioh, MEM_PORT_REG, 1387 (u_int16_t *) enm->enm_addrlo, 3); 1388 1389 ETHER_NEXT_MULTI(step, enm); 1390 } 1391 dum = bus_space_read_2(iot, ioh, MEM_PORT_REG); /* dummy read */ 1392 bus_space_write_2(iot, ioh, XMT_ADDR_REG, last); 1393 bus_space_write_1(iot, ioh, 0, MC_SETUP_CMD); 1394 1395 1396 sc->tx_start = sc->rx_size; 1397 sc->tx_end = sc->rx_size + I595_XMT_HDRLEN + len; 1398 1399 for (timeout=0; timeout<100; timeout++) { 1400 DELAY(2); 1401 if ((bus_space_read_1(iot, ioh, STATUS_REG) & EXEC_INT) == 0) 1402 continue; 1403 1404 temp = bus_space_read_1(iot, ioh, 0); 1405 bus_space_write_1(iot, ioh, STATUS_REG, EXEC_INT); 1406 #ifdef DIAGNOSTIC 1407 if (temp & 0x20) { 1408 aprint_error_dev(&sc->sc_dev, "mc setup failed, %d usec\n", 1409 timeout * 2); 1410 } else if (((temp & 0x0f) == 0x03) && 1411 (ifp->if_flags & IFF_DEBUG)) { 1412 printf("%s: mc setup done, %d usec\n", 1413 device_xname(&sc->sc_dev), timeout * 2); 1414 } 1415 #endif 1416 break; 1417 } 1418 sc->tx_start = sc->tx_end; 1419 ifp->if_flags &= ~IFF_OACTIVE; 1420 1421 } 1422 1423 static void 1424 iy_mc_reset(sc) 1425 struct iy_softc *sc; 1426 { 1427 struct ether_multi *enm; 1428 struct ether_multistep step; 1429 struct ethercom *ecp; 1430 struct ifnet *ifp; 1431 bus_space_tag_t iot; 1432 bus_space_handle_t ioh; 1433 u_int16_t temp; 1434 1435 ecp = &sc->sc_ethercom; 1436 ifp = &ecp->ec_if; 1437 1438 iot = sc->sc_iot; 1439 ioh = sc->sc_ioh; 1440 1441 if (ecp->ec_multicnt > 63) { 1442 ifp->if_flags |= IFF_ALLMULTI; 1443 1444 } else if (ecp->ec_multicnt > 0) { 1445 /* 1446 * Step through the list of addresses. 1447 */ 1448 ETHER_FIRST_MULTI(step, ecp, enm); 1449 while(enm) { 1450 if (memcmp(enm->enm_addrlo, enm->enm_addrhi, 6) != 0) { 1451 ifp->if_flags |= IFF_ALLMULTI; 1452 goto setupmulti; 1453 } 1454 ETHER_NEXT_MULTI(step, enm); 1455 } 1456 /* OK, we really need to do it now: */ 1457 #if 0 1458 if ((ifp->if_flags & (IFF_RUNNING | IFF_OACTIVE)) 1459 != IFF_RUNNING) { 1460 ifp->if_flags |= IFF_OACTIVE; 1461 sc->want_mc_setup = 1; 1462 return; 1463 } 1464 #endif 1465 iy_mc_setup(sc); 1466 } else { 1467 ifp->if_flags &= ~IFF_ALLMULTI; 1468 } 1469 1470 setupmulti: 1471 bus_space_write_1(iot, ioh, 0, BANK_SEL(2)); 1472 if (ifp->if_flags & (IFF_PROMISC|IFF_ALLMULTI)) { 1473 temp = MATCH_ALL; 1474 } else 1475 temp = MATCH_BRDCST; 1476 1477 bus_space_write_1(iot, ioh, RECV_MODES_REG, temp); 1478 /* XXX VOODOO */ 1479 temp = bus_space_read_1(iot, ioh, MEDIA_SELECT); 1480 bus_space_write_1(iot, ioh, MEDIA_SELECT, temp); 1481 /* XXX END OF VOODOO */ 1482 1483 /* XXX TBD: setup hardware for all multicasts */ 1484 bus_space_write_1(iot, ioh, 0, BANK_SEL(0)); 1485 return; 1486 } 1487 1488 #ifdef IYDEBUGX 1489 void 1490 print_rbd(rbd) 1491 volatile struct ie_recv_buf_desc *rbd; 1492 { 1493 printf("RBD at %08lx:\nactual %04x, next %04x, buffer %08x\n" 1494 "length %04x, mbz %04x\n", (u_long)rbd, rbd->ie_rbd_actual, 1495 rbd->ie_rbd_next, rbd->ie_rbd_buffer, rbd->ie_rbd_length, 1496 rbd->mbz); 1497 } 1498 #endif 1499 1500 void 1501 iyprobemem(sc) 1502 struct iy_softc *sc; 1503 { 1504 bus_space_tag_t iot; 1505 bus_space_handle_t ioh; 1506 int testing; 1507 1508 iot = sc->sc_iot; 1509 ioh = sc->sc_ioh; 1510 1511 bus_space_write_1(iot, ioh, COMMAND_REG, BANK_SEL(0)); 1512 delay(1); 1513 bus_space_write_2(iot, ioh, HOST_ADDR_REG, 4096-2); 1514 bus_space_write_2(iot, ioh, MEM_PORT_REG, 0); 1515 1516 for (testing=65536; testing >= 4096; testing >>= 1) { 1517 bus_space_write_2(iot, ioh, HOST_ADDR_REG, testing-2); 1518 bus_space_write_2(iot, ioh, MEM_PORT_REG, 0xdead); 1519 bus_space_write_2(iot, ioh, HOST_ADDR_REG, testing-2); 1520 if (bus_space_read_2(iot, ioh, MEM_PORT_REG) != 0xdead) { 1521 #ifdef IYMEMDEBUG 1522 printf("%s: Didn't keep 0xdead at 0x%x\n", 1523 device_xname(&sc->sc_dev), testing-2); 1524 #endif 1525 continue; 1526 } 1527 1528 bus_space_write_2(iot, ioh, HOST_ADDR_REG, testing-2); 1529 bus_space_write_2(iot, ioh, MEM_PORT_REG, 0xbeef); 1530 bus_space_write_2(iot, ioh, HOST_ADDR_REG, testing-2); 1531 if (bus_space_read_2(iot, ioh, MEM_PORT_REG) != 0xbeef) { 1532 #ifdef IYMEMDEBUG 1533 printf("%s: Didn't keep 0xbeef at 0x%x\n", 1534 device_xname(&sc->sc_dev), testing-2); 1535 #endif 1536 continue; 1537 } 1538 1539 bus_space_write_2(iot, ioh, HOST_ADDR_REG, 0); 1540 bus_space_write_2(iot, ioh, MEM_PORT_REG, 0); 1541 bus_space_write_2(iot, ioh, HOST_ADDR_REG, testing >> 1); 1542 bus_space_write_2(iot, ioh, MEM_PORT_REG, testing >> 1); 1543 bus_space_write_2(iot, ioh, HOST_ADDR_REG, 0); 1544 if (bus_space_read_2(iot, ioh, MEM_PORT_REG) == (testing >> 1)) { 1545 #ifdef IYMEMDEBUG 1546 printf("%s: 0x%x alias of 0x0\n", 1547 device_xname(&sc->sc_dev), testing >> 1); 1548 #endif 1549 continue; 1550 } 1551 1552 break; 1553 } 1554 1555 sc->sram = testing; 1556 1557 switch(testing) { 1558 case 65536: 1559 /* 4 NFS packets + overhead RX, 2 NFS + overhead TX */ 1560 sc->rx_size = 44*1024; 1561 break; 1562 1563 case 32768: 1564 /* 2 NFS packets + overhead RX, 1 NFS + overhead TX */ 1565 sc->rx_size = 22*1024; 1566 break; 1567 1568 case 16384: 1569 /* 1 NFS packet + overhead RX, 4 big packets TX */ 1570 sc->rx_size = 10*1024; 1571 break; 1572 default: 1573 sc->rx_size = testing/2; 1574 break; 1575 } 1576 sc->tx_size = testing - sc->rx_size; 1577 } 1578 1579 static int 1580 eepromreadall(iot, ioh, wordp, maxi) 1581 bus_space_tag_t iot; 1582 bus_space_handle_t ioh; 1583 u_int16_t *wordp; 1584 int maxi; 1585 { 1586 int i; 1587 u_int16_t checksum, tmp; 1588 1589 checksum = 0; 1590 1591 for (i=0; i<EEPP_LENGTH; ++i) { 1592 tmp = eepromread(iot, ioh, i); 1593 checksum += tmp; 1594 if (i<maxi) 1595 wordp[i] = tmp; 1596 } 1597 1598 if (checksum != EEPP_CHKSUM) { 1599 #ifdef IYDEBUG 1600 printf("wrong EEPROM checksum 0x%x should be 0x%x\n", 1601 checksum, EEPP_CHKSUM); 1602 #endif 1603 return 1; 1604 } 1605 return 0; 1606 } 1607
Indexes created Thu Sep 25 16:09:42 GMT 2025