if_iy.c revision 1.84
1 /* $NetBSD: if_iy.c,v 1.84 2009/03/14 15:36:18 dsl Exp $ */ 2 /* #define IYDEBUG */ 3 /* #define IYMEMDEBUG */ 4 5 /*- 6 * Copyright (c) 1996,2001 The NetBSD Foundation, Inc. 7 * All rights reserved. 8 * 9 * This code is derived from software contributed to The NetBSD Foundation 10 * by Ignatios Souvatzis. 11 * 12 * Redistribution and use in source and binary forms, with or without 13 * modification, are permitted provided that the following conditions 14 * are met: 15 * 1. Redistributions of source code must retain the above copyright 16 * notice, this list of conditions and the following disclaimer. 17 * 2. Redistributions in binary form must reproduce the above copyright 18 * notice, this list of conditions and the following disclaimer in the 19 * documentation and/or other materials provided with the distribution. 20 * 21 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 22 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 23 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 24 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 25 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 26 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 27 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 28 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 29 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 30 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 31 * POSSIBILITY OF SUCH DAMAGE. 32 */ 33 34 /* 35 * Supported hardware: 36 * 37 * - Intel EtherExpress Pro/10. 38 * - possibly other boards using the i82595 chip and no special tweaks. 39 */ 40 41 #include <sys/cdefs.h> 42 __KERNEL_RCSID(0, "$NetBSD: if_iy.c,v 1.84 2009/03/14 15:36:18 dsl Exp $"); 43 44 #include "opt_inet.h" 45 #include "bpfilter.h" 46 #include "rnd.h" 47 48 #include <sys/param.h> 49 #include <sys/systm.h> 50 #include <sys/mbuf.h> 51 #include <sys/buf.h> 52 #include <sys/protosw.h> 53 #include <sys/socket.h> 54 #include <sys/ioctl.h> 55 #include <sys/errno.h> 56 #include <sys/syslog.h> 57 #include <sys/device.h> 58 #include <sys/endian.h> 59 #if NRND > 0 60 #include <sys/rnd.h> 61 #endif 62 63 #include <net/if.h> 64 #include <net/if_types.h> 65 #include <net/if_dl.h> 66 67 #include <net/if_ether.h> 68 69 #if NBPFILTER > 0 70 #include <net/bpf.h> 71 #include <net/bpfdesc.h> 72 #endif 73 74 #ifdef INET 75 #include <netinet/in.h> 76 #include <netinet/in_systm.h> 77 #include <netinet/in_var.h> 78 #include <netinet/ip.h> 79 #include <netinet/if_inarp.h> 80 #endif 81 82 83 #if defined(SIOCSIFMEDIA) 84 #include <net/if_media.h> 85 #endif 86 87 #include <sys/cpu.h> 88 #include <sys/bus.h> 89 #include <sys/intr.h> 90 91 #include <dev/isa/isareg.h> 92 #include <dev/isa/isavar.h> 93 #include <dev/ic/i82595reg.h> 94 95 /* XXX why isn't this centralized? */ 96 #ifndef __BUS_SPACE_HAS_STREAM_METHODS 97 #define bus_space_write_stream_2 bus_space_write_2 98 #define bus_space_write_multi_stream_2 bus_space_write_multi_2 99 #define bus_space_read_stream_2 bus_space_read_2 100 #define bus_space_read_multi_stream_2 bus_space_read_multi_2 101 #endif /* __BUS_SPACE_HAS_STREAM_METHODS */ 102 103 /* 104 * Ethernet status, per interface. 105 */ 106 struct iy_softc { 107 struct device sc_dev; 108 void *sc_ih; 109 110 bus_space_tag_t sc_iot; 111 bus_space_handle_t sc_ioh; 112 113 struct ethercom sc_ethercom; 114 115 struct ifmedia iy_ifmedia; 116 int iy_media; 117 118 int mappedirq; 119 120 int hard_vers; 121 122 int promisc; 123 124 int sram, tx_size, rx_size; 125 126 int tx_start, tx_end, tx_last; 127 int rx_start; 128 129 int doing_mc_setup; 130 #ifdef IYDEBUG 131 int sc_debug; 132 #endif 133 134 #if NRND > 0 135 rndsource_element_t rnd_source; 136 #endif 137 }; 138 139 void iywatchdog(struct ifnet *); 140 int iyioctl(struct ifnet *, u_long, void *); 141 int iyintr(void *); 142 void iyinit(struct iy_softc *); 143 void iystop(struct iy_softc *); 144 void iystart(struct ifnet *); 145 146 void iy_intr_rx(struct iy_softc *); 147 void iy_intr_tx(struct iy_softc *); 148 149 void iyreset(struct iy_softc *); 150 void iy_readframe(struct iy_softc *, int); 151 void iy_drop_packet_buffer(struct iy_softc *); 152 void iy_find_mem_size(struct iy_softc *); 153 void iyrint(struct iy_softc *); 154 void iytint(struct iy_softc *); 155 void iyxmit(struct iy_softc *); 156 static void iy_mc_setup(struct iy_softc *); 157 static void iy_mc_reset(struct iy_softc *); 158 void iyget(struct iy_softc *, bus_space_tag_t, bus_space_handle_t, int); 159 void iyprobemem(struct iy_softc *); 160 static inline void eepromwritebit(bus_space_tag_t, bus_space_handle_t, int); 161 static inline int eepromreadbit(bus_space_tag_t, bus_space_handle_t); 162 163 #ifdef IYDEBUGX 164 void print_rbd(volatile struct iy_recv_buf_desc *); 165 166 int in_ifrint = 0; 167 int in_iftint = 0; 168 #endif 169 170 int iy_mediachange(struct ifnet *); 171 void iy_mediastatus(struct ifnet *, struct ifmediareq *); 172 173 int iyprobe(struct device *, struct cfdata *, void *); 174 void iyattach(struct device *, struct device *, void *); 175 176 static u_int16_t eepromread(bus_space_tag_t, bus_space_handle_t, int); 177 178 static int eepromreadall(bus_space_tag_t, bus_space_handle_t, u_int16_t *, 179 int); 180 181 CFATTACH_DECL(iy, sizeof(struct iy_softc), 182 iyprobe, iyattach, NULL, NULL); 183 184 static u_int8_t eepro_irqmap[] = EEPP_INTMAP; 185 static u_int8_t eepro_revirqmap[] = EEPP_RINTMAP; 186 187 int 188 iyprobe(struct device *parent, struct cfdata *match, 189 void *aux) 190 { 191 struct isa_attach_args *ia = aux; 192 u_int16_t eaddr[8]; 193 bus_space_tag_t iot; 194 bus_space_handle_t ioh; 195 u_int8_t c, d; 196 int irq; 197 198 if (ia->ia_nio < 1) 199 return (0); 200 if (ia->ia_nirq < 1) 201 return (0); 202 203 if (ISA_DIRECT_CONFIG(ia)) 204 return (0); 205 206 iot = ia->ia_iot; 207 208 if (ia->ia_io[0].ir_addr == ISA_UNKNOWN_PORT) 209 return 0; 210 211 if (bus_space_map(iot, ia->ia_io[0].ir_addr, 16, 0, &ioh)) 212 return 0; 213 214 /* try to find the round robin sig: */ 215 216 c = bus_space_read_1(iot, ioh, ID_REG); 217 if ((c & ID_REG_MASK) != ID_REG_SIG) 218 goto out; 219 220 d = bus_space_read_1(iot, ioh, ID_REG); 221 if ((d & ID_REG_MASK) != ID_REG_SIG) 222 goto out; 223 224 if (((d-c) & R_ROBIN_BITS) != 0x40) 225 goto out; 226 227 d = bus_space_read_1(iot, ioh, ID_REG); 228 if ((d & ID_REG_MASK) != ID_REG_SIG) 229 goto out; 230 231 if (((d-c) & R_ROBIN_BITS) != 0x80) 232 goto out; 233 234 d = bus_space_read_1(iot, ioh, ID_REG); 235 if ((d & ID_REG_MASK) != ID_REG_SIG) 236 goto out; 237 238 if (((d-c) & R_ROBIN_BITS) != 0xC0) 239 goto out; 240 241 d = bus_space_read_1(iot, ioh, ID_REG); 242 if ((d & ID_REG_MASK) != ID_REG_SIG) 243 goto out; 244 245 if (((d-c) & R_ROBIN_BITS) != 0x00) 246 goto out; 247 248 #ifdef IYDEBUG 249 printf("iyprobe verified working ID reg.\n"); 250 #endif 251 252 if (eepromreadall(iot, ioh, eaddr, 8)) 253 goto out; 254 255 if (ia->ia_irq[0].ir_irq == ISA_UNKNOWN_IRQ) 256 irq = eepro_irqmap[eaddr[EEPPW1] & EEPP_Int]; 257 else 258 irq = ia->ia_irq[0].ir_irq; 259 260 if (irq >= sizeof(eepro_revirqmap)) 261 goto out; 262 263 if (eepro_revirqmap[irq] == 0xff) 264 goto out; 265 266 /* now lets reset the chip */ 267 268 bus_space_write_1(iot, ioh, COMMAND_REG, RESET_CMD); 269 delay(200); 270 271 ia->ia_nio = 1; 272 ia->ia_io[0].ir_size = 16; 273 274 ia->ia_nirq = 1; 275 ia->ia_irq[0].ir_irq = irq; 276 277 ia->ia_niomem = 0; 278 ia->ia_ndrq = 0; 279 280 bus_space_unmap(iot, ioh, 16); 281 return 1; /* found */ 282 out: 283 bus_space_unmap(iot, ioh, 16); 284 return 0; 285 } 286 287 void 288 iyattach(struct device *parent, struct device *self, void *aux) 289 { 290 struct iy_softc *sc = (void *)self; 291 struct isa_attach_args *ia = aux; 292 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 293 bus_space_tag_t iot; 294 bus_space_handle_t ioh; 295 unsigned temp; 296 u_int16_t eaddr[8]; 297 u_int8_t myaddr[ETHER_ADDR_LEN]; 298 int eirq; 299 300 iot = ia->ia_iot; 301 302 if (bus_space_map(iot, ia->ia_io[0].ir_addr, 16, 0, &ioh)) { 303 printf(": can't map i/o space\n"); 304 return; 305 } 306 307 sc->sc_iot = iot; 308 sc->sc_ioh = ioh; 309 310 sc->mappedirq = eepro_revirqmap[ia->ia_irq[0].ir_irq]; 311 312 /* now let's reset the chip */ 313 314 bus_space_write_1(iot, ioh, COMMAND_REG, RESET_CMD); 315 delay(200); 316 317 iyprobemem(sc); 318 319 strlcpy(ifp->if_xname, device_xname(&sc->sc_dev), IFNAMSIZ); 320 ifp->if_softc = sc; 321 ifp->if_start = iystart; 322 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_NOTRAILERS 323 | IFF_MULTICAST; 324 325 sc->doing_mc_setup = 0; 326 327 ifp->if_ioctl = iyioctl; 328 ifp->if_watchdog = iywatchdog; 329 330 IFQ_SET_READY(&ifp->if_snd); 331 332 (void)eepromreadall(iot, ioh, eaddr, 8); 333 sc->hard_vers = eaddr[EEPW6] & EEPP_BoardRev; 334 335 #ifdef DIAGNOSTICS 336 if ((eaddr[EEPPEther0] != 337 eepromread(iot, ioh, EEPPEther0a)) && 338 (eaddr[EEPPEther1] != 339 eepromread(iot, ioh, EEPPEther1a)) && 340 (eaddr[EEPPEther2] != 341 eepromread(iot, ioh, EEPPEther2a))) 342 343 printf("EEPROM Ethernet address differs from copy\n"); 344 #endif 345 346 myaddr[1] = eaddr[EEPPEther0] & 0xFF; 347 myaddr[0] = eaddr[EEPPEther0] >> 8; 348 myaddr[3] = eaddr[EEPPEther1] & 0xFF; 349 myaddr[2] = eaddr[EEPPEther1] >> 8; 350 myaddr[5] = eaddr[EEPPEther2] & 0xFF; 351 myaddr[4] = eaddr[EEPPEther2] >> 8; 352 353 ifmedia_init(&sc->iy_ifmedia, 0, iy_mediachange, iy_mediastatus); 354 ifmedia_add(&sc->iy_ifmedia, IFM_ETHER | IFM_10_2, 0, NULL); 355 ifmedia_add(&sc->iy_ifmedia, IFM_ETHER | IFM_10_5, 0, NULL); 356 ifmedia_add(&sc->iy_ifmedia, IFM_ETHER | IFM_10_T, 0, NULL); 357 ifmedia_add(&sc->iy_ifmedia, IFM_ETHER | IFM_AUTO, 0, NULL); 358 ifmedia_set(&sc->iy_ifmedia, IFM_ETHER | IFM_AUTO); 359 /* Attach the interface. */ 360 if_attach(ifp); 361 ether_ifattach(ifp, myaddr); 362 printf(": address %s, rev. %d, %d kB\n", 363 ether_sprintf(myaddr), 364 sc->hard_vers, sc->sram/1024); 365 366 eirq = eepro_irqmap[eaddr[EEPPW1] & EEPP_Int]; 367 if (eirq != ia->ia_irq[0].ir_irq) 368 printf("%s: EEPROM irq setting %d ignored\n", 369 device_xname(&sc->sc_dev), eirq); 370 371 sc->sc_ih = isa_intr_establish(ia->ia_ic, ia->ia_irq[0].ir_irq, 372 IST_EDGE, IPL_NET, iyintr, sc); 373 374 #if NRND > 0 375 rnd_attach_source(&sc->rnd_source, device_xname(&sc->sc_dev), 376 RND_TYPE_NET, 0); 377 #endif 378 379 temp = bus_space_read_1(iot, ioh, INT_NO_REG); 380 bus_space_write_1(iot, ioh, INT_NO_REG, (temp & 0xf8) | sc->mappedirq); 381 } 382 383 void 384 iystop(struct iy_softc *sc) 385 { 386 bus_space_tag_t iot; 387 bus_space_handle_t ioh; 388 #ifdef IYDEBUG 389 u_int p, v; 390 #endif 391 392 iot = sc->sc_iot; 393 ioh = sc->sc_ioh; 394 395 bus_space_write_1(iot, ioh, COMMAND_REG, RCV_DISABLE_CMD); 396 397 bus_space_write_1(iot, ioh, INT_MASK_REG, ALL_INTS); 398 bus_space_write_1(iot, ioh, STATUS_REG, ALL_INTS); 399 400 bus_space_write_1(iot, ioh, COMMAND_REG, RESET_CMD); 401 delay(200); 402 #ifdef IYDEBUG 403 printf("%s: dumping tx chain (st 0x%x end 0x%x last 0x%x)\n", 404 device_xname(&sc->sc_dev), sc->tx_start, sc->tx_end, sc->tx_last); 405 p = sc->tx_last; 406 if (!p) 407 p = sc->tx_start; 408 do { 409 char sbuf[128]; 410 411 bus_space_write_2(iot, ioh, HOST_ADDR_REG, p); 412 413 v = le16toh(bus_space_read_stream_2(iot, ioh, MEM_PORT_REG)); 414 snprintb(sbuf, sizeof(sbuf), "\020\006Ab\010Dn", v); 415 printf("0x%04x: %s ", p, sbuf); 416 417 v = le16toh(bus_space_read_stream_2(iot, ioh, MEM_PORT_REG)); 418 snprintb(sbuf, sizeof(sbuf), 419 "\020\6MAX_COL\7HRT_BEAT\010TX_DEF\011UND_RUN" 420 "\012JERR\013LST_CRS\014LTCOL\016TX_OK\020COLL", v); 421 printf("0x%s", sbuf); 422 423 p = le16toh(bus_space_read_stream_2(iot, ioh, MEM_PORT_REG)); 424 printf(" 0x%04x", p); 425 426 v = le16toh(bus_space_read_stream_2(iot, ioh, MEM_PORT_REG)); 427 snprintb(sbuf, sizeof(sbuf), "\020\020Ch", v); 428 printf(" 0x%s\n", sbuf); 429 430 } while (v & 0x8000); 431 #endif 432 sc->tx_start = sc->tx_end = sc->rx_size; 433 sc->tx_last = 0; 434 sc->sc_ethercom.ec_if.if_flags &= ~(IFF_RUNNING|IFF_OACTIVE); 435 } 436 437 void 438 iyreset(struct iy_softc *sc) 439 { 440 int s; 441 s = splnet(); 442 iystop(sc); 443 iyinit(sc); 444 splx(s); 445 } 446 447 void 448 iyinit(struct iy_softc *sc) 449 { 450 int i; 451 unsigned temp; 452 struct ifnet *ifp; 453 bus_space_tag_t iot; 454 bus_space_handle_t ioh; 455 456 iot = sc->sc_iot; 457 ioh = sc->sc_ioh; 458 459 ifp = &sc->sc_ethercom.ec_if; 460 #ifdef IYDEBUG 461 printf("ifp is %p\n", ifp); 462 #endif 463 464 bus_space_write_1(iot, ioh, 0, BANK_SEL(2)); 465 466 temp = bus_space_read_1(iot, ioh, EEPROM_REG); 467 if (temp & 0x10) 468 bus_space_write_1(iot, ioh, EEPROM_REG, temp & ~0x10); 469 470 for (i=0; i<6; ++i) { 471 bus_space_write_1(iot, ioh, I_ADD(i), CLLADDR(ifp->if_sadl)[i]); 472 } 473 474 temp = bus_space_read_1(iot, ioh, REG1); 475 bus_space_write_1(iot, ioh, REG1, 476 temp | /* XMT_CHAIN_INT | XMT_CHAIN_ERRSTOP | */ RCV_DISCARD_BAD); 477 478 if (ifp->if_flags & (IFF_PROMISC|IFF_ALLMULTI)) { 479 temp = MATCH_ALL; 480 } else 481 temp = MATCH_BRDCST; 482 483 bus_space_write_1(iot, ioh, RECV_MODES_REG, temp); 484 485 #ifdef IYDEBUG 486 { 487 char sbuf[128]; 488 489 snprintb(sbuf, sizeof(sbuf), 490 "\020\1PRMSC\2NOBRDST\3SEECRC\4LENGTH\5NOSaIns\6MultiIA", 491 temp); 492 493 printf("%s: RECV_MODES set to %s\n", device_xname(&sc->sc_dev), sbuf); 494 } 495 #endif 496 /* XXX VOODOO */ 497 temp = bus_space_read_1(iot, ioh, MEDIA_SELECT); 498 bus_space_write_1(iot, ioh, MEDIA_SELECT, temp); 499 /* XXX END OF VOODOO */ 500 501 502 delay(500000); /* for the hardware to test for the connector */ 503 504 temp = bus_space_read_1(iot, ioh, MEDIA_SELECT); 505 #ifdef IYDEBUG 506 { 507 char sbuf[128]; 508 509 snprintb(sbuf, sizeof(sbuf), 510 "\020\1LnkInDis\2PolCor\3TPE\4JabberDis\5NoAport\6BNC", 511 temp); 512 printf("%s: media select was 0x%s ", device_xname(&sc->sc_dev), sbuf); 513 } 514 #endif 515 temp = (temp & TEST_MODE_MASK); 516 517 switch(IFM_SUBTYPE(sc->iy_ifmedia.ifm_media)) { 518 case IFM_10_5: 519 temp &= ~ (BNC_BIT | TPE_BIT); 520 break; 521 522 case IFM_10_2: 523 temp = (temp & ~TPE_BIT) | BNC_BIT; 524 break; 525 526 case IFM_10_T: 527 temp = (temp & ~BNC_BIT) | TPE_BIT; 528 break; 529 default: 530 ; 531 /* nothing; leave as it is */ 532 } 533 switch (temp & (BNC_BIT | TPE_BIT)) { 534 case BNC_BIT: 535 sc->iy_media = IFM_ETHER | IFM_10_2; 536 break; 537 case TPE_BIT: 538 sc->iy_media = IFM_ETHER | IFM_10_T; 539 break; 540 default: 541 sc->iy_media = IFM_ETHER | IFM_10_5; 542 } 543 544 bus_space_write_1(iot, ioh, MEDIA_SELECT, temp); 545 #ifdef IYDEBUG 546 { 547 char sbuf[128]; 548 549 snprintb(sbuf, sizeof(sbuf), 550 "\020\1LnkInDis\2PolCor\3TPE\4JabberDis\5NoAport\6BNC", 551 temp); 552 printf("changed to 0x%s\n", sbuf); 553 } 554 #endif 555 556 bus_space_write_1(iot, ioh, 0, BANK_SEL(0)); 557 bus_space_write_1(iot, ioh, INT_MASK_REG, ALL_INTS); 558 bus_space_write_1(iot, ioh, 0, BANK_SEL(1)); 559 560 temp = bus_space_read_1(iot, ioh, INT_NO_REG); 561 bus_space_write_1(iot, ioh, INT_NO_REG, (temp & 0xf8) | sc->mappedirq); 562 563 #ifdef IYDEBUG 564 { 565 char sbuf[128]; 566 567 snprintb(sbuf, sizeof(sbuf), 568 "\020\4bad_irq\010flash/boot present", temp); 569 570 printf("%s: int no was %s\n", device_xname(&sc->sc_dev), sbuf); 571 572 temp = bus_space_read_1(iot, ioh, INT_NO_REG); 573 snprintb(sbuf, sizeof(sbuf), 574 "\020\4bad_irq\010flash/boot present", temp); 575 printf("%s: int no now %s\n", device_xname(&sc->sc_dev), sbuf); 576 } 577 #endif 578 579 bus_space_write_1(iot, ioh, RCV_LOWER_LIMIT_REG, 0); 580 bus_space_write_1(iot, ioh, RCV_UPPER_LIMIT_REG, (sc->rx_size -2) >>8); 581 bus_space_write_1(iot, ioh, XMT_LOWER_LIMIT_REG, sc->rx_size >>8); 582 bus_space_write_1(iot, ioh, XMT_UPPER_LIMIT_REG, (sc->sram - 2) >>8); 583 584 temp = bus_space_read_1(iot, ioh, REG1); 585 #ifdef IYDEBUG 586 { 587 char sbuf[128]; 588 589 snprintb(sbuf, sizeof(sbuf), "\020\2WORD_WIDTH\010INT_ENABLE", 590 temp); 591 592 printf("%s: HW access is %s\n", device_xname(&sc->sc_dev), sbuf); 593 } 594 #endif 595 bus_space_write_1(iot, ioh, REG1, temp | INT_ENABLE); /* XXX what about WORD_WIDTH? */ 596 597 #ifdef IYDEBUG 598 { 599 char sbuf[128]; 600 601 temp = bus_space_read_1(iot, ioh, REG1); 602 snprintb(sbuf, sizeof(sbuf), "\020\2WORD_WIDTH\010INT_ENABLE", 603 temp); 604 printf("%s: HW access is %s\n", device_xname(&sc->sc_dev), sbuf); 605 } 606 #endif 607 608 bus_space_write_1(iot, ioh, 0, BANK_SEL(0)); 609 610 bus_space_write_1(iot, ioh, INT_MASK_REG, ALL_INTS & ~(RX_BIT|TX_BIT)); 611 bus_space_write_1(iot, ioh, STATUS_REG, ALL_INTS); /* clear ints */ 612 613 bus_space_write_1(iot, ioh, RCV_COPY_THRESHOLD, 0); 614 615 bus_space_write_2(iot, ioh, RCV_START_LOW, 0); 616 bus_space_write_2(iot, ioh, RCV_STOP_LOW, sc->rx_size - 2); 617 sc->rx_start = 0; 618 619 bus_space_write_1(iot, ioh, 0, SEL_RESET_CMD); 620 delay(200); 621 622 bus_space_write_2(iot, ioh, XMT_ADDR_REG, sc->rx_size); 623 624 sc->tx_start = sc->tx_end = sc->rx_size; 625 sc->tx_last = 0; 626 627 bus_space_write_1(iot, ioh, 0, RCV_ENABLE_CMD); 628 629 ifp->if_flags |= IFF_RUNNING; 630 ifp->if_flags &= ~IFF_OACTIVE; 631 } 632 633 void 634 iystart(struct ifnet *ifp) 635 { 636 struct iy_softc *sc; 637 638 639 struct mbuf *m0, *m; 640 u_int len, pad, last, end; 641 u_int llen, residual; 642 int avail; 643 char *data; 644 unsigned temp; 645 u_int16_t resval, stat; 646 bus_space_tag_t iot; 647 bus_space_handle_t ioh; 648 649 #ifdef IYDEBUG 650 printf("iystart called\n"); 651 #endif 652 sc = ifp->if_softc; 653 654 if ((ifp->if_flags & (IFF_RUNNING | IFF_OACTIVE)) != IFF_RUNNING) 655 return; 656 657 iy_intr_tx(sc); 658 659 iot = sc->sc_iot; 660 ioh = sc->sc_ioh; 661 662 for (;;) { 663 IFQ_POLL(&ifp->if_snd, m0); 664 if (m0 == NULL) 665 break; 666 #ifdef IYDEBUG 667 printf("%s: trying to write another packet to the hardware\n", 668 device_xname(&sc->sc_dev)); 669 #endif 670 671 /* We need to use m->m_pkthdr.len, so require the header */ 672 if ((m0->m_flags & M_PKTHDR) == 0) 673 panic("iystart: no header mbuf"); 674 675 len = m0->m_pkthdr.len; 676 pad = len & 1; 677 678 #ifdef IYDEBUG 679 printf("%s: length is %d.\n", device_xname(&sc->sc_dev), len); 680 #endif 681 if (len < (ETHER_MIN_LEN - ETHER_CRC_LEN)) { 682 pad = ETHER_MIN_LEN - ETHER_CRC_LEN - len; 683 } 684 685 if (len + pad > ETHER_MAX_LEN) { 686 /* packet is obviously too large: toss it */ 687 ++ifp->if_oerrors; 688 IFQ_DEQUEUE(&ifp->if_snd, m0); 689 m_freem(m0); 690 continue; 691 } 692 693 #if NBPFILTER > 0 694 if (ifp->if_bpf) 695 bpf_mtap(ifp->if_bpf, m0); 696 #endif 697 698 avail = sc->tx_start - sc->tx_end; 699 if (avail <= 0) 700 avail += sc->tx_size; 701 702 #ifdef IYDEBUG 703 printf("%s: avail is %d.\n", device_xname(&sc->sc_dev), avail); 704 #endif 705 /* 706 * we MUST RUN at splnet here --- 707 * XXX todo: or even turn off the boards ints ??? hm... 708 */ 709 710 /* See if there is room to put another packet in the buffer. */ 711 712 if ((len+pad+2*I595_XMT_HDRLEN) > avail) { 713 #ifdef IYDEBUG 714 printf("%s: len = %d, avail = %d, setting OACTIVE\n", 715 device_xname(&sc->sc_dev), len, avail); 716 #endif 717 /* mark interface as full ... */ 718 ifp->if_flags |= IFF_OACTIVE; 719 720 /* and wait for any transmission result */ 721 bus_space_write_1(iot, ioh, 0, BANK_SEL(2)); 722 723 temp = bus_space_read_1(iot, ioh, REG1); 724 bus_space_write_1(iot, ioh, REG1, 725 temp & ~XMT_CHAIN_INT); 726 727 bus_space_write_1(iot, ioh, 0, BANK_SEL(0)); 728 729 return; 730 } 731 732 /* we know it fits in the hardware now, so dequeue it */ 733 IFQ_DEQUEUE(&ifp->if_snd, m0); 734 735 last = sc->tx_end; 736 end = last + pad + len + I595_XMT_HDRLEN; 737 738 if (end >= sc->sram) { 739 if ((sc->sram - last) <= I595_XMT_HDRLEN) { 740 /* keep header in one piece */ 741 last = sc->rx_size; 742 end = last + pad + len + I595_XMT_HDRLEN; 743 } else 744 end -= sc->tx_size; 745 } 746 747 bus_space_write_2(iot, ioh, HOST_ADDR_REG, last); 748 bus_space_write_stream_2(iot, ioh, MEM_PORT_REG, 749 htole16(XMT_CMD)); 750 751 bus_space_write_2(iot, ioh, MEM_PORT_REG, 0); 752 bus_space_write_2(iot, ioh, MEM_PORT_REG, 0); 753 754 bus_space_write_stream_2(iot, ioh, MEM_PORT_REG, 755 htole16(len + pad)); 756 757 residual = resval = 0; 758 759 while ((m = m0)!=0) { 760 data = mtod(m, void *); 761 llen = m->m_len; 762 if (residual) { 763 #ifdef IYDEBUG 764 printf("%s: merging residual with next mbuf.\n", 765 device_xname(&sc->sc_dev)); 766 #endif 767 resval |= *data << 8; 768 bus_space_write_stream_2(iot, ioh, 769 MEM_PORT_REG, resval); 770 --llen; 771 ++data; 772 } 773 /* 774 * XXX ALIGNMENT LOSSAGE HERE. 775 */ 776 if (llen > 1) 777 bus_space_write_multi_stream_2(iot, ioh, 778 MEM_PORT_REG, (u_int16_t *) data, 779 llen>>1); 780 residual = llen & 1; 781 if (residual) { 782 resval = *(data + llen - 1); 783 #ifdef IYDEBUG 784 printf("%s: got odd mbuf to send.\n", 785 device_xname(&sc->sc_dev)); 786 #endif 787 } 788 789 MFREE(m, m0); 790 } 791 792 if (residual) 793 bus_space_write_stream_2(iot, ioh, MEM_PORT_REG, 794 resval); 795 796 pad >>= 1; 797 while (pad-- > 0) 798 bus_space_write_stream_2(iot, ioh, MEM_PORT_REG, 0); 799 800 #ifdef IYDEBUG 801 printf("%s: new last = 0x%x, end = 0x%x.\n", 802 device_xname(&sc->sc_dev), last, end); 803 printf("%s: old start = 0x%x, end = 0x%x, last = 0x%x\n", 804 device_xname(&sc->sc_dev), sc->tx_start, sc->tx_end, sc->tx_last); 805 #endif 806 807 if (sc->tx_start != sc->tx_end) { 808 bus_space_write_2(iot, ioh, HOST_ADDR_REG, 809 sc->tx_last + XMT_COUNT); 810 811 /* 812 * XXX We keep stat in le order, to potentially save 813 * a byte swap. 814 */ 815 stat = bus_space_read_stream_2(iot, ioh, MEM_PORT_REG); 816 817 bus_space_write_2(iot, ioh, HOST_ADDR_REG, 818 sc->tx_last + XMT_CHAIN); 819 820 bus_space_write_stream_2(iot, ioh, MEM_PORT_REG, 821 htole16(last)); 822 823 bus_space_write_stream_2(iot, ioh, MEM_PORT_REG, 824 stat | htole16(CHAIN)); 825 #ifdef IYDEBUG 826 printf("%s: setting 0x%x to 0x%x\n", 827 device_xname(&sc->sc_dev), sc->tx_last + XMT_COUNT, 828 le16toh(stat) | CHAIN); 829 #endif 830 } 831 stat = bus_space_read_2(iot, ioh, MEM_PORT_REG); /* dummy read */ 832 833 /* XXX todo: enable ints here if disabled */ 834 835 ++ifp->if_opackets; 836 837 if (sc->tx_start == sc->tx_end) { 838 bus_space_write_2(iot, ioh, XMT_ADDR_REG, last); 839 bus_space_write_1(iot, ioh, 0, XMT_CMD); 840 sc->tx_start = last; 841 #ifdef IYDEBUG 842 printf("%s: writing 0x%x to XAR and giving XCMD\n", 843 device_xname(&sc->sc_dev), last); 844 #endif 845 } else { 846 bus_space_write_1(iot, ioh, 0, RESUME_XMT_CMD); 847 #ifdef IYDEBUG 848 printf("%s: giving RESUME_XCMD\n", 849 device_xname(&sc->sc_dev)); 850 #endif 851 } 852 sc->tx_last = last; 853 sc->tx_end = end; 854 } 855 /* and wait only for end of transmission chain */ 856 bus_space_write_1(iot, ioh, 0, BANK_SEL(2)); 857 858 temp = bus_space_read_1(iot, ioh, REG1); 859 bus_space_write_1(iot, ioh, REG1, temp | XMT_CHAIN_INT); 860 861 bus_space_write_1(iot, ioh, 0, BANK_SEL(0)); 862 } 863 864 865 static inline void 866 eepromwritebit(bus_space_tag_t iot, bus_space_handle_t ioh, int what) 867 { 868 bus_space_write_1(iot, ioh, EEPROM_REG, what); 869 delay(1); 870 bus_space_write_1(iot, ioh, EEPROM_REG, what|EESK); 871 delay(1); 872 bus_space_write_1(iot, ioh, EEPROM_REG, what); 873 delay(1); 874 } 875 876 static inline int 877 eepromreadbit(bus_space_tag_t iot, bus_space_handle_t ioh) 878 { 879 int b; 880 881 bus_space_write_1(iot, ioh, EEPROM_REG, EECS|EESK); 882 delay(1); 883 b = bus_space_read_1(iot, ioh, EEPROM_REG); 884 bus_space_write_1(iot, ioh, EEPROM_REG, EECS); 885 delay(1); 886 887 return ((b & EEDO) != 0); 888 } 889 890 static u_int16_t 891 eepromread(bus_space_tag_t iot, bus_space_handle_t ioh, int offset) 892 { 893 volatile int i; 894 volatile int j; 895 volatile u_int16_t readval; 896 897 bus_space_write_1(iot, ioh, 0, BANK_SEL(2)); 898 delay(1); 899 bus_space_write_1(iot, ioh, EEPROM_REG, EECS); /* XXXX??? */ 900 delay(1); 901 902 eepromwritebit(iot, ioh, EECS|EEDI); 903 eepromwritebit(iot, ioh, EECS|EEDI); 904 eepromwritebit(iot, ioh, EECS); 905 906 for (j=5; j>=0; --j) { 907 if ((offset>>j) & 1) 908 eepromwritebit(iot, ioh, EECS|EEDI); 909 else 910 eepromwritebit(iot, ioh, EECS); 911 } 912 913 for (readval=0, i=0; i<16; ++i) { 914 readval<<=1; 915 readval |= eepromreadbit(iot, ioh); 916 } 917 918 bus_space_write_1(iot, ioh, EEPROM_REG, 0|EESK); 919 delay(1); 920 bus_space_write_1(iot, ioh, EEPROM_REG, 0); 921 922 bus_space_write_1(iot, ioh, COMMAND_REG, BANK_SEL(0)); 923 924 return readval; 925 } 926 927 /* 928 * Device timeout/watchdog routine. Entered if the device neglects to generate 929 * an interrupt after a transmit has been started on it. 930 */ 931 void 932 iywatchdog(struct ifnet *ifp) 933 { 934 struct iy_softc *sc = ifp->if_softc; 935 936 log(LOG_ERR, "%s: device timeout\n", device_xname(&sc->sc_dev)); 937 ++sc->sc_ethercom.ec_if.if_oerrors; 938 iyreset(sc); 939 } 940 941 /* 942 * What to do upon receipt of an interrupt. 943 */ 944 int 945 iyintr(void *arg) 946 { 947 struct iy_softc *sc; 948 struct ifnet *ifp; 949 bus_space_tag_t iot; 950 bus_space_handle_t ioh; 951 952 u_short status; 953 954 sc = arg; 955 iot = sc->sc_iot; 956 ioh = sc->sc_ioh; 957 958 ifp = &sc->sc_ethercom.ec_if; 959 960 status = bus_space_read_1(iot, ioh, STATUS_REG); 961 #ifdef IYDEBUG 962 if (status & ALL_INTS) { 963 char sbuf[128]; 964 965 snprintb(sbuf, sizeof(sbuf), "\020\1RX_STP\2RX\3TX\4EXEC", 966 status); 967 printf("%s: got interrupt %s", device_xname(&sc->sc_dev), sbuf); 968 969 if (status & EXEC_INT) { 970 snprintb(sbuf, sizeof(sbuf), 971 "\020\6ABORT", bus_space_read_1(iot, ioh, 0)); 972 printf(" event %s\n", sbuf); 973 } else 974 printf("\n"); 975 } 976 #endif 977 if ((status & (RX_INT | TX_INT)) == 0) 978 return 0; 979 980 if (status & RX_INT) { 981 iy_intr_rx(sc); 982 bus_space_write_1(iot, ioh, STATUS_REG, RX_INT); 983 } 984 if (status & TX_INT) { 985 /* Tell feeders we may be able to accept more data... */ 986 ifp->if_flags &= ~IFF_OACTIVE; 987 /* and get more data. */ 988 iystart(ifp); 989 bus_space_write_1(iot, ioh, STATUS_REG, TX_INT); 990 } 991 992 #if NRND > 0 993 rnd_add_uint32(&sc->rnd_source, status); 994 #endif 995 996 return 1; 997 } 998 999 void 1000 iyget(struct iy_softc *sc, bus_space_tag_t iot, bus_space_handle_t ioh, int rxlen) 1001 { 1002 struct mbuf *m, *top, **mp; 1003 struct ifnet *ifp; 1004 int len; 1005 1006 ifp = &sc->sc_ethercom.ec_if; 1007 1008 MGETHDR(m, M_DONTWAIT, MT_DATA); 1009 if (m == 0) 1010 goto dropped; 1011 m->m_pkthdr.rcvif = ifp; 1012 m->m_pkthdr.len = rxlen; 1013 len = MHLEN; 1014 top = 0; 1015 mp = ⊤ 1016 1017 while (rxlen > 0) { 1018 if (top) { 1019 MGET(m, M_DONTWAIT, MT_DATA); 1020 if (m == 0) { 1021 m_freem(top); 1022 goto dropped; 1023 } 1024 len = MLEN; 1025 } 1026 if (rxlen >= MINCLSIZE) { 1027 MCLGET(m, M_DONTWAIT); 1028 if ((m->m_flags & M_EXT) == 0) { 1029 m_free(m); 1030 m_freem(top); 1031 goto dropped; 1032 } 1033 len = MCLBYTES; 1034 } 1035 len = min(rxlen, len); 1036 /* 1037 * XXX ALIGNMENT LOSSAGE HERE. 1038 */ 1039 if (len > 1) { 1040 len &= ~1; 1041 1042 bus_space_read_multi_stream_2(iot, ioh, MEM_PORT_REG, 1043 mtod(m, u_int16_t *), len/2); 1044 } else { 1045 #ifdef IYDEBUG 1046 printf("%s: received odd mbuf\n", device_xname(&sc->sc_dev)); 1047 #endif 1048 *(mtod(m, char *)) = bus_space_read_stream_2(iot, ioh, 1049 MEM_PORT_REG); 1050 } 1051 m->m_len = len; 1052 rxlen -= len; 1053 *mp = m; 1054 mp = &m->m_next; 1055 } 1056 1057 if (top == NULL) 1058 return; 1059 1060 /* XXX receive the top here */ 1061 ++ifp->if_ipackets; 1062 1063 1064 #if NBPFILTER > 0 1065 if (ifp->if_bpf) 1066 bpf_mtap(ifp->if_bpf, top); 1067 #endif 1068 (*ifp->if_input)(ifp, top); 1069 return; 1070 1071 dropped: 1072 ++ifp->if_ierrors; 1073 return; 1074 } 1075 1076 void 1077 iy_intr_rx(struct iy_softc *sc) 1078 { 1079 bus_space_tag_t iot; 1080 bus_space_handle_t ioh; 1081 1082 u_int rxadrs, rxevnt, rxstatus, rxnext, rxlen; 1083 1084 iot = sc->sc_iot; 1085 ioh = sc->sc_ioh; 1086 1087 rxadrs = sc->rx_start; 1088 bus_space_write_2(iot, ioh, HOST_ADDR_REG, rxadrs); 1089 rxevnt = le16toh(bus_space_read_stream_2(iot, ioh, MEM_PORT_REG)); 1090 rxnext = 0; 1091 1092 while (rxevnt == RCV_DONE) { 1093 rxstatus = le16toh(bus_space_read_stream_2(iot, ioh, 1094 MEM_PORT_REG)); 1095 rxnext = le16toh(bus_space_read_stream_2(iot, ioh, 1096 MEM_PORT_REG)); 1097 rxlen = le16toh(bus_space_read_stream_2(iot, ioh, 1098 MEM_PORT_REG)); 1099 #ifdef IYDEBUG 1100 { 1101 char sbuf[128]; 1102 1103 snprintb(sbuf, sizeof(sbuf), 1104 "\020\1RCLD\2IA_MCH\010SHORT\011OVRN\013ALGERR" 1105 "\014CRCERR\015LENERR\016RCVOK\020TYP", rxstatus); 1106 1107 printf("%s: pck at 0x%04x stat %s next 0x%x len 0x%x\n", 1108 device_xname(&sc->sc_dev), rxadrs, sbuf, rxnext, rxlen); 1109 } 1110 #endif 1111 iyget(sc, iot, ioh, rxlen); 1112 1113 /* move stop address */ 1114 bus_space_write_2(iot, ioh, RCV_STOP_LOW, 1115 rxnext == 0 ? sc->rx_size - 2 : rxnext - 2); 1116 1117 bus_space_write_2(iot, ioh, HOST_ADDR_REG, rxnext); 1118 rxadrs = rxnext; 1119 rxevnt = le16toh(bus_space_read_stream_2(iot, ioh, 1120 MEM_PORT_REG)); 1121 } 1122 sc->rx_start = rxnext; 1123 } 1124 1125 void 1126 iy_intr_tx(struct iy_softc *sc) 1127 { 1128 bus_space_tag_t iot; 1129 bus_space_handle_t ioh; 1130 struct ifnet *ifp; 1131 u_int txstatus, txstat2, txlen, txnext; 1132 1133 ifp = &sc->sc_ethercom.ec_if; 1134 iot = sc->sc_iot; 1135 ioh = sc->sc_ioh; 1136 1137 while (sc->tx_start != sc->tx_end) { 1138 bus_space_write_2(iot, ioh, HOST_ADDR_REG, sc->tx_start); 1139 txstatus = le16toh(bus_space_read_stream_2(iot, ioh, 1140 MEM_PORT_REG)); 1141 1142 if ((txstatus & (TX_DONE|CMD_MASK)) != (TX_DONE|XMT_CMD)) 1143 break; 1144 1145 txstat2 = le16toh(bus_space_read_stream_2(iot, ioh, 1146 MEM_PORT_REG)); 1147 txnext = le16toh(bus_space_read_stream_2(iot, ioh, 1148 MEM_PORT_REG)); 1149 txlen = le16toh(bus_space_read_stream_2(iot, ioh, 1150 MEM_PORT_REG)); 1151 #ifdef IYDEBUG 1152 { 1153 char sbuf[128]; 1154 1155 snprintb(sbuf, sizeof(sbuf), 1156 "\020\6MAX_COL\7HRT_BEAT\010TX_DEF" 1157 "\011UND_RUN\012JERR\013LST_CRS" 1158 "\014LTCOL\016TX_OK\020COLL", txstat2); 1159 1160 printf("txstat 0x%x stat2 0x%s next 0x%x len 0x%x\n", 1161 txstatus, sbuf, txnext, txlen); 1162 } 1163 #endif 1164 if (txlen & CHAIN) 1165 sc->tx_start = txnext; 1166 else 1167 sc->tx_start = sc->tx_end; 1168 ifp->if_flags &= ~IFF_OACTIVE; 1169 1170 if (txstat2 & 0x0020) 1171 ifp->if_collisions += 16; 1172 else 1173 ifp->if_collisions += txstat2 & 0x000f; 1174 1175 if ((txstat2 & 0x2000) == 0) 1176 ++ifp->if_oerrors; 1177 } 1178 } 1179 1180 int 1181 iyioctl(struct ifnet *ifp, u_long cmd, void *data) 1182 { 1183 struct iy_softc *sc; 1184 struct ifaddr *ifa; 1185 struct ifreq *ifr; 1186 int s, error = 0; 1187 1188 sc = ifp->if_softc; 1189 ifa = (struct ifaddr *)data; 1190 ifr = (struct ifreq *)data; 1191 1192 #ifdef IYDEBUG 1193 printf("iyioctl called with ifp %p (%s) cmd 0x%lx data %p\n", 1194 ifp, ifp->if_xname, cmd, data); 1195 #endif 1196 1197 s = splnet(); 1198 1199 switch (cmd) { 1200 1201 case SIOCINITIFADDR: 1202 ifp->if_flags |= IFF_UP; 1203 1204 iyinit(sc); 1205 switch (ifa->ifa_addr->sa_family) { 1206 #ifdef INET 1207 case AF_INET: 1208 arp_ifinit(ifp, ifa); 1209 break; 1210 #endif 1211 default: 1212 break; 1213 } 1214 break; 1215 1216 case SIOCSIFFLAGS: 1217 if ((error = ifioctl_common(ifp, cmd, data)) != 0) 1218 break; 1219 sc->promisc = ifp->if_flags & (IFF_PROMISC | IFF_ALLMULTI); 1220 /* XXX re-use ether_ioctl() */ 1221 switch (ifp->if_flags & (IFF_UP|IFF_RUNNING)) { 1222 case IFF_RUNNING: 1223 /* 1224 * If interface is marked down and it is running, then 1225 * stop it. 1226 */ 1227 iystop(sc); 1228 ifp->if_flags &= ~IFF_RUNNING; 1229 break; 1230 case IFF_UP: 1231 /* 1232 * If interface is marked up and it is stopped, then 1233 * start it. 1234 */ 1235 iyinit(sc); 1236 break; 1237 default: 1238 /* 1239 * Reset the interface to pick up changes in any other 1240 * flags that affect hardware registers. 1241 */ 1242 iystop(sc); 1243 iyinit(sc); 1244 break; 1245 } 1246 #ifdef IYDEBUGX 1247 if (ifp->if_flags & IFF_DEBUG) 1248 sc->sc_debug = IFY_ALL; 1249 else 1250 sc->sc_debug = 0; 1251 #endif 1252 break; 1253 1254 case SIOCADDMULTI: 1255 case SIOCDELMULTI: 1256 if ((error = ether_ioctl(ifp, cmd, data)) == ENETRESET) { 1257 /* 1258 * Multicast list has changed; set the hardware filter 1259 * accordingly. 1260 */ 1261 if (ifp->if_flags & IFF_RUNNING) { 1262 /* XXX can't make it work otherwise */ 1263 iyreset(sc); 1264 iy_mc_reset(sc); 1265 } 1266 error = 0; 1267 } 1268 break; 1269 1270 case SIOCSIFMEDIA: 1271 case SIOCGIFMEDIA: 1272 error = ifmedia_ioctl(ifp, ifr, &sc->iy_ifmedia, cmd); 1273 break; 1274 default: 1275 error = ether_ioctl(ifp, cmd, data); 1276 } 1277 splx(s); 1278 return error; 1279 } 1280 1281 int 1282 iy_mediachange(struct ifnet *ifp) 1283 { 1284 struct iy_softc *sc = ifp->if_softc; 1285 1286 if (IFM_TYPE(sc->iy_ifmedia.ifm_media) != IFM_ETHER) 1287 return EINVAL; 1288 switch(IFM_SUBTYPE(sc->iy_ifmedia.ifm_media)) { 1289 case IFM_10_5: 1290 case IFM_10_2: 1291 case IFM_10_T: 1292 case IFM_AUTO: 1293 iystop(sc); 1294 iyinit(sc); 1295 return 0; 1296 default: 1297 return EINVAL; 1298 } 1299 } 1300 1301 void 1302 iy_mediastatus(struct ifnet *ifp, struct ifmediareq *ifmr) 1303 { 1304 struct iy_softc *sc = ifp->if_softc; 1305 1306 ifmr->ifm_active = sc->iy_media; 1307 ifmr->ifm_status = IFM_AVALID | IFM_ACTIVE; 1308 } 1309 1310 1311 static void 1312 iy_mc_setup(struct iy_softc *sc) 1313 { 1314 struct ether_multi *enm; 1315 struct ether_multistep step; 1316 struct ethercom *ecp; 1317 struct ifnet *ifp; 1318 bus_space_tag_t iot; 1319 bus_space_handle_t ioh; 1320 int avail, last /*, end*/ , len; 1321 int timeout; 1322 volatile u_int16_t dum; 1323 u_int8_t temp; 1324 1325 1326 ecp = &sc->sc_ethercom; 1327 ifp = &ecp->ec_if; 1328 1329 iot = sc->sc_iot; 1330 ioh = sc->sc_ioh; 1331 1332 len = 6 * ecp->ec_multicnt; 1333 1334 avail = sc->tx_start - sc->tx_end; 1335 if (avail <= 0) 1336 avail += sc->tx_size; 1337 if (ifp->if_flags & IFF_DEBUG) 1338 printf("%s: iy_mc_setup called, %d addresses, " 1339 "%d/%d bytes needed/avail\n", ifp->if_xname, 1340 ecp->ec_multicnt, len + I595_XMT_HDRLEN, avail); 1341 1342 last = sc->rx_size; 1343 1344 bus_space_write_1(iot, ioh, 0, BANK_SEL(2)); 1345 bus_space_write_1(iot, ioh, RECV_MODES_REG, MATCH_BRDCST); 1346 /* XXX VOODOO */ 1347 temp = bus_space_read_1(iot, ioh, MEDIA_SELECT); 1348 bus_space_write_1(iot, ioh, MEDIA_SELECT, temp); 1349 /* XXX END OF VOODOO */ 1350 bus_space_write_1(iot, ioh, 0, BANK_SEL(0)); 1351 bus_space_write_2(iot, ioh, HOST_ADDR_REG, last); 1352 bus_space_write_stream_2(iot, ioh, MEM_PORT_REG, htole16(MC_SETUP_CMD)); 1353 bus_space_write_2(iot, ioh, MEM_PORT_REG, 0); 1354 bus_space_write_2(iot, ioh, MEM_PORT_REG, 0); 1355 bus_space_write_stream_2(iot, ioh, MEM_PORT_REG, htole16(len)); 1356 1357 ETHER_FIRST_MULTI(step, ecp, enm); 1358 while(enm) { 1359 /* 1360 * XXX ALIGNMENT LOSSAGE HERE? 1361 */ 1362 bus_space_write_multi_stream_2(iot, ioh, MEM_PORT_REG, 1363 (u_int16_t *) enm->enm_addrlo, 3); 1364 1365 ETHER_NEXT_MULTI(step, enm); 1366 } 1367 dum = bus_space_read_2(iot, ioh, MEM_PORT_REG); /* dummy read */ 1368 bus_space_write_2(iot, ioh, XMT_ADDR_REG, last); 1369 bus_space_write_1(iot, ioh, 0, MC_SETUP_CMD); 1370 1371 1372 sc->tx_start = sc->rx_size; 1373 sc->tx_end = sc->rx_size + I595_XMT_HDRLEN + len; 1374 1375 for (timeout=0; timeout<100; timeout++) { 1376 DELAY(2); 1377 if ((bus_space_read_1(iot, ioh, STATUS_REG) & EXEC_INT) == 0) 1378 continue; 1379 1380 temp = bus_space_read_1(iot, ioh, 0); 1381 bus_space_write_1(iot, ioh, STATUS_REG, EXEC_INT); 1382 #ifdef DIAGNOSTIC 1383 if (temp & 0x20) { 1384 aprint_error_dev(&sc->sc_dev, "mc setup failed, %d usec\n", 1385 timeout * 2); 1386 } else if (((temp & 0x0f) == 0x03) && 1387 (ifp->if_flags & IFF_DEBUG)) { 1388 printf("%s: mc setup done, %d usec\n", 1389 device_xname(&sc->sc_dev), timeout * 2); 1390 } 1391 #endif 1392 break; 1393 } 1394 sc->tx_start = sc->tx_end; 1395 ifp->if_flags &= ~IFF_OACTIVE; 1396 1397 } 1398 1399 static void 1400 iy_mc_reset(struct iy_softc *sc) 1401 { 1402 struct ether_multi *enm; 1403 struct ether_multistep step; 1404 struct ethercom *ecp; 1405 struct ifnet *ifp; 1406 bus_space_tag_t iot; 1407 bus_space_handle_t ioh; 1408 u_int16_t temp; 1409 1410 ecp = &sc->sc_ethercom; 1411 ifp = &ecp->ec_if; 1412 1413 iot = sc->sc_iot; 1414 ioh = sc->sc_ioh; 1415 1416 if (ecp->ec_multicnt > 63) { 1417 ifp->if_flags |= IFF_ALLMULTI; 1418 1419 } else if (ecp->ec_multicnt > 0) { 1420 /* 1421 * Step through the list of addresses. 1422 */ 1423 ETHER_FIRST_MULTI(step, ecp, enm); 1424 while(enm) { 1425 if (memcmp(enm->enm_addrlo, enm->enm_addrhi, 6) != 0) { 1426 ifp->if_flags |= IFF_ALLMULTI; 1427 goto setupmulti; 1428 } 1429 ETHER_NEXT_MULTI(step, enm); 1430 } 1431 /* OK, we really need to do it now: */ 1432 #if 0 1433 if ((ifp->if_flags & (IFF_RUNNING | IFF_OACTIVE)) 1434 != IFF_RUNNING) { 1435 ifp->if_flags |= IFF_OACTIVE; 1436 sc->want_mc_setup = 1; 1437 return; 1438 } 1439 #endif 1440 iy_mc_setup(sc); 1441 } else { 1442 ifp->if_flags &= ~IFF_ALLMULTI; 1443 } 1444 1445 setupmulti: 1446 bus_space_write_1(iot, ioh, 0, BANK_SEL(2)); 1447 if (ifp->if_flags & (IFF_PROMISC|IFF_ALLMULTI)) { 1448 temp = MATCH_ALL; 1449 } else 1450 temp = MATCH_BRDCST; 1451 1452 bus_space_write_1(iot, ioh, RECV_MODES_REG, temp); 1453 /* XXX VOODOO */ 1454 temp = bus_space_read_1(iot, ioh, MEDIA_SELECT); 1455 bus_space_write_1(iot, ioh, MEDIA_SELECT, temp); 1456 /* XXX END OF VOODOO */ 1457 1458 /* XXX TBD: setup hardware for all multicasts */ 1459 bus_space_write_1(iot, ioh, 0, BANK_SEL(0)); 1460 return; 1461 } 1462 1463 #ifdef IYDEBUGX 1464 void 1465 print_rbd(volatile struct ie_recv_buf_desc *rbd) 1466 { 1467 printf("RBD at %08lx:\nactual %04x, next %04x, buffer %08x\n" 1468 "length %04x, mbz %04x\n", (u_long)rbd, rbd->ie_rbd_actual, 1469 rbd->ie_rbd_next, rbd->ie_rbd_buffer, rbd->ie_rbd_length, 1470 rbd->mbz); 1471 } 1472 #endif 1473 1474 void 1475 iyprobemem(struct iy_softc *sc) 1476 { 1477 bus_space_tag_t iot; 1478 bus_space_handle_t ioh; 1479 int testing; 1480 1481 iot = sc->sc_iot; 1482 ioh = sc->sc_ioh; 1483 1484 bus_space_write_1(iot, ioh, COMMAND_REG, BANK_SEL(0)); 1485 delay(1); 1486 bus_space_write_2(iot, ioh, HOST_ADDR_REG, 4096-2); 1487 bus_space_write_2(iot, ioh, MEM_PORT_REG, 0); 1488 1489 for (testing=65536; testing >= 4096; testing >>= 1) { 1490 bus_space_write_2(iot, ioh, HOST_ADDR_REG, testing-2); 1491 bus_space_write_2(iot, ioh, MEM_PORT_REG, 0xdead); 1492 bus_space_write_2(iot, ioh, HOST_ADDR_REG, testing-2); 1493 if (bus_space_read_2(iot, ioh, MEM_PORT_REG) != 0xdead) { 1494 #ifdef IYMEMDEBUG 1495 printf("%s: Didn't keep 0xdead at 0x%x\n", 1496 device_xname(&sc->sc_dev), testing-2); 1497 #endif 1498 continue; 1499 } 1500 1501 bus_space_write_2(iot, ioh, HOST_ADDR_REG, testing-2); 1502 bus_space_write_2(iot, ioh, MEM_PORT_REG, 0xbeef); 1503 bus_space_write_2(iot, ioh, HOST_ADDR_REG, testing-2); 1504 if (bus_space_read_2(iot, ioh, MEM_PORT_REG) != 0xbeef) { 1505 #ifdef IYMEMDEBUG 1506 printf("%s: Didn't keep 0xbeef at 0x%x\n", 1507 device_xname(&sc->sc_dev), testing-2); 1508 #endif 1509 continue; 1510 } 1511 1512 bus_space_write_2(iot, ioh, HOST_ADDR_REG, 0); 1513 bus_space_write_2(iot, ioh, MEM_PORT_REG, 0); 1514 bus_space_write_2(iot, ioh, HOST_ADDR_REG, testing >> 1); 1515 bus_space_write_2(iot, ioh, MEM_PORT_REG, testing >> 1); 1516 bus_space_write_2(iot, ioh, HOST_ADDR_REG, 0); 1517 if (bus_space_read_2(iot, ioh, MEM_PORT_REG) == (testing >> 1)) { 1518 #ifdef IYMEMDEBUG 1519 printf("%s: 0x%x alias of 0x0\n", 1520 device_xname(&sc->sc_dev), testing >> 1); 1521 #endif 1522 continue; 1523 } 1524 1525 break; 1526 } 1527 1528 sc->sram = testing; 1529 1530 switch(testing) { 1531 case 65536: 1532 /* 4 NFS packets + overhead RX, 2 NFS + overhead TX */ 1533 sc->rx_size = 44*1024; 1534 break; 1535 1536 case 32768: 1537 /* 2 NFS packets + overhead RX, 1 NFS + overhead TX */ 1538 sc->rx_size = 22*1024; 1539 break; 1540 1541 case 16384: 1542 /* 1 NFS packet + overhead RX, 4 big packets TX */ 1543 sc->rx_size = 10*1024; 1544 break; 1545 default: 1546 sc->rx_size = testing/2; 1547 break; 1548 } 1549 sc->tx_size = testing - sc->rx_size; 1550 } 1551 1552 static int 1553 eepromreadall(bus_space_tag_t iot, bus_space_handle_t ioh, u_int16_t *wordp, int maxi) 1554 { 1555 int i; 1556 u_int16_t checksum, tmp; 1557 1558 checksum = 0; 1559 1560 for (i=0; i<EEPP_LENGTH; ++i) { 1561 tmp = eepromread(iot, ioh, i); 1562 checksum += tmp; 1563 if (i<maxi) 1564 wordp[i] = tmp; 1565 } 1566 1567 if (checksum != EEPP_CHKSUM) { 1568 #ifdef IYDEBUG 1569 printf("wrong EEPROM checksum 0x%x should be 0x%x\n", 1570 checksum, EEPP_CHKSUM); 1571 #endif 1572 return 1; 1573 } 1574 return 0; 1575 } 1576
Indexes created Thu Sep 25 02:09:54 GMT 2025