if_iy.c revision 1.9.4.2
1 /* $NetBSD: if_iy.c,v 1.9.4.2 1997/02/17 20:05:17 is Exp $ */ 2 /* #define IYDEBUG */ 3 /* #define IYMEMDEBUG */ 4 /*- 5 * Copyright (c) 1996 Ignatios Souvatzis. 6 * All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 3. All advertising materials mentioning features or use of this software 17 * must display the following acknowledgement: 18 * This product contains software developed by Ignatios Souvatzis for 19 * the NetBSD project. 20 * 4. The names of the author may not be used to endorse or promote products 21 * derived from this software without specific prior written permission. 22 * 23 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND 24 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 25 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 26 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE 27 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 28 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 29 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 30 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 31 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 32 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 33 * SUCH DAMAGE. 34 */ 35 36 #include "bpfilter.h" 37 38 #include <sys/param.h> 39 #include <sys/systm.h> 40 #include <sys/mbuf.h> 41 #include <sys/buf.h> 42 #include <sys/protosw.h> 43 #include <sys/socket.h> 44 #include <sys/ioctl.h> 45 #include <sys/errno.h> 46 #include <sys/syslog.h> 47 #include <sys/device.h> 48 49 #include <net/if.h> 50 #include <net/if_types.h> 51 #include <net/if_dl.h> 52 #include <net/netisr.h> 53 #include <net/route.h> 54 55 #include <net/if_ether.h> 56 57 #if NBPFILTER > 0 58 #include <net/bpf.h> 59 #include <net/bpfdesc.h> 60 #endif 61 62 #ifdef INET 63 #include <netinet/in.h> 64 #include <netinet/in_systm.h> 65 #include <netinet/in_var.h> 66 #include <netinet/ip.h> 67 #include <netinet/if_ether.h> 68 #endif 69 70 #ifdef NS 71 #include <netns/ns.h> 72 #include <netns/ns_if.h> 73 #endif 74 75 #include <vm/vm.h> 76 77 #include <machine/cpu.h> 78 #include <machine/bus.h> 79 #include <machine/intr.h> 80 81 #include <dev/isa/isareg.h> 82 #include <dev/isa/isavar.h> 83 #include <dev/ic/i82595reg.h> 84 85 #define ETHER_MIN_LEN 64 86 #define ETHER_MAX_LEN 1518 87 88 /* 89 * Ethernet status, per interface. 90 */ 91 struct iy_softc { 92 struct device sc_dev; 93 void *sc_ih; 94 95 bus_space_tag_t sc_iot; 96 bus_space_handle_t sc_ioh; 97 98 struct ethercom sc_ethercom; 99 100 #define MAX_MBS 8 101 struct mbuf *mb[MAX_MBS]; 102 int next_mb, last_mb; 103 104 int mappedirq; 105 106 int hard_vers; 107 108 int promisc; 109 110 int sram, tx_size, rx_size; 111 112 int tx_start, tx_end, tx_last; 113 int rx_start; 114 115 #ifdef IYDEBUG 116 int sc_debug; 117 #endif 118 u_char sc_enaddr[6]; 119 }; 120 121 void iywatchdog __P((struct ifnet *)); 122 int iyioctl __P((struct ifnet *, u_long, caddr_t)); 123 int iyintr __P((void *)); 124 void iyinit __P((struct iy_softc *)); 125 void iystop __P((struct iy_softc *)); 126 void iystart __P((struct ifnet *)); 127 128 void iy_intr_rx __P((struct iy_softc *)); 129 void iy_intr_tx __P((struct iy_softc *)); 130 void eepro_reset_595 __P((struct iy_softc *)); 131 int eepro_probe __P((struct iy_softc *, struct isa_attach_args *)); 132 u_short eepro_read_eeprom __P((struct iy_softc *, int)); 133 134 void iyreset __P((struct iy_softc *)); 135 void iy_readframe __P((struct iy_softc *, int)); 136 void iy_drop_packet_buffer __P((struct iy_softc *)); 137 void iy_find_mem_size __P((struct iy_softc *)); 138 void iyrint __P((struct iy_softc *)); 139 void iytint __P((struct iy_softc *)); 140 void iyxmit __P((struct iy_softc *)); 141 void iyget __P((struct iy_softc *, bus_space_tag_t, bus_space_handle_t, int)); 142 void iymbuffill __P((void *)); 143 void iymbufempty __P((void *)); 144 void iyprobemem __P((struct iy_softc *)); 145 static __inline void eepromwritebit __P((bus_space_tag_t, bus_space_handle_t, 146 bus_size_t, int)); 147 static __inline int eepromreadbit __P((bus_space_tag_t, bus_space_handle_t, 148 bus_size_t)); 149 150 /* 151 * void iymeminit __P((void *, struct iy_softc *)); 152 * static int iy_mc_setup __P((struct iy_softc *, void *)); 153 * static void iy_mc_reset __P((struct iy_softc *)); 154 */ 155 #ifdef IYDEBUGX 156 void print_rbd __P((volatile struct iy_recv_buf_desc *)); 157 158 int in_ifrint = 0; 159 int in_iftint = 0; 160 #endif 161 162 int iyprobe __P((struct device *, void *, void *)); 163 void iyattach __P((struct device *, struct device *, void *)); 164 165 static u_int16_t eepromread __P((bus_space_tag_t, bus_space_handle_t, 166 bus_size_t, int)); 167 168 struct cfattach iy_ca = { 169 sizeof(struct iy_softc), iyprobe, iyattach 170 }; 171 172 struct cfdriver iy_cd = { 173 NULL, "iy", DV_IFNET 174 }; 175 176 static u_int8_t eepro_irqmap[] = EEPP_INTMAP; 177 static u_int8_t eepro_revirqmap[] = EEPP_RINTMAP; 178 179 int 180 iyprobe(parent, match, aux) 181 struct device *parent; 182 void *match, *aux; 183 { 184 struct iy_softc *sc = match; 185 struct isa_attach_args *ia = aux; 186 187 u_int16_t eaddr[8]; 188 189 bus_space_tag_t iot; 190 bus_space_handle_t ioh; 191 192 int i; 193 194 u_int16_t checksum = 0; 195 u_int16_t eepromtmp; 196 u_int8_t c, d; 197 198 iot = ia->ia_iot; 199 200 if (bus_space_map(iot, ia->ia_iobase, 16, 0, &ioh)) 201 goto out; 202 203 /* check here for addresses already given to other devices */ 204 205 206 /* try to find the round robin sig: */ 207 208 c = bus_space_read_1(iot, ioh, ID_REG); 209 if ((c & ID_REG_MASK) != ID_REG_SIG) 210 goto out; 211 212 d = bus_space_read_1(iot, ioh, ID_REG); 213 if ((d & ID_REG_MASK) != ID_REG_SIG) 214 goto out; 215 216 if (((d-c) & R_ROBIN_BITS) != 0x40) 217 goto out; 218 219 d = bus_space_read_1(iot, ioh, ID_REG); 220 if ((d & ID_REG_MASK) != ID_REG_SIG) 221 goto out; 222 223 if (((d-c) & R_ROBIN_BITS) != 0x80) 224 goto out; 225 226 d = bus_space_read_1(iot, ioh, ID_REG); 227 if ((d & ID_REG_MASK) != ID_REG_SIG) 228 goto out; 229 230 if (((d-c) & R_ROBIN_BITS) != 0xC0) 231 goto out; 232 233 d = bus_space_read_1(iot, ioh, ID_REG); 234 if ((d & ID_REG_MASK) != ID_REG_SIG) 235 goto out; 236 237 if (((d-c) & R_ROBIN_BITS) != 0x00) 238 goto out; 239 240 #ifdef IYDEBUG 241 printf("eepro_probe verified working ID reg.\n"); 242 #endif 243 244 for (i=0; i<64; ++i) { 245 eepromtmp = eepromread(iot, ioh, EEPROM_REG, i); 246 checksum += eepromtmp; 247 if (i<(sizeof(eaddr)/sizeof(*eaddr))) 248 eaddr[i] = eepromtmp; 249 } 250 if (checksum != EEPP_CHKSUM) 251 printf("wrong EEPROM checksum 0x%x should be 0x%x\n", 252 checksum, EEPP_CHKSUM); 253 254 255 if ((eaddr[EEPPEther0] != eepromread(iot, ioh, EEPROM_REG, EEPPEther0a)) && 256 (eaddr[EEPPEther1] != eepromread(iot, ioh, EEPROM_REG, EEPPEther1a)) && 257 (eaddr[EEPPEther2] != eepromread(iot, ioh, EEPROM_REG, EEPPEther2a))) 258 printf("EEPROM Ethernet address differs from copy\n"); 259 260 sc->sc_enaddr[1] = eaddr[EEPPEther0] & 0xFF; 261 sc->sc_enaddr[0] = eaddr[EEPPEther0] >> 8; 262 sc->sc_enaddr[3] = eaddr[EEPPEther1] & 0xFF; 263 sc->sc_enaddr[2] = eaddr[EEPPEther1] >> 8; 264 sc->sc_enaddr[5] = eaddr[EEPPEther2] & 0xFF; 265 sc->sc_enaddr[4] = eaddr[EEPPEther2] >> 8; 266 267 if (ia->ia_irq == IRQUNK) 268 ia->ia_irq = eepro_irqmap[eaddr[EEPPW1] & EEPP_Int]; 269 270 if (ia->ia_irq >= sizeof(eepro_revirqmap)) 271 goto out; 272 273 if ((sc->mappedirq = eepro_revirqmap[ia->ia_irq]) == -1) 274 goto out; 275 276 sc->hard_vers = eaddr[EEPW6] & EEPP_BoardRev; 277 278 /* now lets reset the chip */ 279 280 bus_space_write_1(iot, ioh, COMMAND_REG, RESET_CMD); 281 delay(200); 282 283 /* 284 * XXX Sould always unmap, but we can't yet. 285 * XXX Need to squish "indirect" first. 286 */ 287 ia->ia_iosize = 16; 288 289 sc->sc_iot = iot; 290 sc->sc_ioh = ioh; 291 return 1; /* found */ 292 out: 293 bus_space_unmap(iot, ioh, 16); 294 return 0; 295 } 296 297 void 298 iyattach(parent, self, aux) 299 struct device *parent, *self; 300 void *aux; 301 { 302 struct iy_softc *sc = (void *)self; 303 struct isa_attach_args *ia = aux; 304 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 305 bus_space_tag_t iot; 306 bus_space_handle_t ioh; 307 308 /* 309 * XXX Should re-map io and mem, but can't 310 * XXX until we squish "indirect" brokenness. 311 */ 312 iot = sc->sc_iot; /* XXX */ 313 ioh = sc->sc_ioh; /* XXX */ 314 315 bcopy(sc->sc_dev.dv_xname, ifp->if_xname, IFNAMSIZ); 316 ifp->if_softc = sc; 317 ifp->if_start = iystart; 318 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_NOTRAILERS; 319 /* XXX todo: | IFF_MULTICAST */ 320 321 iyprobemem(sc); 322 323 ifp->if_ioctl = iyioctl; 324 ifp->if_watchdog = iywatchdog; 325 326 /* Attach the interface. */ 327 if_attach(ifp); 328 ether_ifattach(ifp, sc->sc_enaddr); 329 printf(": address %s, chip rev. %d, %d kB SRAM\n", 330 ether_sprintf(sc->sc_enaddr), 331 sc->hard_vers, sc->sram/1024); 332 #if NBPFILTER > 0 333 bpfattach(&sc->sc_ethercom.ec_if.if_bpf, ifp, DLT_EN10MB, 334 sizeof(struct ether_header)); 335 #endif 336 337 sc->sc_ih = isa_intr_establish(ia->ia_ic, ia->ia_irq, IST_EDGE, 338 IPL_NET, iyintr, sc); 339 } 340 341 void 342 iystop(sc) 343 struct iy_softc *sc; 344 { 345 bus_space_tag_t iot; 346 bus_space_handle_t ioh; 347 #ifdef IYDEBUG 348 u_int p, v; 349 #endif 350 351 iot = sc->sc_iot; 352 ioh = sc->sc_ioh; 353 354 bus_space_write_1(iot, ioh, COMMAND_REG, RCV_DISABLE_CMD); 355 356 bus_space_write_1(iot, ioh, INT_MASK_REG, ALL_INTS); 357 bus_space_write_1(iot, ioh, STATUS_REG, ALL_INTS); 358 359 bus_space_write_1(iot, ioh, COMMAND_REG, RESET_CMD); 360 delay(200); 361 #ifdef IYDEBUG 362 printf("%s: dumping tx chain (st 0x%x end 0x%x last 0x%x)\n", 363 sc->sc_dev.dv_xname, sc->tx_start, sc->tx_end, sc->tx_last); 364 p = sc->tx_last; 365 if (!p) 366 p = sc->tx_start; 367 do { 368 bus_space_write_2(iot, ioh, HOST_ADDR_REG, p); 369 v = bus_space_read_2(iot, ioh, MEM_PORT_REG); 370 printf("0x%04x: %b ", p, v, "\020\006Ab\010Dn"); 371 v = bus_space_read_2(iot, ioh, MEM_PORT_REG); 372 printf("0x%b", v, "\020\6MAX_COL\7HRT_BEAT\010TX_DEF\011UND_RUN\012JERR\013LST_CRS\014LTCOL\016TX_OK\020COLL"); 373 p = bus_space_read_2(iot, ioh, MEM_PORT_REG); 374 printf(" 0x%04x", p); 375 v = bus_space_read_2(iot, ioh, MEM_PORT_REG); 376 printf(" 0x%b\n", v, "\020\020Ch"); 377 378 } while (v & 0x8000); 379 #endif 380 sc->tx_start = sc->tx_end = sc->rx_size; 381 sc->tx_last = 0; 382 sc->sc_ethercom.ec_if.if_flags &= ~(IFF_RUNNING|IFF_OACTIVE); 383 384 iymbufempty((void *)sc); 385 } 386 387 void 388 iyreset(sc) 389 struct iy_softc *sc; 390 { 391 int s; 392 s = splimp(); 393 iystop(sc); 394 iyinit(sc); 395 splx(s); 396 } 397 398 void 399 iyinit(sc) 400 struct iy_softc *sc; 401 { 402 int i; 403 unsigned temp; 404 struct ifnet *ifp; 405 bus_space_tag_t iot; 406 bus_space_handle_t ioh; 407 408 iot = sc->sc_iot; 409 ioh = sc->sc_ioh; 410 411 ifp = &sc->sc_ethercom.ec_if; 412 #ifdef IYDEBUG 413 printf("ifp is %p\n", ifp); 414 #endif 415 416 bus_space_write_1(iot, ioh, 0, BANK_SEL(2)); 417 418 temp = bus_space_read_1(iot, ioh, EEPROM_REG); 419 if (temp & 0x10) 420 bus_space_write_1(iot, ioh, EEPROM_REG, temp & ~0x10); 421 422 for (i=0; i<6; ++i) { 423 bus_space_write_1(iot, ioh, I_ADD(i), sc->sc_enaddr[i]); 424 } 425 426 temp = bus_space_read_1(iot, ioh, REG1); 427 bus_space_write_1(iot, ioh, REG1, temp | XMT_CHAIN_INT | XMT_CHAIN_ERRSTOP | 428 RCV_DISCARD_BAD); 429 430 temp = bus_space_read_1(iot, ioh, RECV_MODES_REG); 431 bus_space_write_1(iot, ioh, RECV_MODES_REG, temp | MATCH_BRDCST); 432 #ifdef IYDEBUG 433 printf("%s: RECV_MODES were %b set to %b\n", 434 sc->sc_dev.dv_xname, 435 temp, "\020\1PRMSC\2NOBRDST\3SEECRC\4LENGTH\5NOSaIns\6MultiIA", 436 temp|MATCH_BRDCST, 437 "\020\1PRMSC\2NOBRDST\3SEECRC\4LENGTH\5NOSaIns\6MultiIA"); 438 #endif 439 440 441 DELAY(500000); /* for the hardware to test for the connector */ 442 443 temp = bus_space_read_1(iot, ioh, MEDIA_SELECT); 444 #ifdef IYDEBUG 445 printf("%s: media select was 0x%b ", sc->sc_dev.dv_xname, 446 temp, "\020\1LnkInDis\2PolCor\3TPE\4JabberDis\5NoAport\6BNC"); 447 #endif 448 temp = (temp & TEST_MODE_MASK); 449 450 switch(ifp->if_flags & (IFF_LINK0 | IFF_LINK1)) { 451 case IFF_LINK0: 452 temp &= ~ (BNC_BIT | TPE_BIT); 453 break; 454 455 case IFF_LINK1: 456 temp = (temp & ~TPE_BIT) | BNC_BIT; 457 break; 458 459 case IFF_LINK0|IFF_LINK1: 460 temp = (temp & ~BNC_BIT) | TPE_BIT; 461 break; 462 default: 463 /* nothing; leave as it is */ 464 } 465 466 467 bus_space_write_1(iot, ioh, MEDIA_SELECT, temp); 468 #ifdef IYDEBUG 469 printf("changed to 0x%b\n", 470 temp, "\020\1LnkInDis\2PolCor\3TPE\4JabberDis\5NoAport\6BNC"); 471 #endif 472 473 bus_space_write_1(iot, ioh, 0, BANK_SEL(1)); 474 475 temp = bus_space_read_1(iot, ioh, INT_NO_REG); 476 bus_space_write_1(iot, ioh, INT_NO_REG, (temp & 0xf8) | sc->mappedirq); 477 478 #ifdef IYDEBUG 479 printf("%s: int no was %b\n", sc->sc_dev.dv_xname, 480 temp, "\020\4bad_irq\010flash/boot present"); 481 temp = bus_space_read_1(iot, ioh, INT_NO_REG); 482 printf("%s: int no now 0x%02x\n", sc->sc_dev.dv_xname, 483 temp, "\020\4BAD IRQ\010flash/boot present"); 484 #endif 485 486 487 bus_space_write_1(iot, ioh, RCV_LOWER_LIMIT_REG, 0); 488 bus_space_write_1(iot, ioh, RCV_UPPER_LIMIT_REG, (sc->rx_size - 2) >> 8); 489 bus_space_write_1(iot, ioh, XMT_LOWER_LIMIT_REG, sc->rx_size >> 8); 490 bus_space_write_1(iot, ioh, XMT_UPPER_LIMIT_REG, sc->sram >> 8); 491 492 temp = bus_space_read_1(iot, ioh, REG1); 493 #ifdef IYDEBUG 494 printf("%s: HW access is %b\n", sc->sc_dev.dv_xname, 495 temp, "\020\2WORD_WIDTH\010INT_ENABLE"); 496 #endif 497 bus_space_write_1(iot, ioh, REG1, temp | INT_ENABLE); /* XXX what about WORD_WIDTH? */ 498 499 #ifdef IYDEBUG 500 temp = bus_space_read_1(iot, ioh, REG1); 501 printf("%s: HW access is %b\n", sc->sc_dev.dv_xname, 502 temp, "\020\2WORD_WIDTH\010INT_ENABLE"); 503 #endif 504 505 bus_space_write_1(iot, ioh, 0, BANK_SEL(0)); 506 507 bus_space_write_1(iot, ioh, INT_MASK_REG, ALL_INTS & ~(RX_BIT|TX_BIT)); 508 bus_space_write_1(iot, ioh, STATUS_REG, ALL_INTS); /* clear ints */ 509 510 bus_space_write_2(iot, ioh, RCV_START_LOW, 0); 511 bus_space_write_2(iot, ioh, RCV_STOP_LOW, sc->rx_size - 2); 512 sc->rx_start = 0; 513 514 bus_space_write_1(iot, ioh, 0, SEL_RESET_CMD); 515 DELAY(200); 516 517 bus_space_write_2(iot, ioh, XMT_ADDR_REG, sc->rx_size); 518 519 sc->tx_start = sc->tx_end = sc->rx_size; 520 sc->tx_last = 0; 521 522 bus_space_write_1(iot, ioh, 0, RCV_ENABLE_CMD); 523 524 ifp->if_flags |= IFF_RUNNING; 525 ifp->if_flags &= ~IFF_OACTIVE; 526 } 527 528 void 529 iystart(ifp) 530 struct ifnet *ifp; 531 { 532 struct iy_softc *sc; 533 534 535 struct mbuf *m0, *m; 536 u_int len, pad, last, end; 537 u_int llen, residual; 538 int avail; 539 caddr_t data; 540 u_int16_t resval, stat; 541 bus_space_tag_t iot; 542 bus_space_handle_t ioh; 543 544 #ifdef IYDEBUG 545 printf("iystart called\n"); 546 #endif 547 if ((ifp->if_flags & (IFF_RUNNING | IFF_OACTIVE)) != IFF_RUNNING) 548 return; 549 550 sc = ifp->if_softc; 551 iot = sc->sc_iot; 552 ioh = sc->sc_ioh; 553 554 while ((m0 = ifp->if_snd.ifq_head) != NULL) { 555 #ifdef IYDEBUG 556 printf("%s: trying to write another packet to the hardware\n", 557 sc->sc_dev.dv_xname); 558 #endif 559 560 /* We need to use m->m_pkthdr.len, so require the header */ 561 if ((m0->m_flags & M_PKTHDR) == 0) 562 panic("iystart: no header mbuf"); 563 564 len = m0->m_pkthdr.len; 565 pad = len & 1; 566 567 #ifdef IYDEBUG 568 printf("%s: length is %d.\n", sc->sc_dev.dv_xname, len); 569 #endif 570 if (len < ETHER_MIN_LEN) { 571 pad = ETHER_MIN_LEN - len; 572 } 573 574 if (len + pad > ETHER_MAX_LEN) { 575 /* packet is obviously too large: toss it */ 576 ++ifp->if_oerrors; 577 IF_DEQUEUE(&ifp->if_snd, m0); 578 m_freem(m0); 579 continue; 580 } 581 582 #if NBPFILTER > 0 583 if (ifp->if_bpf) 584 bpf_mtap(ifp->if_bpf, m0); 585 #endif 586 587 avail = sc->tx_start - sc->tx_end; 588 if (avail <= 0) 589 avail += sc->tx_size; 590 591 #ifdef IYDEBUG 592 printf("%s: avail is %d.\n", sc->sc_dev.dv_xname, avail); 593 #endif 594 /* 595 * we MUST RUN at splnet here --- 596 * XXX todo: or even turn off the boards ints ??? hm... 597 */ 598 599 /* See if there is room to put another packet in the buffer. */ 600 601 if ((len+pad+2*I595_XMT_HDRLEN) > avail) { 602 printf("%s: len = %d, avail = %d, setting OACTIVE\n", 603 sc->sc_dev.dv_xname, len, avail); 604 ifp->if_flags |= IFF_OACTIVE; 605 return; 606 } 607 608 /* we know it fits in the hardware now, so dequeue it */ 609 IF_DEQUEUE(&ifp->if_snd, m0); 610 611 last = sc->tx_end; 612 end = last + pad + len + I595_XMT_HDRLEN; 613 614 if (end >= sc->sram) { 615 if ((sc->sram - last) <= I595_XMT_HDRLEN) { 616 /* keep header in one piece */ 617 last = sc->rx_size; 618 end = last + pad + len + I595_XMT_HDRLEN; 619 } else 620 end -= sc->tx_size; 621 } 622 623 bus_space_write_2(iot, ioh, HOST_ADDR_REG, last); 624 bus_space_write_2(iot, ioh, MEM_PORT_REG, XMT_CMD); 625 bus_space_write_2(iot, ioh, MEM_PORT_REG, 0); 626 bus_space_write_2(iot, ioh, MEM_PORT_REG, 0); 627 bus_space_write_2(iot, ioh, MEM_PORT_REG, len + pad); 628 629 residual = resval = 0; 630 631 while ((m = m0)!=0) { 632 data = mtod(m, caddr_t); 633 llen = m->m_len; 634 if (residual) { 635 #ifdef IYDEBUG 636 printf("%s: merging residual with next mbuf.\n", 637 sc->sc_dev.dv_xname); 638 #endif 639 resval |= *data << 8; 640 bus_space_write_2(iot, ioh, MEM_PORT_REG, resval); 641 --llen; 642 ++data; 643 } 644 if (llen > 1) 645 bus_space_write_multi_2(iot, ioh, MEM_PORT_REG, 646 data, llen>>1); 647 residual = llen & 1; 648 if (residual) { 649 resval = *(data + llen - 1); 650 #ifdef IYDEBUG 651 printf("%s: got odd mbuf to send.\n", 652 sc->sc_dev.dv_xname); 653 #endif 654 } 655 656 MFREE(m, m0); 657 } 658 659 if (residual) 660 bus_space_write_2(iot, ioh, MEM_PORT_REG, resval); 661 662 pad >>= 1; 663 while (pad-- > 0) 664 bus_space_write_2(iot, ioh, MEM_PORT_REG, 0); 665 666 #ifdef IYDEBUG 667 printf("%s: new last = 0x%x, end = 0x%x.\n", 668 sc->sc_dev.dv_xname, last, end); 669 printf("%s: old start = 0x%x, end = 0x%x, last = 0x%x\n", 670 sc->sc_dev.dv_xname, sc->tx_start, sc->tx_end, sc->tx_last); 671 #endif 672 673 if (sc->tx_start != sc->tx_end) { 674 bus_space_write_2(iot, ioh, HOST_ADDR_REG, sc->tx_last + XMT_COUNT); 675 stat = bus_space_read_2(iot, ioh, MEM_PORT_REG); 676 677 bus_space_write_2(iot, ioh, HOST_ADDR_REG, sc->tx_last + XMT_CHAIN); 678 bus_space_write_2(iot, ioh, MEM_PORT_REG, last); 679 bus_space_write_2(iot, ioh, MEM_PORT_REG, stat | CHAIN); 680 #ifdef IYDEBUG 681 printf("%s: setting 0x%x to 0x%x\n", 682 sc->sc_dev.dv_xname, sc->tx_last + XMT_COUNT, 683 stat | CHAIN); 684 #endif 685 } 686 stat = bus_space_read_2(iot, ioh, MEM_PORT_REG); /* dummy read */ 687 688 /* XXX todo: enable ints here if disabled */ 689 690 ++ifp->if_opackets; 691 692 if (sc->tx_start == sc->tx_end) { 693 bus_space_write_2(iot, ioh, XMT_ADDR_REG, last); 694 bus_space_write_1(iot, ioh, 0, XMT_CMD); 695 sc->tx_start = last; 696 #ifdef IYDEBUG 697 printf("%s: writing 0x%x to XAR and giving XCMD\n", 698 sc->sc_dev.dv_xname, last); 699 #endif 700 } else { 701 bus_space_write_1(iot, ioh, 0, RESUME_XMT_CMD); 702 #ifdef IYDEBUG 703 printf("%s: giving RESUME_XCMD\n", 704 sc->sc_dev.dv_xname); 705 #endif 706 } 707 sc->tx_last = last; 708 sc->tx_end = end; 709 } 710 } 711 712 713 static __inline void 714 eepromwritebit(iot, ioh, ioff, what) 715 bus_space_tag_t iot; 716 bus_space_handle_t ioh; 717 bus_size_t ioff; 718 int what; 719 { 720 bus_space_write_1(iot, ioh, ioff, what); 721 delay(1); 722 bus_space_write_1(iot, ioh, ioff, what|EESK); 723 delay(1); 724 bus_space_write_1(iot, ioh, ioff, what); 725 delay(1); 726 } 727 728 static __inline int 729 eepromreadbit(iot, ioh, ioff) 730 bus_space_tag_t iot; 731 bus_space_handle_t ioh; 732 bus_size_t ioff; 733 { 734 int b; 735 736 bus_space_write_1(iot, ioh, ioff, EECS|EESK); 737 delay(1); 738 b = bus_space_read_1(iot, ioh, ioff); 739 bus_space_write_1(iot, ioh, ioff, EECS); 740 delay(1); 741 742 return ((b & EEDO) != 0); 743 } 744 745 static u_int16_t 746 eepromread(iot, ioh, ioff, offset) 747 bus_space_tag_t iot; 748 bus_space_handle_t ioh; 749 bus_size_t ioff; 750 int offset; 751 { 752 volatile int i; 753 volatile int j; 754 volatile u_int16_t readval; 755 756 bus_space_write_1(iot, ioh, 0, BANK_SEL(2)); 757 delay(1); 758 bus_space_write_1(iot, ioh, ioff, EECS); /* XXXX??? */ 759 delay(1); 760 761 eepromwritebit(iot, ioh, ioff, EECS|EEDI); 762 eepromwritebit(iot, ioh, ioff, EECS|EEDI); 763 eepromwritebit(iot, ioh, ioff, EECS); 764 765 for (j=5; j>=0; --j) { 766 if ((offset>>j) & 1) 767 eepromwritebit(iot, ioh, ioff, EECS|EEDI); 768 else 769 eepromwritebit(iot, ioh, ioff, EECS); 770 } 771 772 for (readval=0, i=0; i<16; ++i) { 773 readval<<=1; 774 readval |= eepromreadbit(iot, ioh, ioff); 775 } 776 777 bus_space_write_1(iot, ioh, ioff, 0|EESK); 778 delay(1); 779 bus_space_write_1(iot, ioh, ioff, 0); 780 781 bus_space_write_1(iot, ioh, ioff, BANK_SEL(0)); 782 783 return readval; 784 } 785 786 /* 787 * Device timeout/watchdog routine. Entered if the device neglects to generate 788 * an interrupt after a transmit has been started on it. 789 */ 790 void 791 iywatchdog(ifp) 792 struct ifnet *ifp; 793 { 794 struct iy_softc *sc = ifp->if_softc; 795 796 log(LOG_ERR, "%s: device timeout\n", sc->sc_dev.dv_xname); 797 ++sc->sc_ethercom.ec_if.if_oerrors; 798 iyreset(sc); 799 } 800 801 /* 802 * What to do upon receipt of an interrupt. 803 */ 804 int 805 iyintr(arg) 806 void *arg; 807 { 808 struct iy_softc *sc = arg; 809 bus_space_tag_t iot; 810 bus_space_handle_t ioh; 811 812 register u_short status; 813 814 iot = sc->sc_iot; 815 ioh = sc->sc_ioh; 816 817 status = bus_space_read_1(iot, ioh, STATUS_REG); 818 #ifdef IYDEBUG 819 if (status & ALL_INTS) { 820 printf("%s: got interupt %b", sc->sc_dev.dv_xname, status, 821 "\020\1RX_STP\2RX\3TX\4EXEC"); 822 if (status & EXEC_INT) 823 printf(" event %b\n", bus_space_read_1(iot, ioh, 0), 824 "\020\6ABORT"); 825 else 826 printf("\n"); 827 } 828 #endif 829 if (((status & (RX_INT | TX_INT)) == 0)) 830 return 0; 831 832 if (status & RX_INT) { 833 iy_intr_rx(sc); 834 bus_space_write_1(iot, ioh, STATUS_REG, RX_INT); 835 } else if (status & TX_INT) { 836 iy_intr_tx(sc); 837 bus_space_write_1(iot, ioh, STATUS_REG, TX_INT); 838 } 839 return 1; 840 } 841 842 void 843 iyget(sc, iot, ioh, rxlen) 844 struct iy_softc *sc; 845 bus_space_tag_t iot; 846 bus_space_handle_t ioh; 847 int rxlen; 848 { 849 struct mbuf *m, *top, **mp; 850 struct ether_header *eh; 851 struct ifnet *ifp; 852 int len; 853 854 ifp = &sc->sc_ethercom.ec_if; 855 856 m = sc->mb[sc->next_mb]; 857 sc->mb[sc->next_mb] = 0; 858 if (m == 0) { 859 MGETHDR(m, M_DONTWAIT, MT_DATA); 860 if (m == 0) 861 goto dropped; 862 } else { 863 if (sc->last_mb == sc->next_mb) 864 timeout(iymbuffill, sc, 1); 865 sc->next_mb = (sc->next_mb + 1) % MAX_MBS; 866 m->m_data = m->m_pktdat; 867 m->m_flags = M_PKTHDR; 868 } 869 m->m_pkthdr.rcvif = ifp; 870 m->m_pkthdr.len = rxlen; 871 len = MHLEN; 872 top = 0; 873 mp = ⊤ 874 875 while (rxlen > 0) { 876 if (top) { 877 m = sc->mb[sc->next_mb]; 878 sc->mb[sc->next_mb] = 0; 879 if (m == 0) { 880 MGET(m, M_DONTWAIT, MT_DATA); 881 if (m == 0) { 882 m_freem(top); 883 goto dropped; 884 } 885 } else { 886 sc->next_mb = (sc->next_mb + 1) % MAX_MBS; 887 } 888 len = MLEN; 889 } 890 if (rxlen >= MINCLSIZE) { 891 MCLGET(m, M_DONTWAIT); 892 if (m->m_flags & M_EXT) 893 len = MCLBYTES; 894 } 895 len = min(rxlen, len); 896 if (len > 1) { 897 len &= ~1; 898 899 bus_space_read_multi_2(iot, ioh, MEM_PORT_REG, 900 mtod(m, caddr_t), len/2); 901 } else { 902 #ifdef IYDEBUG 903 printf("%s: received odd mbuf\n", sc->sc_dev.dv_xname); 904 #endif 905 *(mtod(m, caddr_t)) = bus_space_read_2(iot, ioh, 906 MEM_PORT_REG); 907 } 908 m->m_len = len; 909 rxlen -= len; 910 *mp = m; 911 mp = &m->m_next; 912 } 913 /* XXX receive the top here */ 914 ++ifp->if_ipackets; 915 916 eh = mtod(top, struct ether_header *); 917 918 #if NBPFILTER > 0 919 if (ifp->if_bpf) { 920 bpf_mtap(ifp->if_bpf, top); 921 if ((ifp->if_flags & IFF_PROMISC) && 922 (eh->ether_dhost[0] & 1) == 0 && 923 bcmp(eh->ether_dhost, 924 LLADDR(sc->sc_ethercom.ec_if.if_sadl), 925 sizeof(eh->ether_dhost)) != 0) { 926 927 m_freem(top); 928 return; 929 } 930 } 931 #endif 932 m_adj(top, sizeof(struct ether_header)); 933 ether_input(ifp, eh, top); 934 return; 935 936 dropped: 937 ++ifp->if_ierrors; 938 return; 939 } 940 void 941 iy_intr_rx(sc) 942 struct iy_softc *sc; 943 { 944 struct ifnet *ifp; 945 bus_space_tag_t iot; 946 bus_space_handle_t ioh; 947 948 u_int rxadrs, rxevnt, rxstatus, rxnext, rxlen; 949 950 iot = sc->sc_iot; 951 ioh = sc->sc_ioh; 952 ifp = &sc->sc_ethercom.ec_if; 953 954 rxadrs = sc->rx_start; 955 bus_space_write_2(iot, ioh, HOST_ADDR_REG, rxadrs); 956 rxevnt = bus_space_read_2(iot, ioh, MEM_PORT_REG); 957 rxnext = 0; 958 959 while (rxevnt == RCV_DONE) { 960 rxstatus = bus_space_read_2(iot, ioh, MEM_PORT_REG); 961 rxnext = bus_space_read_2(iot, ioh, MEM_PORT_REG); 962 rxlen = bus_space_read_2(iot, ioh, MEM_PORT_REG); 963 #ifdef IYDEBUG 964 printf("%s: pck at 0x%04x stat %b next 0x%x len 0x%x\n", 965 sc->sc_dev.dv_xname, rxadrs, rxstatus, 966 "\020\1RCLD\2IA_MCH\010SHORT\011OVRN\013ALGERR" 967 "\014CRCERR\015LENERR\016RCVOK\020TYP", 968 rxnext, rxlen); 969 #endif 970 iyget(sc, iot, ioh, rxlen); 971 972 /* move stop address */ 973 bus_space_write_2(iot, ioh, RCV_STOP_LOW, 974 rxnext == 0 ? sc->rx_size - 2 : rxnext - 2); 975 976 bus_space_write_2(iot, ioh, HOST_ADDR_REG, rxnext); 977 rxadrs = rxnext; 978 rxevnt = bus_space_read_2(iot, ioh, MEM_PORT_REG); 979 } 980 sc->rx_start = rxnext; 981 } 982 983 void 984 iy_intr_tx(sc) 985 struct iy_softc *sc; 986 { 987 bus_space_tag_t iot; 988 bus_space_handle_t ioh; 989 struct ifnet *ifp; 990 u_int txstatus, txstat2, txlen, txnext; 991 992 ifp = &sc->sc_ethercom.ec_if; 993 iot = sc->sc_iot; 994 ioh = sc->sc_ioh; 995 996 while (sc->tx_start != sc->tx_end) { 997 bus_space_write_2(iot, ioh, HOST_ADDR_REG, sc->tx_start); 998 txstatus = bus_space_read_2(iot, ioh, MEM_PORT_REG); 999 if ((txstatus & (TX_DONE|CMD_MASK)) != (TX_DONE|XMT_CMD)) 1000 break; 1001 1002 txstat2 = bus_space_read_2(iot, ioh, MEM_PORT_REG); 1003 txnext = bus_space_read_2(iot, ioh, MEM_PORT_REG); 1004 txlen = bus_space_read_2(iot, ioh, MEM_PORT_REG); 1005 #ifdef IYDEBUG 1006 printf("txstat 0x%x stat2 0x%b next 0x%x len 0x%x\n", 1007 txstatus, txstat2, "\020\6MAX_COL\7HRT_BEAT\010TX_DEF" 1008 "\011UND_RUN\012JERR\013LST_CRS\014LTCOL\016TX_OK\020COLL", 1009 txnext, txlen); 1010 #endif 1011 if (txlen & CHAIN) 1012 sc->tx_start = txnext; 1013 else 1014 sc->tx_start = sc->tx_end; 1015 ifp->if_flags &= ~IFF_OACTIVE; 1016 1017 if ((txstat2 & 0x2000) == 0) 1018 ++ifp->if_oerrors; 1019 if (txstat2 & 0x000f) 1020 ifp->if_oerrors += txstat2 & 0x000f; 1021 } 1022 ifp->if_flags &= ~IFF_OACTIVE; 1023 } 1024 1025 #if 0 1026 /* 1027 * Compare two Ether/802 addresses for equality, inlined and unrolled for 1028 * speed. I'd love to have an inline assembler version of this... 1029 */ 1030 static inline int 1031 ether_equal(one, two) 1032 u_char *one, *two; 1033 { 1034 1035 if (one[0] != two[0] || one[1] != two[1] || one[2] != two[2] || 1036 one[3] != two[3] || one[4] != two[4] || one[5] != two[5]) 1037 return 0; 1038 return 1; 1039 } 1040 1041 /* 1042 * Check for a valid address. to_bpf is filled in with one of the following: 1043 * 0 -> BPF doesn't get this packet 1044 * 1 -> BPF does get this packet 1045 * 2 -> BPF does get this packet, but we don't 1046 * Return value is true if the packet is for us, and false otherwise. 1047 * 1048 * This routine is a mess, but it's also critical that it be as fast 1049 * as possible. It could be made cleaner if we can assume that the 1050 * only client which will fiddle with IFF_PROMISC is BPF. This is 1051 * probably a good assumption, but we do not make it here. (Yet.) 1052 */ 1053 static inline int 1054 check_eh(sc, eh, to_bpf) 1055 struct iy_softc *sc; 1056 struct ether_header *eh; 1057 int *to_bpf; 1058 { 1059 int i; 1060 1061 switch (sc->promisc) { 1062 case IFF_ALLMULTI: 1063 /* 1064 * Receiving all multicasts, but no unicasts except those 1065 * destined for us. 1066 */ 1067 #if NBPFILTER > 0 1068 *to_bpf = (sc->sc_ethercom.ec_if.iy_bpf != 0); /* BPF gets this packet if anybody cares */ 1069 #endif 1070 if (eh->ether_dhost[0] & 1) 1071 return 1; 1072 if (ether_equal(eh->ether_dhost, 1073 LLADDR(sc->sc_ethercom.ec_if.if_sadl))) 1074 return 1; 1075 return 0; 1076 1077 case IFF_PROMISC: 1078 /* 1079 * Receiving all packets. These need to be passed on to BPF. 1080 */ 1081 #if NBPFILTER > 0 1082 *to_bpf = (sc->sc_ethercom.ec_if.iy_bpf != 0); 1083 #endif 1084 /* If for us, accept and hand up to BPF */ 1085 if (ether_equal(eh->ether_dhost, LLADDR(sc->sc_ethercom.ec_if.if_sadl))) 1086 return 1; 1087 1088 #if NBPFILTER > 0 1089 if (*to_bpf) 1090 *to_bpf = 2; /* we don't need to see it */ 1091 #endif 1092 1093 /* 1094 * Not a multicast, so BPF wants to see it but we don't. 1095 */ 1096 if (!(eh->ether_dhost[0] & 1)) 1097 return 1; 1098 1099 /* 1100 * If it's one of our multicast groups, accept it and pass it 1101 * up. 1102 */ 1103 for (i = 0; i < sc->mcast_count; i++) { 1104 if (ether_equal(eh->ether_dhost, (u_char *)&sc->mcast_addrs[i])) { 1105 #if NBPFILTER > 0 1106 if (*to_bpf) 1107 *to_bpf = 1; 1108 #endif 1109 return 1; 1110 } 1111 } 1112 return 1; 1113 1114 case IFF_ALLMULTI | IFF_PROMISC: 1115 /* 1116 * Acting as a multicast router, and BPF running at the same 1117 * time. Whew! (Hope this is a fast machine...) 1118 */ 1119 #if NBPFILTER > 0 1120 *to_bpf = (sc->sc_ethercom.ec_if.iy_bpf != 0); 1121 #endif 1122 /* We want to see multicasts. */ 1123 if (eh->ether_dhost[0] & 1) 1124 return 1; 1125 1126 /* We want to see our own packets */ 1127 if (ether_equal(eh->ether_dhost, LLADDR(sc->sc_ethercom.ec_if.if_sadl))) 1128 return 1; 1129 1130 /* Anything else goes to BPF but nothing else. */ 1131 #if NBPFILTER > 0 1132 if (*to_bpf) 1133 *to_bpf = 2; 1134 #endif 1135 return 1; 1136 1137 case 0: 1138 /* 1139 * Only accept unicast packets destined for us, or multicasts 1140 * for groups that we belong to. For now, we assume that the 1141 * '586 will only return packets that we asked it for. This 1142 * isn't strictly true (it uses hashing for the multicast 1143 * filter), but it will do in this case, and we want to get out 1144 * of here as quickly as possible. 1145 */ 1146 #if NBPFILTER > 0 1147 *to_bpf = (sc->sc_ethercom.ec_if.iy_bpf != 0); 1148 #endif 1149 return 1; 1150 } 1151 1152 #ifdef DIAGNOSTIC 1153 panic("check_eh: impossible"); 1154 #endif 1155 } 1156 #endif 1157 1158 int 1159 iyioctl(ifp, cmd, data) 1160 register struct ifnet *ifp; 1161 u_long cmd; 1162 caddr_t data; 1163 { 1164 struct iy_softc *sc; 1165 struct ifaddr *ifa; 1166 struct ifreq *ifr; 1167 int s, error = 0; 1168 1169 sc = ifp->if_softc; 1170 ifa = (struct ifaddr *)data; 1171 ifr = (struct ifreq *)data; 1172 1173 #ifdef IYDEBUG 1174 printf("iyioctl called with ifp 0x%p (%s) cmd 0x%x data 0x%p\n", 1175 ifp, ifp->if_xname, cmd, data); 1176 #endif 1177 1178 s = splimp(); 1179 1180 switch (cmd) { 1181 1182 case SIOCSIFADDR: 1183 ifp->if_flags |= IFF_UP; 1184 1185 switch (ifa->ifa_addr->sa_family) { 1186 #ifdef INET 1187 case AF_INET: 1188 iyinit(sc); 1189 arp_ifinit(ifp, ifa); 1190 break; 1191 #endif 1192 #ifdef NS 1193 /* XXX - This code is probably wrong. */ 1194 case AF_NS: 1195 { 1196 struct ns_addr *ina = &IA_SNS(ifa)->sns_addr; 1197 1198 if (ns_nullhost(*ina)) 1199 ina->x_host = *(union ns_host *) 1200 LLADDR(sc->sc_ethercom.ec_if.if_sadl)); 1201 else 1202 bcopy(ina->x_host.c_host, 1203 LLADDR(sc->sc_ethercom.ec_if.if_sadl), 1204 6); 1205 /* Set new address. */ 1206 iyinit(sc); 1207 break; 1208 } 1209 #endif /* NS */ 1210 default: 1211 iyinit(sc); 1212 break; 1213 } 1214 break; 1215 1216 case SIOCSIFFLAGS: 1217 sc->promisc = ifp->if_flags & (IFF_PROMISC | IFF_ALLMULTI); 1218 if ((ifp->if_flags & IFF_UP) == 0 && 1219 (ifp->if_flags & IFF_RUNNING) != 0) { 1220 /* 1221 * If interface is marked down and it is running, then 1222 * stop it. 1223 */ 1224 iystop(sc); 1225 ifp->if_flags &= ~IFF_RUNNING; 1226 } else if ((ifp->if_flags & IFF_UP) != 0 && 1227 (ifp->if_flags & IFF_RUNNING) == 0) { 1228 /* 1229 * If interface is marked up and it is stopped, then 1230 * start it. 1231 */ 1232 iyinit(sc); 1233 } else { 1234 /* 1235 * Reset the interface to pick up changes in any other 1236 * flags that affect hardware registers. 1237 */ 1238 iystop(sc); 1239 iyinit(sc); 1240 } 1241 #ifdef IYDEBUGX 1242 if (ifp->if_flags & IFF_DEBUG) 1243 sc->sc_debug = IFY_ALL; 1244 else 1245 sc->sc_debug = 0; 1246 #endif 1247 break; 1248 1249 #if 0 /* XXX */ 1250 case SIOCADDMULTI: 1251 case SIOCDELMULTI: 1252 error = (cmd == SIOCADDMULTI) ? 1253 ether_addmulti(ifr, &sc->sc_ethercom): 1254 ether_delmulti(ifr, &sc->sc_ethercom); 1255 1256 if (error == ENETRESET) { 1257 /* 1258 * Multicast list has changed; set the hardware filter 1259 * accordingly. 1260 */ 1261 iy_mc_reset(sc); /* XXX */ 1262 error = 0; 1263 } 1264 break; 1265 #endif 1266 default: 1267 error = EINVAL; 1268 } 1269 splx(s); 1270 return error; 1271 } 1272 1273 #if 0 1274 static void 1275 iy_mc_reset(sc) 1276 struct iy_softc *sc; 1277 { 1278 struct ether_multi *enm; 1279 struct ether_multistep step; 1280 1281 /* 1282 * Step through the list of addresses. 1283 */ 1284 sc->mcast_count = 0; 1285 ETHER_FIRST_MULTI(step, &sc->sc_ethercom, enm); 1286 while (enm) { 1287 if (sc->mcast_count >= MAXMCAST || 1288 bcmp(enm->enm_addrlo, enm->enm_addrhi, 6) != 0) { 1289 sc->sc_ethercom.ec_if.if_flags |= IFF_ALLMULTI; 1290 iyioctl(&sc->sc_ethercom.ec_if, SIOCSIFFLAGS, 1291 (void *)0); 1292 goto setflag; 1293 } 1294 1295 bcopy(enm->enm_addrlo, &sc->mcast_addrs[sc->mcast_count], 6); 1296 sc->mcast_count++; 1297 ETHER_NEXT_MULTI(step, enm); 1298 } 1299 setflag: 1300 sc->want_mcsetup = 1; 1301 } 1302 1303 #ifdef IYDEBUG 1304 void 1305 print_rbd(rbd) 1306 volatile struct ie_recv_buf_desc *rbd; 1307 { 1308 1309 printf("RBD at %08lx:\nactual %04x, next %04x, buffer %08x\n" 1310 "length %04x, mbz %04x\n", (u_long)rbd, rbd->ie_rbd_actual, 1311 rbd->ie_rbd_next, rbd->ie_rbd_buffer, rbd->ie_rbd_length, 1312 rbd->mbz); 1313 } 1314 #endif 1315 #endif 1316 1317 void 1318 iymbuffill(arg) 1319 void *arg; 1320 { 1321 struct iy_softc *sc = (struct iy_softc *)arg; 1322 int s, i; 1323 1324 s = splimp(); 1325 i = sc->last_mb; 1326 do { 1327 if (sc->mb[i] == NULL) 1328 MGET(sc->mb[i], M_DONTWAIT, MT_DATA); 1329 if (sc->mb[i] == NULL) 1330 break; 1331 i = (i + 1) % MAX_MBS; 1332 } while (i != sc->next_mb); 1333 sc->last_mb = i; 1334 /* If the queue was not filled, try again. */ 1335 if (sc->last_mb != sc->next_mb) 1336 timeout(iymbuffill, sc, 1); 1337 splx(s); 1338 } 1339 1340 1341 void 1342 iymbufempty(arg) 1343 void *arg; 1344 { 1345 struct iy_softc *sc = (struct iy_softc *)arg; 1346 int s, i; 1347 1348 s = splimp(); 1349 for (i = 0; i<MAX_MBS; i++) { 1350 if (sc->mb[i]) { 1351 m_freem(sc->mb[i]); 1352 sc->mb[i] = NULL; 1353 } 1354 } 1355 sc->last_mb = sc->next_mb = 0; 1356 untimeout(iymbuffill, sc); 1357 splx(s); 1358 } 1359 1360 void 1361 iyprobemem(sc) 1362 struct iy_softc *sc; 1363 { 1364 bus_space_tag_t iot; 1365 bus_space_handle_t ioh; 1366 int testing; 1367 1368 iot = sc->sc_iot; 1369 ioh = sc->sc_ioh; 1370 1371 bus_space_write_2(iot, ioh, HOST_ADDR_REG, 4096-2); 1372 bus_space_write_2(iot, ioh, MEM_PORT_REG, 0); 1373 1374 for (testing=65536; testing >= 4096; testing >>= 1) { 1375 bus_space_write_2(iot, ioh, HOST_ADDR_REG, testing-2); 1376 bus_space_write_2(iot, ioh, MEM_PORT_REG, 0xdead); 1377 bus_space_write_2(iot, ioh, HOST_ADDR_REG, testing-2); 1378 if (bus_space_read_2(iot, ioh, MEM_PORT_REG) != 0xdead) { 1379 #ifdef IYMEMDEBUG 1380 printf("%s: Didn't keep 0xdead at 0x%x\n", 1381 sc->sc_dev.dv_xname, testing-2); 1382 #endif 1383 continue; 1384 } 1385 1386 bus_space_write_2(iot, ioh, HOST_ADDR_REG, testing-2); 1387 bus_space_write_2(iot, ioh, MEM_PORT_REG, 0xbeef); 1388 bus_space_write_2(iot, ioh, HOST_ADDR_REG, testing-2); 1389 if (bus_space_read_2(iot, ioh, MEM_PORT_REG) != 0xbeef) { 1390 #ifdef IYMEMDEBUG 1391 printf("%s: Didn't keep 0xbeef at 0x%x\n", 1392 sc->sc_dev.dv_xname, testing-2); 1393 #endif 1394 continue; 1395 } 1396 1397 bus_space_write_2(iot, ioh, HOST_ADDR_REG, 0); 1398 bus_space_write_2(iot, ioh, MEM_PORT_REG, 0); 1399 bus_space_write_2(iot, ioh, HOST_ADDR_REG, testing >> 1); 1400 bus_space_write_2(iot, ioh, MEM_PORT_REG, testing >> 1); 1401 bus_space_write_2(iot, ioh, HOST_ADDR_REG, 0); 1402 if (bus_space_read_2(iot, ioh, MEM_PORT_REG) == (testing >> 1)) { 1403 #ifdef IYMEMDEBUG 1404 printf("%s: 0x%x alias of 0x0\n", 1405 sc->sc_dev.dv_xname, testing >> 1); 1406 #endif 1407 continue; 1408 } 1409 1410 break; 1411 } 1412 1413 sc->sram = testing; 1414 1415 switch(testing) { 1416 case 65536: 1417 /* 4 NFS packets + overhead RX, 2 NFS + overhead TX */ 1418 sc->rx_size = 44*1024; 1419 break; 1420 1421 case 32768: 1422 /* 2 NFS packets + overhead RX, 1 NFS + overhead TX */ 1423 sc->rx_size = 22*1024; 1424 break; 1425 1426 case 16384: 1427 /* 1 NFS packet + overhead RX, 4 big packets TX */ 1428 sc->rx_size = 10*1024; 1429 break; 1430 default: 1431 sc->rx_size = testing/2; 1432 break; 1433 } 1434 sc->tx_size = testing - sc->rx_size; 1435 } 1436
Indexes created Wed Oct 01 15:09:59 GMT 2025