if_iy.c revision 1.9.4.4
1 /* $NetBSD: if_iy.c,v 1.9.4.4 1997/02/26 21:39:59 is Exp $ */ 2 /* #define IYDEBUG */ 3 /* #define IYMEMDEBUG */ 4 /*- 5 * Copyright (c) 1996 Ignatios Souvatzis. 6 * All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 3. All advertising materials mentioning features or use of this software 17 * must display the following acknowledgement: 18 * This product contains software developed by Ignatios Souvatzis for 19 * the NetBSD project. 20 * 4. The names of the author may not be used to endorse or promote products 21 * derived from this software without specific prior written permission. 22 * 23 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND 24 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 25 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 26 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE 27 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 28 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 29 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 30 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 31 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 32 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 33 * SUCH DAMAGE. 34 */ 35 36 #include "bpfilter.h" 37 38 #include <sys/param.h> 39 #include <sys/systm.h> 40 #include <sys/mbuf.h> 41 #include <sys/buf.h> 42 #include <sys/protosw.h> 43 #include <sys/socket.h> 44 #include <sys/ioctl.h> 45 #include <sys/errno.h> 46 #include <sys/syslog.h> 47 #include <sys/device.h> 48 49 #include <net/if.h> 50 #include <net/if_types.h> 51 #include <net/if_dl.h> 52 #include <net/netisr.h> 53 #include <net/route.h> 54 55 #include <net/if_ether.h> 56 57 #if NBPFILTER > 0 58 #include <net/bpf.h> 59 #include <net/bpfdesc.h> 60 #endif 61 62 #ifdef INET 63 #include <netinet/in.h> 64 #include <netinet/in_systm.h> 65 #include <netinet/in_var.h> 66 #include <netinet/ip.h> 67 #include <netinet/if_ether.h> 68 #endif 69 70 #ifdef NS 71 #include <netns/ns.h> 72 #include <netns/ns_if.h> 73 #endif 74 75 #include <vm/vm.h> 76 77 #include <machine/cpu.h> 78 #include <machine/bus.h> 79 #include <machine/intr.h> 80 81 #include <dev/isa/isareg.h> 82 #include <dev/isa/isavar.h> 83 #include <dev/ic/i82595reg.h> 84 85 #define ETHER_MIN_LEN (ETHERMIN + sizeof(struct ether_header) + 4) 86 #define ETHER_MAX_LEN (ETHERMTU + sizeof(struct ether_header) + 4) 87 88 /* 89 * Ethernet status, per interface. 90 */ 91 struct iy_softc { 92 struct device sc_dev; 93 void *sc_ih; 94 95 bus_space_tag_t sc_iot; 96 bus_space_handle_t sc_ioh; 97 98 struct ethercom sc_ethercom; 99 100 #define MAX_MBS 8 101 struct mbuf *mb[MAX_MBS]; 102 int next_mb, last_mb; 103 104 int mappedirq; 105 106 int hard_vers; 107 108 int promisc; 109 110 int sram, tx_size, rx_size; 111 112 int tx_start, tx_end, tx_last; 113 int rx_start; 114 115 #ifdef IYDEBUG 116 int sc_debug; 117 #endif 118 }; 119 120 void iywatchdog __P((struct ifnet *)); 121 int iyioctl __P((struct ifnet *, u_long, caddr_t)); 122 int iyintr __P((void *)); 123 void iyinit __P((struct iy_softc *)); 124 void iystop __P((struct iy_softc *)); 125 void iystart __P((struct ifnet *)); 126 127 void iy_intr_rx __P((struct iy_softc *)); 128 void iy_intr_tx __P((struct iy_softc *)); 129 130 void iyreset __P((struct iy_softc *)); 131 void iy_readframe __P((struct iy_softc *, int)); 132 void iy_drop_packet_buffer __P((struct iy_softc *)); 133 void iy_find_mem_size __P((struct iy_softc *)); 134 void iyrint __P((struct iy_softc *)); 135 void iytint __P((struct iy_softc *)); 136 void iyxmit __P((struct iy_softc *)); 137 void iyget __P((struct iy_softc *, bus_space_tag_t, bus_space_handle_t, int)); 138 void iymbuffill __P((void *)); 139 void iymbufempty __P((void *)); 140 void iyprobemem __P((struct iy_softc *)); 141 static __inline void eepromwritebit __P((bus_space_tag_t, bus_space_handle_t, 142 int)); 143 static __inline int eepromreadbit __P((bus_space_tag_t, bus_space_handle_t)); 144 /* 145 * void iymeminit __P((void *, struct iy_softc *)); 146 * static int iy_mc_setup __P((struct iy_softc *, void *)); 147 * static void iy_mc_reset __P((struct iy_softc *)); 148 */ 149 #ifdef IYDEBUGX 150 void print_rbd __P((volatile struct iy_recv_buf_desc *)); 151 152 int in_ifrint = 0; 153 int in_iftint = 0; 154 #endif 155 156 int iyprobe __P((struct device *, void *, void *)); 157 void iyattach __P((struct device *, struct device *, void *)); 158 159 static u_int16_t eepromread __P((bus_space_tag_t, bus_space_handle_t, int)); 160 161 static int eepromreadall __P((bus_space_tag_t, bus_space_handle_t, u_int16_t *, 162 int)); 163 164 struct cfattach iy_ca = { 165 sizeof(struct iy_softc), iyprobe, iyattach 166 }; 167 168 struct cfdriver iy_cd = { 169 NULL, "iy", DV_IFNET 170 }; 171 172 static u_int8_t eepro_irqmap[] = EEPP_INTMAP; 173 static u_int8_t eepro_revirqmap[] = EEPP_RINTMAP; 174 175 int 176 iyprobe(parent, match, aux) 177 struct device *parent; 178 void *match, *aux; 179 { 180 struct isa_attach_args *ia = aux; 181 u_int16_t eaddr[8]; 182 183 bus_space_tag_t iot; 184 bus_space_handle_t ioh; 185 186 u_int8_t c, d; 187 188 iot = ia->ia_iot; 189 190 if (bus_space_map(iot, ia->ia_iobase, 16, 0, &ioh)) 191 return 0; 192 193 /* try to find the round robin sig: */ 194 195 c = bus_space_read_1(iot, ioh, ID_REG); 196 if ((c & ID_REG_MASK) != ID_REG_SIG) 197 goto out; 198 199 d = bus_space_read_1(iot, ioh, ID_REG); 200 if ((d & ID_REG_MASK) != ID_REG_SIG) 201 goto out; 202 203 if (((d-c) & R_ROBIN_BITS) != 0x40) 204 goto out; 205 206 d = bus_space_read_1(iot, ioh, ID_REG); 207 if ((d & ID_REG_MASK) != ID_REG_SIG) 208 goto out; 209 210 if (((d-c) & R_ROBIN_BITS) != 0x80) 211 goto out; 212 213 d = bus_space_read_1(iot, ioh, ID_REG); 214 if ((d & ID_REG_MASK) != ID_REG_SIG) 215 goto out; 216 217 if (((d-c) & R_ROBIN_BITS) != 0xC0) 218 goto out; 219 220 d = bus_space_read_1(iot, ioh, ID_REG); 221 if ((d & ID_REG_MASK) != ID_REG_SIG) 222 goto out; 223 224 if (((d-c) & R_ROBIN_BITS) != 0x00) 225 goto out; 226 227 #ifdef IYDEBUG 228 printf("iyprobe verified working ID reg.\n"); 229 #endif 230 231 if (eepromreadall(iot, ioh, eaddr, 8)) 232 goto out; 233 234 if (ia->ia_irq == IRQUNK) 235 ia->ia_irq = eepro_irqmap[eaddr[EEPPW1] & EEPP_Int]; 236 237 if (ia->ia_irq >= sizeof(eepro_revirqmap)) 238 goto out; 239 240 if (eepro_revirqmap[ia->ia_irq] == 0xff) 241 goto out; 242 243 /* now lets reset the chip */ 244 245 bus_space_write_1(iot, ioh, COMMAND_REG, RESET_CMD); 246 delay(200); 247 248 ia->ia_iosize = 16; 249 250 bus_space_unmap(iot, ioh, 16); 251 return 1; /* found */ 252 out: 253 bus_space_unmap(iot, ioh, 16); 254 return 0; 255 } 256 257 void 258 iyattach(parent, self, aux) 259 struct device *parent, *self; 260 void *aux; 261 { 262 struct iy_softc *sc = (void *)self; 263 struct isa_attach_args *ia = aux; 264 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 265 bus_space_tag_t iot; 266 bus_space_handle_t ioh; 267 u_int16_t eaddr[8]; 268 u_int8_t myaddr[ETHER_ADDR_LEN]; 269 270 iot = ia->ia_iot; 271 272 if (bus_space_map(iot, ia->ia_iobase, 16, 0, &ioh)) 273 panic("Can't bus_space_map in iyattach"); 274 275 sc->sc_iot = iot; 276 sc->sc_ioh = ioh; 277 278 sc->mappedirq = eepro_revirqmap[ia->ia_irq]; 279 280 /* now let's reset the chip */ 281 282 bus_space_write_1(iot, ioh, COMMAND_REG, RESET_CMD); 283 delay(200); 284 285 iyprobemem(sc); 286 287 bcopy(sc->sc_dev.dv_xname, ifp->if_xname, IFNAMSIZ); 288 ifp->if_softc = sc; 289 ifp->if_start = iystart; 290 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_NOTRAILERS; 291 /* XXX todo: | IFF_MULTICAST */ 292 293 ifp->if_ioctl = iyioctl; 294 ifp->if_watchdog = iywatchdog; 295 296 (void)eepromreadall(iot, ioh, eaddr, 8); 297 sc->hard_vers = eaddr[EEPW6] & EEPP_BoardRev; 298 299 #ifdef DIAGNOSTICS 300 if ((eaddr[EEPPEther0] != 301 eepromread(iot, ioh, EEPPEther0a)) && 302 (eaddr[EEPPEther1] != 303 eepromread(iot, ioh, EEPPEther1a)) && 304 (eaddr[EEPPEther2] != 305 eepromread(iot, ioh, EEPPEther2a))) 306 307 printf("EEPROM Ethernet address differs from copy\n"); 308 #endif 309 310 myaddr[1] = eaddr[EEPPEther0] & 0xFF; 311 myaddr[0] = eaddr[EEPPEther0] >> 8; 312 myaddr[3] = eaddr[EEPPEther1] & 0xFF; 313 myaddr[2] = eaddr[EEPPEther1] >> 8; 314 myaddr[5] = eaddr[EEPPEther2] & 0xFF; 315 myaddr[4] = eaddr[EEPPEther2] >> 8; 316 317 /* Attach the interface. */ 318 if_attach(ifp); 319 ether_ifattach(ifp, myaddr); 320 printf(": address %s, chip rev. %d, %d kB SRAM\n", 321 ether_sprintf(myaddr), 322 sc->hard_vers, sc->sram/1024); 323 #if NBPFILTER > 0 324 bpfattach(&ifp->if_bpf, ifp, DLT_EN10MB, sizeof(struct ether_header)); 325 #endif 326 327 sc->sc_ih = isa_intr_establish(ia->ia_ic, ia->ia_irq, IST_EDGE, 328 IPL_NET, iyintr, sc); 329 } 330 331 void 332 iystop(sc) 333 struct iy_softc *sc; 334 { 335 bus_space_tag_t iot; 336 bus_space_handle_t ioh; 337 #ifdef IYDEBUG 338 u_int p, v; 339 #endif 340 341 iot = sc->sc_iot; 342 ioh = sc->sc_ioh; 343 344 bus_space_write_1(iot, ioh, COMMAND_REG, RCV_DISABLE_CMD); 345 346 bus_space_write_1(iot, ioh, INT_MASK_REG, ALL_INTS); 347 bus_space_write_1(iot, ioh, STATUS_REG, ALL_INTS); 348 349 bus_space_write_1(iot, ioh, COMMAND_REG, RESET_CMD); 350 delay(200); 351 #ifdef IYDEBUG 352 printf("%s: dumping tx chain (st 0x%x end 0x%x last 0x%x)\n", 353 sc->sc_dev.dv_xname, sc->tx_start, sc->tx_end, sc->tx_last); 354 p = sc->tx_last; 355 if (!p) 356 p = sc->tx_start; 357 do { 358 bus_space_write_2(iot, ioh, HOST_ADDR_REG, p); 359 v = bus_space_read_2(iot, ioh, MEM_PORT_REG); 360 printf("0x%04x: %b ", p, v, "\020\006Ab\010Dn"); 361 v = bus_space_read_2(iot, ioh, MEM_PORT_REG); 362 printf("0x%b", v, "\020\6MAX_COL\7HRT_BEAT\010TX_DEF\011UND_RUN\012JERR\013LST_CRS\014LTCOL\016TX_OK\020COLL"); 363 p = bus_space_read_2(iot, ioh, MEM_PORT_REG); 364 printf(" 0x%04x", p); 365 v = bus_space_read_2(iot, ioh, MEM_PORT_REG); 366 printf(" 0x%b\n", v, "\020\020Ch"); 367 368 } while (v & 0x8000); 369 #endif 370 sc->tx_start = sc->tx_end = sc->rx_size; 371 sc->tx_last = 0; 372 sc->sc_ethercom.ec_if.if_flags &= ~(IFF_RUNNING|IFF_OACTIVE); 373 374 iymbufempty((void *)sc); 375 } 376 377 void 378 iyreset(sc) 379 struct iy_softc *sc; 380 { 381 int s; 382 s = splimp(); 383 iystop(sc); 384 iyinit(sc); 385 splx(s); 386 } 387 388 void 389 iyinit(sc) 390 struct iy_softc *sc; 391 { 392 int i; 393 unsigned temp; 394 struct ifnet *ifp; 395 bus_space_tag_t iot; 396 bus_space_handle_t ioh; 397 398 iot = sc->sc_iot; 399 ioh = sc->sc_ioh; 400 401 ifp = &sc->sc_ethercom.ec_if; 402 #ifdef IYDEBUG 403 printf("ifp is %p\n", ifp); 404 #endif 405 406 bus_space_write_1(iot, ioh, 0, BANK_SEL(2)); 407 408 temp = bus_space_read_1(iot, ioh, EEPROM_REG); 409 if (temp & 0x10) 410 bus_space_write_1(iot, ioh, EEPROM_REG, temp & ~0x10); 411 412 for (i=0; i<6; ++i) { 413 bus_space_write_1(iot, ioh, I_ADD(i), LLADDR(ifp->if_sadl)[i]); 414 } 415 416 temp = bus_space_read_1(iot, ioh, REG1); 417 bus_space_write_1(iot, ioh, REG1, 418 temp | XMT_CHAIN_INT | XMT_CHAIN_ERRSTOP | RCV_DISCARD_BAD); 419 420 temp = bus_space_read_1(iot, ioh, RECV_MODES_REG); 421 bus_space_write_1(iot, ioh, RECV_MODES_REG, temp | MATCH_BRDCST); 422 #ifdef IYDEBUG 423 printf("%s: RECV_MODES were %b set to %b\n", 424 sc->sc_dev.dv_xname, 425 temp, "\020\1PRMSC\2NOBRDST\3SEECRC\4LENGTH\5NOSaIns\6MultiIA", 426 temp|MATCH_BRDCST, 427 "\020\1PRMSC\2NOBRDST\3SEECRC\4LENGTH\5NOSaIns\6MultiIA"); 428 #endif 429 430 431 delay(500000); /* for the hardware to test for the connector */ 432 433 temp = bus_space_read_1(iot, ioh, MEDIA_SELECT); 434 #ifdef IYDEBUG 435 printf("%s: media select was 0x%b ", sc->sc_dev.dv_xname, 436 temp, "\020\1LnkInDis\2PolCor\3TPE\4JabberDis\5NoAport\6BNC"); 437 #endif 438 temp = (temp & TEST_MODE_MASK); 439 440 switch(ifp->if_flags & (IFF_LINK0 | IFF_LINK1)) { 441 case IFF_LINK0: 442 temp &= ~ (BNC_BIT | TPE_BIT); 443 break; 444 445 case IFF_LINK1: 446 temp = (temp & ~TPE_BIT) | BNC_BIT; 447 break; 448 449 case IFF_LINK0|IFF_LINK1: 450 temp = (temp & ~BNC_BIT) | TPE_BIT; 451 break; 452 default: 453 /* nothing; leave as it is */ 454 } 455 456 457 bus_space_write_1(iot, ioh, MEDIA_SELECT, temp); 458 #ifdef IYDEBUG 459 printf("changed to 0x%b\n", 460 temp, "\020\1LnkInDis\2PolCor\3TPE\4JabberDis\5NoAport\6BNC"); 461 #endif 462 463 bus_space_write_1(iot, ioh, 0, BANK_SEL(1)); 464 465 temp = bus_space_read_1(iot, ioh, INT_NO_REG); 466 bus_space_write_1(iot, ioh, INT_NO_REG, (temp & 0xf8) | sc->mappedirq); 467 468 #ifdef IYDEBUG 469 printf("%s: int no was %b\n", sc->sc_dev.dv_xname, 470 temp, "\020\4bad_irq\010flash/boot present"); 471 temp = bus_space_read_1(iot, ioh, INT_NO_REG); 472 printf("%s: int no now 0x%02x\n", sc->sc_dev.dv_xname, 473 temp, "\020\4BAD IRQ\010flash/boot present"); 474 #endif 475 476 477 bus_space_write_1(iot, ioh, RCV_LOWER_LIMIT_REG, 0); 478 bus_space_write_1(iot, ioh, RCV_UPPER_LIMIT_REG, (sc->rx_size - 2) >> 8); 479 bus_space_write_1(iot, ioh, XMT_LOWER_LIMIT_REG, sc->rx_size >> 8); 480 bus_space_write_1(iot, ioh, XMT_UPPER_LIMIT_REG, sc->sram >> 8); 481 482 temp = bus_space_read_1(iot, ioh, REG1); 483 #ifdef IYDEBUG 484 printf("%s: HW access is %b\n", sc->sc_dev.dv_xname, 485 temp, "\020\2WORD_WIDTH\010INT_ENABLE"); 486 #endif 487 bus_space_write_1(iot, ioh, REG1, temp | INT_ENABLE); /* XXX what about WORD_WIDTH? */ 488 489 #ifdef IYDEBUG 490 temp = bus_space_read_1(iot, ioh, REG1); 491 printf("%s: HW access is %b\n", sc->sc_dev.dv_xname, 492 temp, "\020\2WORD_WIDTH\010INT_ENABLE"); 493 #endif 494 495 bus_space_write_1(iot, ioh, 0, BANK_SEL(0)); 496 497 bus_space_write_1(iot, ioh, INT_MASK_REG, ALL_INTS & ~(RX_BIT|TX_BIT)); 498 bus_space_write_1(iot, ioh, STATUS_REG, ALL_INTS); /* clear ints */ 499 500 bus_space_write_2(iot, ioh, RCV_START_LOW, 0); 501 bus_space_write_2(iot, ioh, RCV_STOP_LOW, sc->rx_size - 2); 502 sc->rx_start = 0; 503 504 bus_space_write_1(iot, ioh, 0, SEL_RESET_CMD); 505 delay(200); 506 507 bus_space_write_2(iot, ioh, XMT_ADDR_REG, sc->rx_size); 508 509 sc->tx_start = sc->tx_end = sc->rx_size; 510 sc->tx_last = 0; 511 512 bus_space_write_1(iot, ioh, 0, RCV_ENABLE_CMD); 513 514 ifp->if_flags |= IFF_RUNNING; 515 ifp->if_flags &= ~IFF_OACTIVE; 516 } 517 518 void 519 iystart(ifp) 520 struct ifnet *ifp; 521 { 522 struct iy_softc *sc; 523 524 525 struct mbuf *m0, *m; 526 u_int len, pad, last, end; 527 u_int llen, residual; 528 int avail; 529 caddr_t data; 530 u_int16_t resval, stat; 531 bus_space_tag_t iot; 532 bus_space_handle_t ioh; 533 534 #ifdef IYDEBUG 535 printf("iystart called\n"); 536 #endif 537 if ((ifp->if_flags & (IFF_RUNNING | IFF_OACTIVE)) != IFF_RUNNING) 538 return; 539 540 sc = ifp->if_softc; 541 iot = sc->sc_iot; 542 ioh = sc->sc_ioh; 543 544 while ((m0 = ifp->if_snd.ifq_head) != NULL) { 545 #ifdef IYDEBUG 546 printf("%s: trying to write another packet to the hardware\n", 547 sc->sc_dev.dv_xname); 548 #endif 549 550 /* We need to use m->m_pkthdr.len, so require the header */ 551 if ((m0->m_flags & M_PKTHDR) == 0) 552 panic("iystart: no header mbuf"); 553 554 len = m0->m_pkthdr.len; 555 pad = len & 1; 556 557 #ifdef IYDEBUG 558 printf("%s: length is %d.\n", sc->sc_dev.dv_xname, len); 559 #endif 560 if (len < ETHER_MIN_LEN) { 561 pad = ETHER_MIN_LEN - len; 562 } 563 564 if (len + pad > ETHER_MAX_LEN) { 565 /* packet is obviously too large: toss it */ 566 ++ifp->if_oerrors; 567 IF_DEQUEUE(&ifp->if_snd, m0); 568 m_freem(m0); 569 continue; 570 } 571 572 #if NBPFILTER > 0 573 if (ifp->if_bpf) 574 bpf_mtap(ifp->if_bpf, m0); 575 #endif 576 577 avail = sc->tx_start - sc->tx_end; 578 if (avail <= 0) 579 avail += sc->tx_size; 580 581 #ifdef IYDEBUG 582 printf("%s: avail is %d.\n", sc->sc_dev.dv_xname, avail); 583 #endif 584 /* 585 * we MUST RUN at splnet here --- 586 * XXX todo: or even turn off the boards ints ??? hm... 587 */ 588 589 /* See if there is room to put another packet in the buffer. */ 590 591 if ((len+pad+2*I595_XMT_HDRLEN) > avail) { 592 printf("%s: len = %d, avail = %d, setting OACTIVE\n", 593 sc->sc_dev.dv_xname, len, avail); 594 ifp->if_flags |= IFF_OACTIVE; 595 return; 596 } 597 598 /* we know it fits in the hardware now, so dequeue it */ 599 IF_DEQUEUE(&ifp->if_snd, m0); 600 601 last = sc->tx_end; 602 end = last + pad + len + I595_XMT_HDRLEN; 603 604 if (end >= sc->sram) { 605 if ((sc->sram - last) <= I595_XMT_HDRLEN) { 606 /* keep header in one piece */ 607 last = sc->rx_size; 608 end = last + pad + len + I595_XMT_HDRLEN; 609 } else 610 end -= sc->tx_size; 611 } 612 613 bus_space_write_2(iot, ioh, HOST_ADDR_REG, last); 614 bus_space_write_2(iot, ioh, MEM_PORT_REG, XMT_CMD); 615 bus_space_write_2(iot, ioh, MEM_PORT_REG, 0); 616 bus_space_write_2(iot, ioh, MEM_PORT_REG, 0); 617 bus_space_write_2(iot, ioh, MEM_PORT_REG, len + pad); 618 619 residual = resval = 0; 620 621 while ((m = m0)!=0) { 622 data = mtod(m, caddr_t); 623 llen = m->m_len; 624 if (residual) { 625 #ifdef IYDEBUG 626 printf("%s: merging residual with next mbuf.\n", 627 sc->sc_dev.dv_xname); 628 #endif 629 resval |= *data << 8; 630 bus_space_write_2(iot, ioh, MEM_PORT_REG, resval); 631 --llen; 632 ++data; 633 } 634 if (llen > 1) 635 bus_space_write_multi_2(iot, ioh, MEM_PORT_REG, 636 data, llen>>1); 637 residual = llen & 1; 638 if (residual) { 639 resval = *(data + llen - 1); 640 #ifdef IYDEBUG 641 printf("%s: got odd mbuf to send.\n", 642 sc->sc_dev.dv_xname); 643 #endif 644 } 645 646 MFREE(m, m0); 647 } 648 649 if (residual) 650 bus_space_write_2(iot, ioh, MEM_PORT_REG, resval); 651 652 pad >>= 1; 653 while (pad-- > 0) 654 bus_space_write_2(iot, ioh, MEM_PORT_REG, 0); 655 656 #ifdef IYDEBUG 657 printf("%s: new last = 0x%x, end = 0x%x.\n", 658 sc->sc_dev.dv_xname, last, end); 659 printf("%s: old start = 0x%x, end = 0x%x, last = 0x%x\n", 660 sc->sc_dev.dv_xname, sc->tx_start, sc->tx_end, sc->tx_last); 661 #endif 662 663 if (sc->tx_start != sc->tx_end) { 664 bus_space_write_2(iot, ioh, HOST_ADDR_REG, sc->tx_last + XMT_COUNT); 665 stat = bus_space_read_2(iot, ioh, MEM_PORT_REG); 666 667 bus_space_write_2(iot, ioh, HOST_ADDR_REG, sc->tx_last + XMT_CHAIN); 668 bus_space_write_2(iot, ioh, MEM_PORT_REG, last); 669 bus_space_write_2(iot, ioh, MEM_PORT_REG, stat | CHAIN); 670 #ifdef IYDEBUG 671 printf("%s: setting 0x%x to 0x%x\n", 672 sc->sc_dev.dv_xname, sc->tx_last + XMT_COUNT, 673 stat | CHAIN); 674 #endif 675 } 676 stat = bus_space_read_2(iot, ioh, MEM_PORT_REG); /* dummy read */ 677 678 /* XXX todo: enable ints here if disabled */ 679 680 ++ifp->if_opackets; 681 682 if (sc->tx_start == sc->tx_end) { 683 bus_space_write_2(iot, ioh, XMT_ADDR_REG, last); 684 bus_space_write_1(iot, ioh, 0, XMT_CMD); 685 sc->tx_start = last; 686 #ifdef IYDEBUG 687 printf("%s: writing 0x%x to XAR and giving XCMD\n", 688 sc->sc_dev.dv_xname, last); 689 #endif 690 } else { 691 bus_space_write_1(iot, ioh, 0, RESUME_XMT_CMD); 692 #ifdef IYDEBUG 693 printf("%s: giving RESUME_XCMD\n", 694 sc->sc_dev.dv_xname); 695 #endif 696 } 697 sc->tx_last = last; 698 sc->tx_end = end; 699 } 700 } 701 702 703 static __inline void 704 eepromwritebit(iot, ioh, what) 705 bus_space_tag_t iot; 706 bus_space_handle_t ioh; 707 int what; 708 { 709 bus_space_write_1(iot, ioh, EEPROM_REG, what); 710 delay(1); 711 bus_space_write_1(iot, ioh, EEPROM_REG, what|EESK); 712 delay(1); 713 bus_space_write_1(iot, ioh, EEPROM_REG, what); 714 delay(1); 715 } 716 717 static __inline int 718 eepromreadbit(iot, ioh) 719 bus_space_tag_t iot; 720 bus_space_handle_t ioh; 721 { 722 int b; 723 724 bus_space_write_1(iot, ioh, EEPROM_REG, EECS|EESK); 725 delay(1); 726 b = bus_space_read_1(iot, ioh, EEPROM_REG); 727 bus_space_write_1(iot, ioh, EEPROM_REG, EECS); 728 delay(1); 729 730 return ((b & EEDO) != 0); 731 } 732 733 static u_int16_t 734 eepromread(iot, ioh, offset) 735 bus_space_tag_t iot; 736 bus_space_handle_t ioh; 737 int offset; 738 { 739 volatile int i; 740 volatile int j; 741 volatile u_int16_t readval; 742 743 bus_space_write_1(iot, ioh, 0, BANK_SEL(2)); 744 delay(1); 745 bus_space_write_1(iot, ioh, EEPROM_REG, EECS); /* XXXX??? */ 746 delay(1); 747 748 eepromwritebit(iot, ioh, EECS|EEDI); 749 eepromwritebit(iot, ioh, EECS|EEDI); 750 eepromwritebit(iot, ioh, EECS); 751 752 for (j=5; j>=0; --j) { 753 if ((offset>>j) & 1) 754 eepromwritebit(iot, ioh, EECS|EEDI); 755 else 756 eepromwritebit(iot, ioh, EECS); 757 } 758 759 for (readval=0, i=0; i<16; ++i) { 760 readval<<=1; 761 readval |= eepromreadbit(iot, ioh); 762 } 763 764 bus_space_write_1(iot, ioh, EEPROM_REG, 0|EESK); 765 delay(1); 766 bus_space_write_1(iot, ioh, EEPROM_REG, 0); 767 768 bus_space_write_1(iot, ioh, COMMAND_REG, BANK_SEL(0)); 769 770 return readval; 771 } 772 773 /* 774 * Device timeout/watchdog routine. Entered if the device neglects to generate 775 * an interrupt after a transmit has been started on it. 776 */ 777 void 778 iywatchdog(ifp) 779 struct ifnet *ifp; 780 { 781 struct iy_softc *sc = ifp->if_softc; 782 783 log(LOG_ERR, "%s: device timeout\n", sc->sc_dev.dv_xname); 784 ++sc->sc_ethercom.ec_if.if_oerrors; 785 iyreset(sc); 786 } 787 788 /* 789 * What to do upon receipt of an interrupt. 790 */ 791 int 792 iyintr(arg) 793 void *arg; 794 { 795 struct iy_softc *sc = arg; 796 bus_space_tag_t iot; 797 bus_space_handle_t ioh; 798 799 register u_short status; 800 801 iot = sc->sc_iot; 802 ioh = sc->sc_ioh; 803 804 status = bus_space_read_1(iot, ioh, STATUS_REG); 805 #ifdef IYDEBUG 806 if (status & ALL_INTS) { 807 printf("%s: got interupt %b", sc->sc_dev.dv_xname, status, 808 "\020\1RX_STP\2RX\3TX\4EXEC"); 809 if (status & EXEC_INT) 810 printf(" event %b\n", bus_space_read_1(iot, ioh, 0), 811 "\020\6ABORT"); 812 else 813 printf("\n"); 814 } 815 #endif 816 if (((status & (RX_INT | TX_INT)) == 0)) 817 return 0; 818 819 if (status & RX_INT) { 820 iy_intr_rx(sc); 821 bus_space_write_1(iot, ioh, STATUS_REG, RX_INT); 822 } else if (status & TX_INT) { 823 iy_intr_tx(sc); 824 bus_space_write_1(iot, ioh, STATUS_REG, TX_INT); 825 } 826 return 1; 827 } 828 829 void 830 iyget(sc, iot, ioh, rxlen) 831 struct iy_softc *sc; 832 bus_space_tag_t iot; 833 bus_space_handle_t ioh; 834 int rxlen; 835 { 836 struct mbuf *m, *top, **mp; 837 struct ether_header *eh; 838 struct ifnet *ifp; 839 int len; 840 841 ifp = &sc->sc_ethercom.ec_if; 842 843 m = sc->mb[sc->next_mb]; 844 sc->mb[sc->next_mb] = 0; 845 if (m == 0) { 846 MGETHDR(m, M_DONTWAIT, MT_DATA); 847 if (m == 0) 848 goto dropped; 849 } else { 850 if (sc->last_mb == sc->next_mb) 851 timeout(iymbuffill, sc, 1); 852 sc->next_mb = (sc->next_mb + 1) % MAX_MBS; 853 m->m_data = m->m_pktdat; 854 m->m_flags = M_PKTHDR; 855 } 856 m->m_pkthdr.rcvif = ifp; 857 m->m_pkthdr.len = rxlen; 858 len = MHLEN; 859 top = 0; 860 mp = ⊤ 861 862 while (rxlen > 0) { 863 if (top) { 864 m = sc->mb[sc->next_mb]; 865 sc->mb[sc->next_mb] = 0; 866 if (m == 0) { 867 MGET(m, M_DONTWAIT, MT_DATA); 868 if (m == 0) { 869 m_freem(top); 870 goto dropped; 871 } 872 } else { 873 sc->next_mb = (sc->next_mb + 1) % MAX_MBS; 874 } 875 len = MLEN; 876 } 877 if (rxlen >= MINCLSIZE) { 878 MCLGET(m, M_DONTWAIT); 879 if (m->m_flags & M_EXT) 880 len = MCLBYTES; 881 } 882 len = min(rxlen, len); 883 if (len > 1) { 884 len &= ~1; 885 886 bus_space_read_multi_2(iot, ioh, MEM_PORT_REG, 887 mtod(m, caddr_t), len/2); 888 } else { 889 #ifdef IYDEBUG 890 printf("%s: received odd mbuf\n", sc->sc_dev.dv_xname); 891 #endif 892 *(mtod(m, caddr_t)) = bus_space_read_2(iot, ioh, 893 MEM_PORT_REG); 894 } 895 m->m_len = len; 896 rxlen -= len; 897 *mp = m; 898 mp = &m->m_next; 899 } 900 /* XXX receive the top here */ 901 ++ifp->if_ipackets; 902 903 eh = mtod(top, struct ether_header *); 904 905 #if NBPFILTER > 0 906 if (ifp->if_bpf) { 907 bpf_mtap(ifp->if_bpf, top); 908 if ((ifp->if_flags & IFF_PROMISC) && 909 (eh->ether_dhost[0] & 1) == 0 && 910 bcmp(eh->ether_dhost, 911 LLADDR(sc->sc_ethercom.ec_if.if_sadl), 912 sizeof(eh->ether_dhost)) != 0) { 913 914 m_freem(top); 915 return; 916 } 917 } 918 #endif 919 m_adj(top, sizeof(struct ether_header)); 920 ether_input(ifp, eh, top); 921 return; 922 923 dropped: 924 ++ifp->if_ierrors; 925 return; 926 } 927 void 928 iy_intr_rx(sc) 929 struct iy_softc *sc; 930 { 931 struct ifnet *ifp; 932 bus_space_tag_t iot; 933 bus_space_handle_t ioh; 934 935 u_int rxadrs, rxevnt, rxstatus, rxnext, rxlen; 936 937 iot = sc->sc_iot; 938 ioh = sc->sc_ioh; 939 ifp = &sc->sc_ethercom.ec_if; 940 941 rxadrs = sc->rx_start; 942 bus_space_write_2(iot, ioh, HOST_ADDR_REG, rxadrs); 943 rxevnt = bus_space_read_2(iot, ioh, MEM_PORT_REG); 944 rxnext = 0; 945 946 while (rxevnt == RCV_DONE) { 947 rxstatus = bus_space_read_2(iot, ioh, MEM_PORT_REG); 948 rxnext = bus_space_read_2(iot, ioh, MEM_PORT_REG); 949 rxlen = bus_space_read_2(iot, ioh, MEM_PORT_REG); 950 #ifdef IYDEBUG 951 printf("%s: pck at 0x%04x stat %b next 0x%x len 0x%x\n", 952 sc->sc_dev.dv_xname, rxadrs, rxstatus, 953 "\020\1RCLD\2IA_MCH\010SHORT\011OVRN\013ALGERR" 954 "\014CRCERR\015LENERR\016RCVOK\020TYP", 955 rxnext, rxlen); 956 #endif 957 iyget(sc, iot, ioh, rxlen); 958 959 /* move stop address */ 960 bus_space_write_2(iot, ioh, RCV_STOP_LOW, 961 rxnext == 0 ? sc->rx_size - 2 : rxnext - 2); 962 963 bus_space_write_2(iot, ioh, HOST_ADDR_REG, rxnext); 964 rxadrs = rxnext; 965 rxevnt = bus_space_read_2(iot, ioh, MEM_PORT_REG); 966 } 967 sc->rx_start = rxnext; 968 } 969 970 void 971 iy_intr_tx(sc) 972 struct iy_softc *sc; 973 { 974 bus_space_tag_t iot; 975 bus_space_handle_t ioh; 976 struct ifnet *ifp; 977 u_int txstatus, txstat2, txlen, txnext; 978 979 ifp = &sc->sc_ethercom.ec_if; 980 iot = sc->sc_iot; 981 ioh = sc->sc_ioh; 982 983 while (sc->tx_start != sc->tx_end) { 984 bus_space_write_2(iot, ioh, HOST_ADDR_REG, sc->tx_start); 985 txstatus = bus_space_read_2(iot, ioh, MEM_PORT_REG); 986 if ((txstatus & (TX_DONE|CMD_MASK)) != (TX_DONE|XMT_CMD)) 987 break; 988 989 txstat2 = bus_space_read_2(iot, ioh, MEM_PORT_REG); 990 txnext = bus_space_read_2(iot, ioh, MEM_PORT_REG); 991 txlen = bus_space_read_2(iot, ioh, MEM_PORT_REG); 992 #ifdef IYDEBUG 993 printf("txstat 0x%x stat2 0x%b next 0x%x len 0x%x\n", 994 txstatus, txstat2, "\020\6MAX_COL\7HRT_BEAT\010TX_DEF" 995 "\011UND_RUN\012JERR\013LST_CRS\014LTCOL\016TX_OK\020COLL", 996 txnext, txlen); 997 #endif 998 if (txlen & CHAIN) 999 sc->tx_start = txnext; 1000 else 1001 sc->tx_start = sc->tx_end; 1002 ifp->if_flags &= ~IFF_OACTIVE; 1003 1004 if ((txstat2 & 0x2000) == 0) 1005 ++ifp->if_oerrors; 1006 if (txstat2 & 0x000f) 1007 ifp->if_oerrors += txstat2 & 0x000f; 1008 } 1009 ifp->if_flags &= ~IFF_OACTIVE; 1010 } 1011 1012 #if 0 1013 /* 1014 * Compare two Ether/802 addresses for equality, inlined and unrolled for 1015 * speed. I'd love to have an inline assembler version of this... 1016 */ 1017 static inline int 1018 ether_equal(one, two) 1019 u_char *one, *two; 1020 { 1021 1022 if (one[0] != two[0] || one[1] != two[1] || one[2] != two[2] || 1023 one[3] != two[3] || one[4] != two[4] || one[5] != two[5]) 1024 return 0; 1025 return 1; 1026 } 1027 1028 /* 1029 * Check for a valid address. to_bpf is filled in with one of the following: 1030 * 0 -> BPF doesn't get this packet 1031 * 1 -> BPF does get this packet 1032 * 2 -> BPF does get this packet, but we don't 1033 * Return value is true if the packet is for us, and false otherwise. 1034 * 1035 * This routine is a mess, but it's also critical that it be as fast 1036 * as possible. It could be made cleaner if we can assume that the 1037 * only client which will fiddle with IFF_PROMISC is BPF. This is 1038 * probably a good assumption, but we do not make it here. (Yet.) 1039 */ 1040 static inline int 1041 check_eh(sc, eh, to_bpf) 1042 struct iy_softc *sc; 1043 struct ether_header *eh; 1044 int *to_bpf; 1045 { 1046 int i; 1047 1048 switch (sc->promisc) { 1049 case IFF_ALLMULTI: 1050 /* 1051 * Receiving all multicasts, but no unicasts except those 1052 * destined for us. 1053 */ 1054 #if NBPFILTER > 0 1055 *to_bpf = (sc->sc_ethercom.ec_if.iy_bpf != 0); /* BPF gets this packet if anybody cares */ 1056 #endif 1057 if (eh->ether_dhost[0] & 1) 1058 return 1; 1059 if (ether_equal(eh->ether_dhost, 1060 LLADDR(sc->sc_ethercom.ec_if.if_sadl))) 1061 return 1; 1062 return 0; 1063 1064 case IFF_PROMISC: 1065 /* 1066 * Receiving all packets. These need to be passed on to BPF. 1067 */ 1068 #if NBPFILTER > 0 1069 *to_bpf = (sc->sc_ethercom.ec_if.iy_bpf != 0); 1070 #endif 1071 /* If for us, accept and hand up to BPF */ 1072 if (ether_equal(eh->ether_dhost, LLADDR(sc->sc_ethercom.ec_if.if_sadl))) 1073 return 1; 1074 1075 #if NBPFILTER > 0 1076 if (*to_bpf) 1077 *to_bpf = 2; /* we don't need to see it */ 1078 #endif 1079 1080 /* 1081 * Not a multicast, so BPF wants to see it but we don't. 1082 */ 1083 if (!(eh->ether_dhost[0] & 1)) 1084 return 1; 1085 1086 /* 1087 * If it's one of our multicast groups, accept it and pass it 1088 * up. 1089 */ 1090 for (i = 0; i < sc->mcast_count; i++) { 1091 if (ether_equal(eh->ether_dhost, (u_char *)&sc->mcast_addrs[i])) { 1092 #if NBPFILTER > 0 1093 if (*to_bpf) 1094 *to_bpf = 1; 1095 #endif 1096 return 1; 1097 } 1098 } 1099 return 1; 1100 1101 case IFF_ALLMULTI | IFF_PROMISC: 1102 /* 1103 * Acting as a multicast router, and BPF running at the same 1104 * time. Whew! (Hope this is a fast machine...) 1105 */ 1106 #if NBPFILTER > 0 1107 *to_bpf = (sc->sc_ethercom.ec_if.iy_bpf != 0); 1108 #endif 1109 /* We want to see multicasts. */ 1110 if (eh->ether_dhost[0] & 1) 1111 return 1; 1112 1113 /* We want to see our own packets */ 1114 if (ether_equal(eh->ether_dhost, LLADDR(sc->sc_ethercom.ec_if.if_sadl))) 1115 return 1; 1116 1117 /* Anything else goes to BPF but nothing else. */ 1118 #if NBPFILTER > 0 1119 if (*to_bpf) 1120 *to_bpf = 2; 1121 #endif 1122 return 1; 1123 1124 case 0: 1125 /* 1126 * Only accept unicast packets destined for us, or multicasts 1127 * for groups that we belong to. For now, we assume that the 1128 * '586 will only return packets that we asked it for. This 1129 * isn't strictly true (it uses hashing for the multicast 1130 * filter), but it will do in this case, and we want to get out 1131 * of here as quickly as possible. 1132 */ 1133 #if NBPFILTER > 0 1134 *to_bpf = (sc->sc_ethercom.ec_if.iy_bpf != 0); 1135 #endif 1136 return 1; 1137 } 1138 1139 #ifdef DIAGNOSTIC 1140 panic("check_eh: impossible"); 1141 #endif 1142 } 1143 #endif 1144 1145 int 1146 iyioctl(ifp, cmd, data) 1147 register struct ifnet *ifp; 1148 u_long cmd; 1149 caddr_t data; 1150 { 1151 struct iy_softc *sc; 1152 struct ifaddr *ifa; 1153 struct ifreq *ifr; 1154 int s, error = 0; 1155 1156 sc = ifp->if_softc; 1157 ifa = (struct ifaddr *)data; 1158 ifr = (struct ifreq *)data; 1159 1160 #ifdef IYDEBUG 1161 printf("iyioctl called with ifp 0x%p (%s) cmd 0x%x data 0x%p\n", 1162 ifp, ifp->if_xname, cmd, data); 1163 #endif 1164 1165 s = splimp(); 1166 1167 switch (cmd) { 1168 1169 case SIOCSIFADDR: 1170 ifp->if_flags |= IFF_UP; 1171 1172 switch (ifa->ifa_addr->sa_family) { 1173 #ifdef INET 1174 case AF_INET: 1175 iyinit(sc); 1176 arp_ifinit(ifp, ifa); 1177 break; 1178 #endif 1179 #ifdef NS 1180 /* XXX - This code is probably wrong. */ 1181 case AF_NS: 1182 { 1183 struct ns_addr *ina = &IA_SNS(ifa)->sns_addr; 1184 1185 if (ns_nullhost(*ina)) 1186 ina->x_host = *(union ns_host *) 1187 LLADDR(sc->sc_ethercom.ec_if.if_sadl); 1188 else 1189 bcopy(ina->x_host.c_host, 1190 LLADDR(sc->sc_ethercom.ec_if.if_sadl), 1191 ETHER_ADDR_LEN); 1192 /* Set new address. */ 1193 iyinit(sc); 1194 break; 1195 } 1196 #endif /* NS */ 1197 default: 1198 iyinit(sc); 1199 break; 1200 } 1201 break; 1202 1203 case SIOCSIFFLAGS: 1204 sc->promisc = ifp->if_flags & (IFF_PROMISC | IFF_ALLMULTI); 1205 if ((ifp->if_flags & IFF_UP) == 0 && 1206 (ifp->if_flags & IFF_RUNNING) != 0) { 1207 /* 1208 * If interface is marked down and it is running, then 1209 * stop it. 1210 */ 1211 iystop(sc); 1212 ifp->if_flags &= ~IFF_RUNNING; 1213 } else if ((ifp->if_flags & IFF_UP) != 0 && 1214 (ifp->if_flags & IFF_RUNNING) == 0) { 1215 /* 1216 * If interface is marked up and it is stopped, then 1217 * start it. 1218 */ 1219 iyinit(sc); 1220 } else { 1221 /* 1222 * Reset the interface to pick up changes in any other 1223 * flags that affect hardware registers. 1224 */ 1225 iystop(sc); 1226 iyinit(sc); 1227 } 1228 #ifdef IYDEBUGX 1229 if (ifp->if_flags & IFF_DEBUG) 1230 sc->sc_debug = IFY_ALL; 1231 else 1232 sc->sc_debug = 0; 1233 #endif 1234 break; 1235 1236 #if 0 /* XXX */ 1237 case SIOCADDMULTI: 1238 case SIOCDELMULTI: 1239 error = (cmd == SIOCADDMULTI) ? 1240 ether_addmulti(ifr, &sc->sc_ethercom): 1241 ether_delmulti(ifr, &sc->sc_ethercom); 1242 1243 if (error == ENETRESET) { 1244 /* 1245 * Multicast list has changed; set the hardware filter 1246 * accordingly. 1247 */ 1248 iy_mc_reset(sc); /* XXX */ 1249 error = 0; 1250 } 1251 break; 1252 #endif 1253 default: 1254 error = EINVAL; 1255 } 1256 splx(s); 1257 return error; 1258 } 1259 1260 #if 0 1261 static void 1262 iy_mc_reset(sc) 1263 struct iy_softc *sc; 1264 { 1265 struct ether_multi *enm; 1266 struct ether_multistep step; 1267 1268 /* 1269 * Step through the list of addresses. 1270 */ 1271 sc->mcast_count = 0; 1272 ETHER_FIRST_MULTI(step, &sc->sc_ethercom, enm); 1273 while (enm) { 1274 if (sc->mcast_count >= MAXMCAST || 1275 bcmp(enm->enm_addrlo, enm->enm_addrhi, 6) != 0) { 1276 sc->sc_ethercom.ec_if.if_flags |= IFF_ALLMULTI; 1277 iyioctl(&sc->sc_ethercom.ec_if, SIOCSIFFLAGS, 1278 (void *)0); 1279 goto setflag; 1280 } 1281 1282 bcopy(enm->enm_addrlo, &sc->mcast_addrs[sc->mcast_count], 6); 1283 sc->mcast_count++; 1284 ETHER_NEXT_MULTI(step, enm); 1285 } 1286 setflag: 1287 sc->want_mcsetup = 1; 1288 } 1289 1290 #ifdef IYDEBUG 1291 void 1292 print_rbd(rbd) 1293 volatile struct ie_recv_buf_desc *rbd; 1294 { 1295 1296 printf("RBD at %08lx:\nactual %04x, next %04x, buffer %08x\n" 1297 "length %04x, mbz %04x\n", (u_long)rbd, rbd->ie_rbd_actual, 1298 rbd->ie_rbd_next, rbd->ie_rbd_buffer, rbd->ie_rbd_length, 1299 rbd->mbz); 1300 } 1301 #endif 1302 #endif 1303 1304 void 1305 iymbuffill(arg) 1306 void *arg; 1307 { 1308 struct iy_softc *sc = (struct iy_softc *)arg; 1309 int s, i; 1310 1311 s = splimp(); 1312 i = sc->last_mb; 1313 do { 1314 if (sc->mb[i] == NULL) 1315 MGET(sc->mb[i], M_DONTWAIT, MT_DATA); 1316 if (sc->mb[i] == NULL) 1317 break; 1318 i = (i + 1) % MAX_MBS; 1319 } while (i != sc->next_mb); 1320 sc->last_mb = i; 1321 /* If the queue was not filled, try again. */ 1322 if (sc->last_mb != sc->next_mb) 1323 timeout(iymbuffill, sc, 1); 1324 splx(s); 1325 } 1326 1327 1328 void 1329 iymbufempty(arg) 1330 void *arg; 1331 { 1332 struct iy_softc *sc = (struct iy_softc *)arg; 1333 int s, i; 1334 1335 s = splimp(); 1336 for (i = 0; i<MAX_MBS; i++) { 1337 if (sc->mb[i]) { 1338 m_freem(sc->mb[i]); 1339 sc->mb[i] = NULL; 1340 } 1341 } 1342 sc->last_mb = sc->next_mb = 0; 1343 untimeout(iymbuffill, sc); 1344 splx(s); 1345 } 1346 1347 void 1348 iyprobemem(sc) 1349 struct iy_softc *sc; 1350 { 1351 bus_space_tag_t iot; 1352 bus_space_handle_t ioh; 1353 int testing; 1354 1355 iot = sc->sc_iot; 1356 ioh = sc->sc_ioh; 1357 1358 bus_space_write_1(iot, ioh, COMMAND_REG, BANK_SEL(0)); 1359 delay(1); 1360 bus_space_write_2(iot, ioh, HOST_ADDR_REG, 4096-2); 1361 bus_space_write_2(iot, ioh, MEM_PORT_REG, 0); 1362 1363 for (testing=65536; testing >= 4096; testing >>= 1) { 1364 bus_space_write_2(iot, ioh, HOST_ADDR_REG, testing-2); 1365 bus_space_write_2(iot, ioh, MEM_PORT_REG, 0xdead); 1366 bus_space_write_2(iot, ioh, HOST_ADDR_REG, testing-2); 1367 if (bus_space_read_2(iot, ioh, MEM_PORT_REG) != 0xdead) { 1368 #ifdef IYMEMDEBUG 1369 printf("%s: Didn't keep 0xdead at 0x%x\n", 1370 sc->sc_dev.dv_xname, testing-2); 1371 #endif 1372 continue; 1373 } 1374 1375 bus_space_write_2(iot, ioh, HOST_ADDR_REG, testing-2); 1376 bus_space_write_2(iot, ioh, MEM_PORT_REG, 0xbeef); 1377 bus_space_write_2(iot, ioh, HOST_ADDR_REG, testing-2); 1378 if (bus_space_read_2(iot, ioh, MEM_PORT_REG) != 0xbeef) { 1379 #ifdef IYMEMDEBUG 1380 printf("%s: Didn't keep 0xbeef at 0x%x\n", 1381 sc->sc_dev.dv_xname, testing-2); 1382 #endif 1383 continue; 1384 } 1385 1386 bus_space_write_2(iot, ioh, HOST_ADDR_REG, 0); 1387 bus_space_write_2(iot, ioh, MEM_PORT_REG, 0); 1388 bus_space_write_2(iot, ioh, HOST_ADDR_REG, testing >> 1); 1389 bus_space_write_2(iot, ioh, MEM_PORT_REG, testing >> 1); 1390 bus_space_write_2(iot, ioh, HOST_ADDR_REG, 0); 1391 if (bus_space_read_2(iot, ioh, MEM_PORT_REG) == (testing >> 1)) { 1392 #ifdef IYMEMDEBUG 1393 printf("%s: 0x%x alias of 0x0\n", 1394 sc->sc_dev.dv_xname, testing >> 1); 1395 #endif 1396 continue; 1397 } 1398 1399 break; 1400 } 1401 1402 sc->sram = testing; 1403 1404 switch(testing) { 1405 case 65536: 1406 /* 4 NFS packets + overhead RX, 2 NFS + overhead TX */ 1407 sc->rx_size = 44*1024; 1408 break; 1409 1410 case 32768: 1411 /* 2 NFS packets + overhead RX, 1 NFS + overhead TX */ 1412 sc->rx_size = 22*1024; 1413 break; 1414 1415 case 16384: 1416 /* 1 NFS packet + overhead RX, 4 big packets TX */ 1417 sc->rx_size = 10*1024; 1418 break; 1419 default: 1420 sc->rx_size = testing/2; 1421 break; 1422 } 1423 sc->tx_size = testing - sc->rx_size; 1424 } 1425 1426 static int 1427 eepromreadall(iot, ioh, wordp, maxi) 1428 bus_space_tag_t iot; 1429 bus_space_handle_t ioh; 1430 u_int16_t *wordp; 1431 int maxi; 1432 { 1433 int i; 1434 u_int16_t checksum, tmp; 1435 1436 checksum = 0; 1437 1438 for (i=0; i<EEPP_LENGTH; ++i) { 1439 tmp = eepromread(iot, ioh, i); 1440 checksum += tmp; 1441 if (i<maxi) 1442 wordp[i] = tmp; 1443 } 1444 1445 if (checksum != EEPP_CHKSUM) { 1446 #ifdef IYDEBUG 1447 printf("wrong EEPROM checksum 0x%x should be 0x%x\n", 1448 checksum, EEPP_CHKSUM); 1449 #endif 1450 return 1; 1451 } 1452 return 0; 1453 } 1454
Indexes created Wed Oct 01 15:09:59 GMT 2025