if_iy.c revision 1.9.4.5
1 /* $NetBSD: if_iy.c,v 1.9.4.5 1997/02/26 21:59:52 is Exp $ */ 2 /* #define IYDEBUG */ 3 /* #define IYMEMDEBUG */ 4 /*- 5 * Copyright (c) 1996 Ignatios Souvatzis. 6 * All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 3. All advertising materials mentioning features or use of this software 17 * must display the following acknowledgement: 18 * This product contains software developed by Ignatios Souvatzis for 19 * the NetBSD project. 20 * 4. The names of the author may not be used to endorse or promote products 21 * derived from this software without specific prior written permission. 22 * 23 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND 24 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 25 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 26 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE 27 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 28 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 29 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 30 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 31 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 32 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 33 * SUCH DAMAGE. 34 */ 35 36 #include "bpfilter.h" 37 38 #include <sys/param.h> 39 #include <sys/systm.h> 40 #include <sys/mbuf.h> 41 #include <sys/buf.h> 42 #include <sys/protosw.h> 43 #include <sys/socket.h> 44 #include <sys/ioctl.h> 45 #include <sys/errno.h> 46 #include <sys/syslog.h> 47 #include <sys/device.h> 48 49 #include <net/if.h> 50 #include <net/if_types.h> 51 #include <net/if_dl.h> 52 #include <net/netisr.h> 53 #include <net/route.h> 54 55 #include <net/if_ether.h> 56 57 #if NBPFILTER > 0 58 #include <net/bpf.h> 59 #include <net/bpfdesc.h> 60 #endif 61 62 #ifdef INET 63 #include <netinet/in.h> 64 #include <netinet/in_systm.h> 65 #include <netinet/in_var.h> 66 #include <netinet/ip.h> 67 #include <netinet/if_ether.h> 68 #endif 69 70 #ifdef NS 71 #include <netns/ns.h> 72 #include <netns/ns_if.h> 73 #endif 74 75 #include <vm/vm.h> 76 77 #include <machine/cpu.h> 78 #include <machine/bus.h> 79 #include <machine/intr.h> 80 81 #include <dev/isa/isareg.h> 82 #include <dev/isa/isavar.h> 83 #include <dev/ic/i82595reg.h> 84 85 #define ETHER_MIN_LEN (ETHERMIN + sizeof(struct ether_header) + 4) 86 #define ETHER_MAX_LEN (ETHERMTU + sizeof(struct ether_header) + 4) 87 88 /* 89 * Ethernet status, per interface. 90 */ 91 struct iy_softc { 92 struct device sc_dev; 93 void *sc_ih; 94 95 bus_space_tag_t sc_iot; 96 bus_space_handle_t sc_ioh; 97 98 struct ethercom sc_ethercom; 99 100 #define MAX_MBS 8 101 struct mbuf *mb[MAX_MBS]; 102 int next_mb, last_mb; 103 104 int mappedirq; 105 106 int hard_vers; 107 108 int promisc; 109 110 int sram, tx_size, rx_size; 111 112 int tx_start, tx_end, tx_last; 113 int rx_start; 114 115 #ifdef IYDEBUG 116 int sc_debug; 117 #endif 118 }; 119 120 void iywatchdog __P((struct ifnet *)); 121 int iyioctl __P((struct ifnet *, u_long, caddr_t)); 122 int iyintr __P((void *)); 123 void iyinit __P((struct iy_softc *)); 124 void iystop __P((struct iy_softc *)); 125 void iystart __P((struct ifnet *)); 126 127 void iy_intr_rx __P((struct iy_softc *)); 128 void iy_intr_tx __P((struct iy_softc *)); 129 130 void iyreset __P((struct iy_softc *)); 131 void iy_readframe __P((struct iy_softc *, int)); 132 void iy_drop_packet_buffer __P((struct iy_softc *)); 133 void iy_find_mem_size __P((struct iy_softc *)); 134 void iyrint __P((struct iy_softc *)); 135 void iytint __P((struct iy_softc *)); 136 void iyxmit __P((struct iy_softc *)); 137 void iyget __P((struct iy_softc *, bus_space_tag_t, bus_space_handle_t, int)); 138 void iymbuffill __P((void *)); 139 void iymbufempty __P((void *)); 140 void iyprobemem __P((struct iy_softc *)); 141 static __inline void eepromwritebit __P((bus_space_tag_t, bus_space_handle_t, 142 int)); 143 static __inline int eepromreadbit __P((bus_space_tag_t, bus_space_handle_t)); 144 /* 145 * void iymeminit __P((void *, struct iy_softc *)); 146 * static int iy_mc_setup __P((struct iy_softc *, void *)); 147 * static void iy_mc_reset __P((struct iy_softc *)); 148 */ 149 #ifdef IYDEBUGX 150 void print_rbd __P((volatile struct iy_recv_buf_desc *)); 151 152 int in_ifrint = 0; 153 int in_iftint = 0; 154 #endif 155 156 int iyprobe __P((struct device *, void *, void *)); 157 void iyattach __P((struct device *, struct device *, void *)); 158 159 static u_int16_t eepromread __P((bus_space_tag_t, bus_space_handle_t, int)); 160 161 static int eepromreadall __P((bus_space_tag_t, bus_space_handle_t, u_int16_t *, 162 int)); 163 164 struct cfattach iy_ca = { 165 sizeof(struct iy_softc), iyprobe, iyattach 166 }; 167 168 struct cfdriver iy_cd = { 169 NULL, "iy", DV_IFNET 170 }; 171 172 static u_int8_t eepro_irqmap[] = EEPP_INTMAP; 173 static u_int8_t eepro_revirqmap[] = EEPP_RINTMAP; 174 175 int 176 iyprobe(parent, match, aux) 177 struct device *parent; 178 void *match, *aux; 179 { 180 struct isa_attach_args *ia = aux; 181 u_int16_t eaddr[8]; 182 183 bus_space_tag_t iot; 184 bus_space_handle_t ioh; 185 186 u_int8_t c, d; 187 188 iot = ia->ia_iot; 189 190 if (bus_space_map(iot, ia->ia_iobase, 16, 0, &ioh)) 191 return 0; 192 193 /* try to find the round robin sig: */ 194 195 c = bus_space_read_1(iot, ioh, ID_REG); 196 if ((c & ID_REG_MASK) != ID_REG_SIG) 197 goto out; 198 199 d = bus_space_read_1(iot, ioh, ID_REG); 200 if ((d & ID_REG_MASK) != ID_REG_SIG) 201 goto out; 202 203 if (((d-c) & R_ROBIN_BITS) != 0x40) 204 goto out; 205 206 d = bus_space_read_1(iot, ioh, ID_REG); 207 if ((d & ID_REG_MASK) != ID_REG_SIG) 208 goto out; 209 210 if (((d-c) & R_ROBIN_BITS) != 0x80) 211 goto out; 212 213 d = bus_space_read_1(iot, ioh, ID_REG); 214 if ((d & ID_REG_MASK) != ID_REG_SIG) 215 goto out; 216 217 if (((d-c) & R_ROBIN_BITS) != 0xC0) 218 goto out; 219 220 d = bus_space_read_1(iot, ioh, ID_REG); 221 if ((d & ID_REG_MASK) != ID_REG_SIG) 222 goto out; 223 224 if (((d-c) & R_ROBIN_BITS) != 0x00) 225 goto out; 226 227 #ifdef IYDEBUG 228 printf("iyprobe verified working ID reg.\n"); 229 #endif 230 231 if (eepromreadall(iot, ioh, eaddr, 8)) 232 goto out; 233 234 if (ia->ia_irq == IRQUNK) 235 ia->ia_irq = eepro_irqmap[eaddr[EEPPW1] & EEPP_Int]; 236 237 if (ia->ia_irq >= sizeof(eepro_revirqmap)) 238 goto out; 239 240 if (eepro_revirqmap[ia->ia_irq] == 0xff) 241 goto out; 242 243 /* now lets reset the chip */ 244 245 bus_space_write_1(iot, ioh, COMMAND_REG, RESET_CMD); 246 delay(200); 247 248 ia->ia_iosize = 16; 249 250 bus_space_unmap(iot, ioh, 16); 251 return 1; /* found */ 252 out: 253 bus_space_unmap(iot, ioh, 16); 254 return 0; 255 } 256 257 void 258 iyattach(parent, self, aux) 259 struct device *parent, *self; 260 void *aux; 261 { 262 struct iy_softc *sc = (void *)self; 263 struct isa_attach_args *ia = aux; 264 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 265 bus_space_tag_t iot; 266 bus_space_handle_t ioh; 267 u_int16_t eaddr[8]; 268 u_int8_t myaddr[ETHER_ADDR_LEN]; 269 int eirq; 270 271 iot = ia->ia_iot; 272 273 if (bus_space_map(iot, ia->ia_iobase, 16, 0, &ioh)) 274 panic("Can't bus_space_map in iyattach"); 275 276 sc->sc_iot = iot; 277 sc->sc_ioh = ioh; 278 279 sc->mappedirq = eepro_revirqmap[ia->ia_irq]; 280 281 /* now let's reset the chip */ 282 283 bus_space_write_1(iot, ioh, COMMAND_REG, RESET_CMD); 284 delay(200); 285 286 iyprobemem(sc); 287 288 bcopy(sc->sc_dev.dv_xname, ifp->if_xname, IFNAMSIZ); 289 ifp->if_softc = sc; 290 ifp->if_start = iystart; 291 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_NOTRAILERS; 292 /* XXX todo: | IFF_MULTICAST */ 293 294 ifp->if_ioctl = iyioctl; 295 ifp->if_watchdog = iywatchdog; 296 297 (void)eepromreadall(iot, ioh, eaddr, 8); 298 sc->hard_vers = eaddr[EEPW6] & EEPP_BoardRev; 299 300 #ifdef DIAGNOSTICS 301 if ((eaddr[EEPPEther0] != 302 eepromread(iot, ioh, EEPPEther0a)) && 303 (eaddr[EEPPEther1] != 304 eepromread(iot, ioh, EEPPEther1a)) && 305 (eaddr[EEPPEther2] != 306 eepromread(iot, ioh, EEPPEther2a))) 307 308 printf("EEPROM Ethernet address differs from copy\n"); 309 #endif 310 311 myaddr[1] = eaddr[EEPPEther0] & 0xFF; 312 myaddr[0] = eaddr[EEPPEther0] >> 8; 313 myaddr[3] = eaddr[EEPPEther1] & 0xFF; 314 myaddr[2] = eaddr[EEPPEther1] >> 8; 315 myaddr[5] = eaddr[EEPPEther2] & 0xFF; 316 myaddr[4] = eaddr[EEPPEther2] >> 8; 317 318 /* Attach the interface. */ 319 if_attach(ifp); 320 ether_ifattach(ifp, myaddr); 321 printf(": address %s, rev. %d, %d kB\n", 322 ether_sprintf(myaddr), 323 sc->hard_vers, sc->sram/1024); 324 325 eirq = eepro_irqmap[eaddr[EEPPW1] & EEPP_Int]; 326 if (eirq != ia->ia_irq) 327 printf("%s: EEPROM irq setting %d ignored\n", 328 sc->sc_dev.dv_xname, eirq); 329 330 #if NBPFILTER > 0 331 bpfattach(&ifp->if_bpf, ifp, DLT_EN10MB, sizeof(struct ether_header)); 332 #endif 333 334 sc->sc_ih = isa_intr_establish(ia->ia_ic, ia->ia_irq, IST_EDGE, 335 IPL_NET, iyintr, sc); 336 } 337 338 void 339 iystop(sc) 340 struct iy_softc *sc; 341 { 342 bus_space_tag_t iot; 343 bus_space_handle_t ioh; 344 #ifdef IYDEBUG 345 u_int p, v; 346 #endif 347 348 iot = sc->sc_iot; 349 ioh = sc->sc_ioh; 350 351 bus_space_write_1(iot, ioh, COMMAND_REG, RCV_DISABLE_CMD); 352 353 bus_space_write_1(iot, ioh, INT_MASK_REG, ALL_INTS); 354 bus_space_write_1(iot, ioh, STATUS_REG, ALL_INTS); 355 356 bus_space_write_1(iot, ioh, COMMAND_REG, RESET_CMD); 357 delay(200); 358 #ifdef IYDEBUG 359 printf("%s: dumping tx chain (st 0x%x end 0x%x last 0x%x)\n", 360 sc->sc_dev.dv_xname, sc->tx_start, sc->tx_end, sc->tx_last); 361 p = sc->tx_last; 362 if (!p) 363 p = sc->tx_start; 364 do { 365 bus_space_write_2(iot, ioh, HOST_ADDR_REG, p); 366 v = bus_space_read_2(iot, ioh, MEM_PORT_REG); 367 printf("0x%04x: %b ", p, v, "\020\006Ab\010Dn"); 368 v = bus_space_read_2(iot, ioh, MEM_PORT_REG); 369 printf("0x%b", v, "\020\6MAX_COL\7HRT_BEAT\010TX_DEF\011UND_RUN\012JERR\013LST_CRS\014LTCOL\016TX_OK\020COLL"); 370 p = bus_space_read_2(iot, ioh, MEM_PORT_REG); 371 printf(" 0x%04x", p); 372 v = bus_space_read_2(iot, ioh, MEM_PORT_REG); 373 printf(" 0x%b\n", v, "\020\020Ch"); 374 375 } while (v & 0x8000); 376 #endif 377 sc->tx_start = sc->tx_end = sc->rx_size; 378 sc->tx_last = 0; 379 sc->sc_ethercom.ec_if.if_flags &= ~(IFF_RUNNING|IFF_OACTIVE); 380 381 iymbufempty((void *)sc); 382 } 383 384 void 385 iyreset(sc) 386 struct iy_softc *sc; 387 { 388 int s; 389 s = splimp(); 390 iystop(sc); 391 iyinit(sc); 392 splx(s); 393 } 394 395 void 396 iyinit(sc) 397 struct iy_softc *sc; 398 { 399 int i; 400 unsigned temp; 401 struct ifnet *ifp; 402 bus_space_tag_t iot; 403 bus_space_handle_t ioh; 404 405 iot = sc->sc_iot; 406 ioh = sc->sc_ioh; 407 408 ifp = &sc->sc_ethercom.ec_if; 409 #ifdef IYDEBUG 410 printf("ifp is %p\n", ifp); 411 #endif 412 413 bus_space_write_1(iot, ioh, 0, BANK_SEL(2)); 414 415 temp = bus_space_read_1(iot, ioh, EEPROM_REG); 416 if (temp & 0x10) 417 bus_space_write_1(iot, ioh, EEPROM_REG, temp & ~0x10); 418 419 for (i=0; i<6; ++i) { 420 bus_space_write_1(iot, ioh, I_ADD(i), LLADDR(ifp->if_sadl)[i]); 421 } 422 423 temp = bus_space_read_1(iot, ioh, REG1); 424 bus_space_write_1(iot, ioh, REG1, 425 temp | XMT_CHAIN_INT | XMT_CHAIN_ERRSTOP | RCV_DISCARD_BAD); 426 427 temp = bus_space_read_1(iot, ioh, RECV_MODES_REG); 428 bus_space_write_1(iot, ioh, RECV_MODES_REG, temp | MATCH_BRDCST); 429 #ifdef IYDEBUG 430 printf("%s: RECV_MODES were %b set to %b\n", 431 sc->sc_dev.dv_xname, 432 temp, "\020\1PRMSC\2NOBRDST\3SEECRC\4LENGTH\5NOSaIns\6MultiIA", 433 temp|MATCH_BRDCST, 434 "\020\1PRMSC\2NOBRDST\3SEECRC\4LENGTH\5NOSaIns\6MultiIA"); 435 #endif 436 437 438 delay(500000); /* for the hardware to test for the connector */ 439 440 temp = bus_space_read_1(iot, ioh, MEDIA_SELECT); 441 #ifdef IYDEBUG 442 printf("%s: media select was 0x%b ", sc->sc_dev.dv_xname, 443 temp, "\020\1LnkInDis\2PolCor\3TPE\4JabberDis\5NoAport\6BNC"); 444 #endif 445 temp = (temp & TEST_MODE_MASK); 446 447 switch(ifp->if_flags & (IFF_LINK0 | IFF_LINK1)) { 448 case IFF_LINK0: 449 temp &= ~ (BNC_BIT | TPE_BIT); 450 break; 451 452 case IFF_LINK1: 453 temp = (temp & ~TPE_BIT) | BNC_BIT; 454 break; 455 456 case IFF_LINK0|IFF_LINK1: 457 temp = (temp & ~BNC_BIT) | TPE_BIT; 458 break; 459 default: 460 /* nothing; leave as it is */ 461 } 462 463 464 bus_space_write_1(iot, ioh, MEDIA_SELECT, temp); 465 #ifdef IYDEBUG 466 printf("changed to 0x%b\n", 467 temp, "\020\1LnkInDis\2PolCor\3TPE\4JabberDis\5NoAport\6BNC"); 468 #endif 469 470 bus_space_write_1(iot, ioh, 0, BANK_SEL(1)); 471 472 temp = bus_space_read_1(iot, ioh, INT_NO_REG); 473 bus_space_write_1(iot, ioh, INT_NO_REG, (temp & 0xf8) | sc->mappedirq); 474 475 #ifdef IYDEBUG 476 printf("%s: int no was %b\n", sc->sc_dev.dv_xname, 477 temp, "\020\4bad_irq\010flash/boot present"); 478 temp = bus_space_read_1(iot, ioh, INT_NO_REG); 479 printf("%s: int no now 0x%02x\n", sc->sc_dev.dv_xname, 480 temp, "\020\4BAD IRQ\010flash/boot present"); 481 #endif 482 483 484 bus_space_write_1(iot, ioh, RCV_LOWER_LIMIT_REG, 0); 485 bus_space_write_1(iot, ioh, RCV_UPPER_LIMIT_REG, (sc->rx_size - 2) >> 8); 486 bus_space_write_1(iot, ioh, XMT_LOWER_LIMIT_REG, sc->rx_size >> 8); 487 bus_space_write_1(iot, ioh, XMT_UPPER_LIMIT_REG, sc->sram >> 8); 488 489 temp = bus_space_read_1(iot, ioh, REG1); 490 #ifdef IYDEBUG 491 printf("%s: HW access is %b\n", sc->sc_dev.dv_xname, 492 temp, "\020\2WORD_WIDTH\010INT_ENABLE"); 493 #endif 494 bus_space_write_1(iot, ioh, REG1, temp | INT_ENABLE); /* XXX what about WORD_WIDTH? */ 495 496 #ifdef IYDEBUG 497 temp = bus_space_read_1(iot, ioh, REG1); 498 printf("%s: HW access is %b\n", sc->sc_dev.dv_xname, 499 temp, "\020\2WORD_WIDTH\010INT_ENABLE"); 500 #endif 501 502 bus_space_write_1(iot, ioh, 0, BANK_SEL(0)); 503 504 bus_space_write_1(iot, ioh, INT_MASK_REG, ALL_INTS & ~(RX_BIT|TX_BIT)); 505 bus_space_write_1(iot, ioh, STATUS_REG, ALL_INTS); /* clear ints */ 506 507 bus_space_write_2(iot, ioh, RCV_START_LOW, 0); 508 bus_space_write_2(iot, ioh, RCV_STOP_LOW, sc->rx_size - 2); 509 sc->rx_start = 0; 510 511 bus_space_write_1(iot, ioh, 0, SEL_RESET_CMD); 512 delay(200); 513 514 bus_space_write_2(iot, ioh, XMT_ADDR_REG, sc->rx_size); 515 516 sc->tx_start = sc->tx_end = sc->rx_size; 517 sc->tx_last = 0; 518 519 bus_space_write_1(iot, ioh, 0, RCV_ENABLE_CMD); 520 521 ifp->if_flags |= IFF_RUNNING; 522 ifp->if_flags &= ~IFF_OACTIVE; 523 } 524 525 void 526 iystart(ifp) 527 struct ifnet *ifp; 528 { 529 struct iy_softc *sc; 530 531 532 struct mbuf *m0, *m; 533 u_int len, pad, last, end; 534 u_int llen, residual; 535 int avail; 536 caddr_t data; 537 u_int16_t resval, stat; 538 bus_space_tag_t iot; 539 bus_space_handle_t ioh; 540 541 #ifdef IYDEBUG 542 printf("iystart called\n"); 543 #endif 544 if ((ifp->if_flags & (IFF_RUNNING | IFF_OACTIVE)) != IFF_RUNNING) 545 return; 546 547 sc = ifp->if_softc; 548 iot = sc->sc_iot; 549 ioh = sc->sc_ioh; 550 551 while ((m0 = ifp->if_snd.ifq_head) != NULL) { 552 #ifdef IYDEBUG 553 printf("%s: trying to write another packet to the hardware\n", 554 sc->sc_dev.dv_xname); 555 #endif 556 557 /* We need to use m->m_pkthdr.len, so require the header */ 558 if ((m0->m_flags & M_PKTHDR) == 0) 559 panic("iystart: no header mbuf"); 560 561 len = m0->m_pkthdr.len; 562 pad = len & 1; 563 564 #ifdef IYDEBUG 565 printf("%s: length is %d.\n", sc->sc_dev.dv_xname, len); 566 #endif 567 if (len < ETHER_MIN_LEN) { 568 pad = ETHER_MIN_LEN - len; 569 } 570 571 if (len + pad > ETHER_MAX_LEN) { 572 /* packet is obviously too large: toss it */ 573 ++ifp->if_oerrors; 574 IF_DEQUEUE(&ifp->if_snd, m0); 575 m_freem(m0); 576 continue; 577 } 578 579 #if NBPFILTER > 0 580 if (ifp->if_bpf) 581 bpf_mtap(ifp->if_bpf, m0); 582 #endif 583 584 avail = sc->tx_start - sc->tx_end; 585 if (avail <= 0) 586 avail += sc->tx_size; 587 588 #ifdef IYDEBUG 589 printf("%s: avail is %d.\n", sc->sc_dev.dv_xname, avail); 590 #endif 591 /* 592 * we MUST RUN at splnet here --- 593 * XXX todo: or even turn off the boards ints ??? hm... 594 */ 595 596 /* See if there is room to put another packet in the buffer. */ 597 598 if ((len+pad+2*I595_XMT_HDRLEN) > avail) { 599 printf("%s: len = %d, avail = %d, setting OACTIVE\n", 600 sc->sc_dev.dv_xname, len, avail); 601 ifp->if_flags |= IFF_OACTIVE; 602 return; 603 } 604 605 /* we know it fits in the hardware now, so dequeue it */ 606 IF_DEQUEUE(&ifp->if_snd, m0); 607 608 last = sc->tx_end; 609 end = last + pad + len + I595_XMT_HDRLEN; 610 611 if (end >= sc->sram) { 612 if ((sc->sram - last) <= I595_XMT_HDRLEN) { 613 /* keep header in one piece */ 614 last = sc->rx_size; 615 end = last + pad + len + I595_XMT_HDRLEN; 616 } else 617 end -= sc->tx_size; 618 } 619 620 bus_space_write_2(iot, ioh, HOST_ADDR_REG, last); 621 bus_space_write_2(iot, ioh, MEM_PORT_REG, XMT_CMD); 622 bus_space_write_2(iot, ioh, MEM_PORT_REG, 0); 623 bus_space_write_2(iot, ioh, MEM_PORT_REG, 0); 624 bus_space_write_2(iot, ioh, MEM_PORT_REG, len + pad); 625 626 residual = resval = 0; 627 628 while ((m = m0)!=0) { 629 data = mtod(m, caddr_t); 630 llen = m->m_len; 631 if (residual) { 632 #ifdef IYDEBUG 633 printf("%s: merging residual with next mbuf.\n", 634 sc->sc_dev.dv_xname); 635 #endif 636 resval |= *data << 8; 637 bus_space_write_2(iot, ioh, MEM_PORT_REG, resval); 638 --llen; 639 ++data; 640 } 641 if (llen > 1) 642 bus_space_write_multi_2(iot, ioh, MEM_PORT_REG, 643 data, llen>>1); 644 residual = llen & 1; 645 if (residual) { 646 resval = *(data + llen - 1); 647 #ifdef IYDEBUG 648 printf("%s: got odd mbuf to send.\n", 649 sc->sc_dev.dv_xname); 650 #endif 651 } 652 653 MFREE(m, m0); 654 } 655 656 if (residual) 657 bus_space_write_2(iot, ioh, MEM_PORT_REG, resval); 658 659 pad >>= 1; 660 while (pad-- > 0) 661 bus_space_write_2(iot, ioh, MEM_PORT_REG, 0); 662 663 #ifdef IYDEBUG 664 printf("%s: new last = 0x%x, end = 0x%x.\n", 665 sc->sc_dev.dv_xname, last, end); 666 printf("%s: old start = 0x%x, end = 0x%x, last = 0x%x\n", 667 sc->sc_dev.dv_xname, sc->tx_start, sc->tx_end, sc->tx_last); 668 #endif 669 670 if (sc->tx_start != sc->tx_end) { 671 bus_space_write_2(iot, ioh, HOST_ADDR_REG, sc->tx_last + XMT_COUNT); 672 stat = bus_space_read_2(iot, ioh, MEM_PORT_REG); 673 674 bus_space_write_2(iot, ioh, HOST_ADDR_REG, sc->tx_last + XMT_CHAIN); 675 bus_space_write_2(iot, ioh, MEM_PORT_REG, last); 676 bus_space_write_2(iot, ioh, MEM_PORT_REG, stat | CHAIN); 677 #ifdef IYDEBUG 678 printf("%s: setting 0x%x to 0x%x\n", 679 sc->sc_dev.dv_xname, sc->tx_last + XMT_COUNT, 680 stat | CHAIN); 681 #endif 682 } 683 stat = bus_space_read_2(iot, ioh, MEM_PORT_REG); /* dummy read */ 684 685 /* XXX todo: enable ints here if disabled */ 686 687 ++ifp->if_opackets; 688 689 if (sc->tx_start == sc->tx_end) { 690 bus_space_write_2(iot, ioh, XMT_ADDR_REG, last); 691 bus_space_write_1(iot, ioh, 0, XMT_CMD); 692 sc->tx_start = last; 693 #ifdef IYDEBUG 694 printf("%s: writing 0x%x to XAR and giving XCMD\n", 695 sc->sc_dev.dv_xname, last); 696 #endif 697 } else { 698 bus_space_write_1(iot, ioh, 0, RESUME_XMT_CMD); 699 #ifdef IYDEBUG 700 printf("%s: giving RESUME_XCMD\n", 701 sc->sc_dev.dv_xname); 702 #endif 703 } 704 sc->tx_last = last; 705 sc->tx_end = end; 706 } 707 } 708 709 710 static __inline void 711 eepromwritebit(iot, ioh, what) 712 bus_space_tag_t iot; 713 bus_space_handle_t ioh; 714 int what; 715 { 716 bus_space_write_1(iot, ioh, EEPROM_REG, what); 717 delay(1); 718 bus_space_write_1(iot, ioh, EEPROM_REG, what|EESK); 719 delay(1); 720 bus_space_write_1(iot, ioh, EEPROM_REG, what); 721 delay(1); 722 } 723 724 static __inline int 725 eepromreadbit(iot, ioh) 726 bus_space_tag_t iot; 727 bus_space_handle_t ioh; 728 { 729 int b; 730 731 bus_space_write_1(iot, ioh, EEPROM_REG, EECS|EESK); 732 delay(1); 733 b = bus_space_read_1(iot, ioh, EEPROM_REG); 734 bus_space_write_1(iot, ioh, EEPROM_REG, EECS); 735 delay(1); 736 737 return ((b & EEDO) != 0); 738 } 739 740 static u_int16_t 741 eepromread(iot, ioh, offset) 742 bus_space_tag_t iot; 743 bus_space_handle_t ioh; 744 int offset; 745 { 746 volatile int i; 747 volatile int j; 748 volatile u_int16_t readval; 749 750 bus_space_write_1(iot, ioh, 0, BANK_SEL(2)); 751 delay(1); 752 bus_space_write_1(iot, ioh, EEPROM_REG, EECS); /* XXXX??? */ 753 delay(1); 754 755 eepromwritebit(iot, ioh, EECS|EEDI); 756 eepromwritebit(iot, ioh, EECS|EEDI); 757 eepromwritebit(iot, ioh, EECS); 758 759 for (j=5; j>=0; --j) { 760 if ((offset>>j) & 1) 761 eepromwritebit(iot, ioh, EECS|EEDI); 762 else 763 eepromwritebit(iot, ioh, EECS); 764 } 765 766 for (readval=0, i=0; i<16; ++i) { 767 readval<<=1; 768 readval |= eepromreadbit(iot, ioh); 769 } 770 771 bus_space_write_1(iot, ioh, EEPROM_REG, 0|EESK); 772 delay(1); 773 bus_space_write_1(iot, ioh, EEPROM_REG, 0); 774 775 bus_space_write_1(iot, ioh, COMMAND_REG, BANK_SEL(0)); 776 777 return readval; 778 } 779 780 /* 781 * Device timeout/watchdog routine. Entered if the device neglects to generate 782 * an interrupt after a transmit has been started on it. 783 */ 784 void 785 iywatchdog(ifp) 786 struct ifnet *ifp; 787 { 788 struct iy_softc *sc = ifp->if_softc; 789 790 log(LOG_ERR, "%s: device timeout\n", sc->sc_dev.dv_xname); 791 ++sc->sc_ethercom.ec_if.if_oerrors; 792 iyreset(sc); 793 } 794 795 /* 796 * What to do upon receipt of an interrupt. 797 */ 798 int 799 iyintr(arg) 800 void *arg; 801 { 802 struct iy_softc *sc = arg; 803 bus_space_tag_t iot; 804 bus_space_handle_t ioh; 805 806 register u_short status; 807 808 iot = sc->sc_iot; 809 ioh = sc->sc_ioh; 810 811 status = bus_space_read_1(iot, ioh, STATUS_REG); 812 #ifdef IYDEBUG 813 if (status & ALL_INTS) { 814 printf("%s: got interupt %b", sc->sc_dev.dv_xname, status, 815 "\020\1RX_STP\2RX\3TX\4EXEC"); 816 if (status & EXEC_INT) 817 printf(" event %b\n", bus_space_read_1(iot, ioh, 0), 818 "\020\6ABORT"); 819 else 820 printf("\n"); 821 } 822 #endif 823 if (((status & (RX_INT | TX_INT)) == 0)) 824 return 0; 825 826 if (status & RX_INT) { 827 iy_intr_rx(sc); 828 bus_space_write_1(iot, ioh, STATUS_REG, RX_INT); 829 } else if (status & TX_INT) { 830 iy_intr_tx(sc); 831 bus_space_write_1(iot, ioh, STATUS_REG, TX_INT); 832 } 833 return 1; 834 } 835 836 void 837 iyget(sc, iot, ioh, rxlen) 838 struct iy_softc *sc; 839 bus_space_tag_t iot; 840 bus_space_handle_t ioh; 841 int rxlen; 842 { 843 struct mbuf *m, *top, **mp; 844 struct ether_header *eh; 845 struct ifnet *ifp; 846 int len; 847 848 ifp = &sc->sc_ethercom.ec_if; 849 850 m = sc->mb[sc->next_mb]; 851 sc->mb[sc->next_mb] = 0; 852 if (m == 0) { 853 MGETHDR(m, M_DONTWAIT, MT_DATA); 854 if (m == 0) 855 goto dropped; 856 } else { 857 if (sc->last_mb == sc->next_mb) 858 timeout(iymbuffill, sc, 1); 859 sc->next_mb = (sc->next_mb + 1) % MAX_MBS; 860 m->m_data = m->m_pktdat; 861 m->m_flags = M_PKTHDR; 862 } 863 m->m_pkthdr.rcvif = ifp; 864 m->m_pkthdr.len = rxlen; 865 len = MHLEN; 866 top = 0; 867 mp = ⊤ 868 869 while (rxlen > 0) { 870 if (top) { 871 m = sc->mb[sc->next_mb]; 872 sc->mb[sc->next_mb] = 0; 873 if (m == 0) { 874 MGET(m, M_DONTWAIT, MT_DATA); 875 if (m == 0) { 876 m_freem(top); 877 goto dropped; 878 } 879 } else { 880 sc->next_mb = (sc->next_mb + 1) % MAX_MBS; 881 } 882 len = MLEN; 883 } 884 if (rxlen >= MINCLSIZE) { 885 MCLGET(m, M_DONTWAIT); 886 if (m->m_flags & M_EXT) 887 len = MCLBYTES; 888 } 889 len = min(rxlen, len); 890 if (len > 1) { 891 len &= ~1; 892 893 bus_space_read_multi_2(iot, ioh, MEM_PORT_REG, 894 mtod(m, caddr_t), len/2); 895 } else { 896 #ifdef IYDEBUG 897 printf("%s: received odd mbuf\n", sc->sc_dev.dv_xname); 898 #endif 899 *(mtod(m, caddr_t)) = bus_space_read_2(iot, ioh, 900 MEM_PORT_REG); 901 } 902 m->m_len = len; 903 rxlen -= len; 904 *mp = m; 905 mp = &m->m_next; 906 } 907 /* XXX receive the top here */ 908 ++ifp->if_ipackets; 909 910 eh = mtod(top, struct ether_header *); 911 912 #if NBPFILTER > 0 913 if (ifp->if_bpf) { 914 bpf_mtap(ifp->if_bpf, top); 915 if ((ifp->if_flags & IFF_PROMISC) && 916 (eh->ether_dhost[0] & 1) == 0 && 917 bcmp(eh->ether_dhost, 918 LLADDR(sc->sc_ethercom.ec_if.if_sadl), 919 sizeof(eh->ether_dhost)) != 0) { 920 921 m_freem(top); 922 return; 923 } 924 } 925 #endif 926 m_adj(top, sizeof(struct ether_header)); 927 ether_input(ifp, eh, top); 928 return; 929 930 dropped: 931 ++ifp->if_ierrors; 932 return; 933 } 934 void 935 iy_intr_rx(sc) 936 struct iy_softc *sc; 937 { 938 struct ifnet *ifp; 939 bus_space_tag_t iot; 940 bus_space_handle_t ioh; 941 942 u_int rxadrs, rxevnt, rxstatus, rxnext, rxlen; 943 944 iot = sc->sc_iot; 945 ioh = sc->sc_ioh; 946 ifp = &sc->sc_ethercom.ec_if; 947 948 rxadrs = sc->rx_start; 949 bus_space_write_2(iot, ioh, HOST_ADDR_REG, rxadrs); 950 rxevnt = bus_space_read_2(iot, ioh, MEM_PORT_REG); 951 rxnext = 0; 952 953 while (rxevnt == RCV_DONE) { 954 rxstatus = bus_space_read_2(iot, ioh, MEM_PORT_REG); 955 rxnext = bus_space_read_2(iot, ioh, MEM_PORT_REG); 956 rxlen = bus_space_read_2(iot, ioh, MEM_PORT_REG); 957 #ifdef IYDEBUG 958 printf("%s: pck at 0x%04x stat %b next 0x%x len 0x%x\n", 959 sc->sc_dev.dv_xname, rxadrs, rxstatus, 960 "\020\1RCLD\2IA_MCH\010SHORT\011OVRN\013ALGERR" 961 "\014CRCERR\015LENERR\016RCVOK\020TYP", 962 rxnext, rxlen); 963 #endif 964 iyget(sc, iot, ioh, rxlen); 965 966 /* move stop address */ 967 bus_space_write_2(iot, ioh, RCV_STOP_LOW, 968 rxnext == 0 ? sc->rx_size - 2 : rxnext - 2); 969 970 bus_space_write_2(iot, ioh, HOST_ADDR_REG, rxnext); 971 rxadrs = rxnext; 972 rxevnt = bus_space_read_2(iot, ioh, MEM_PORT_REG); 973 } 974 sc->rx_start = rxnext; 975 } 976 977 void 978 iy_intr_tx(sc) 979 struct iy_softc *sc; 980 { 981 bus_space_tag_t iot; 982 bus_space_handle_t ioh; 983 struct ifnet *ifp; 984 u_int txstatus, txstat2, txlen, txnext; 985 986 ifp = &sc->sc_ethercom.ec_if; 987 iot = sc->sc_iot; 988 ioh = sc->sc_ioh; 989 990 while (sc->tx_start != sc->tx_end) { 991 bus_space_write_2(iot, ioh, HOST_ADDR_REG, sc->tx_start); 992 txstatus = bus_space_read_2(iot, ioh, MEM_PORT_REG); 993 if ((txstatus & (TX_DONE|CMD_MASK)) != (TX_DONE|XMT_CMD)) 994 break; 995 996 txstat2 = bus_space_read_2(iot, ioh, MEM_PORT_REG); 997 txnext = bus_space_read_2(iot, ioh, MEM_PORT_REG); 998 txlen = bus_space_read_2(iot, ioh, MEM_PORT_REG); 999 #ifdef IYDEBUG 1000 printf("txstat 0x%x stat2 0x%b next 0x%x len 0x%x\n", 1001 txstatus, txstat2, "\020\6MAX_COL\7HRT_BEAT\010TX_DEF" 1002 "\011UND_RUN\012JERR\013LST_CRS\014LTCOL\016TX_OK\020COLL", 1003 txnext, txlen); 1004 #endif 1005 if (txlen & CHAIN) 1006 sc->tx_start = txnext; 1007 else 1008 sc->tx_start = sc->tx_end; 1009 ifp->if_flags &= ~IFF_OACTIVE; 1010 1011 if ((txstat2 & 0x2000) == 0) 1012 ++ifp->if_oerrors; 1013 if (txstat2 & 0x000f) 1014 ifp->if_oerrors += txstat2 & 0x000f; 1015 } 1016 ifp->if_flags &= ~IFF_OACTIVE; 1017 } 1018 1019 #if 0 1020 /* 1021 * Compare two Ether/802 addresses for equality, inlined and unrolled for 1022 * speed. I'd love to have an inline assembler version of this... 1023 */ 1024 static inline int 1025 ether_equal(one, two) 1026 u_char *one, *two; 1027 { 1028 1029 if (one[0] != two[0] || one[1] != two[1] || one[2] != two[2] || 1030 one[3] != two[3] || one[4] != two[4] || one[5] != two[5]) 1031 return 0; 1032 return 1; 1033 } 1034 1035 /* 1036 * Check for a valid address. to_bpf is filled in with one of the following: 1037 * 0 -> BPF doesn't get this packet 1038 * 1 -> BPF does get this packet 1039 * 2 -> BPF does get this packet, but we don't 1040 * Return value is true if the packet is for us, and false otherwise. 1041 * 1042 * This routine is a mess, but it's also critical that it be as fast 1043 * as possible. It could be made cleaner if we can assume that the 1044 * only client which will fiddle with IFF_PROMISC is BPF. This is 1045 * probably a good assumption, but we do not make it here. (Yet.) 1046 */ 1047 static inline int 1048 check_eh(sc, eh, to_bpf) 1049 struct iy_softc *sc; 1050 struct ether_header *eh; 1051 int *to_bpf; 1052 { 1053 int i; 1054 1055 switch (sc->promisc) { 1056 case IFF_ALLMULTI: 1057 /* 1058 * Receiving all multicasts, but no unicasts except those 1059 * destined for us. 1060 */ 1061 #if NBPFILTER > 0 1062 *to_bpf = (sc->sc_ethercom.ec_if.iy_bpf != 0); /* BPF gets this packet if anybody cares */ 1063 #endif 1064 if (eh->ether_dhost[0] & 1) 1065 return 1; 1066 if (ether_equal(eh->ether_dhost, 1067 LLADDR(sc->sc_ethercom.ec_if.if_sadl))) 1068 return 1; 1069 return 0; 1070 1071 case IFF_PROMISC: 1072 /* 1073 * Receiving all packets. These need to be passed on to BPF. 1074 */ 1075 #if NBPFILTER > 0 1076 *to_bpf = (sc->sc_ethercom.ec_if.iy_bpf != 0); 1077 #endif 1078 /* If for us, accept and hand up to BPF */ 1079 if (ether_equal(eh->ether_dhost, LLADDR(sc->sc_ethercom.ec_if.if_sadl))) 1080 return 1; 1081 1082 #if NBPFILTER > 0 1083 if (*to_bpf) 1084 *to_bpf = 2; /* we don't need to see it */ 1085 #endif 1086 1087 /* 1088 * Not a multicast, so BPF wants to see it but we don't. 1089 */ 1090 if (!(eh->ether_dhost[0] & 1)) 1091 return 1; 1092 1093 /* 1094 * If it's one of our multicast groups, accept it and pass it 1095 * up. 1096 */ 1097 for (i = 0; i < sc->mcast_count; i++) { 1098 if (ether_equal(eh->ether_dhost, (u_char *)&sc->mcast_addrs[i])) { 1099 #if NBPFILTER > 0 1100 if (*to_bpf) 1101 *to_bpf = 1; 1102 #endif 1103 return 1; 1104 } 1105 } 1106 return 1; 1107 1108 case IFF_ALLMULTI | IFF_PROMISC: 1109 /* 1110 * Acting as a multicast router, and BPF running at the same 1111 * time. Whew! (Hope this is a fast machine...) 1112 */ 1113 #if NBPFILTER > 0 1114 *to_bpf = (sc->sc_ethercom.ec_if.iy_bpf != 0); 1115 #endif 1116 /* We want to see multicasts. */ 1117 if (eh->ether_dhost[0] & 1) 1118 return 1; 1119 1120 /* We want to see our own packets */ 1121 if (ether_equal(eh->ether_dhost, LLADDR(sc->sc_ethercom.ec_if.if_sadl))) 1122 return 1; 1123 1124 /* Anything else goes to BPF but nothing else. */ 1125 #if NBPFILTER > 0 1126 if (*to_bpf) 1127 *to_bpf = 2; 1128 #endif 1129 return 1; 1130 1131 case 0: 1132 /* 1133 * Only accept unicast packets destined for us, or multicasts 1134 * for groups that we belong to. For now, we assume that the 1135 * '586 will only return packets that we asked it for. This 1136 * isn't strictly true (it uses hashing for the multicast 1137 * filter), but it will do in this case, and we want to get out 1138 * of here as quickly as possible. 1139 */ 1140 #if NBPFILTER > 0 1141 *to_bpf = (sc->sc_ethercom.ec_if.iy_bpf != 0); 1142 #endif 1143 return 1; 1144 } 1145 1146 #ifdef DIAGNOSTIC 1147 panic("check_eh: impossible"); 1148 #endif 1149 } 1150 #endif 1151 1152 int 1153 iyioctl(ifp, cmd, data) 1154 register struct ifnet *ifp; 1155 u_long cmd; 1156 caddr_t data; 1157 { 1158 struct iy_softc *sc; 1159 struct ifaddr *ifa; 1160 struct ifreq *ifr; 1161 int s, error = 0; 1162 1163 sc = ifp->if_softc; 1164 ifa = (struct ifaddr *)data; 1165 ifr = (struct ifreq *)data; 1166 1167 #ifdef IYDEBUG 1168 printf("iyioctl called with ifp 0x%p (%s) cmd 0x%x data 0x%p\n", 1169 ifp, ifp->if_xname, cmd, data); 1170 #endif 1171 1172 s = splimp(); 1173 1174 switch (cmd) { 1175 1176 case SIOCSIFADDR: 1177 ifp->if_flags |= IFF_UP; 1178 1179 switch (ifa->ifa_addr->sa_family) { 1180 #ifdef INET 1181 case AF_INET: 1182 iyinit(sc); 1183 arp_ifinit(ifp, ifa); 1184 break; 1185 #endif 1186 #ifdef NS 1187 /* XXX - This code is probably wrong. */ 1188 case AF_NS: 1189 { 1190 struct ns_addr *ina = &IA_SNS(ifa)->sns_addr; 1191 1192 if (ns_nullhost(*ina)) 1193 ina->x_host = *(union ns_host *) 1194 LLADDR(sc->sc_ethercom.ec_if.if_sadl); 1195 else 1196 bcopy(ina->x_host.c_host, 1197 LLADDR(sc->sc_ethercom.ec_if.if_sadl), 1198 ETHER_ADDR_LEN); 1199 /* Set new address. */ 1200 iyinit(sc); 1201 break; 1202 } 1203 #endif /* NS */ 1204 default: 1205 iyinit(sc); 1206 break; 1207 } 1208 break; 1209 1210 case SIOCSIFFLAGS: 1211 sc->promisc = ifp->if_flags & (IFF_PROMISC | IFF_ALLMULTI); 1212 if ((ifp->if_flags & IFF_UP) == 0 && 1213 (ifp->if_flags & IFF_RUNNING) != 0) { 1214 /* 1215 * If interface is marked down and it is running, then 1216 * stop it. 1217 */ 1218 iystop(sc); 1219 ifp->if_flags &= ~IFF_RUNNING; 1220 } else if ((ifp->if_flags & IFF_UP) != 0 && 1221 (ifp->if_flags & IFF_RUNNING) == 0) { 1222 /* 1223 * If interface is marked up and it is stopped, then 1224 * start it. 1225 */ 1226 iyinit(sc); 1227 } else { 1228 /* 1229 * Reset the interface to pick up changes in any other 1230 * flags that affect hardware registers. 1231 */ 1232 iystop(sc); 1233 iyinit(sc); 1234 } 1235 #ifdef IYDEBUGX 1236 if (ifp->if_flags & IFF_DEBUG) 1237 sc->sc_debug = IFY_ALL; 1238 else 1239 sc->sc_debug = 0; 1240 #endif 1241 break; 1242 1243 #if 0 /* XXX */ 1244 case SIOCADDMULTI: 1245 case SIOCDELMULTI: 1246 error = (cmd == SIOCADDMULTI) ? 1247 ether_addmulti(ifr, &sc->sc_ethercom): 1248 ether_delmulti(ifr, &sc->sc_ethercom); 1249 1250 if (error == ENETRESET) { 1251 /* 1252 * Multicast list has changed; set the hardware filter 1253 * accordingly. 1254 */ 1255 iy_mc_reset(sc); /* XXX */ 1256 error = 0; 1257 } 1258 break; 1259 #endif 1260 default: 1261 error = EINVAL; 1262 } 1263 splx(s); 1264 return error; 1265 } 1266 1267 #if 0 1268 static void 1269 iy_mc_reset(sc) 1270 struct iy_softc *sc; 1271 { 1272 struct ether_multi *enm; 1273 struct ether_multistep step; 1274 1275 /* 1276 * Step through the list of addresses. 1277 */ 1278 sc->mcast_count = 0; 1279 ETHER_FIRST_MULTI(step, &sc->sc_ethercom, enm); 1280 while (enm) { 1281 if (sc->mcast_count >= MAXMCAST || 1282 bcmp(enm->enm_addrlo, enm->enm_addrhi, 6) != 0) { 1283 sc->sc_ethercom.ec_if.if_flags |= IFF_ALLMULTI; 1284 iyioctl(&sc->sc_ethercom.ec_if, SIOCSIFFLAGS, 1285 (void *)0); 1286 goto setflag; 1287 } 1288 1289 bcopy(enm->enm_addrlo, &sc->mcast_addrs[sc->mcast_count], 6); 1290 sc->mcast_count++; 1291 ETHER_NEXT_MULTI(step, enm); 1292 } 1293 setflag: 1294 sc->want_mcsetup = 1; 1295 } 1296 1297 #ifdef IYDEBUG 1298 void 1299 print_rbd(rbd) 1300 volatile struct ie_recv_buf_desc *rbd; 1301 { 1302 1303 printf("RBD at %08lx:\nactual %04x, next %04x, buffer %08x\n" 1304 "length %04x, mbz %04x\n", (u_long)rbd, rbd->ie_rbd_actual, 1305 rbd->ie_rbd_next, rbd->ie_rbd_buffer, rbd->ie_rbd_length, 1306 rbd->mbz); 1307 } 1308 #endif 1309 #endif 1310 1311 void 1312 iymbuffill(arg) 1313 void *arg; 1314 { 1315 struct iy_softc *sc = (struct iy_softc *)arg; 1316 int s, i; 1317 1318 s = splimp(); 1319 i = sc->last_mb; 1320 do { 1321 if (sc->mb[i] == NULL) 1322 MGET(sc->mb[i], M_DONTWAIT, MT_DATA); 1323 if (sc->mb[i] == NULL) 1324 break; 1325 i = (i + 1) % MAX_MBS; 1326 } while (i != sc->next_mb); 1327 sc->last_mb = i; 1328 /* If the queue was not filled, try again. */ 1329 if (sc->last_mb != sc->next_mb) 1330 timeout(iymbuffill, sc, 1); 1331 splx(s); 1332 } 1333 1334 1335 void 1336 iymbufempty(arg) 1337 void *arg; 1338 { 1339 struct iy_softc *sc = (struct iy_softc *)arg; 1340 int s, i; 1341 1342 s = splimp(); 1343 for (i = 0; i<MAX_MBS; i++) { 1344 if (sc->mb[i]) { 1345 m_freem(sc->mb[i]); 1346 sc->mb[i] = NULL; 1347 } 1348 } 1349 sc->last_mb = sc->next_mb = 0; 1350 untimeout(iymbuffill, sc); 1351 splx(s); 1352 } 1353 1354 void 1355 iyprobemem(sc) 1356 struct iy_softc *sc; 1357 { 1358 bus_space_tag_t iot; 1359 bus_space_handle_t ioh; 1360 int testing; 1361 1362 iot = sc->sc_iot; 1363 ioh = sc->sc_ioh; 1364 1365 bus_space_write_1(iot, ioh, COMMAND_REG, BANK_SEL(0)); 1366 delay(1); 1367 bus_space_write_2(iot, ioh, HOST_ADDR_REG, 4096-2); 1368 bus_space_write_2(iot, ioh, MEM_PORT_REG, 0); 1369 1370 for (testing=65536; testing >= 4096; testing >>= 1) { 1371 bus_space_write_2(iot, ioh, HOST_ADDR_REG, testing-2); 1372 bus_space_write_2(iot, ioh, MEM_PORT_REG, 0xdead); 1373 bus_space_write_2(iot, ioh, HOST_ADDR_REG, testing-2); 1374 if (bus_space_read_2(iot, ioh, MEM_PORT_REG) != 0xdead) { 1375 #ifdef IYMEMDEBUG 1376 printf("%s: Didn't keep 0xdead at 0x%x\n", 1377 sc->sc_dev.dv_xname, testing-2); 1378 #endif 1379 continue; 1380 } 1381 1382 bus_space_write_2(iot, ioh, HOST_ADDR_REG, testing-2); 1383 bus_space_write_2(iot, ioh, MEM_PORT_REG, 0xbeef); 1384 bus_space_write_2(iot, ioh, HOST_ADDR_REG, testing-2); 1385 if (bus_space_read_2(iot, ioh, MEM_PORT_REG) != 0xbeef) { 1386 #ifdef IYMEMDEBUG 1387 printf("%s: Didn't keep 0xbeef at 0x%x\n", 1388 sc->sc_dev.dv_xname, testing-2); 1389 #endif 1390 continue; 1391 } 1392 1393 bus_space_write_2(iot, ioh, HOST_ADDR_REG, 0); 1394 bus_space_write_2(iot, ioh, MEM_PORT_REG, 0); 1395 bus_space_write_2(iot, ioh, HOST_ADDR_REG, testing >> 1); 1396 bus_space_write_2(iot, ioh, MEM_PORT_REG, testing >> 1); 1397 bus_space_write_2(iot, ioh, HOST_ADDR_REG, 0); 1398 if (bus_space_read_2(iot, ioh, MEM_PORT_REG) == (testing >> 1)) { 1399 #ifdef IYMEMDEBUG 1400 printf("%s: 0x%x alias of 0x0\n", 1401 sc->sc_dev.dv_xname, testing >> 1); 1402 #endif 1403 continue; 1404 } 1405 1406 break; 1407 } 1408 1409 sc->sram = testing; 1410 1411 switch(testing) { 1412 case 65536: 1413 /* 4 NFS packets + overhead RX, 2 NFS + overhead TX */ 1414 sc->rx_size = 44*1024; 1415 break; 1416 1417 case 32768: 1418 /* 2 NFS packets + overhead RX, 1 NFS + overhead TX */ 1419 sc->rx_size = 22*1024; 1420 break; 1421 1422 case 16384: 1423 /* 1 NFS packet + overhead RX, 4 big packets TX */ 1424 sc->rx_size = 10*1024; 1425 break; 1426 default: 1427 sc->rx_size = testing/2; 1428 break; 1429 } 1430 sc->tx_size = testing - sc->rx_size; 1431 } 1432 1433 static int 1434 eepromreadall(iot, ioh, wordp, maxi) 1435 bus_space_tag_t iot; 1436 bus_space_handle_t ioh; 1437 u_int16_t *wordp; 1438 int maxi; 1439 { 1440 int i; 1441 u_int16_t checksum, tmp; 1442 1443 checksum = 0; 1444 1445 for (i=0; i<EEPP_LENGTH; ++i) { 1446 tmp = eepromread(iot, ioh, i); 1447 checksum += tmp; 1448 if (i<maxi) 1449 wordp[i] = tmp; 1450 } 1451 1452 if (checksum != EEPP_CHKSUM) { 1453 #ifdef IYDEBUG 1454 printf("wrong EEPROM checksum 0x%x should be 0x%x\n", 1455 checksum, EEPP_CHKSUM); 1456 #endif 1457 return 1; 1458 } 1459 return 0; 1460 } 1461
Indexes created Wed Oct 01 15:09:59 GMT 2025