if_we_isa.c revision 1.1.4.2 1 1.1.4.2 nathanw /* $NetBSD: if_we_isa.c,v 1.1.4.2 2001/04/09 01:56:42 nathanw Exp $ */
2 1.1.4.2 nathanw
3 1.1.4.2 nathanw /*-
4 1.1.4.2 nathanw * Copyright (c) 1997, 1998 The NetBSD Foundation, Inc.
5 1.1.4.2 nathanw * All rights reserved.
6 1.1.4.2 nathanw *
7 1.1.4.2 nathanw * This code is derived from software contributed to The NetBSD Foundation
8 1.1.4.2 nathanw * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
9 1.1.4.2 nathanw * NASA Ames Research Center.
10 1.1.4.2 nathanw *
11 1.1.4.2 nathanw * Redistribution and use in source and binary forms, with or without
12 1.1.4.2 nathanw * modification, are permitted provided that the following conditions
13 1.1.4.2 nathanw * are met:
14 1.1.4.2 nathanw * 1. Redistributions of source code must retain the above copyright
15 1.1.4.2 nathanw * notice, this list of conditions and the following disclaimer.
16 1.1.4.2 nathanw * 2. Redistributions in binary form must reproduce the above copyright
17 1.1.4.2 nathanw * notice, this list of conditions and the following disclaimer in the
18 1.1.4.2 nathanw * documentation and/or other materials provided with the distribution.
19 1.1.4.2 nathanw * 3. All advertising materials mentioning features or use of this software
20 1.1.4.2 nathanw * must display the following acknowledgement:
21 1.1.4.2 nathanw * This product includes software developed by the NetBSD
22 1.1.4.2 nathanw * Foundation, Inc. and its contributors.
23 1.1.4.2 nathanw * 4. Neither the name of The NetBSD Foundation nor the names of its
24 1.1.4.2 nathanw * contributors may be used to endorse or promote products derived
25 1.1.4.2 nathanw * from this software without specific prior written permission.
26 1.1.4.2 nathanw *
27 1.1.4.2 nathanw * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
28 1.1.4.2 nathanw * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
29 1.1.4.2 nathanw * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
30 1.1.4.2 nathanw * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
31 1.1.4.2 nathanw * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
32 1.1.4.2 nathanw * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
33 1.1.4.2 nathanw * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
34 1.1.4.2 nathanw * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
35 1.1.4.2 nathanw * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
36 1.1.4.2 nathanw * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
37 1.1.4.2 nathanw * POSSIBILITY OF SUCH DAMAGE.
38 1.1.4.2 nathanw */
39 1.1.4.2 nathanw
40 1.1.4.2 nathanw /*
41 1.1.4.2 nathanw * Device driver for National Semiconductor DS8390/WD83C690 based ethernet
42 1.1.4.2 nathanw * adapters.
43 1.1.4.2 nathanw *
44 1.1.4.2 nathanw * Copyright (c) 1994, 1995 Charles M. Hannum. All rights reserved.
45 1.1.4.2 nathanw *
46 1.1.4.2 nathanw * Copyright (C) 1993, David Greenman. This software may be used, modified,
47 1.1.4.2 nathanw * copied, distributed, and sold, in both source and binary form provided that
48 1.1.4.2 nathanw * the above copyright and these terms are retained. Under no circumstances is
49 1.1.4.2 nathanw * the author responsible for the proper functioning of this software, nor does
50 1.1.4.2 nathanw * the author assume any responsibility for damages incurred with its use.
51 1.1.4.2 nathanw */
52 1.1.4.2 nathanw
53 1.1.4.2 nathanw /*
54 1.1.4.2 nathanw * Device driver for the Western Digital/SMC 8003 and 8013 series,
55 1.1.4.2 nathanw * and the SMC Elite Ultra (8216).
56 1.1.4.2 nathanw */
57 1.1.4.2 nathanw
58 1.1.4.2 nathanw #include "opt_inet.h"
59 1.1.4.2 nathanw #include "opt_ns.h"
60 1.1.4.2 nathanw #include "bpfilter.h"
61 1.1.4.2 nathanw #include "rnd.h"
62 1.1.4.2 nathanw
63 1.1.4.2 nathanw #include <sys/param.h>
64 1.1.4.2 nathanw #include <sys/systm.h>
65 1.1.4.2 nathanw #include <sys/device.h>
66 1.1.4.2 nathanw #include <sys/socket.h>
67 1.1.4.2 nathanw #include <sys/mbuf.h>
68 1.1.4.2 nathanw #include <sys/syslog.h>
69 1.1.4.2 nathanw
70 1.1.4.2 nathanw #include <net/if.h>
71 1.1.4.2 nathanw #include <net/if_dl.h>
72 1.1.4.2 nathanw #include <net/if_types.h>
73 1.1.4.2 nathanw #include <net/if_media.h>
74 1.1.4.2 nathanw
75 1.1.4.2 nathanw #include <net/if_ether.h>
76 1.1.4.2 nathanw
77 1.1.4.2 nathanw #ifdef INET
78 1.1.4.2 nathanw #include <netinet/in.h>
79 1.1.4.2 nathanw #include <netinet/in_systm.h>
80 1.1.4.2 nathanw #include <netinet/in_var.h>
81 1.1.4.2 nathanw #include <netinet/ip.h>
82 1.1.4.2 nathanw #include <netinet/if_inarp.h>
83 1.1.4.2 nathanw #endif
84 1.1.4.2 nathanw
85 1.1.4.2 nathanw #ifdef NS
86 1.1.4.2 nathanw #include <netns/ns.h>
87 1.1.4.2 nathanw #include <netns/ns_if.h>
88 1.1.4.2 nathanw #endif
89 1.1.4.2 nathanw
90 1.1.4.2 nathanw #if NBPFILTER > 0
91 1.1.4.2 nathanw #include <net/bpf.h>
92 1.1.4.2 nathanw #include <net/bpfdesc.h>
93 1.1.4.2 nathanw #endif
94 1.1.4.2 nathanw
95 1.1.4.2 nathanw #include <machine/bus.h>
96 1.1.4.2 nathanw #include <machine/bswap.h>
97 1.1.4.2 nathanw #include <machine/intr.h>
98 1.1.4.2 nathanw
99 1.1.4.2 nathanw #include <dev/isa/isareg.h>
100 1.1.4.2 nathanw #include <dev/isa/isavar.h>
101 1.1.4.2 nathanw
102 1.1.4.2 nathanw #include <dev/ic/dp8390reg.h>
103 1.1.4.2 nathanw #include <dev/ic/dp8390var.h>
104 1.1.4.2 nathanw #include <dev/ic/wereg.h>
105 1.1.4.2 nathanw #include <dev/ic/wevar.h>
106 1.1.4.2 nathanw
107 1.1.4.2 nathanw #ifndef __BUS_SPACE_HAS_STREAM_METHODS
108 1.1.4.2 nathanw #define bus_space_read_region_stream_2 bus_space_read_region_2
109 1.1.4.2 nathanw #define bus_space_write_stream_2 bus_space_write_2
110 1.1.4.2 nathanw #define bus_space_write_region_stream_2 bus_space_write_region_2
111 1.1.4.2 nathanw #endif
112 1.1.4.2 nathanw
113 1.1.4.2 nathanw int we_isa_probe __P((struct device *, struct cfdata *, void *));
114 1.1.4.2 nathanw void we_isa_attach __P((struct device *, struct device *, void *));
115 1.1.4.2 nathanw
116 1.1.4.2 nathanw struct cfattach we_isa_ca = {
117 1.1.4.2 nathanw sizeof(struct we_softc), we_isa_probe, we_isa_attach
118 1.1.4.2 nathanw };
119 1.1.4.2 nathanw
120 1.1.4.2 nathanw extern struct cfdriver we_cd;
121 1.1.4.2 nathanw
122 1.1.4.2 nathanw static const char *we_params __P((bus_space_tag_t, bus_space_handle_t,
123 1.1.4.2 nathanw u_int8_t *, bus_size_t *, int *, int *));
124 1.1.4.2 nathanw
125 1.1.4.2 nathanw static const int we_584_irq[] = {
126 1.1.4.2 nathanw 9, 3, 5, 7, 10, 11, 15, 4,
127 1.1.4.2 nathanw };
128 1.1.4.2 nathanw #define NWE_584_IRQ (sizeof(we_584_irq) / sizeof(we_584_irq[0]))
129 1.1.4.2 nathanw
130 1.1.4.2 nathanw static const int we_790_irq[] = {
131 1.1.4.2 nathanw IRQUNK, 9, 3, 5, 7, 10, 11, 15,
132 1.1.4.2 nathanw };
133 1.1.4.2 nathanw #define NWE_790_IRQ (sizeof(we_790_irq) / sizeof(we_790_irq[0]))
134 1.1.4.2 nathanw
135 1.1.4.2 nathanw /*
136 1.1.4.2 nathanw * Delay needed when switching 16-bit access to shared memory.
137 1.1.4.2 nathanw */
138 1.1.4.2 nathanw #define WE_DELAY(wsc) delay(3)
139 1.1.4.2 nathanw
140 1.1.4.2 nathanw /*
141 1.1.4.2 nathanw * Enable card RAM, and 16-bit access.
142 1.1.4.2 nathanw */
143 1.1.4.2 nathanw #define WE_MEM_ENABLE(wsc) \
144 1.1.4.2 nathanw do { \
145 1.1.4.2 nathanw if ((wsc)->sc_16bitp) \
146 1.1.4.2 nathanw bus_space_write_1((wsc)->sc_asict, (wsc)->sc_asich, \
147 1.1.4.2 nathanw WE_LAAR, (wsc)->sc_laar_proto | WE_LAAR_M16EN); \
148 1.1.4.2 nathanw bus_space_write_1((wsc)->sc_asict, (wsc)->sc_asich, \
149 1.1.4.2 nathanw WE_MSR, wsc->sc_msr_proto | WE_MSR_MENB); \
150 1.1.4.2 nathanw WE_DELAY((wsc)); \
151 1.1.4.2 nathanw } while (0)
152 1.1.4.2 nathanw
153 1.1.4.2 nathanw /*
154 1.1.4.2 nathanw * Disable card RAM, and 16-bit access.
155 1.1.4.2 nathanw */
156 1.1.4.2 nathanw #define WE_MEM_DISABLE(wsc) \
157 1.1.4.2 nathanw do { \
158 1.1.4.2 nathanw bus_space_write_1((wsc)->sc_asict, (wsc)->sc_asich, \
159 1.1.4.2 nathanw WE_MSR, (wsc)->sc_msr_proto); \
160 1.1.4.2 nathanw if ((wsc)->sc_16bitp) \
161 1.1.4.2 nathanw bus_space_write_1((wsc)->sc_asict, (wsc)->sc_asich, \
162 1.1.4.2 nathanw WE_LAAR, (wsc)->sc_laar_proto); \
163 1.1.4.2 nathanw WE_DELAY((wsc)); \
164 1.1.4.2 nathanw } while (0)
165 1.1.4.2 nathanw
166 1.1.4.2 nathanw int
167 1.1.4.2 nathanw we_isa_probe(parent, cf, aux)
168 1.1.4.2 nathanw struct device *parent;
169 1.1.4.2 nathanw struct cfdata *cf;
170 1.1.4.2 nathanw void *aux;
171 1.1.4.2 nathanw {
172 1.1.4.2 nathanw struct isa_attach_args *ia = aux;
173 1.1.4.2 nathanw bus_space_tag_t asict, memt;
174 1.1.4.2 nathanw bus_space_handle_t asich, memh;
175 1.1.4.2 nathanw bus_size_t memsize;
176 1.1.4.2 nathanw int asich_valid, memh_valid;
177 1.1.4.2 nathanw int i, is790, rv = 0;
178 1.1.4.2 nathanw u_int8_t x, type;
179 1.1.4.2 nathanw
180 1.1.4.2 nathanw asict = ia->ia_iot;
181 1.1.4.2 nathanw memt = ia->ia_memt;
182 1.1.4.2 nathanw
183 1.1.4.2 nathanw asich_valid = memh_valid = 0;
184 1.1.4.2 nathanw
185 1.1.4.2 nathanw /* Disallow wildcarded i/o addresses. */
186 1.1.4.2 nathanw if (ia->ia_iobase == ISACF_PORT_DEFAULT)
187 1.1.4.2 nathanw return (0);
188 1.1.4.2 nathanw
189 1.1.4.2 nathanw /* Disallow wildcarded mem address. */
190 1.1.4.2 nathanw if (ia->ia_maddr == ISACF_IOMEM_DEFAULT)
191 1.1.4.2 nathanw return (0);
192 1.1.4.2 nathanw
193 1.1.4.2 nathanw /* Attempt to map the device. */
194 1.1.4.2 nathanw if (bus_space_map(asict, ia->ia_iobase, WE_NPORTS, 0, &asich))
195 1.1.4.2 nathanw goto out;
196 1.1.4.2 nathanw asich_valid = 1;
197 1.1.4.2 nathanw
198 1.1.4.2 nathanw #ifdef TOSH_ETHER
199 1.1.4.2 nathanw bus_space_write_1(asict, asich, WE_MSR, WE_MSR_POW);
200 1.1.4.2 nathanw #endif
201 1.1.4.2 nathanw
202 1.1.4.2 nathanw /*
203 1.1.4.2 nathanw * Attempt to do a checksum over the station address PROM.
204 1.1.4.2 nathanw * If it fails, it's probably not a WD/SMC board. There is
205 1.1.4.2 nathanw * a problem with this, though. Some clone WD8003E boards
206 1.1.4.2 nathanw * (e.g. Danpex) won't pass the checksum. In this case,
207 1.1.4.2 nathanw * the checksum byte always seems to be 0.
208 1.1.4.2 nathanw */
209 1.1.4.2 nathanw for (x = 0, i = 0; i < 8; i++)
210 1.1.4.2 nathanw x += bus_space_read_1(asict, asich, WE_PROM + i);
211 1.1.4.2 nathanw
212 1.1.4.2 nathanw if (x != WE_ROM_CHECKSUM_TOTAL) {
213 1.1.4.2 nathanw /* Make sure it's an 8003E clone... */
214 1.1.4.2 nathanw if (bus_space_read_1(asict, asich, WE_CARD_ID) !=
215 1.1.4.2 nathanw WE_TYPE_WD8003E)
216 1.1.4.2 nathanw goto out;
217 1.1.4.2 nathanw
218 1.1.4.2 nathanw /* Check the checksum byte. */
219 1.1.4.2 nathanw if (bus_space_read_1(asict, asich, WE_PROM + 7) != 0)
220 1.1.4.2 nathanw goto out;
221 1.1.4.2 nathanw }
222 1.1.4.2 nathanw
223 1.1.4.2 nathanw /*
224 1.1.4.2 nathanw * Reset the card to force it into a known state.
225 1.1.4.2 nathanw */
226 1.1.4.2 nathanw #ifdef TOSH_ETHER
227 1.1.4.2 nathanw bus_space_write_1(asict, asich, WE_MSR, WE_MSR_RST | WE_MSR_POW);
228 1.1.4.2 nathanw #else
229 1.1.4.2 nathanw bus_space_write_1(asict, asich, WE_MSR, WE_MSR_RST);
230 1.1.4.2 nathanw #endif
231 1.1.4.2 nathanw delay(100);
232 1.1.4.2 nathanw
233 1.1.4.2 nathanw bus_space_write_1(asict, asich, WE_MSR,
234 1.1.4.2 nathanw bus_space_read_1(asict, asich, WE_MSR) & ~WE_MSR_RST);
235 1.1.4.2 nathanw
236 1.1.4.2 nathanw /* Wait in case the card is reading it's EEPROM. */
237 1.1.4.2 nathanw delay(5000);
238 1.1.4.2 nathanw
239 1.1.4.2 nathanw /*
240 1.1.4.2 nathanw * Get parameters.
241 1.1.4.2 nathanw */
242 1.1.4.2 nathanw if (we_params(asict, asich, &type, &memsize, NULL, &is790) == NULL)
243 1.1.4.2 nathanw goto out;
244 1.1.4.2 nathanw
245 1.1.4.2 nathanw /* Allow user to override probed value. */
246 1.1.4.2 nathanw if (ia->ia_msize)
247 1.1.4.2 nathanw memsize = ia->ia_msize;
248 1.1.4.2 nathanw
249 1.1.4.2 nathanw /* Attempt to map the memory space. */
250 1.1.4.2 nathanw if (bus_space_map(memt, ia->ia_maddr, memsize, 0, &memh))
251 1.1.4.2 nathanw goto out;
252 1.1.4.2 nathanw memh_valid = 1;
253 1.1.4.2 nathanw
254 1.1.4.2 nathanw /*
255 1.1.4.2 nathanw * If possible, get the assigned interrupt number from the card
256 1.1.4.2 nathanw * and use it.
257 1.1.4.2 nathanw */
258 1.1.4.2 nathanw if (is790) {
259 1.1.4.2 nathanw u_int8_t hwr;
260 1.1.4.2 nathanw
261 1.1.4.2 nathanw /* Assemble together the encoded interrupt number. */
262 1.1.4.2 nathanw hwr = bus_space_read_1(asict, asich, WE790_HWR);
263 1.1.4.2 nathanw bus_space_write_1(asict, asich, WE790_HWR,
264 1.1.4.2 nathanw hwr | WE790_HWR_SWH);
265 1.1.4.2 nathanw
266 1.1.4.2 nathanw x = bus_space_read_1(asict, asich, WE790_GCR);
267 1.1.4.2 nathanw i = ((x & WE790_GCR_IR2) >> 4) |
268 1.1.4.2 nathanw ((x & (WE790_GCR_IR1|WE790_GCR_IR0)) >> 2);
269 1.1.4.2 nathanw bus_space_write_1(asict, asich, WE790_HWR,
270 1.1.4.2 nathanw hwr & ~WE790_HWR_SWH);
271 1.1.4.2 nathanw
272 1.1.4.2 nathanw if (ia->ia_irq != IRQUNK && ia->ia_irq != we_790_irq[i])
273 1.1.4.2 nathanw printf("%s%d: overriding IRQ %d to %d\n",
274 1.1.4.2 nathanw we_cd.cd_name, cf->cf_unit, ia->ia_irq,
275 1.1.4.2 nathanw we_790_irq[i]);
276 1.1.4.2 nathanw ia->ia_irq = we_790_irq[i];
277 1.1.4.2 nathanw } else if (type & WE_SOFTCONFIG) {
278 1.1.4.2 nathanw /* Assemble together the encoded interrupt number. */
279 1.1.4.2 nathanw i = (bus_space_read_1(asict, asich, WE_ICR) & WE_ICR_IR2) |
280 1.1.4.2 nathanw ((bus_space_read_1(asict, asich, WE_IRR) &
281 1.1.4.2 nathanw (WE_IRR_IR0 | WE_IRR_IR1)) >> 5);
282 1.1.4.2 nathanw
283 1.1.4.2 nathanw if (ia->ia_irq != IRQUNK && ia->ia_irq != we_584_irq[i])
284 1.1.4.2 nathanw printf("%s%d: overriding IRQ %d to %d\n",
285 1.1.4.2 nathanw we_cd.cd_name, cf->cf_unit, ia->ia_irq,
286 1.1.4.2 nathanw we_584_irq[i]);
287 1.1.4.2 nathanw ia->ia_irq = we_584_irq[i];
288 1.1.4.2 nathanw }
289 1.1.4.2 nathanw
290 1.1.4.2 nathanw /* So, we say we've found it! */
291 1.1.4.2 nathanw ia->ia_iosize = WE_NPORTS;
292 1.1.4.2 nathanw ia->ia_msize = memsize;
293 1.1.4.2 nathanw rv = 1;
294 1.1.4.2 nathanw
295 1.1.4.2 nathanw out:
296 1.1.4.2 nathanw if (asich_valid)
297 1.1.4.2 nathanw bus_space_unmap(asict, asich, WE_NPORTS);
298 1.1.4.2 nathanw if (memh_valid)
299 1.1.4.2 nathanw bus_space_unmap(memt, memh, memsize);
300 1.1.4.2 nathanw return (rv);
301 1.1.4.2 nathanw }
302 1.1.4.2 nathanw
303 1.1.4.2 nathanw void
304 1.1.4.2 nathanw we_isa_attach(parent, self, aux)
305 1.1.4.2 nathanw struct device *parent, *self;
306 1.1.4.2 nathanw void *aux;
307 1.1.4.2 nathanw {
308 1.1.4.2 nathanw struct we_softc *wsc = (struct we_softc *)self;
309 1.1.4.2 nathanw struct dp8390_softc *sc = &wsc->sc_dp8390;
310 1.1.4.2 nathanw struct isa_attach_args *ia = aux;
311 1.1.4.2 nathanw bus_space_tag_t nict, asict, memt;
312 1.1.4.2 nathanw bus_space_handle_t nich, asich, memh;
313 1.1.4.2 nathanw const char *typestr;
314 1.1.4.2 nathanw
315 1.1.4.2 nathanw printf("\n");
316 1.1.4.2 nathanw
317 1.1.4.2 nathanw nict = asict = ia->ia_iot;
318 1.1.4.2 nathanw memt = ia->ia_memt;
319 1.1.4.2 nathanw
320 1.1.4.2 nathanw /* Map the device. */
321 1.1.4.2 nathanw if (bus_space_map(asict, ia->ia_iobase, WE_NPORTS, 0, &asich)) {
322 1.1.4.2 nathanw printf("%s: can't map nic i/o space\n",
323 1.1.4.2 nathanw sc->sc_dev.dv_xname);
324 1.1.4.2 nathanw return;
325 1.1.4.2 nathanw }
326 1.1.4.2 nathanw
327 1.1.4.2 nathanw if (bus_space_subregion(asict, asich, WE_NIC_OFFSET, WE_NIC_NPORTS,
328 1.1.4.2 nathanw &nich)) {
329 1.1.4.2 nathanw printf("%s: can't subregion i/o space\n",
330 1.1.4.2 nathanw sc->sc_dev.dv_xname);
331 1.1.4.2 nathanw return;
332 1.1.4.2 nathanw }
333 1.1.4.2 nathanw
334 1.1.4.2 nathanw typestr = we_params(asict, asich, &wsc->sc_type, NULL,
335 1.1.4.2 nathanw &wsc->sc_16bitp, &sc->is790);
336 1.1.4.2 nathanw if (typestr == NULL) {
337 1.1.4.2 nathanw printf("%s: where did the card go?\n", sc->sc_dev.dv_xname);
338 1.1.4.2 nathanw return;
339 1.1.4.2 nathanw }
340 1.1.4.2 nathanw
341 1.1.4.2 nathanw /*
342 1.1.4.2 nathanw * Map memory space. Note we use the size that might have
343 1.1.4.2 nathanw * been overridden by the user.
344 1.1.4.2 nathanw */
345 1.1.4.2 nathanw if (bus_space_map(memt, ia->ia_maddr, ia->ia_msize, 0, &memh)) {
346 1.1.4.2 nathanw printf("%s: can't map shared memory\n",
347 1.1.4.2 nathanw sc->sc_dev.dv_xname);
348 1.1.4.2 nathanw return;
349 1.1.4.2 nathanw }
350 1.1.4.2 nathanw
351 1.1.4.2 nathanw wsc->sc_asict = asict;
352 1.1.4.2 nathanw wsc->sc_asich = asich;
353 1.1.4.2 nathanw
354 1.1.4.2 nathanw sc->sc_regt = nict;
355 1.1.4.2 nathanw sc->sc_regh = nich;
356 1.1.4.2 nathanw
357 1.1.4.2 nathanw sc->sc_buft = memt;
358 1.1.4.2 nathanw sc->sc_bufh = memh;
359 1.1.4.2 nathanw
360 1.1.4.2 nathanw wsc->sc_maddr = ia->ia_maddr;
361 1.1.4.2 nathanw sc->mem_size = ia->ia_msize;
362 1.1.4.2 nathanw
363 1.1.4.2 nathanw /* Interface is always enabled. */
364 1.1.4.2 nathanw sc->sc_enabled = 1;
365 1.1.4.2 nathanw
366 1.1.4.2 nathanw if (we_config(self, wsc, typestr))
367 1.1.4.2 nathanw return;
368 1.1.4.2 nathanw
369 1.1.4.2 nathanw /*
370 1.1.4.2 nathanw * Enable the configured interrupt.
371 1.1.4.2 nathanw */
372 1.1.4.2 nathanw if (sc->is790)
373 1.1.4.2 nathanw bus_space_write_1(asict, asich, WE790_ICR,
374 1.1.4.2 nathanw bus_space_read_1(asict, asich, WE790_ICR) |
375 1.1.4.2 nathanw WE790_ICR_EIL);
376 1.1.4.2 nathanw else if (wsc->sc_type & WE_SOFTCONFIG)
377 1.1.4.2 nathanw bus_space_write_1(asict, asich, WE_IRR,
378 1.1.4.2 nathanw bus_space_read_1(asict, asich, WE_IRR) | WE_IRR_IEN);
379 1.1.4.2 nathanw else if (ia->ia_irq == IRQUNK) {
380 1.1.4.2 nathanw printf("%s: can't wildcard IRQ on a %s\n",
381 1.1.4.2 nathanw sc->sc_dev.dv_xname, typestr);
382 1.1.4.2 nathanw return;
383 1.1.4.2 nathanw }
384 1.1.4.2 nathanw
385 1.1.4.2 nathanw /* Establish interrupt handler. */
386 1.1.4.2 nathanw wsc->sc_ih = isa_intr_establish(ia->ia_ic, ia->ia_irq, IST_EDGE,
387 1.1.4.2 nathanw IPL_NET, dp8390_intr, sc);
388 1.1.4.2 nathanw if (wsc->sc_ih == NULL)
389 1.1.4.2 nathanw printf("%s: can't establish interrupt\n", sc->sc_dev.dv_xname);
390 1.1.4.2 nathanw }
391 1.1.4.2 nathanw
392 1.1.4.2 nathanw static const char *
393 1.1.4.2 nathanw we_params(asict, asich, typep, memsizep, is16bitp, is790p)
394 1.1.4.2 nathanw bus_space_tag_t asict;
395 1.1.4.2 nathanw bus_space_handle_t asich;
396 1.1.4.2 nathanw u_int8_t *typep;
397 1.1.4.2 nathanw bus_size_t *memsizep;
398 1.1.4.2 nathanw int *is16bitp, *is790p;
399 1.1.4.2 nathanw {
400 1.1.4.2 nathanw const char *typestr;
401 1.1.4.2 nathanw bus_size_t memsize;
402 1.1.4.2 nathanw int is16bit, is790;
403 1.1.4.2 nathanw u_int8_t type;
404 1.1.4.2 nathanw
405 1.1.4.2 nathanw memsize = 8192;
406 1.1.4.2 nathanw is16bit = is790 = 0;
407 1.1.4.2 nathanw
408 1.1.4.2 nathanw type = bus_space_read_1(asict, asich, WE_CARD_ID);
409 1.1.4.2 nathanw switch (type) {
410 1.1.4.2 nathanw case WE_TYPE_WD8003S:
411 1.1.4.2 nathanw typestr = "WD8003S";
412 1.1.4.2 nathanw break;
413 1.1.4.2 nathanw case WE_TYPE_WD8003E:
414 1.1.4.2 nathanw typestr = "WD8003E";
415 1.1.4.2 nathanw break;
416 1.1.4.2 nathanw case WE_TYPE_WD8003EB:
417 1.1.4.2 nathanw typestr = "WD8003EB";
418 1.1.4.2 nathanw break;
419 1.1.4.2 nathanw case WE_TYPE_WD8003W:
420 1.1.4.2 nathanw typestr = "WD8003W";
421 1.1.4.2 nathanw break;
422 1.1.4.2 nathanw case WE_TYPE_WD8013EBT:
423 1.1.4.2 nathanw typestr = "WD8013EBT";
424 1.1.4.2 nathanw memsize = 16384;
425 1.1.4.2 nathanw is16bit = 1;
426 1.1.4.2 nathanw break;
427 1.1.4.2 nathanw case WE_TYPE_WD8013W:
428 1.1.4.2 nathanw typestr = "WD8013W";
429 1.1.4.2 nathanw memsize = 16384;
430 1.1.4.2 nathanw is16bit = 1;
431 1.1.4.2 nathanw break;
432 1.1.4.2 nathanw case WE_TYPE_WD8013EP: /* also WD8003EP */
433 1.1.4.2 nathanw if (bus_space_read_1(asict, asich, WE_ICR) & WE_ICR_16BIT) {
434 1.1.4.2 nathanw is16bit = 1;
435 1.1.4.2 nathanw memsize = 16384;
436 1.1.4.2 nathanw typestr = "WD8013EP";
437 1.1.4.2 nathanw } else
438 1.1.4.2 nathanw typestr = "WD8003EP";
439 1.1.4.2 nathanw break;
440 1.1.4.2 nathanw case WE_TYPE_WD8013WC:
441 1.1.4.2 nathanw typestr = "WD8013WC";
442 1.1.4.2 nathanw memsize = 16384;
443 1.1.4.2 nathanw is16bit = 1;
444 1.1.4.2 nathanw break;
445 1.1.4.2 nathanw case WE_TYPE_WD8013EBP:
446 1.1.4.2 nathanw typestr = "WD8013EBP";
447 1.1.4.2 nathanw memsize = 16384;
448 1.1.4.2 nathanw is16bit = 1;
449 1.1.4.2 nathanw break;
450 1.1.4.2 nathanw case WE_TYPE_WD8013EPC:
451 1.1.4.2 nathanw typestr = "WD8013EPC";
452 1.1.4.2 nathanw memsize = 16384;
453 1.1.4.2 nathanw is16bit = 1;
454 1.1.4.2 nathanw break;
455 1.1.4.2 nathanw case WE_TYPE_SMC8216C:
456 1.1.4.2 nathanw case WE_TYPE_SMC8216T:
457 1.1.4.2 nathanw {
458 1.1.4.2 nathanw u_int8_t hwr;
459 1.1.4.2 nathanw
460 1.1.4.2 nathanw typestr = (type == WE_TYPE_SMC8216C) ?
461 1.1.4.2 nathanw "SMC8216/SMC8216C" : "SMC8216T";
462 1.1.4.2 nathanw
463 1.1.4.2 nathanw hwr = bus_space_read_1(asict, asich, WE790_HWR);
464 1.1.4.2 nathanw bus_space_write_1(asict, asich, WE790_HWR,
465 1.1.4.2 nathanw hwr | WE790_HWR_SWH);
466 1.1.4.2 nathanw switch (bus_space_read_1(asict, asich, WE790_RAR) &
467 1.1.4.2 nathanw WE790_RAR_SZ64) {
468 1.1.4.2 nathanw case WE790_RAR_SZ64:
469 1.1.4.2 nathanw memsize = 65536;
470 1.1.4.2 nathanw break;
471 1.1.4.2 nathanw case WE790_RAR_SZ32:
472 1.1.4.2 nathanw memsize = 32768;
473 1.1.4.2 nathanw break;
474 1.1.4.2 nathanw case WE790_RAR_SZ16:
475 1.1.4.2 nathanw memsize = 16384;
476 1.1.4.2 nathanw break;
477 1.1.4.2 nathanw case WE790_RAR_SZ8:
478 1.1.4.2 nathanw /* 8216 has 16K shared mem -- 8416 has 8K */
479 1.1.4.2 nathanw typestr = (type == WE_TYPE_SMC8216C) ?
480 1.1.4.2 nathanw "SMC8416C/SMC8416BT" : "SMC8416T";
481 1.1.4.2 nathanw memsize = 8192;
482 1.1.4.2 nathanw break;
483 1.1.4.2 nathanw }
484 1.1.4.2 nathanw bus_space_write_1(asict, asich, WE790_HWR, hwr);
485 1.1.4.2 nathanw
486 1.1.4.2 nathanw is16bit = 1;
487 1.1.4.2 nathanw is790 = 1;
488 1.1.4.2 nathanw break;
489 1.1.4.2 nathanw }
490 1.1.4.2 nathanw #ifdef TOSH_ETHER
491 1.1.4.2 nathanw case WE_TYPE_TOSHIBA1:
492 1.1.4.2 nathanw typestr = "Toshiba1";
493 1.1.4.2 nathanw memsize = 32768;
494 1.1.4.2 nathanw is16bit = 1;
495 1.1.4.2 nathanw break;
496 1.1.4.2 nathanw case WE_TYPE_TOSHIBA4:
497 1.1.4.2 nathanw typestr = "Toshiba4";
498 1.1.4.2 nathanw memsize = 32768;
499 1.1.4.2 nathanw is16bit = 1;
500 1.1.4.2 nathanw break;
501 1.1.4.2 nathanw #endif
502 1.1.4.2 nathanw default:
503 1.1.4.2 nathanw /* Not one we recognize. */
504 1.1.4.2 nathanw return (NULL);
505 1.1.4.2 nathanw }
506 1.1.4.2 nathanw
507 1.1.4.2 nathanw /*
508 1.1.4.2 nathanw * Make some adjustments to initial values depending on what is
509 1.1.4.2 nathanw * found in the ICR.
510 1.1.4.2 nathanw */
511 1.1.4.2 nathanw if (is16bit && (type != WE_TYPE_WD8013EBT) &&
512 1.1.4.2 nathanw #ifdef TOSH_ETHER
513 1.1.4.2 nathanw (type != WE_TYPE_TOSHIBA1 && type != WE_TYPE_TOSHIBA4) &&
514 1.1.4.2 nathanw #endif
515 1.1.4.2 nathanw (bus_space_read_1(asict, asich, WE_ICR) & WE_ICR_16BIT) == 0) {
516 1.1.4.2 nathanw is16bit = 0;
517 1.1.4.2 nathanw memsize = 8192;
518 1.1.4.2 nathanw }
519 1.1.4.2 nathanw
520 1.1.4.2 nathanw #ifdef WE_DEBUG
521 1.1.4.2 nathanw {
522 1.1.4.2 nathanw int i;
523 1.1.4.2 nathanw
524 1.1.4.2 nathanw printf("we_params: type = 0x%x, typestr = %s, is16bit = %d, "
525 1.1.4.2 nathanw "memsize = %d\n", type, typestr, is16bit, memsize);
526 1.1.4.2 nathanw for (i = 0; i < 8; i++)
527 1.1.4.2 nathanw printf(" %d -> 0x%x\n", i,
528 1.1.4.2 nathanw bus_space_read_1(asict, asich, i));
529 1.1.4.2 nathanw }
530 1.1.4.2 nathanw #endif
531 1.1.4.2 nathanw
532 1.1.4.2 nathanw if (typep != NULL)
533 1.1.4.2 nathanw *typep = type;
534 1.1.4.2 nathanw if (memsizep != NULL)
535 1.1.4.2 nathanw *memsizep = memsize;
536 1.1.4.2 nathanw if (is16bitp != NULL)
537 1.1.4.2 nathanw *is16bitp = is16bit;
538 1.1.4.2 nathanw if (is790p != NULL)
539 1.1.4.2 nathanw *is790p = is790;
540 1.1.4.2 nathanw return (typestr);
541 1.1.4.2 nathanw }
542