if_we_isa.c revision 1.1.4.5 1 1.1.4.5 nathanw /* $NetBSD: if_we_isa.c,v 1.1.4.5 2002/01/11 23:39:08 nathanw Exp $ */
2 1.1.4.2 nathanw
3 1.1.4.2 nathanw /*-
4 1.1.4.2 nathanw * Copyright (c) 1997, 1998 The NetBSD Foundation, Inc.
5 1.1.4.2 nathanw * All rights reserved.
6 1.1.4.2 nathanw *
7 1.1.4.2 nathanw * This code is derived from software contributed to The NetBSD Foundation
8 1.1.4.2 nathanw * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
9 1.1.4.2 nathanw * NASA Ames Research Center.
10 1.1.4.2 nathanw *
11 1.1.4.2 nathanw * Redistribution and use in source and binary forms, with or without
12 1.1.4.2 nathanw * modification, are permitted provided that the following conditions
13 1.1.4.2 nathanw * are met:
14 1.1.4.2 nathanw * 1. Redistributions of source code must retain the above copyright
15 1.1.4.2 nathanw * notice, this list of conditions and the following disclaimer.
16 1.1.4.2 nathanw * 2. Redistributions in binary form must reproduce the above copyright
17 1.1.4.2 nathanw * notice, this list of conditions and the following disclaimer in the
18 1.1.4.2 nathanw * documentation and/or other materials provided with the distribution.
19 1.1.4.2 nathanw * 3. All advertising materials mentioning features or use of this software
20 1.1.4.2 nathanw * must display the following acknowledgement:
21 1.1.4.2 nathanw * This product includes software developed by the NetBSD
22 1.1.4.2 nathanw * Foundation, Inc. and its contributors.
23 1.1.4.2 nathanw * 4. Neither the name of The NetBSD Foundation nor the names of its
24 1.1.4.2 nathanw * contributors may be used to endorse or promote products derived
25 1.1.4.2 nathanw * from this software without specific prior written permission.
26 1.1.4.2 nathanw *
27 1.1.4.2 nathanw * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
28 1.1.4.2 nathanw * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
29 1.1.4.2 nathanw * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
30 1.1.4.2 nathanw * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
31 1.1.4.2 nathanw * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
32 1.1.4.2 nathanw * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
33 1.1.4.2 nathanw * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
34 1.1.4.2 nathanw * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
35 1.1.4.2 nathanw * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
36 1.1.4.2 nathanw * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
37 1.1.4.2 nathanw * POSSIBILITY OF SUCH DAMAGE.
38 1.1.4.2 nathanw */
39 1.1.4.2 nathanw
40 1.1.4.2 nathanw /*
41 1.1.4.2 nathanw * Device driver for National Semiconductor DS8390/WD83C690 based ethernet
42 1.1.4.2 nathanw * adapters.
43 1.1.4.2 nathanw *
44 1.1.4.2 nathanw * Copyright (c) 1994, 1995 Charles M. Hannum. All rights reserved.
45 1.1.4.2 nathanw *
46 1.1.4.2 nathanw * Copyright (C) 1993, David Greenman. This software may be used, modified,
47 1.1.4.2 nathanw * copied, distributed, and sold, in both source and binary form provided that
48 1.1.4.2 nathanw * the above copyright and these terms are retained. Under no circumstances is
49 1.1.4.2 nathanw * the author responsible for the proper functioning of this software, nor does
50 1.1.4.2 nathanw * the author assume any responsibility for damages incurred with its use.
51 1.1.4.2 nathanw */
52 1.1.4.2 nathanw
53 1.1.4.2 nathanw /*
54 1.1.4.2 nathanw * Device driver for the Western Digital/SMC 8003 and 8013 series,
55 1.1.4.2 nathanw * and the SMC Elite Ultra (8216).
56 1.1.4.2 nathanw */
57 1.1.4.2 nathanw
58 1.1.4.4 nathanw #include <sys/cdefs.h>
59 1.1.4.5 nathanw __KERNEL_RCSID(0, "$NetBSD: if_we_isa.c,v 1.1.4.5 2002/01/11 23:39:08 nathanw Exp $");
60 1.1.4.4 nathanw
61 1.1.4.2 nathanw #include <sys/param.h>
62 1.1.4.2 nathanw #include <sys/systm.h>
63 1.1.4.2 nathanw #include <sys/device.h>
64 1.1.4.2 nathanw #include <sys/socket.h>
65 1.1.4.2 nathanw #include <sys/mbuf.h>
66 1.1.4.2 nathanw #include <sys/syslog.h>
67 1.1.4.2 nathanw
68 1.1.4.2 nathanw #include <net/if.h>
69 1.1.4.2 nathanw #include <net/if_dl.h>
70 1.1.4.2 nathanw #include <net/if_types.h>
71 1.1.4.2 nathanw #include <net/if_media.h>
72 1.1.4.2 nathanw
73 1.1.4.2 nathanw #include <net/if_ether.h>
74 1.1.4.2 nathanw
75 1.1.4.2 nathanw #include <machine/bus.h>
76 1.1.4.2 nathanw #include <machine/bswap.h>
77 1.1.4.2 nathanw #include <machine/intr.h>
78 1.1.4.2 nathanw
79 1.1.4.2 nathanw #include <dev/isa/isareg.h>
80 1.1.4.2 nathanw #include <dev/isa/isavar.h>
81 1.1.4.2 nathanw
82 1.1.4.2 nathanw #include <dev/ic/dp8390reg.h>
83 1.1.4.2 nathanw #include <dev/ic/dp8390var.h>
84 1.1.4.2 nathanw #include <dev/ic/wereg.h>
85 1.1.4.2 nathanw #include <dev/ic/wevar.h>
86 1.1.4.2 nathanw
87 1.1.4.2 nathanw #ifndef __BUS_SPACE_HAS_STREAM_METHODS
88 1.1.4.2 nathanw #define bus_space_read_region_stream_2 bus_space_read_region_2
89 1.1.4.2 nathanw #define bus_space_write_stream_2 bus_space_write_2
90 1.1.4.2 nathanw #define bus_space_write_region_stream_2 bus_space_write_region_2
91 1.1.4.2 nathanw #endif
92 1.1.4.2 nathanw
93 1.1.4.2 nathanw int we_isa_probe __P((struct device *, struct cfdata *, void *));
94 1.1.4.2 nathanw void we_isa_attach __P((struct device *, struct device *, void *));
95 1.1.4.2 nathanw
96 1.1.4.2 nathanw struct cfattach we_isa_ca = {
97 1.1.4.2 nathanw sizeof(struct we_softc), we_isa_probe, we_isa_attach
98 1.1.4.2 nathanw };
99 1.1.4.2 nathanw
100 1.1.4.2 nathanw extern struct cfdriver we_cd;
101 1.1.4.2 nathanw
102 1.1.4.2 nathanw static const char *we_params __P((bus_space_tag_t, bus_space_handle_t,
103 1.1.4.2 nathanw u_int8_t *, bus_size_t *, int *, int *));
104 1.1.4.2 nathanw
105 1.1.4.2 nathanw static const int we_584_irq[] = {
106 1.1.4.2 nathanw 9, 3, 5, 7, 10, 11, 15, 4,
107 1.1.4.2 nathanw };
108 1.1.4.2 nathanw #define NWE_584_IRQ (sizeof(we_584_irq) / sizeof(we_584_irq[0]))
109 1.1.4.2 nathanw
110 1.1.4.2 nathanw static const int we_790_irq[] = {
111 1.1.4.5 nathanw ISACF_IRQ_DEFAULT, 9, 3, 5, 7, 10, 11, 15,
112 1.1.4.2 nathanw };
113 1.1.4.2 nathanw #define NWE_790_IRQ (sizeof(we_790_irq) / sizeof(we_790_irq[0]))
114 1.1.4.2 nathanw
115 1.1.4.2 nathanw /*
116 1.1.4.2 nathanw * Delay needed when switching 16-bit access to shared memory.
117 1.1.4.2 nathanw */
118 1.1.4.2 nathanw #define WE_DELAY(wsc) delay(3)
119 1.1.4.2 nathanw
120 1.1.4.2 nathanw /*
121 1.1.4.2 nathanw * Enable card RAM, and 16-bit access.
122 1.1.4.2 nathanw */
123 1.1.4.2 nathanw #define WE_MEM_ENABLE(wsc) \
124 1.1.4.2 nathanw do { \
125 1.1.4.2 nathanw if ((wsc)->sc_16bitp) \
126 1.1.4.2 nathanw bus_space_write_1((wsc)->sc_asict, (wsc)->sc_asich, \
127 1.1.4.2 nathanw WE_LAAR, (wsc)->sc_laar_proto | WE_LAAR_M16EN); \
128 1.1.4.2 nathanw bus_space_write_1((wsc)->sc_asict, (wsc)->sc_asich, \
129 1.1.4.2 nathanw WE_MSR, wsc->sc_msr_proto | WE_MSR_MENB); \
130 1.1.4.2 nathanw WE_DELAY((wsc)); \
131 1.1.4.2 nathanw } while (0)
132 1.1.4.2 nathanw
133 1.1.4.2 nathanw /*
134 1.1.4.2 nathanw * Disable card RAM, and 16-bit access.
135 1.1.4.2 nathanw */
136 1.1.4.2 nathanw #define WE_MEM_DISABLE(wsc) \
137 1.1.4.2 nathanw do { \
138 1.1.4.2 nathanw bus_space_write_1((wsc)->sc_asict, (wsc)->sc_asich, \
139 1.1.4.2 nathanw WE_MSR, (wsc)->sc_msr_proto); \
140 1.1.4.2 nathanw if ((wsc)->sc_16bitp) \
141 1.1.4.2 nathanw bus_space_write_1((wsc)->sc_asict, (wsc)->sc_asich, \
142 1.1.4.2 nathanw WE_LAAR, (wsc)->sc_laar_proto); \
143 1.1.4.2 nathanw WE_DELAY((wsc)); \
144 1.1.4.2 nathanw } while (0)
145 1.1.4.2 nathanw
146 1.1.4.2 nathanw int
147 1.1.4.2 nathanw we_isa_probe(parent, cf, aux)
148 1.1.4.2 nathanw struct device *parent;
149 1.1.4.2 nathanw struct cfdata *cf;
150 1.1.4.2 nathanw void *aux;
151 1.1.4.2 nathanw {
152 1.1.4.2 nathanw struct isa_attach_args *ia = aux;
153 1.1.4.2 nathanw bus_space_tag_t asict, memt;
154 1.1.4.2 nathanw bus_space_handle_t asich, memh;
155 1.1.4.2 nathanw bus_size_t memsize;
156 1.1.4.2 nathanw int asich_valid, memh_valid;
157 1.1.4.2 nathanw int i, is790, rv = 0;
158 1.1.4.2 nathanw u_int8_t x, type;
159 1.1.4.2 nathanw
160 1.1.4.2 nathanw asict = ia->ia_iot;
161 1.1.4.2 nathanw memt = ia->ia_memt;
162 1.1.4.2 nathanw
163 1.1.4.2 nathanw asich_valid = memh_valid = 0;
164 1.1.4.2 nathanw
165 1.1.4.5 nathanw if (ia->ia_nio < 1)
166 1.1.4.5 nathanw return (0);
167 1.1.4.5 nathanw if (ia->ia_niomem < 1)
168 1.1.4.5 nathanw return (0);
169 1.1.4.5 nathanw if (ia->ia_nirq < 1)
170 1.1.4.5 nathanw return (0);
171 1.1.4.5 nathanw
172 1.1.4.5 nathanw if (ISA_DIRECT_CONFIG(ia))
173 1.1.4.5 nathanw return (0);
174 1.1.4.5 nathanw
175 1.1.4.2 nathanw /* Disallow wildcarded i/o addresses. */
176 1.1.4.5 nathanw if (ia->ia_io[0].ir_addr == ISACF_PORT_DEFAULT)
177 1.1.4.2 nathanw return (0);
178 1.1.4.2 nathanw
179 1.1.4.2 nathanw /* Disallow wildcarded mem address. */
180 1.1.4.5 nathanw if (ia->ia_iomem[0].ir_addr == ISACF_IOMEM_DEFAULT)
181 1.1.4.2 nathanw return (0);
182 1.1.4.2 nathanw
183 1.1.4.2 nathanw /* Attempt to map the device. */
184 1.1.4.5 nathanw if (bus_space_map(asict, ia->ia_io[0].ir_addr, WE_NPORTS, 0, &asich))
185 1.1.4.2 nathanw goto out;
186 1.1.4.2 nathanw asich_valid = 1;
187 1.1.4.2 nathanw
188 1.1.4.2 nathanw #ifdef TOSH_ETHER
189 1.1.4.2 nathanw bus_space_write_1(asict, asich, WE_MSR, WE_MSR_POW);
190 1.1.4.2 nathanw #endif
191 1.1.4.2 nathanw
192 1.1.4.2 nathanw /*
193 1.1.4.2 nathanw * Attempt to do a checksum over the station address PROM.
194 1.1.4.2 nathanw * If it fails, it's probably not a WD/SMC board. There is
195 1.1.4.2 nathanw * a problem with this, though. Some clone WD8003E boards
196 1.1.4.2 nathanw * (e.g. Danpex) won't pass the checksum. In this case,
197 1.1.4.2 nathanw * the checksum byte always seems to be 0.
198 1.1.4.2 nathanw */
199 1.1.4.2 nathanw for (x = 0, i = 0; i < 8; i++)
200 1.1.4.2 nathanw x += bus_space_read_1(asict, asich, WE_PROM + i);
201 1.1.4.2 nathanw
202 1.1.4.2 nathanw if (x != WE_ROM_CHECKSUM_TOTAL) {
203 1.1.4.2 nathanw /* Make sure it's an 8003E clone... */
204 1.1.4.2 nathanw if (bus_space_read_1(asict, asich, WE_CARD_ID) !=
205 1.1.4.2 nathanw WE_TYPE_WD8003E)
206 1.1.4.2 nathanw goto out;
207 1.1.4.2 nathanw
208 1.1.4.2 nathanw /* Check the checksum byte. */
209 1.1.4.2 nathanw if (bus_space_read_1(asict, asich, WE_PROM + 7) != 0)
210 1.1.4.2 nathanw goto out;
211 1.1.4.2 nathanw }
212 1.1.4.2 nathanw
213 1.1.4.2 nathanw /*
214 1.1.4.2 nathanw * Reset the card to force it into a known state.
215 1.1.4.2 nathanw */
216 1.1.4.2 nathanw #ifdef TOSH_ETHER
217 1.1.4.2 nathanw bus_space_write_1(asict, asich, WE_MSR, WE_MSR_RST | WE_MSR_POW);
218 1.1.4.2 nathanw #else
219 1.1.4.2 nathanw bus_space_write_1(asict, asich, WE_MSR, WE_MSR_RST);
220 1.1.4.2 nathanw #endif
221 1.1.4.2 nathanw delay(100);
222 1.1.4.2 nathanw
223 1.1.4.2 nathanw bus_space_write_1(asict, asich, WE_MSR,
224 1.1.4.2 nathanw bus_space_read_1(asict, asich, WE_MSR) & ~WE_MSR_RST);
225 1.1.4.2 nathanw
226 1.1.4.2 nathanw /* Wait in case the card is reading it's EEPROM. */
227 1.1.4.2 nathanw delay(5000);
228 1.1.4.2 nathanw
229 1.1.4.2 nathanw /*
230 1.1.4.2 nathanw * Get parameters.
231 1.1.4.2 nathanw */
232 1.1.4.2 nathanw if (we_params(asict, asich, &type, &memsize, NULL, &is790) == NULL)
233 1.1.4.2 nathanw goto out;
234 1.1.4.2 nathanw
235 1.1.4.2 nathanw /* Allow user to override probed value. */
236 1.1.4.5 nathanw if (ia->ia_iomem[0].ir_size)
237 1.1.4.5 nathanw memsize = ia->ia_iomem[0].ir_size;
238 1.1.4.2 nathanw
239 1.1.4.2 nathanw /* Attempt to map the memory space. */
240 1.1.4.5 nathanw if (bus_space_map(memt, ia->ia_iomem[0].ir_addr, memsize, 0, &memh))
241 1.1.4.2 nathanw goto out;
242 1.1.4.2 nathanw memh_valid = 1;
243 1.1.4.2 nathanw
244 1.1.4.2 nathanw /*
245 1.1.4.2 nathanw * If possible, get the assigned interrupt number from the card
246 1.1.4.2 nathanw * and use it.
247 1.1.4.2 nathanw */
248 1.1.4.2 nathanw if (is790) {
249 1.1.4.2 nathanw u_int8_t hwr;
250 1.1.4.2 nathanw
251 1.1.4.2 nathanw /* Assemble together the encoded interrupt number. */
252 1.1.4.2 nathanw hwr = bus_space_read_1(asict, asich, WE790_HWR);
253 1.1.4.2 nathanw bus_space_write_1(asict, asich, WE790_HWR,
254 1.1.4.2 nathanw hwr | WE790_HWR_SWH);
255 1.1.4.2 nathanw
256 1.1.4.2 nathanw x = bus_space_read_1(asict, asich, WE790_GCR);
257 1.1.4.2 nathanw i = ((x & WE790_GCR_IR2) >> 4) |
258 1.1.4.2 nathanw ((x & (WE790_GCR_IR1|WE790_GCR_IR0)) >> 2);
259 1.1.4.2 nathanw bus_space_write_1(asict, asich, WE790_HWR,
260 1.1.4.2 nathanw hwr & ~WE790_HWR_SWH);
261 1.1.4.2 nathanw
262 1.1.4.5 nathanw if (ia->ia_irq[0].ir_irq != ISACF_IRQ_DEFAULT &&
263 1.1.4.5 nathanw ia->ia_irq[0].ir_irq != we_790_irq[i])
264 1.1.4.5 nathanw printf("%s%d: overriding configured IRQ %d to %d\n",
265 1.1.4.5 nathanw we_cd.cd_name, cf->cf_unit, ia->ia_irq[0].ir_irq,
266 1.1.4.2 nathanw we_790_irq[i]);
267 1.1.4.5 nathanw ia->ia_irq[0].ir_irq = we_790_irq[i];
268 1.1.4.2 nathanw } else if (type & WE_SOFTCONFIG) {
269 1.1.4.2 nathanw /* Assemble together the encoded interrupt number. */
270 1.1.4.2 nathanw i = (bus_space_read_1(asict, asich, WE_ICR) & WE_ICR_IR2) |
271 1.1.4.2 nathanw ((bus_space_read_1(asict, asich, WE_IRR) &
272 1.1.4.2 nathanw (WE_IRR_IR0 | WE_IRR_IR1)) >> 5);
273 1.1.4.2 nathanw
274 1.1.4.5 nathanw if (ia->ia_irq[0].ir_irq != ISACF_IRQ_DEFAULT &&
275 1.1.4.5 nathanw ia->ia_irq[0].ir_irq != we_584_irq[i])
276 1.1.4.5 nathanw printf("%s%d: overriding configured IRQ %d to %d\n",
277 1.1.4.5 nathanw we_cd.cd_name, cf->cf_unit, ia->ia_irq[0].ir_irq,
278 1.1.4.2 nathanw we_584_irq[i]);
279 1.1.4.5 nathanw ia->ia_irq[0].ir_irq = we_584_irq[i];
280 1.1.4.2 nathanw }
281 1.1.4.2 nathanw
282 1.1.4.2 nathanw /* So, we say we've found it! */
283 1.1.4.5 nathanw ia->ia_nio = 1;
284 1.1.4.5 nathanw ia->ia_io[0].ir_size = WE_NPORTS;
285 1.1.4.5 nathanw
286 1.1.4.5 nathanw ia->ia_niomem = 1;
287 1.1.4.5 nathanw ia->ia_iomem[0].ir_size = memsize;
288 1.1.4.5 nathanw
289 1.1.4.5 nathanw ia->ia_nirq = 1;
290 1.1.4.5 nathanw
291 1.1.4.5 nathanw ia->ia_ndrq = 0;
292 1.1.4.5 nathanw
293 1.1.4.2 nathanw rv = 1;
294 1.1.4.2 nathanw
295 1.1.4.2 nathanw out:
296 1.1.4.2 nathanw if (asich_valid)
297 1.1.4.2 nathanw bus_space_unmap(asict, asich, WE_NPORTS);
298 1.1.4.2 nathanw if (memh_valid)
299 1.1.4.2 nathanw bus_space_unmap(memt, memh, memsize);
300 1.1.4.2 nathanw return (rv);
301 1.1.4.2 nathanw }
302 1.1.4.2 nathanw
303 1.1.4.2 nathanw void
304 1.1.4.2 nathanw we_isa_attach(parent, self, aux)
305 1.1.4.2 nathanw struct device *parent, *self;
306 1.1.4.2 nathanw void *aux;
307 1.1.4.2 nathanw {
308 1.1.4.2 nathanw struct we_softc *wsc = (struct we_softc *)self;
309 1.1.4.2 nathanw struct dp8390_softc *sc = &wsc->sc_dp8390;
310 1.1.4.2 nathanw struct isa_attach_args *ia = aux;
311 1.1.4.2 nathanw bus_space_tag_t nict, asict, memt;
312 1.1.4.2 nathanw bus_space_handle_t nich, asich, memh;
313 1.1.4.2 nathanw const char *typestr;
314 1.1.4.2 nathanw
315 1.1.4.2 nathanw printf("\n");
316 1.1.4.2 nathanw
317 1.1.4.2 nathanw nict = asict = ia->ia_iot;
318 1.1.4.2 nathanw memt = ia->ia_memt;
319 1.1.4.2 nathanw
320 1.1.4.2 nathanw /* Map the device. */
321 1.1.4.5 nathanw if (bus_space_map(asict, ia->ia_io[0].ir_addr, WE_NPORTS, 0, &asich)) {
322 1.1.4.2 nathanw printf("%s: can't map nic i/o space\n",
323 1.1.4.2 nathanw sc->sc_dev.dv_xname);
324 1.1.4.2 nathanw return;
325 1.1.4.2 nathanw }
326 1.1.4.2 nathanw
327 1.1.4.2 nathanw if (bus_space_subregion(asict, asich, WE_NIC_OFFSET, WE_NIC_NPORTS,
328 1.1.4.2 nathanw &nich)) {
329 1.1.4.2 nathanw printf("%s: can't subregion i/o space\n",
330 1.1.4.2 nathanw sc->sc_dev.dv_xname);
331 1.1.4.2 nathanw return;
332 1.1.4.2 nathanw }
333 1.1.4.2 nathanw
334 1.1.4.2 nathanw typestr = we_params(asict, asich, &wsc->sc_type, NULL,
335 1.1.4.2 nathanw &wsc->sc_16bitp, &sc->is790);
336 1.1.4.2 nathanw if (typestr == NULL) {
337 1.1.4.2 nathanw printf("%s: where did the card go?\n", sc->sc_dev.dv_xname);
338 1.1.4.2 nathanw return;
339 1.1.4.2 nathanw }
340 1.1.4.2 nathanw
341 1.1.4.2 nathanw /*
342 1.1.4.2 nathanw * Map memory space. Note we use the size that might have
343 1.1.4.2 nathanw * been overridden by the user.
344 1.1.4.2 nathanw */
345 1.1.4.5 nathanw if (bus_space_map(memt, ia->ia_iomem[0].ir_addr,
346 1.1.4.5 nathanw ia->ia_iomem[0].ir_size, 0, &memh)) {
347 1.1.4.2 nathanw printf("%s: can't map shared memory\n",
348 1.1.4.2 nathanw sc->sc_dev.dv_xname);
349 1.1.4.2 nathanw return;
350 1.1.4.2 nathanw }
351 1.1.4.2 nathanw
352 1.1.4.2 nathanw wsc->sc_asict = asict;
353 1.1.4.2 nathanw wsc->sc_asich = asich;
354 1.1.4.2 nathanw
355 1.1.4.2 nathanw sc->sc_regt = nict;
356 1.1.4.2 nathanw sc->sc_regh = nich;
357 1.1.4.2 nathanw
358 1.1.4.2 nathanw sc->sc_buft = memt;
359 1.1.4.2 nathanw sc->sc_bufh = memh;
360 1.1.4.2 nathanw
361 1.1.4.5 nathanw wsc->sc_maddr = ia->ia_iomem[0].ir_addr;
362 1.1.4.5 nathanw sc->mem_size = ia->ia_iomem[0].ir_size;
363 1.1.4.2 nathanw
364 1.1.4.2 nathanw /* Interface is always enabled. */
365 1.1.4.2 nathanw sc->sc_enabled = 1;
366 1.1.4.2 nathanw
367 1.1.4.2 nathanw if (we_config(self, wsc, typestr))
368 1.1.4.2 nathanw return;
369 1.1.4.2 nathanw
370 1.1.4.2 nathanw /*
371 1.1.4.2 nathanw * Enable the configured interrupt.
372 1.1.4.2 nathanw */
373 1.1.4.2 nathanw if (sc->is790)
374 1.1.4.2 nathanw bus_space_write_1(asict, asich, WE790_ICR,
375 1.1.4.2 nathanw bus_space_read_1(asict, asich, WE790_ICR) |
376 1.1.4.2 nathanw WE790_ICR_EIL);
377 1.1.4.2 nathanw else if (wsc->sc_type & WE_SOFTCONFIG)
378 1.1.4.2 nathanw bus_space_write_1(asict, asich, WE_IRR,
379 1.1.4.2 nathanw bus_space_read_1(asict, asich, WE_IRR) | WE_IRR_IEN);
380 1.1.4.5 nathanw else if (ia->ia_irq[0].ir_irq == ISACF_IRQ_DEFAULT) {
381 1.1.4.2 nathanw printf("%s: can't wildcard IRQ on a %s\n",
382 1.1.4.2 nathanw sc->sc_dev.dv_xname, typestr);
383 1.1.4.2 nathanw return;
384 1.1.4.2 nathanw }
385 1.1.4.2 nathanw
386 1.1.4.2 nathanw /* Establish interrupt handler. */
387 1.1.4.5 nathanw wsc->sc_ih = isa_intr_establish(ia->ia_ic, ia->ia_irq[0].ir_irq,
388 1.1.4.5 nathanw IST_EDGE, IPL_NET, dp8390_intr, sc);
389 1.1.4.2 nathanw if (wsc->sc_ih == NULL)
390 1.1.4.2 nathanw printf("%s: can't establish interrupt\n", sc->sc_dev.dv_xname);
391 1.1.4.2 nathanw }
392 1.1.4.2 nathanw
393 1.1.4.2 nathanw static const char *
394 1.1.4.2 nathanw we_params(asict, asich, typep, memsizep, is16bitp, is790p)
395 1.1.4.2 nathanw bus_space_tag_t asict;
396 1.1.4.2 nathanw bus_space_handle_t asich;
397 1.1.4.2 nathanw u_int8_t *typep;
398 1.1.4.2 nathanw bus_size_t *memsizep;
399 1.1.4.2 nathanw int *is16bitp, *is790p;
400 1.1.4.2 nathanw {
401 1.1.4.2 nathanw const char *typestr;
402 1.1.4.2 nathanw bus_size_t memsize;
403 1.1.4.2 nathanw int is16bit, is790;
404 1.1.4.2 nathanw u_int8_t type;
405 1.1.4.2 nathanw
406 1.1.4.2 nathanw memsize = 8192;
407 1.1.4.2 nathanw is16bit = is790 = 0;
408 1.1.4.2 nathanw
409 1.1.4.2 nathanw type = bus_space_read_1(asict, asich, WE_CARD_ID);
410 1.1.4.2 nathanw switch (type) {
411 1.1.4.2 nathanw case WE_TYPE_WD8003S:
412 1.1.4.2 nathanw typestr = "WD8003S";
413 1.1.4.2 nathanw break;
414 1.1.4.2 nathanw case WE_TYPE_WD8003E:
415 1.1.4.2 nathanw typestr = "WD8003E";
416 1.1.4.2 nathanw break;
417 1.1.4.2 nathanw case WE_TYPE_WD8003EB:
418 1.1.4.2 nathanw typestr = "WD8003EB";
419 1.1.4.2 nathanw break;
420 1.1.4.2 nathanw case WE_TYPE_WD8003W:
421 1.1.4.2 nathanw typestr = "WD8003W";
422 1.1.4.2 nathanw break;
423 1.1.4.2 nathanw case WE_TYPE_WD8013EBT:
424 1.1.4.2 nathanw typestr = "WD8013EBT";
425 1.1.4.2 nathanw memsize = 16384;
426 1.1.4.2 nathanw is16bit = 1;
427 1.1.4.2 nathanw break;
428 1.1.4.2 nathanw case WE_TYPE_WD8013W:
429 1.1.4.2 nathanw typestr = "WD8013W";
430 1.1.4.2 nathanw memsize = 16384;
431 1.1.4.2 nathanw is16bit = 1;
432 1.1.4.2 nathanw break;
433 1.1.4.2 nathanw case WE_TYPE_WD8013EP: /* also WD8003EP */
434 1.1.4.2 nathanw if (bus_space_read_1(asict, asich, WE_ICR) & WE_ICR_16BIT) {
435 1.1.4.2 nathanw is16bit = 1;
436 1.1.4.2 nathanw memsize = 16384;
437 1.1.4.2 nathanw typestr = "WD8013EP";
438 1.1.4.2 nathanw } else
439 1.1.4.2 nathanw typestr = "WD8003EP";
440 1.1.4.2 nathanw break;
441 1.1.4.2 nathanw case WE_TYPE_WD8013WC:
442 1.1.4.2 nathanw typestr = "WD8013WC";
443 1.1.4.2 nathanw memsize = 16384;
444 1.1.4.2 nathanw is16bit = 1;
445 1.1.4.2 nathanw break;
446 1.1.4.2 nathanw case WE_TYPE_WD8013EBP:
447 1.1.4.2 nathanw typestr = "WD8013EBP";
448 1.1.4.2 nathanw memsize = 16384;
449 1.1.4.2 nathanw is16bit = 1;
450 1.1.4.2 nathanw break;
451 1.1.4.2 nathanw case WE_TYPE_WD8013EPC:
452 1.1.4.2 nathanw typestr = "WD8013EPC";
453 1.1.4.2 nathanw memsize = 16384;
454 1.1.4.2 nathanw is16bit = 1;
455 1.1.4.2 nathanw break;
456 1.1.4.2 nathanw case WE_TYPE_SMC8216C:
457 1.1.4.2 nathanw case WE_TYPE_SMC8216T:
458 1.1.4.2 nathanw {
459 1.1.4.2 nathanw u_int8_t hwr;
460 1.1.4.2 nathanw
461 1.1.4.2 nathanw typestr = (type == WE_TYPE_SMC8216C) ?
462 1.1.4.2 nathanw "SMC8216/SMC8216C" : "SMC8216T";
463 1.1.4.2 nathanw
464 1.1.4.2 nathanw hwr = bus_space_read_1(asict, asich, WE790_HWR);
465 1.1.4.2 nathanw bus_space_write_1(asict, asich, WE790_HWR,
466 1.1.4.2 nathanw hwr | WE790_HWR_SWH);
467 1.1.4.2 nathanw switch (bus_space_read_1(asict, asich, WE790_RAR) &
468 1.1.4.2 nathanw WE790_RAR_SZ64) {
469 1.1.4.2 nathanw case WE790_RAR_SZ64:
470 1.1.4.2 nathanw memsize = 65536;
471 1.1.4.2 nathanw break;
472 1.1.4.2 nathanw case WE790_RAR_SZ32:
473 1.1.4.2 nathanw memsize = 32768;
474 1.1.4.2 nathanw break;
475 1.1.4.2 nathanw case WE790_RAR_SZ16:
476 1.1.4.2 nathanw memsize = 16384;
477 1.1.4.2 nathanw break;
478 1.1.4.2 nathanw case WE790_RAR_SZ8:
479 1.1.4.2 nathanw /* 8216 has 16K shared mem -- 8416 has 8K */
480 1.1.4.2 nathanw typestr = (type == WE_TYPE_SMC8216C) ?
481 1.1.4.2 nathanw "SMC8416C/SMC8416BT" : "SMC8416T";
482 1.1.4.2 nathanw memsize = 8192;
483 1.1.4.2 nathanw break;
484 1.1.4.2 nathanw }
485 1.1.4.2 nathanw bus_space_write_1(asict, asich, WE790_HWR, hwr);
486 1.1.4.2 nathanw
487 1.1.4.2 nathanw is16bit = 1;
488 1.1.4.2 nathanw is790 = 1;
489 1.1.4.2 nathanw break;
490 1.1.4.2 nathanw }
491 1.1.4.2 nathanw #ifdef TOSH_ETHER
492 1.1.4.2 nathanw case WE_TYPE_TOSHIBA1:
493 1.1.4.2 nathanw typestr = "Toshiba1";
494 1.1.4.2 nathanw memsize = 32768;
495 1.1.4.2 nathanw is16bit = 1;
496 1.1.4.2 nathanw break;
497 1.1.4.2 nathanw case WE_TYPE_TOSHIBA4:
498 1.1.4.2 nathanw typestr = "Toshiba4";
499 1.1.4.2 nathanw memsize = 32768;
500 1.1.4.2 nathanw is16bit = 1;
501 1.1.4.2 nathanw break;
502 1.1.4.2 nathanw #endif
503 1.1.4.2 nathanw default:
504 1.1.4.2 nathanw /* Not one we recognize. */
505 1.1.4.2 nathanw return (NULL);
506 1.1.4.2 nathanw }
507 1.1.4.2 nathanw
508 1.1.4.2 nathanw /*
509 1.1.4.2 nathanw * Make some adjustments to initial values depending on what is
510 1.1.4.2 nathanw * found in the ICR.
511 1.1.4.2 nathanw */
512 1.1.4.2 nathanw if (is16bit && (type != WE_TYPE_WD8013EBT) &&
513 1.1.4.2 nathanw #ifdef TOSH_ETHER
514 1.1.4.2 nathanw (type != WE_TYPE_TOSHIBA1 && type != WE_TYPE_TOSHIBA4) &&
515 1.1.4.2 nathanw #endif
516 1.1.4.2 nathanw (bus_space_read_1(asict, asich, WE_ICR) & WE_ICR_16BIT) == 0) {
517 1.1.4.2 nathanw is16bit = 0;
518 1.1.4.2 nathanw memsize = 8192;
519 1.1.4.2 nathanw }
520 1.1.4.2 nathanw
521 1.1.4.2 nathanw #ifdef WE_DEBUG
522 1.1.4.2 nathanw {
523 1.1.4.2 nathanw int i;
524 1.1.4.2 nathanw
525 1.1.4.2 nathanw printf("we_params: type = 0x%x, typestr = %s, is16bit = %d, "
526 1.1.4.2 nathanw "memsize = %d\n", type, typestr, is16bit, memsize);
527 1.1.4.2 nathanw for (i = 0; i < 8; i++)
528 1.1.4.2 nathanw printf(" %d -> 0x%x\n", i,
529 1.1.4.2 nathanw bus_space_read_1(asict, asich, i));
530 1.1.4.2 nathanw }
531 1.1.4.2 nathanw #endif
532 1.1.4.2 nathanw
533 1.1.4.2 nathanw if (typep != NULL)
534 1.1.4.2 nathanw *typep = type;
535 1.1.4.2 nathanw if (memsizep != NULL)
536 1.1.4.2 nathanw *memsizep = memsize;
537 1.1.4.2 nathanw if (is16bitp != NULL)
538 1.1.4.2 nathanw *is16bitp = is16bit;
539 1.1.4.2 nathanw if (is790p != NULL)
540 1.1.4.2 nathanw *is790p = is790;
541 1.1.4.2 nathanw return (typestr);
542 1.1.4.2 nathanw }
543