if_we_isa.c revision 1.17
1 /* $NetBSD: if_we_isa.c,v 1.17 2006/11/16 01:33:00 christos Exp $ */ 2 3 /*- 4 * Copyright (c) 1997, 1998 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, 9 * NASA Ames Research Center. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 3. All advertising materials mentioning features or use of this software 20 * must display the following acknowledgement: 21 * This product includes software developed by the NetBSD 22 * Foundation, Inc. and its contributors. 23 * 4. Neither the name of The NetBSD Foundation nor the names of its 24 * contributors may be used to endorse or promote products derived 25 * from this software without specific prior written permission. 26 * 27 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 28 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 29 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 30 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 31 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 32 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 33 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 34 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 35 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 36 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 37 * POSSIBILITY OF SUCH DAMAGE. 38 */ 39 40 /* 41 * Device driver for National Semiconductor DS8390/WD83C690 based ethernet 42 * adapters. 43 * 44 * Copyright (c) 1994, 1995 Charles M. Hannum. All rights reserved. 45 * 46 * Copyright (C) 1993, David Greenman. This software may be used, modified, 47 * copied, distributed, and sold, in both source and binary form provided that 48 * the above copyright and these terms are retained. Under no circumstances is 49 * the author responsible for the proper functioning of this software, nor does 50 * the author assume any responsibility for damages incurred with its use. 51 */ 52 53 /* 54 * Device driver for the Western Digital/SMC 8003 and 8013 series, 55 * and the SMC Elite Ultra (8216). 56 */ 57 58 #include <sys/cdefs.h> 59 __KERNEL_RCSID(0, "$NetBSD: if_we_isa.c,v 1.17 2006/11/16 01:33:00 christos Exp $"); 60 61 #include <sys/param.h> 62 #include <sys/systm.h> 63 #include <sys/device.h> 64 #include <sys/socket.h> 65 #include <sys/mbuf.h> 66 #include <sys/syslog.h> 67 68 #include <net/if.h> 69 #include <net/if_dl.h> 70 #include <net/if_types.h> 71 #include <net/if_media.h> 72 73 #include <net/if_ether.h> 74 75 #include <machine/bus.h> 76 #include <sys/bswap.h> 77 #include <machine/intr.h> 78 79 #include <dev/isa/isareg.h> 80 #include <dev/isa/isavar.h> 81 82 #include <dev/ic/dp8390reg.h> 83 #include <dev/ic/dp8390var.h> 84 #include <dev/ic/wereg.h> 85 #include <dev/ic/wevar.h> 86 87 #ifndef __BUS_SPACE_HAS_STREAM_METHODS 88 #define bus_space_read_region_stream_2 bus_space_read_region_2 89 #define bus_space_write_stream_2 bus_space_write_2 90 #define bus_space_write_region_stream_2 bus_space_write_region_2 91 #endif 92 93 int we_isa_probe(struct device *, struct cfdata *, void *); 94 void we_isa_attach(struct device *, struct device *, void *); 95 96 CFATTACH_DECL(we_isa, sizeof(struct we_softc), 97 we_isa_probe, we_isa_attach, NULL, NULL); 98 99 extern struct cfdriver we_cd; 100 101 static const char *we_params(bus_space_tag_t, bus_space_handle_t, 102 u_int8_t *, bus_size_t *, u_int8_t *, int *); 103 104 static const int we_584_irq[] = { 105 9, 3, 5, 7, 10, 11, 15, 4, 106 }; 107 #define NWE_584_IRQ (sizeof(we_584_irq) / sizeof(we_584_irq[0])) 108 109 static const int we_790_irq[] = { 110 ISA_UNKNOWN_IRQ, 9, 3, 5, 7, 10, 11, 15, 111 }; 112 #define NWE_790_IRQ (sizeof(we_790_irq) / sizeof(we_790_irq[0])) 113 114 /* 115 * Delay needed when switching 16-bit access to shared memory. 116 */ 117 #define WE_DELAY(wsc) delay(3) 118 119 /* 120 * Enable card RAM, and 16-bit access. 121 */ 122 #define WE_MEM_ENABLE(wsc) \ 123 do { \ 124 if ((wsc)->sc_16bitp) \ 125 bus_space_write_1((wsc)->sc_asict, (wsc)->sc_asich, \ 126 WE_LAAR, (wsc)->sc_laar_proto | WE_LAAR_M16EN); \ 127 bus_space_write_1((wsc)->sc_asict, (wsc)->sc_asich, \ 128 WE_MSR, wsc->sc_msr_proto | WE_MSR_MENB); \ 129 WE_DELAY((wsc)); \ 130 } while (0) 131 132 /* 133 * Disable card RAM, and 16-bit access. 134 */ 135 #define WE_MEM_DISABLE(wsc) \ 136 do { \ 137 bus_space_write_1((wsc)->sc_asict, (wsc)->sc_asich, \ 138 WE_MSR, (wsc)->sc_msr_proto); \ 139 if ((wsc)->sc_16bitp) \ 140 bus_space_write_1((wsc)->sc_asict, (wsc)->sc_asich, \ 141 WE_LAAR, (wsc)->sc_laar_proto); \ 142 WE_DELAY((wsc)); \ 143 } while (0) 144 145 int 146 we_isa_probe(struct device *parent, struct cfdata *cf, void *aux) 147 { 148 struct isa_attach_args *ia = aux; 149 bus_space_tag_t asict, memt; 150 bus_space_handle_t asich, memh; 151 bus_size_t memsize; 152 int asich_valid, memh_valid; 153 int i, is790, rv = 0; 154 u_int8_t x, type; 155 156 asict = ia->ia_iot; 157 memt = ia->ia_memt; 158 159 asich_valid = memh_valid = 0; 160 161 if (ia->ia_nio < 1) 162 return (0); 163 if (ia->ia_niomem < 1) 164 return (0); 165 if (ia->ia_nirq < 1) 166 return (0); 167 168 if (ISA_DIRECT_CONFIG(ia)) 169 return (0); 170 171 /* Disallow wildcarded i/o addresses. */ 172 if (ia->ia_io[0].ir_addr == ISA_UNKNOWN_PORT) 173 return (0); 174 175 /* Disallow wildcarded mem address. */ 176 if (ia->ia_iomem[0].ir_addr == ISA_UNKNOWN_IOMEM) 177 return (0); 178 179 /* Attempt to map the device. */ 180 if (bus_space_map(asict, ia->ia_io[0].ir_addr, WE_NPORTS, 0, &asich)) 181 goto out; 182 asich_valid = 1; 183 184 #ifdef TOSH_ETHER 185 bus_space_write_1(asict, asich, WE_MSR, WE_MSR_POW); 186 #endif 187 188 /* 189 * Attempt to do a checksum over the station address PROM. 190 * If it fails, it's probably not a WD/SMC board. There is 191 * a problem with this, though. Some clone WD8003E boards 192 * (e.g. Danpex) won't pass the checksum. In this case, 193 * the checksum byte always seems to be 0. 194 */ 195 for (x = 0, i = 0; i < 8; i++) 196 x += bus_space_read_1(asict, asich, WE_PROM + i); 197 198 if (x != WE_ROM_CHECKSUM_TOTAL) { 199 /* Make sure it's an 8003E clone... */ 200 if (bus_space_read_1(asict, asich, WE_CARD_ID) != 201 WE_TYPE_WD8003E) 202 goto out; 203 204 /* Check the checksum byte. */ 205 if (bus_space_read_1(asict, asich, WE_PROM + 7) != 0) 206 goto out; 207 } 208 209 /* 210 * Reset the card to force it into a known state. 211 */ 212 #ifdef TOSH_ETHER 213 bus_space_write_1(asict, asich, WE_MSR, WE_MSR_RST | WE_MSR_POW); 214 #else 215 bus_space_write_1(asict, asich, WE_MSR, WE_MSR_RST); 216 #endif 217 delay(100); 218 219 bus_space_write_1(asict, asich, WE_MSR, 220 bus_space_read_1(asict, asich, WE_MSR) & ~WE_MSR_RST); 221 222 /* Wait in case the card is reading it's EEPROM. */ 223 delay(5000); 224 225 /* 226 * Get parameters. 227 */ 228 if (we_params(asict, asich, &type, &memsize, NULL, &is790) == NULL) 229 goto out; 230 231 /* Allow user to override probed value. */ 232 if (ia->ia_iomem[0].ir_size) 233 memsize = ia->ia_iomem[0].ir_size; 234 235 /* Attempt to map the memory space. */ 236 if (bus_space_map(memt, ia->ia_iomem[0].ir_addr, memsize, 0, &memh)) 237 goto out; 238 memh_valid = 1; 239 240 /* 241 * If possible, get the assigned interrupt number from the card 242 * and use it. 243 */ 244 if (is790) { 245 u_int8_t hwr; 246 247 /* Assemble together the encoded interrupt number. */ 248 hwr = bus_space_read_1(asict, asich, WE790_HWR); 249 bus_space_write_1(asict, asich, WE790_HWR, 250 hwr | WE790_HWR_SWH); 251 252 x = bus_space_read_1(asict, asich, WE790_GCR); 253 i = ((x & WE790_GCR_IR2) >> 4) | 254 ((x & (WE790_GCR_IR1|WE790_GCR_IR0)) >> 2); 255 bus_space_write_1(asict, asich, WE790_HWR, 256 hwr & ~WE790_HWR_SWH); 257 258 if (ia->ia_irq[0].ir_irq != ISA_UNKNOWN_IRQ && 259 ia->ia_irq[0].ir_irq != we_790_irq[i]) 260 printf("%s%d: overriding configured IRQ %d to %d\n", 261 we_cd.cd_name, cf->cf_unit, ia->ia_irq[0].ir_irq, 262 we_790_irq[i]); 263 ia->ia_irq[0].ir_irq = we_790_irq[i]; 264 } else if (type & WE_SOFTCONFIG) { 265 /* Assemble together the encoded interrupt number. */ 266 i = (bus_space_read_1(asict, asich, WE_ICR) & WE_ICR_IR2) | 267 ((bus_space_read_1(asict, asich, WE_IRR) & 268 (WE_IRR_IR0 | WE_IRR_IR1)) >> 5); 269 270 if (ia->ia_irq[0].ir_irq != ISA_UNKNOWN_IRQ && 271 ia->ia_irq[0].ir_irq != we_584_irq[i]) 272 printf("%s%d: overriding configured IRQ %d to %d\n", 273 we_cd.cd_name, cf->cf_unit, ia->ia_irq[0].ir_irq, 274 we_584_irq[i]); 275 ia->ia_irq[0].ir_irq = we_584_irq[i]; 276 } 277 278 /* So, we say we've found it! */ 279 ia->ia_nio = 1; 280 ia->ia_io[0].ir_size = WE_NPORTS; 281 282 ia->ia_niomem = 1; 283 ia->ia_iomem[0].ir_size = memsize; 284 285 ia->ia_nirq = 1; 286 287 ia->ia_ndrq = 0; 288 289 rv = 1; 290 291 out: 292 if (asich_valid) 293 bus_space_unmap(asict, asich, WE_NPORTS); 294 if (memh_valid) 295 bus_space_unmap(memt, memh, memsize); 296 return (rv); 297 } 298 299 void 300 we_isa_attach(struct device *parent, struct device *self, void *aux) 301 { 302 struct we_softc *wsc = (struct we_softc *)self; 303 struct dp8390_softc *sc = &wsc->sc_dp8390; 304 struct isa_attach_args *ia = aux; 305 bus_space_tag_t nict, asict, memt; 306 bus_space_handle_t nich, asich, memh; 307 const char *typestr; 308 309 printf("\n"); 310 311 nict = asict = ia->ia_iot; 312 memt = ia->ia_memt; 313 314 /* Map the device. */ 315 if (bus_space_map(asict, ia->ia_io[0].ir_addr, WE_NPORTS, 0, &asich)) { 316 printf("%s: can't map nic i/o space\n", 317 sc->sc_dev.dv_xname); 318 return; 319 } 320 321 if (bus_space_subregion(asict, asich, WE_NIC_OFFSET, WE_NIC_NPORTS, 322 &nich)) { 323 printf("%s: can't subregion i/o space\n", 324 sc->sc_dev.dv_xname); 325 return; 326 } 327 328 typestr = we_params(asict, asich, &wsc->sc_type, NULL, 329 &wsc->sc_flags, &sc->is790); 330 if (typestr == NULL) { 331 printf("%s: where did the card go?\n", sc->sc_dev.dv_xname); 332 return; 333 } 334 335 /* 336 * Map memory space. Note we use the size that might have 337 * been overridden by the user. 338 */ 339 if (bus_space_map(memt, ia->ia_iomem[0].ir_addr, 340 ia->ia_iomem[0].ir_size, 0, &memh)) { 341 printf("%s: can't map shared memory\n", 342 sc->sc_dev.dv_xname); 343 return; 344 } 345 346 wsc->sc_asict = asict; 347 wsc->sc_asich = asich; 348 349 sc->sc_regt = nict; 350 sc->sc_regh = nich; 351 352 sc->sc_buft = memt; 353 sc->sc_bufh = memh; 354 355 wsc->sc_maddr = ia->ia_iomem[0].ir_addr; 356 sc->mem_size = ia->ia_iomem[0].ir_size; 357 358 /* Interface is always enabled. */ 359 sc->sc_enabled = 1; 360 361 if (we_config(self, wsc, typestr)) 362 return; 363 364 /* 365 * Enable the configured interrupt. 366 */ 367 if (sc->is790) 368 bus_space_write_1(asict, asich, WE790_ICR, 369 bus_space_read_1(asict, asich, WE790_ICR) | 370 WE790_ICR_EIL); 371 else if (wsc->sc_type & WE_SOFTCONFIG) 372 bus_space_write_1(asict, asich, WE_IRR, 373 bus_space_read_1(asict, asich, WE_IRR) | WE_IRR_IEN); 374 else if (ia->ia_irq[0].ir_irq == ISA_UNKNOWN_IRQ) { 375 printf("%s: can't wildcard IRQ on a %s\n", 376 sc->sc_dev.dv_xname, typestr); 377 return; 378 } 379 380 /* Establish interrupt handler. */ 381 wsc->sc_ih = isa_intr_establish(ia->ia_ic, ia->ia_irq[0].ir_irq, 382 IST_EDGE, IPL_NET, dp8390_intr, sc); 383 if (wsc->sc_ih == NULL) 384 printf("%s: can't establish interrupt\n", sc->sc_dev.dv_xname); 385 } 386 387 static const char * 388 we_params(asict, asich, typep, memsizep, flagp, is790p) 389 bus_space_tag_t asict; 390 bus_space_handle_t asich; 391 u_int8_t *typep, *flagp; 392 bus_size_t *memsizep; 393 int *is790p; 394 { 395 const char *typestr; 396 bus_size_t memsize; 397 int is16bit, is790; 398 u_int8_t type; 399 400 memsize = 8192; 401 is16bit = is790 = 0; 402 403 type = bus_space_read_1(asict, asich, WE_CARD_ID); 404 switch (type) { 405 case WE_TYPE_WD8003S: 406 typestr = "WD8003S"; 407 break; 408 case WE_TYPE_WD8003E: 409 typestr = "WD8003E"; 410 break; 411 case WE_TYPE_WD8003EB: 412 typestr = "WD8003EB"; 413 break; 414 case WE_TYPE_WD8003W: 415 typestr = "WD8003W"; 416 break; 417 case WE_TYPE_WD8013EBT: 418 typestr = "WD8013EBT"; 419 memsize = 16384; 420 is16bit = 1; 421 break; 422 case WE_TYPE_WD8013W: 423 typestr = "WD8013W"; 424 memsize = 16384; 425 is16bit = 1; 426 break; 427 case WE_TYPE_WD8013EP: /* also WD8003EP */ 428 if (bus_space_read_1(asict, asich, WE_ICR) & WE_ICR_16BIT) { 429 is16bit = 1; 430 memsize = 16384; 431 typestr = "WD8013EP"; 432 } else 433 typestr = "WD8003EP"; 434 break; 435 case WE_TYPE_WD8013WC: 436 typestr = "WD8013WC"; 437 memsize = 16384; 438 is16bit = 1; 439 break; 440 case WE_TYPE_WD8013EBP: 441 typestr = "WD8013EBP"; 442 memsize = 16384; 443 is16bit = 1; 444 break; 445 case WE_TYPE_WD8013EPC: 446 typestr = "WD8013EPC"; 447 memsize = 16384; 448 is16bit = 1; 449 break; 450 case WE_TYPE_SMC8216C: 451 case WE_TYPE_SMC8216T: 452 { 453 u_int8_t hwr; 454 455 typestr = (type == WE_TYPE_SMC8216C) ? 456 "SMC8216/SMC8216C" : "SMC8216T"; 457 458 hwr = bus_space_read_1(asict, asich, WE790_HWR); 459 bus_space_write_1(asict, asich, WE790_HWR, 460 hwr | WE790_HWR_SWH); 461 switch (bus_space_read_1(asict, asich, WE790_RAR) & 462 WE790_RAR_SZ64) { 463 case WE790_RAR_SZ64: 464 memsize = 65536; 465 break; 466 case WE790_RAR_SZ32: 467 memsize = 32768; 468 break; 469 case WE790_RAR_SZ16: 470 memsize = 16384; 471 break; 472 case WE790_RAR_SZ8: 473 /* 8216 has 16K shared mem -- 8416 has 8K */ 474 typestr = (type == WE_TYPE_SMC8216C) ? 475 "SMC8416C/SMC8416BT" : "SMC8416T"; 476 memsize = 8192; 477 break; 478 } 479 bus_space_write_1(asict, asich, WE790_HWR, hwr); 480 481 is16bit = 1; 482 is790 = 1; 483 break; 484 } 485 #ifdef TOSH_ETHER 486 case WE_TYPE_TOSHIBA1: 487 typestr = "Toshiba1"; 488 memsize = 32768; 489 is16bit = 1; 490 break; 491 case WE_TYPE_TOSHIBA4: 492 typestr = "Toshiba4"; 493 memsize = 32768; 494 is16bit = 1; 495 break; 496 #endif 497 default: 498 /* Not one we recognize. */ 499 return (NULL); 500 } 501 502 /* 503 * Make some adjustments to initial values depending on what is 504 * found in the ICR. 505 */ 506 if (is16bit && (type != WE_TYPE_WD8013EBT) && 507 #ifdef TOSH_ETHER 508 (type != WE_TYPE_TOSHIBA1 && type != WE_TYPE_TOSHIBA4) && 509 #endif 510 (bus_space_read_1(asict, asich, WE_ICR) & WE_ICR_16BIT) == 0) { 511 is16bit = 0; 512 memsize = 8192; 513 } 514 515 #ifdef WE_DEBUG 516 { 517 int i; 518 519 printf("we_params: type = 0x%x, typestr = %s, is16bit = %d, " 520 "memsize = %ld\n", type, typestr, is16bit, (u_long)memsize); 521 for (i = 0; i < 8; i++) 522 printf(" %d -> 0x%x\n", i, 523 bus_space_read_1(asict, asich, i)); 524 } 525 #endif 526 527 if (typep != NULL) 528 *typep = type; 529 if (memsizep != NULL) 530 *memsizep = memsize; 531 if (flagp != NULL && is16bit) 532 *flagp |= WE_16BIT_ENABLE; 533 if (is790p != NULL) 534 *is790p = is790; 535 return (typestr); 536 } 537
Indexes created Thu Oct 02 14:10:14 GMT 2025