if_we_isa.c revision 1.2 1 /* $NetBSD: if_we_isa.c,v 1.2 2001/07/01 01:50:05 gmcgarry Exp $ */
2
3 /*-
4 * Copyright (c) 1997, 1998 The NetBSD Foundation, Inc.
5 * All rights reserved.
6 *
7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
9 * NASA Ames Research Center.
10 *
11 * Redistribution and use in source and binary forms, with or without
12 * modification, are permitted provided that the following conditions
13 * are met:
14 * 1. Redistributions of source code must retain the above copyright
15 * notice, this list of conditions and the following disclaimer.
16 * 2. Redistributions in binary form must reproduce the above copyright
17 * notice, this list of conditions and the following disclaimer in the
18 * documentation and/or other materials provided with the distribution.
19 * 3. All advertising materials mentioning features or use of this software
20 * must display the following acknowledgement:
21 * This product includes software developed by the NetBSD
22 * Foundation, Inc. and its contributors.
23 * 4. Neither the name of The NetBSD Foundation nor the names of its
24 * contributors may be used to endorse or promote products derived
25 * from this software without specific prior written permission.
26 *
27 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
28 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
29 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
30 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
31 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
32 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
33 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
34 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
35 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
36 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
37 * POSSIBILITY OF SUCH DAMAGE.
38 */
39
40 /*
41 * Device driver for National Semiconductor DS8390/WD83C690 based ethernet
42 * adapters.
43 *
44 * Copyright (c) 1994, 1995 Charles M. Hannum. All rights reserved.
45 *
46 * Copyright (C) 1993, David Greenman. This software may be used, modified,
47 * copied, distributed, and sold, in both source and binary form provided that
48 * the above copyright and these terms are retained. Under no circumstances is
49 * the author responsible for the proper functioning of this software, nor does
50 * the author assume any responsibility for damages incurred with its use.
51 */
52
53 /*
54 * Device driver for the Western Digital/SMC 8003 and 8013 series,
55 * and the SMC Elite Ultra (8216).
56 */
57
58 #include "opt_inet.h"
59 #include "opt_ns.h"
60 #include "bpfilter.h"
61
62 #include <sys/param.h>
63 #include <sys/systm.h>
64 #include <sys/device.h>
65 #include <sys/socket.h>
66 #include <sys/mbuf.h>
67 #include <sys/syslog.h>
68
69 #include <net/if.h>
70 #include <net/if_dl.h>
71 #include <net/if_types.h>
72 #include <net/if_media.h>
73
74 #include <net/if_ether.h>
75
76 #ifdef INET
77 #include <netinet/in.h>
78 #include <netinet/in_systm.h>
79 #include <netinet/in_var.h>
80 #include <netinet/ip.h>
81 #include <netinet/if_inarp.h>
82 #endif
83
84 #ifdef NS
85 #include <netns/ns.h>
86 #include <netns/ns_if.h>
87 #endif
88
89 #if NBPFILTER > 0
90 #include <net/bpf.h>
91 #include <net/bpfdesc.h>
92 #endif
93
94 #include <machine/bus.h>
95 #include <machine/bswap.h>
96 #include <machine/intr.h>
97
98 #include <dev/isa/isareg.h>
99 #include <dev/isa/isavar.h>
100
101 #include <dev/ic/dp8390reg.h>
102 #include <dev/ic/dp8390var.h>
103 #include <dev/ic/wereg.h>
104 #include <dev/ic/wevar.h>
105
106 #ifndef __BUS_SPACE_HAS_STREAM_METHODS
107 #define bus_space_read_region_stream_2 bus_space_read_region_2
108 #define bus_space_write_stream_2 bus_space_write_2
109 #define bus_space_write_region_stream_2 bus_space_write_region_2
110 #endif
111
112 int we_isa_probe __P((struct device *, struct cfdata *, void *));
113 void we_isa_attach __P((struct device *, struct device *, void *));
114
115 struct cfattach we_isa_ca = {
116 sizeof(struct we_softc), we_isa_probe, we_isa_attach
117 };
118
119 extern struct cfdriver we_cd;
120
121 static const char *we_params __P((bus_space_tag_t, bus_space_handle_t,
122 u_int8_t *, bus_size_t *, int *, int *));
123
124 static const int we_584_irq[] = {
125 9, 3, 5, 7, 10, 11, 15, 4,
126 };
127 #define NWE_584_IRQ (sizeof(we_584_irq) / sizeof(we_584_irq[0]))
128
129 static const int we_790_irq[] = {
130 IRQUNK, 9, 3, 5, 7, 10, 11, 15,
131 };
132 #define NWE_790_IRQ (sizeof(we_790_irq) / sizeof(we_790_irq[0]))
133
134 /*
135 * Delay needed when switching 16-bit access to shared memory.
136 */
137 #define WE_DELAY(wsc) delay(3)
138
139 /*
140 * Enable card RAM, and 16-bit access.
141 */
142 #define WE_MEM_ENABLE(wsc) \
143 do { \
144 if ((wsc)->sc_16bitp) \
145 bus_space_write_1((wsc)->sc_asict, (wsc)->sc_asich, \
146 WE_LAAR, (wsc)->sc_laar_proto | WE_LAAR_M16EN); \
147 bus_space_write_1((wsc)->sc_asict, (wsc)->sc_asich, \
148 WE_MSR, wsc->sc_msr_proto | WE_MSR_MENB); \
149 WE_DELAY((wsc)); \
150 } while (0)
151
152 /*
153 * Disable card RAM, and 16-bit access.
154 */
155 #define WE_MEM_DISABLE(wsc) \
156 do { \
157 bus_space_write_1((wsc)->sc_asict, (wsc)->sc_asich, \
158 WE_MSR, (wsc)->sc_msr_proto); \
159 if ((wsc)->sc_16bitp) \
160 bus_space_write_1((wsc)->sc_asict, (wsc)->sc_asich, \
161 WE_LAAR, (wsc)->sc_laar_proto); \
162 WE_DELAY((wsc)); \
163 } while (0)
164
165 int
166 we_isa_probe(parent, cf, aux)
167 struct device *parent;
168 struct cfdata *cf;
169 void *aux;
170 {
171 struct isa_attach_args *ia = aux;
172 bus_space_tag_t asict, memt;
173 bus_space_handle_t asich, memh;
174 bus_size_t memsize;
175 int asich_valid, memh_valid;
176 int i, is790, rv = 0;
177 u_int8_t x, type;
178
179 asict = ia->ia_iot;
180 memt = ia->ia_memt;
181
182 asich_valid = memh_valid = 0;
183
184 /* Disallow wildcarded i/o addresses. */
185 if (ia->ia_iobase == ISACF_PORT_DEFAULT)
186 return (0);
187
188 /* Disallow wildcarded mem address. */
189 if (ia->ia_maddr == ISACF_IOMEM_DEFAULT)
190 return (0);
191
192 /* Attempt to map the device. */
193 if (bus_space_map(asict, ia->ia_iobase, WE_NPORTS, 0, &asich))
194 goto out;
195 asich_valid = 1;
196
197 #ifdef TOSH_ETHER
198 bus_space_write_1(asict, asich, WE_MSR, WE_MSR_POW);
199 #endif
200
201 /*
202 * Attempt to do a checksum over the station address PROM.
203 * If it fails, it's probably not a WD/SMC board. There is
204 * a problem with this, though. Some clone WD8003E boards
205 * (e.g. Danpex) won't pass the checksum. In this case,
206 * the checksum byte always seems to be 0.
207 */
208 for (x = 0, i = 0; i < 8; i++)
209 x += bus_space_read_1(asict, asich, WE_PROM + i);
210
211 if (x != WE_ROM_CHECKSUM_TOTAL) {
212 /* Make sure it's an 8003E clone... */
213 if (bus_space_read_1(asict, asich, WE_CARD_ID) !=
214 WE_TYPE_WD8003E)
215 goto out;
216
217 /* Check the checksum byte. */
218 if (bus_space_read_1(asict, asich, WE_PROM + 7) != 0)
219 goto out;
220 }
221
222 /*
223 * Reset the card to force it into a known state.
224 */
225 #ifdef TOSH_ETHER
226 bus_space_write_1(asict, asich, WE_MSR, WE_MSR_RST | WE_MSR_POW);
227 #else
228 bus_space_write_1(asict, asich, WE_MSR, WE_MSR_RST);
229 #endif
230 delay(100);
231
232 bus_space_write_1(asict, asich, WE_MSR,
233 bus_space_read_1(asict, asich, WE_MSR) & ~WE_MSR_RST);
234
235 /* Wait in case the card is reading it's EEPROM. */
236 delay(5000);
237
238 /*
239 * Get parameters.
240 */
241 if (we_params(asict, asich, &type, &memsize, NULL, &is790) == NULL)
242 goto out;
243
244 /* Allow user to override probed value. */
245 if (ia->ia_msize)
246 memsize = ia->ia_msize;
247
248 /* Attempt to map the memory space. */
249 if (bus_space_map(memt, ia->ia_maddr, memsize, 0, &memh))
250 goto out;
251 memh_valid = 1;
252
253 /*
254 * If possible, get the assigned interrupt number from the card
255 * and use it.
256 */
257 if (is790) {
258 u_int8_t hwr;
259
260 /* Assemble together the encoded interrupt number. */
261 hwr = bus_space_read_1(asict, asich, WE790_HWR);
262 bus_space_write_1(asict, asich, WE790_HWR,
263 hwr | WE790_HWR_SWH);
264
265 x = bus_space_read_1(asict, asich, WE790_GCR);
266 i = ((x & WE790_GCR_IR2) >> 4) |
267 ((x & (WE790_GCR_IR1|WE790_GCR_IR0)) >> 2);
268 bus_space_write_1(asict, asich, WE790_HWR,
269 hwr & ~WE790_HWR_SWH);
270
271 if (ia->ia_irq != IRQUNK && ia->ia_irq != we_790_irq[i])
272 printf("%s%d: overriding IRQ %d to %d\n",
273 we_cd.cd_name, cf->cf_unit, ia->ia_irq,
274 we_790_irq[i]);
275 ia->ia_irq = we_790_irq[i];
276 } else if (type & WE_SOFTCONFIG) {
277 /* Assemble together the encoded interrupt number. */
278 i = (bus_space_read_1(asict, asich, WE_ICR) & WE_ICR_IR2) |
279 ((bus_space_read_1(asict, asich, WE_IRR) &
280 (WE_IRR_IR0 | WE_IRR_IR1)) >> 5);
281
282 if (ia->ia_irq != IRQUNK && ia->ia_irq != we_584_irq[i])
283 printf("%s%d: overriding IRQ %d to %d\n",
284 we_cd.cd_name, cf->cf_unit, ia->ia_irq,
285 we_584_irq[i]);
286 ia->ia_irq = we_584_irq[i];
287 }
288
289 /* So, we say we've found it! */
290 ia->ia_iosize = WE_NPORTS;
291 ia->ia_msize = memsize;
292 rv = 1;
293
294 out:
295 if (asich_valid)
296 bus_space_unmap(asict, asich, WE_NPORTS);
297 if (memh_valid)
298 bus_space_unmap(memt, memh, memsize);
299 return (rv);
300 }
301
302 void
303 we_isa_attach(parent, self, aux)
304 struct device *parent, *self;
305 void *aux;
306 {
307 struct we_softc *wsc = (struct we_softc *)self;
308 struct dp8390_softc *sc = &wsc->sc_dp8390;
309 struct isa_attach_args *ia = aux;
310 bus_space_tag_t nict, asict, memt;
311 bus_space_handle_t nich, asich, memh;
312 const char *typestr;
313
314 printf("\n");
315
316 nict = asict = ia->ia_iot;
317 memt = ia->ia_memt;
318
319 /* Map the device. */
320 if (bus_space_map(asict, ia->ia_iobase, WE_NPORTS, 0, &asich)) {
321 printf("%s: can't map nic i/o space\n",
322 sc->sc_dev.dv_xname);
323 return;
324 }
325
326 if (bus_space_subregion(asict, asich, WE_NIC_OFFSET, WE_NIC_NPORTS,
327 &nich)) {
328 printf("%s: can't subregion i/o space\n",
329 sc->sc_dev.dv_xname);
330 return;
331 }
332
333 typestr = we_params(asict, asich, &wsc->sc_type, NULL,
334 &wsc->sc_16bitp, &sc->is790);
335 if (typestr == NULL) {
336 printf("%s: where did the card go?\n", sc->sc_dev.dv_xname);
337 return;
338 }
339
340 /*
341 * Map memory space. Note we use the size that might have
342 * been overridden by the user.
343 */
344 if (bus_space_map(memt, ia->ia_maddr, ia->ia_msize, 0, &memh)) {
345 printf("%s: can't map shared memory\n",
346 sc->sc_dev.dv_xname);
347 return;
348 }
349
350 wsc->sc_asict = asict;
351 wsc->sc_asich = asich;
352
353 sc->sc_regt = nict;
354 sc->sc_regh = nich;
355
356 sc->sc_buft = memt;
357 sc->sc_bufh = memh;
358
359 wsc->sc_maddr = ia->ia_maddr;
360 sc->mem_size = ia->ia_msize;
361
362 /* Interface is always enabled. */
363 sc->sc_enabled = 1;
364
365 if (we_config(self, wsc, typestr))
366 return;
367
368 /*
369 * Enable the configured interrupt.
370 */
371 if (sc->is790)
372 bus_space_write_1(asict, asich, WE790_ICR,
373 bus_space_read_1(asict, asich, WE790_ICR) |
374 WE790_ICR_EIL);
375 else if (wsc->sc_type & WE_SOFTCONFIG)
376 bus_space_write_1(asict, asich, WE_IRR,
377 bus_space_read_1(asict, asich, WE_IRR) | WE_IRR_IEN);
378 else if (ia->ia_irq == IRQUNK) {
379 printf("%s: can't wildcard IRQ on a %s\n",
380 sc->sc_dev.dv_xname, typestr);
381 return;
382 }
383
384 /* Establish interrupt handler. */
385 wsc->sc_ih = isa_intr_establish(ia->ia_ic, ia->ia_irq, IST_EDGE,
386 IPL_NET, dp8390_intr, sc);
387 if (wsc->sc_ih == NULL)
388 printf("%s: can't establish interrupt\n", sc->sc_dev.dv_xname);
389 }
390
391 static const char *
392 we_params(asict, asich, typep, memsizep, is16bitp, is790p)
393 bus_space_tag_t asict;
394 bus_space_handle_t asich;
395 u_int8_t *typep;
396 bus_size_t *memsizep;
397 int *is16bitp, *is790p;
398 {
399 const char *typestr;
400 bus_size_t memsize;
401 int is16bit, is790;
402 u_int8_t type;
403
404 memsize = 8192;
405 is16bit = is790 = 0;
406
407 type = bus_space_read_1(asict, asich, WE_CARD_ID);
408 switch (type) {
409 case WE_TYPE_WD8003S:
410 typestr = "WD8003S";
411 break;
412 case WE_TYPE_WD8003E:
413 typestr = "WD8003E";
414 break;
415 case WE_TYPE_WD8003EB:
416 typestr = "WD8003EB";
417 break;
418 case WE_TYPE_WD8003W:
419 typestr = "WD8003W";
420 break;
421 case WE_TYPE_WD8013EBT:
422 typestr = "WD8013EBT";
423 memsize = 16384;
424 is16bit = 1;
425 break;
426 case WE_TYPE_WD8013W:
427 typestr = "WD8013W";
428 memsize = 16384;
429 is16bit = 1;
430 break;
431 case WE_TYPE_WD8013EP: /* also WD8003EP */
432 if (bus_space_read_1(asict, asich, WE_ICR) & WE_ICR_16BIT) {
433 is16bit = 1;
434 memsize = 16384;
435 typestr = "WD8013EP";
436 } else
437 typestr = "WD8003EP";
438 break;
439 case WE_TYPE_WD8013WC:
440 typestr = "WD8013WC";
441 memsize = 16384;
442 is16bit = 1;
443 break;
444 case WE_TYPE_WD8013EBP:
445 typestr = "WD8013EBP";
446 memsize = 16384;
447 is16bit = 1;
448 break;
449 case WE_TYPE_WD8013EPC:
450 typestr = "WD8013EPC";
451 memsize = 16384;
452 is16bit = 1;
453 break;
454 case WE_TYPE_SMC8216C:
455 case WE_TYPE_SMC8216T:
456 {
457 u_int8_t hwr;
458
459 typestr = (type == WE_TYPE_SMC8216C) ?
460 "SMC8216/SMC8216C" : "SMC8216T";
461
462 hwr = bus_space_read_1(asict, asich, WE790_HWR);
463 bus_space_write_1(asict, asich, WE790_HWR,
464 hwr | WE790_HWR_SWH);
465 switch (bus_space_read_1(asict, asich, WE790_RAR) &
466 WE790_RAR_SZ64) {
467 case WE790_RAR_SZ64:
468 memsize = 65536;
469 break;
470 case WE790_RAR_SZ32:
471 memsize = 32768;
472 break;
473 case WE790_RAR_SZ16:
474 memsize = 16384;
475 break;
476 case WE790_RAR_SZ8:
477 /* 8216 has 16K shared mem -- 8416 has 8K */
478 typestr = (type == WE_TYPE_SMC8216C) ?
479 "SMC8416C/SMC8416BT" : "SMC8416T";
480 memsize = 8192;
481 break;
482 }
483 bus_space_write_1(asict, asich, WE790_HWR, hwr);
484
485 is16bit = 1;
486 is790 = 1;
487 break;
488 }
489 #ifdef TOSH_ETHER
490 case WE_TYPE_TOSHIBA1:
491 typestr = "Toshiba1";
492 memsize = 32768;
493 is16bit = 1;
494 break;
495 case WE_TYPE_TOSHIBA4:
496 typestr = "Toshiba4";
497 memsize = 32768;
498 is16bit = 1;
499 break;
500 #endif
501 default:
502 /* Not one we recognize. */
503 return (NULL);
504 }
505
506 /*
507 * Make some adjustments to initial values depending on what is
508 * found in the ICR.
509 */
510 if (is16bit && (type != WE_TYPE_WD8013EBT) &&
511 #ifdef TOSH_ETHER
512 (type != WE_TYPE_TOSHIBA1 && type != WE_TYPE_TOSHIBA4) &&
513 #endif
514 (bus_space_read_1(asict, asich, WE_ICR) & WE_ICR_16BIT) == 0) {
515 is16bit = 0;
516 memsize = 8192;
517 }
518
519 #ifdef WE_DEBUG
520 {
521 int i;
522
523 printf("we_params: type = 0x%x, typestr = %s, is16bit = %d, "
524 "memsize = %d\n", type, typestr, is16bit, memsize);
525 for (i = 0; i < 8; i++)
526 printf(" %d -> 0x%x\n", i,
527 bus_space_read_1(asict, asich, i));
528 }
529 #endif
530
531 if (typep != NULL)
532 *typep = type;
533 if (memsizep != NULL)
534 *memsizep = memsize;
535 if (is16bitp != NULL)
536 *is16bitp = is16bit;
537 if (is790p != NULL)
538 *is790p = is790;
539 return (typestr);
540 }
541