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      1  1.24   thorpej /*	$NetBSD: ioat66.c,v 1.24 2021/08/07 16:19:12 thorpej Exp $	*/
      2   1.1       mcr 
      3   1.1       mcr /*
      4   1.1       mcr  * Copyright (c) 1996 Christopher G. Demetriou.  All rights reserved.
      5   1.1       mcr  * Copyright (c) 1995 Charles M. Hannum.  All rights reserved.
      6   1.1       mcr  *
      7   1.1       mcr  * This code is derived from public-domain software written by
      8   1.1       mcr  * Roland McGrath, and information provided by David Muir Sharnoff.
      9   1.1       mcr  *
     10   1.1       mcr  * Redistribution and use in source and binary forms, with or without
     11   1.1       mcr  * modification, are permitted provided that the following conditions
     12   1.1       mcr  * are met:
     13   1.1       mcr  * 1. Redistributions of source code must retain the above copyright
     14   1.1       mcr  *    notice, this list of conditions and the following disclaimer.
     15   1.1       mcr  * 2. Redistributions in binary form must reproduce the above copyright
     16   1.1       mcr  *    notice, this list of conditions and the following disclaimer in the
     17   1.1       mcr  *    documentation and/or other materials provided with the distribution.
     18   1.1       mcr  * 3. All advertising materials mentioning features or use of this software
     19   1.1       mcr  *    must display the following acknowledgement:
     20   1.1       mcr  *	This product includes software developed by Charles M. Hannum.
     21   1.1       mcr  * 4. The name of the author may not be used to endorse or promote products
     22   1.1       mcr  *    derived from this software without specific prior written permission.
     23   1.1       mcr  *
     24   1.1       mcr  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
     25   1.1       mcr  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
     26   1.1       mcr  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
     27   1.1       mcr  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
     28   1.1       mcr  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
     29   1.1       mcr  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
     30   1.1       mcr  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
     31   1.1       mcr  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
     32   1.1       mcr  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
     33   1.1       mcr  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
     34   1.1       mcr  */
     35   1.2     lukem 
     36   1.2     lukem #include <sys/cdefs.h>
     37  1.24   thorpej __KERNEL_RCSID(0, "$NetBSD: ioat66.c,v 1.24 2021/08/07 16:19:12 thorpej Exp $");
     38   1.1       mcr 
     39   1.1       mcr #include <sys/param.h>
     40   1.1       mcr #include <sys/systm.h>
     41   1.1       mcr #include <sys/device.h>
     42   1.1       mcr #include <sys/termios.h>
     43   1.1       mcr 
     44  1.16        ad #include <sys/bus.h>
     45  1.16        ad #include <sys/intr.h>
     46   1.1       mcr 
     47   1.1       mcr #include <dev/ic/comreg.h>
     48   1.1       mcr #include <dev/ic/comvar.h>
     49   1.1       mcr 
     50   1.1       mcr #include <dev/isa/isavar.h>
     51   1.1       mcr #include <dev/isa/com_multi.h>
     52   1.1       mcr 
     53   1.1       mcr #define	NSLAVES	6
     54   1.1       mcr 
     55   1.1       mcr struct ioat66_softc {
     56   1.1       mcr 	void *sc_ih;
     57   1.1       mcr 
     58   1.1       mcr 	bus_space_tag_t sc_iot;
     59   1.1       mcr 	int sc_iobase;
     60   1.1       mcr 
     61   1.1       mcr 	int sc_alive;			/* mask of slave units attached */
     62   1.1       mcr 	void *sc_slaves[NSLAVES];	/* com device unit numbers */
     63   1.1       mcr 	bus_space_handle_t sc_slaveioh[NSLAVES];
     64   1.1       mcr 	bus_space_handle_t sc_intmasq;
     65   1.1       mcr };
     66   1.1       mcr 
     67   1.1       mcr int ioatbases[NSLAVES]={0x220,0x228,0x240,0x248,0x260,0x268};
     68   1.1       mcr #define IOAT66SHARED 0x208
     69   1.1       mcr 
     70  1.20    cegger int ioat66probe(device_t, cfdata_t, void *);
     71  1.20    cegger void ioat66attach(device_t, device_t, void *);
     72  1.10     perry int ioat66intr(void *);
     73   1.1       mcr 
     74  1.21       chs CFATTACH_DECL_NEW(ioat, sizeof(struct ioat66_softc),
     75   1.5   thorpej     ioat66probe, ioat66attach, NULL, NULL);
     76   1.1       mcr 
     77   1.1       mcr int
     78  1.20    cegger ioat66probe(device_t parent, cfdata_t self, void *aux)
     79   1.1       mcr {
     80   1.1       mcr 	struct isa_attach_args *ia = aux;
     81   1.1       mcr 	bus_space_tag_t iot = ia->ia_iot;
     82   1.1       mcr 	bus_space_handle_t ioh;
     83  1.13  christos 	int iobase;
     84   1.1       mcr 	int i, rv = 1;
     85   1.1       mcr 
     86  1.13  christos 	if (ia->ia_niomem < 1)
     87  1.13  christos 		return (0);
     88  1.13  christos 	if (ia->ia_nirq < 1)
     89  1.13  christos 		return (0);
     90   1.1       mcr 	/*
     91   1.1       mcr 	 * Do the normal com probe for the first UART and assume
     92   1.1       mcr 	 * its presence, and the ability to map the other UARTS,
     93   1.1       mcr 	 * means there is a multiport board there.
     94   1.1       mcr 	 * XXX Needs more robustness.
     95   1.1       mcr 	 */
     96   1.1       mcr 
     97   1.1       mcr 	/* Disallow wildcarded i/o address. */
     98  1.13  christos 	if (ia->ia_io[0].ir_addr == ISA_UNKNOWN_PORT)
     99  1.13  christos 		return 0;
    100  1.13  christos 
    101  1.13  christos 	if (ia->ia_irq[0].ir_irq == ISA_UNKNOWN_IRQ)
    102   1.1       mcr 		return (0);
    103   1.1       mcr 
    104  1.13  christos 	iobase = ia->ia_io[0].ir_addr;
    105   1.1       mcr 	/* if the first port is in use as console, then it. */
    106   1.1       mcr 	if (com_is_console(iot, iobase, 0))
    107   1.1       mcr 		goto checkmappings;
    108   1.1       mcr 
    109   1.1       mcr 	if (bus_space_map(iot, iobase, COM_NPORTS, 0, &ioh)) {
    110   1.1       mcr 		rv = 0;
    111   1.1       mcr 		goto out;
    112   1.1       mcr 	}
    113   1.1       mcr 	rv = comprobe1(iot, ioh);
    114   1.1       mcr 	bus_space_unmap(iot, ioh, COM_NPORTS);
    115   1.1       mcr 	if (rv == 0)
    116   1.1       mcr 		goto out;
    117   1.1       mcr 
    118   1.1       mcr checkmappings:
    119   1.1       mcr 	for (i = 1; i < NSLAVES; i++) {
    120   1.1       mcr 		iobase = ioatbases[i];
    121   1.1       mcr 
    122   1.1       mcr 		if (com_is_console(iot, iobase, 0))
    123   1.1       mcr 			continue;
    124   1.1       mcr 
    125   1.1       mcr 		if (bus_space_map(iot, iobase, COM_NPORTS, 0, &ioh)) {
    126   1.1       mcr 			rv = 0;
    127   1.1       mcr 			goto out;
    128   1.1       mcr 		}
    129   1.1       mcr 		bus_space_unmap(iot, ioh, COM_NPORTS);
    130   1.1       mcr 	}
    131   1.1       mcr 
    132   1.1       mcr out:
    133  1.13  christos 	if (rv) {
    134  1.13  christos 		ia->ia_nio = 1;
    135  1.13  christos 		ia->ia_io[0].ir_size = NSLAVES * COM_NPORTS;
    136  1.13  christos 		ia->ia_nirq = 1;
    137  1.13  christos 		ia->ia_niomem = 0;
    138  1.13  christos 		ia->ia_ndrq = 0;
    139  1.13  christos 	}
    140   1.1       mcr 	return (rv);
    141   1.1       mcr }
    142   1.1       mcr 
    143   1.1       mcr void
    144  1.20    cegger ioat66attach(device_t parent, device_t self, void *aux)
    145   1.1       mcr {
    146  1.21       chs 	struct ioat66_softc *sc = device_private(self);
    147   1.1       mcr 	struct isa_attach_args *ia = aux;
    148   1.1       mcr 	struct commulti_attach_args ca;
    149   1.1       mcr 	bus_space_tag_t iot = ia->ia_iot;
    150  1.13  christos 	int i, iobase, irq;
    151   1.1       mcr 
    152   1.1       mcr 	printf("\n");
    153   1.1       mcr 
    154   1.1       mcr 	sc->sc_iot = ia->ia_iot;
    155  1.13  christos 	sc->sc_iobase = ia->ia_io[0].ir_addr;
    156  1.13  christos 	irq = ia->ia_irq[0].ir_irq;
    157   1.1       mcr 
    158   1.1       mcr 	for (i = 0; i < NSLAVES; i++) {
    159   1.1       mcr 		iobase = ioatbases[i];
    160   1.1       mcr 		if (!com_is_console(iot, iobase, &sc->sc_slaveioh[i]) &&
    161   1.1       mcr 		    bus_space_map(iot, iobase, COM_NPORTS, 0,
    162   1.1       mcr 			&sc->sc_slaveioh[i])) {
    163  1.22   msaitoh 			aprint_error_dev(self,
    164  1.22   msaitoh 			    "can't map i/o space for slave %d\n", i);
    165   1.1       mcr 			return;
    166   1.1       mcr 		}
    167   1.1       mcr 	}
    168   1.1       mcr 
    169   1.1       mcr 	if(bus_space_map(iot, IOAT66SHARED, 1, 0, &sc->sc_intmasq)) {
    170  1.21       chs 		aprint_error_dev(self, "can't map shared interrupt mask\n");
    171  1.21       chs 		return;
    172   1.1       mcr 	}
    173   1.1       mcr 
    174   1.1       mcr 	for (i = 0; i < NSLAVES; i++) {
    175   1.1       mcr 
    176   1.1       mcr 		ca.ca_slave = i;
    177   1.1       mcr 		ca.ca_iot = sc->sc_iot;
    178   1.1       mcr 		ca.ca_ioh = sc->sc_slaveioh[i];
    179   1.1       mcr 		ca.ca_iobase = ioatbases[i];
    180   1.1       mcr 		ca.ca_noien = 0;
    181   1.1       mcr 
    182  1.23   thorpej 		sc->sc_slaves[i] = config_found(self, &ca, commultiprint,
    183  1.24   thorpej 		    CFARGS_NONE);
    184   1.1       mcr 		if (sc->sc_slaves[i] != NULL)
    185   1.1       mcr 			sc->sc_alive |= 1 << i;
    186   1.1       mcr 	}
    187   1.1       mcr 
    188  1.13  christos 	sc->sc_ih = isa_intr_establish(ia->ia_ic, irq, IST_EDGE,
    189   1.1       mcr 	    IPL_SERIAL, ioat66intr, sc);
    190   1.1       mcr }
    191   1.1       mcr 
    192   1.1       mcr int
    193  1.18       dsl ioat66intr(void *arg)
    194   1.1       mcr {
    195   1.1       mcr 	struct ioat66_softc *sc = arg;
    196   1.1       mcr 	bus_space_tag_t iot = sc->sc_iot;
    197   1.1       mcr 	int alive = sc->sc_alive;
    198   1.1       mcr 	int bits;
    199   1.1       mcr 
    200   1.1       mcr 	bits = bus_space_read_1(iot, sc->sc_intmasq, 0) & alive;
    201   1.1       mcr 	if (bits == 0)
    202   1.1       mcr 		return (0);
    203   1.1       mcr 
    204   1.1       mcr 	for (;;) {
    205   1.1       mcr #define	TRY(n) \
    206   1.1       mcr 		if (bits & (1 << (n))) \
    207   1.1       mcr 			comintr(sc->sc_slaves[n]);
    208   1.1       mcr 		TRY(0);
    209   1.1       mcr 		TRY(1);
    210   1.1       mcr 		TRY(2);
    211   1.1       mcr 		TRY(3);
    212   1.1       mcr 		TRY(4);
    213   1.1       mcr 		TRY(5);
    214   1.1       mcr #undef TRY
    215   1.1       mcr 		bits = bus_space_read_1(iot, sc->sc_intmasq, 0) & alive;
    216   1.1       mcr 		if (bits == 0)
    217   1.1       mcr 			return (1);
    218   1.1       mcr  	}
    219   1.1       mcr }
    220