Home | History | Annotate | Line # | Download | only in isa
ioat66.c revision 1.9
      1  1.9  drochner /*	$NetBSD: ioat66.c,v 1.9 2004/09/14 20:20:48 drochner Exp $	*/
      2  1.1       mcr 
      3  1.1       mcr /*
      4  1.1       mcr  * Copyright (c) 1996 Christopher G. Demetriou.  All rights reserved.
      5  1.1       mcr  * Copyright (c) 1995 Charles M. Hannum.  All rights reserved.
      6  1.1       mcr  *
      7  1.1       mcr  * This code is derived from public-domain software written by
      8  1.1       mcr  * Roland McGrath, and information provided by David Muir Sharnoff.
      9  1.1       mcr  *
     10  1.1       mcr  * Redistribution and use in source and binary forms, with or without
     11  1.1       mcr  * modification, are permitted provided that the following conditions
     12  1.1       mcr  * are met:
     13  1.1       mcr  * 1. Redistributions of source code must retain the above copyright
     14  1.1       mcr  *    notice, this list of conditions and the following disclaimer.
     15  1.1       mcr  * 2. Redistributions in binary form must reproduce the above copyright
     16  1.1       mcr  *    notice, this list of conditions and the following disclaimer in the
     17  1.1       mcr  *    documentation and/or other materials provided with the distribution.
     18  1.1       mcr  * 3. All advertising materials mentioning features or use of this software
     19  1.1       mcr  *    must display the following acknowledgement:
     20  1.1       mcr  *	This product includes software developed by Charles M. Hannum.
     21  1.1       mcr  * 4. The name of the author may not be used to endorse or promote products
     22  1.1       mcr  *    derived from this software without specific prior written permission.
     23  1.1       mcr  *
     24  1.1       mcr  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
     25  1.1       mcr  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
     26  1.1       mcr  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
     27  1.1       mcr  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
     28  1.1       mcr  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
     29  1.1       mcr  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
     30  1.1       mcr  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
     31  1.1       mcr  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
     32  1.1       mcr  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
     33  1.1       mcr  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
     34  1.1       mcr  */
     35  1.2     lukem 
     36  1.2     lukem #include <sys/cdefs.h>
     37  1.9  drochner __KERNEL_RCSID(0, "$NetBSD: ioat66.c,v 1.9 2004/09/14 20:20:48 drochner Exp $");
     38  1.1       mcr 
     39  1.1       mcr #include <sys/param.h>
     40  1.1       mcr #include <sys/systm.h>
     41  1.1       mcr #include <sys/device.h>
     42  1.1       mcr #include <sys/termios.h>
     43  1.1       mcr 
     44  1.1       mcr #include <machine/bus.h>
     45  1.1       mcr #include <machine/intr.h>
     46  1.1       mcr 
     47  1.1       mcr #include <dev/ic/comreg.h>
     48  1.1       mcr #include <dev/ic/comvar.h>
     49  1.1       mcr 
     50  1.1       mcr #include <dev/isa/isavar.h>
     51  1.1       mcr #include <dev/isa/com_multi.h>
     52  1.1       mcr 
     53  1.1       mcr #define	NSLAVES	6
     54  1.1       mcr 
     55  1.1       mcr struct ioat66_softc {
     56  1.1       mcr 	struct device sc_dev;
     57  1.1       mcr 	void *sc_ih;
     58  1.1       mcr 
     59  1.1       mcr 	bus_space_tag_t sc_iot;
     60  1.1       mcr 	int sc_iobase;
     61  1.1       mcr 
     62  1.1       mcr 	int sc_alive;			/* mask of slave units attached */
     63  1.1       mcr 	void *sc_slaves[NSLAVES];	/* com device unit numbers */
     64  1.1       mcr 	bus_space_handle_t sc_slaveioh[NSLAVES];
     65  1.1       mcr 	bus_space_handle_t sc_intmasq;
     66  1.1       mcr };
     67  1.1       mcr 
     68  1.1       mcr int ioatbases[NSLAVES]={0x220,0x228,0x240,0x248,0x260,0x268};
     69  1.1       mcr #define IOAT66SHARED 0x208
     70  1.1       mcr 
     71  1.1       mcr int ioat66probe __P((struct device *, struct cfdata *, void *));
     72  1.1       mcr void ioat66attach __P((struct device *, struct device *, void *));
     73  1.1       mcr int ioat66intr __P((void *));
     74  1.1       mcr 
     75  1.4   thorpej CFATTACH_DECL(ioat, sizeof(struct ioat_softc),
     76  1.5   thorpej     ioat66probe, ioat66attach, NULL, NULL);
     77  1.1       mcr 
     78  1.1       mcr int
     79  1.1       mcr ioat66probe(parent, self, aux)
     80  1.1       mcr 	struct device *parent;
     81  1.1       mcr 	struct cfdata *self;
     82  1.1       mcr 	void *aux;
     83  1.1       mcr {
     84  1.1       mcr 	struct isa_attach_args *ia = aux;
     85  1.1       mcr 	int iobase = ia->ia_iobase;
     86  1.1       mcr 	bus_space_tag_t iot = ia->ia_iot;
     87  1.1       mcr 	bus_space_handle_t ioh;
     88  1.1       mcr 	int i, rv = 1;
     89  1.1       mcr 
     90  1.1       mcr 	/*
     91  1.1       mcr 	 * Do the normal com probe for the first UART and assume
     92  1.1       mcr 	 * its presence, and the ability to map the other UARTS,
     93  1.1       mcr 	 * means there is a multiport board there.
     94  1.1       mcr 	 * XXX Needs more robustness.
     95  1.1       mcr 	 */
     96  1.1       mcr 
     97  1.1       mcr 	/* Disallow wildcarded i/o address. */
     98  1.9  drochner 	if (ia->ia_iobase == ISA_UNKNOWN_PORT)
     99  1.1       mcr 		return (0);
    100  1.1       mcr 
    101  1.1       mcr 	/* if the first port is in use as console, then it. */
    102  1.1       mcr 	if (com_is_console(iot, iobase, 0))
    103  1.1       mcr 		goto checkmappings;
    104  1.1       mcr 
    105  1.1       mcr 	if (bus_space_map(iot, iobase, COM_NPORTS, 0, &ioh)) {
    106  1.1       mcr 		rv = 0;
    107  1.1       mcr 		goto out;
    108  1.1       mcr 	}
    109  1.1       mcr 	rv = comprobe1(iot, ioh);
    110  1.1       mcr 	bus_space_unmap(iot, ioh, COM_NPORTS);
    111  1.1       mcr 	if (rv == 0)
    112  1.1       mcr 		goto out;
    113  1.1       mcr 
    114  1.1       mcr checkmappings:
    115  1.1       mcr 	for (i = 1; i < NSLAVES; i++) {
    116  1.1       mcr 		iobase = ioatbases[i];
    117  1.1       mcr 
    118  1.1       mcr 		if (com_is_console(iot, iobase, 0))
    119  1.1       mcr 			continue;
    120  1.1       mcr 
    121  1.1       mcr 		if (bus_space_map(iot, iobase, COM_NPORTS, 0, &ioh)) {
    122  1.1       mcr 			rv = 0;
    123  1.1       mcr 			goto out;
    124  1.1       mcr 		}
    125  1.1       mcr 		bus_space_unmap(iot, ioh, COM_NPORTS);
    126  1.1       mcr 	}
    127  1.1       mcr 
    128  1.1       mcr out:
    129  1.1       mcr 	if (rv)
    130  1.1       mcr 		ia->ia_iosize = NSLAVES * COM_NPORTS;
    131  1.1       mcr 	return (rv);
    132  1.1       mcr }
    133  1.1       mcr 
    134  1.1       mcr void
    135  1.1       mcr ioat66attach(parent, self, aux)
    136  1.1       mcr 	struct device *parent, *self;
    137  1.1       mcr 	void *aux;
    138  1.1       mcr {
    139  1.1       mcr 	struct ioat66_softc *sc = (void *)self;
    140  1.1       mcr 	struct isa_attach_args *ia = aux;
    141  1.1       mcr 	struct commulti_attach_args ca;
    142  1.1       mcr 	bus_space_tag_t iot = ia->ia_iot;
    143  1.1       mcr 	int i, iobase;
    144  1.1       mcr 
    145  1.1       mcr 	printf("\n");
    146  1.1       mcr 
    147  1.1       mcr 	sc->sc_iot = ia->ia_iot;
    148  1.1       mcr 	sc->sc_iobase = ia->ia_iobase;
    149  1.1       mcr 
    150  1.1       mcr 	for (i = 0; i < NSLAVES; i++) {
    151  1.1       mcr 		iobase = ioatbases[i];
    152  1.1       mcr 		if (!com_is_console(iot, iobase, &sc->sc_slaveioh[i]) &&
    153  1.1       mcr 		    bus_space_map(iot, iobase, COM_NPORTS, 0,
    154  1.1       mcr 			&sc->sc_slaveioh[i])) {
    155  1.1       mcr 			printf("%s: can't map i/o space for slave %d\n",
    156  1.1       mcr 			     sc->sc_dev.dv_xname, i);
    157  1.1       mcr 			return;
    158  1.1       mcr 		}
    159  1.1       mcr 	}
    160  1.1       mcr 
    161  1.1       mcr 	if(bus_space_map(iot, IOAT66SHARED, 1, 0, &sc->sc_intmasq)) {
    162  1.7       wiz 	  printf("%s: can't map shared interrupt mask\n",
    163  1.1       mcr 	 	 sc->sc_dev.dv_xname);
    164  1.1       mcr 	  return;
    165  1.1       mcr 	}
    166  1.1       mcr 
    167  1.1       mcr 	for (i = 0; i < NSLAVES; i++) {
    168  1.1       mcr 
    169  1.1       mcr 		ca.ca_slave = i;
    170  1.1       mcr 		ca.ca_iot = sc->sc_iot;
    171  1.1       mcr 		ca.ca_ioh = sc->sc_slaveioh[i];
    172  1.1       mcr 		ca.ca_iobase = ioatbases[i];
    173  1.1       mcr 		ca.ca_noien = 0;
    174  1.1       mcr 
    175  1.8  drochner 		sc->sc_slaves[i] = config_found(self, &ca, commultiprint);
    176  1.1       mcr 		if (sc->sc_slaves[i] != NULL)
    177  1.1       mcr 			sc->sc_alive |= 1 << i;
    178  1.1       mcr 	}
    179  1.1       mcr 
    180  1.1       mcr 	sc->sc_ih = isa_intr_establish(ia->ia_ic, ia->ia_irq, IST_EDGE,
    181  1.1       mcr 	    IPL_SERIAL, ioat66intr, sc);
    182  1.1       mcr }
    183  1.1       mcr 
    184  1.1       mcr int
    185  1.1       mcr ioat66intr(arg)
    186  1.1       mcr 	void *arg;
    187  1.1       mcr {
    188  1.1       mcr 	struct ioat66_softc *sc = arg;
    189  1.1       mcr 	bus_space_tag_t iot = sc->sc_iot;
    190  1.1       mcr 	int alive = sc->sc_alive;
    191  1.1       mcr 	int bits;
    192  1.1       mcr 
    193  1.1       mcr 	bits = bus_space_read_1(iot, sc->sc_intmasq, 0) & alive;
    194  1.1       mcr 	if (bits == 0)
    195  1.1       mcr 		return (0);
    196  1.1       mcr 
    197  1.1       mcr 	for (;;) {
    198  1.1       mcr #define	TRY(n) \
    199  1.1       mcr 		if (bits & (1 << (n))) \
    200  1.1       mcr 			comintr(sc->sc_slaves[n]);
    201  1.1       mcr 		TRY(0);
    202  1.1       mcr 		TRY(1);
    203  1.1       mcr 		TRY(2);
    204  1.1       mcr 		TRY(3);
    205  1.1       mcr 		TRY(4);
    206  1.1       mcr 		TRY(5);
    207  1.1       mcr #undef TRY
    208  1.1       mcr 		bits = bus_space_read_1(iot, sc->sc_intmasq, 0) & alive;
    209  1.1       mcr 		if (bits == 0)
    210  1.1       mcr 			return (1);
    211  1.1       mcr  	}
    212  1.1       mcr }
    213