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isa.c revision 1.36
      1   1.1      cgd /*-
      2   1.1      cgd  * Copyright (c) 1991 The Regents of the University of California.
      3   1.1      cgd  * All rights reserved.
      4   1.1      cgd  *
      5   1.1      cgd  * This code is derived from software contributed to Berkeley by
      6   1.1      cgd  * William Jolitz.
      7   1.1      cgd  *
      8   1.1      cgd  * Redistribution and use in source and binary forms, with or without
      9   1.1      cgd  * modification, are permitted provided that the following conditions
     10   1.1      cgd  * are met:
     11   1.1      cgd  * 1. Redistributions of source code must retain the above copyright
     12   1.1      cgd  *    notice, this list of conditions and the following disclaimer.
     13   1.1      cgd  * 2. Redistributions in binary form must reproduce the above copyright
     14   1.1      cgd  *    notice, this list of conditions and the following disclaimer in the
     15   1.1      cgd  *    documentation and/or other materials provided with the distribution.
     16   1.1      cgd  * 3. All advertising materials mentioning features or use of this software
     17   1.1      cgd  *    must display the following acknowledgement:
     18   1.1      cgd  *	This product includes software developed by the University of
     19   1.1      cgd  *	California, Berkeley and its contributors.
     20   1.1      cgd  * 4. Neither the name of the University nor the names of its contributors
     21   1.1      cgd  *    may be used to endorse or promote products derived from this software
     22   1.1      cgd  *    without specific prior written permission.
     23   1.1      cgd  *
     24   1.1      cgd  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
     25   1.1      cgd  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
     26   1.1      cgd  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
     27   1.1      cgd  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
     28   1.1      cgd  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
     29   1.1      cgd  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
     30   1.1      cgd  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
     31   1.1      cgd  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
     32   1.1      cgd  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
     33   1.1      cgd  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
     34   1.1      cgd  * SUCH DAMAGE.
     35   1.1      cgd  *
     36  1.13      cgd  *	from: @(#)isa.c	7.2 (Berkeley) 5/13/91
     37  1.36  mycroft  *	$Id: isa.c,v 1.36 1994/02/22 23:39:32 mycroft Exp $
     38   1.1      cgd  */
     39   1.1      cgd 
     40   1.1      cgd /*
     41   1.1      cgd  * code to manage AT bus
     42   1.2      cgd  *
     43   1.2      cgd  * 92/08/18  Frank P. MacLachlan (fpm (at) crash.cts.com):
     44   1.2      cgd  * Fixed uninitialized variable problem and added code to deal
     45   1.2      cgd  * with DMA page boundaries in isa_dmarangecheck().  Fixed word
     46   1.2      cgd  * mode DMA count compution and reorganized DMA setup code in
     47   1.2      cgd  * isa_dmastart()
     48   1.1      cgd  */
     49   1.1      cgd 
     50  1.31  mycroft #include <sys/param.h>
     51  1.31  mycroft #include <sys/systm.h>
     52  1.31  mycroft #include <sys/conf.h>
     53  1.31  mycroft #include <sys/file.h>
     54  1.31  mycroft #include <sys/buf.h>
     55  1.31  mycroft #include <sys/uio.h>
     56  1.31  mycroft #include <sys/syslog.h>
     57  1.31  mycroft #include <sys/malloc.h>
     58  1.31  mycroft 
     59  1.31  mycroft #include <vm/vm.h>
     60  1.31  mycroft 
     61  1.31  mycroft #include <machine/segments.h>
     62  1.32  mycroft #include <machine/pio.h>
     63  1.31  mycroft #include <machine/cpufunc.h>
     64  1.31  mycroft 
     65  1.31  mycroft #include <i386/isa/isa_device.h>
     66  1.31  mycroft #include <i386/isa/isa.h>
     67  1.31  mycroft #include <i386/isa/icu.h>
     68  1.31  mycroft #include <i386/isa/ic/i8237.h>
     69  1.31  mycroft #include <i386/isa/ic/i8042.h>
     70  1.31  mycroft #include <i386/isa/timerreg.h>
     71  1.31  mycroft #include <i386/isa/spkr_reg.h>
     72  1.14  deraadt 
     73  1.14  deraadt /* sorry, has to be here, no place else really suitable */
     74  1.31  mycroft #include <machine/pc/display.h>
     75  1.14  deraadt u_short *Crtat = (u_short *)MONO_BUF;
     76   1.1      cgd 
     77   1.2      cgd /*
     78   1.2      cgd **  Register definitions for DMA controller 1 (channels 0..3):
     79   1.2      cgd */
     80   1.2      cgd #define	DMA1_CHN(c)	(IO_DMA1 + 1*(2*(c)))	/* addr reg for channel c */
     81   1.2      cgd #define	DMA1_SMSK	(IO_DMA1 + 1*10)	/* single mask register */
     82   1.2      cgd #define	DMA1_MODE	(IO_DMA1 + 1*11)	/* mode register */
     83   1.2      cgd #define	DMA1_FFC	(IO_DMA1 + 1*12)	/* clear first/last FF */
     84   1.2      cgd 
     85   1.2      cgd /*
     86   1.2      cgd **  Register definitions for DMA controller 2 (channels 4..7):
     87   1.2      cgd */
     88  1.30  mycroft #define	DMA2_CHN(c)	(IO_DMA2 + 2*(2*(c)))	/* addr reg for channel c */
     89   1.2      cgd #define	DMA2_SMSK	(IO_DMA2 + 2*10)	/* single mask register */
     90   1.2      cgd #define	DMA2_MODE	(IO_DMA2 + 2*11)	/* mode register */
     91   1.2      cgd #define	DMA2_FFC	(IO_DMA2 + 2*12)	/* clear first/last FF */
     92   1.2      cgd 
     93  1.15      cgd int config_isadev(struct isa_device *, u_int *);
     94   1.6  deraadt void config_attach(struct isa_driver *, struct isa_device *);
     95  1.21   andrew static void sysbeepstop(int);
     96   1.1      cgd 
     97   1.1      cgd /*
     98   1.1      cgd  * Configure all ISA devices
     99   1.1      cgd  */
    100  1.21   andrew void
    101  1.30  mycroft isa_configure()
    102  1.30  mycroft {
    103   1.1      cgd 	struct isa_device *dvp;
    104   1.1      cgd 	struct isa_driver *dp;
    105   1.1      cgd 
    106   1.1      cgd 	splhigh();
    107   1.1      cgd 	INTREN(IRQ_SLAVE);
    108  1.30  mycroft 	enable_intr();
    109  1.30  mycroft 
    110  1.36  mycroft 	for (dvp = isa_devtab_tty; config_isadev(dvp, &ttymask); dvp++)
    111   1.6  deraadt 		;
    112  1.36  mycroft 	for (dvp = isa_devtab_bio; config_isadev(dvp, &biomask); dvp++)
    113   1.6  deraadt 		;
    114  1.36  mycroft 	for (dvp = isa_devtab_net; config_isadev(dvp, &netmask); dvp++)
    115   1.6  deraadt 		;
    116  1.15      cgd 	for (dvp = isa_devtab_null; config_isadev(dvp, (u_int *) NULL); dvp++)
    117   1.6  deraadt 		;
    118   1.7      cgd 
    119  1.30  mycroft 	printf("biomask %x ttymask %x netmask %x\n",
    120  1.30  mycroft 	       biomask, ttymask, netmask);
    121  1.30  mycroft 
    122  1.35  mycroft 	clockmask |= astmask;
    123  1.30  mycroft 	biomask |= astmask;
    124  1.30  mycroft 	ttymask |= astmask;
    125  1.30  mycroft 	netmask |= astmask;
    126  1.30  mycroft 	impmask = netmask | ttymask;
    127  1.26  mycroft 
    128  1.30  mycroft 	spl0();
    129   1.1      cgd }
    130   1.1      cgd 
    131   1.1      cgd /*
    132   1.1      cgd  * Configure an ISA device.
    133   1.1      cgd  */
    134  1.21   andrew int
    135   1.1      cgd config_isadev(isdp, mp)
    136   1.1      cgd 	struct isa_device *isdp;
    137  1.15      cgd 	u_int *mp;
    138   1.1      cgd {
    139   1.1      cgd 	struct isa_driver *dp;
    140   1.1      cgd 
    141   1.1      cgd 	if (dp = isdp->id_driver) {
    142   1.1      cgd 		if (isdp->id_maddr) {
    143   1.1      cgd 			extern u_int atdevbase;
    144   1.1      cgd 
    145  1.15      cgd 			isdp->id_maddr -= 0xa0000; /* XXX should be a define */
    146   1.1      cgd 			isdp->id_maddr += atdevbase;
    147   1.1      cgd 		}
    148   1.1      cgd 		isdp->id_alive = (*dp->probe)(isdp);
    149  1.11  deraadt 		if (isdp->id_irq == (u_short)-1)
    150  1.11  deraadt 			isdp->id_alive = 0;
    151  1.15      cgd 		/*
    152  1.15      cgd 		 * Only print the I/O address range if id_alive != -1
    153  1.15      cgd 		 * Right now this is a temporary fix just for the new
    154  1.15      cgd 		 * NPX code so that if it finds a 486 that can use trap
    155  1.15      cgd 		 * 16 it will not report I/O addresses.
    156  1.15      cgd 		 * Rod Grimes 04/26/94
    157  1.15      cgd 		 *
    158  1.15      cgd 		 * XXX -- cgd
    159  1.15      cgd 		 */
    160   1.1      cgd 		if (isdp->id_alive) {
    161   1.1      cgd 			printf("%s%d", dp->name, isdp->id_unit);
    162  1.27      cgd 			if (isdp->id_iobase) {
    163  1.27      cgd 				printf(" at 0x%x", isdp->id_iobase);
    164  1.27      cgd 				if ((isdp->id_iobase + isdp->id_alive - 1) !=
    165  1.27      cgd 				    isdp->id_iobase)
    166  1.27      cgd 					printf("-0x%x", isdp->id_iobase +
    167  1.27      cgd 					    isdp->id_alive - 1);
    168  1.27      cgd 			}
    169  1.11  deraadt 			if (isdp->id_irq != 0)
    170  1.15      cgd 				printf(" irq %d", ffs(isdp->id_irq)-1);
    171   1.3  deraadt 			if (isdp->id_drq != -1)
    172  1.15      cgd 				printf(" drq %d", isdp->id_drq);
    173   1.4      cgd 			if (isdp->id_maddr != 0)
    174  1.15      cgd 				printf(" maddr 0x%x", kvtop(isdp->id_maddr));
    175   1.4      cgd 			if (isdp->id_msize != 0)
    176  1.20  deraadt 				printf("-0x%x", kvtop(isdp->id_maddr) +
    177  1.20  deraadt 					isdp->id_msize - 1);
    178   1.4      cgd 			if (isdp->id_flags != 0)
    179  1.15      cgd 				printf(" flags 0x%x", isdp->id_flags);
    180  1.15      cgd 			printf(" on isa\n");
    181   1.3  deraadt 
    182   1.6  deraadt 			config_attach(dp, isdp);
    183   1.6  deraadt 
    184  1.12  deraadt 			if (isdp->id_irq) {
    185   1.1      cgd 				int intrno;
    186   1.1      cgd 
    187   1.1      cgd 				intrno = ffs(isdp->id_irq)-1;
    188  1.15      cgd 				setidt(ICU_OFFSET+intrno, isdp->id_intr,
    189  1.15      cgd 					 SDT_SYS386IGT, SEL_KPL);
    190   1.3  deraadt 				if(mp)
    191   1.3  deraadt 					INTRMASK(*mp,isdp->id_irq);
    192  1.15      cgd 				INTREN(isdp->id_irq);
    193   1.1      cgd 			}
    194   1.1      cgd 		}
    195   1.1      cgd 		return (1);
    196   1.1      cgd 	} else	return(0);
    197   1.1      cgd }
    198   1.6  deraadt 
    199   1.6  deraadt void
    200   1.6  deraadt config_attach(struct isa_driver *dp, struct isa_device *isdp)
    201   1.6  deraadt {
    202   1.6  deraadt 	extern struct isa_device isa_subdev[];
    203   1.6  deraadt 	struct isa_device *dvp;
    204   1.6  deraadt 
    205   1.6  deraadt 	if(isdp->id_masunit==-1) {
    206   1.8  deraadt 		(void)(*dp->attach)(isdp);
    207   1.6  deraadt 		return;
    208   1.6  deraadt 	}
    209   1.6  deraadt 
    210   1.6  deraadt 	if(isdp->id_masunit==0) {
    211   1.6  deraadt 		for(dvp = isa_subdev; dvp->id_driver; dvp++) {
    212   1.6  deraadt 			if (dvp->id_driver != dp)
    213   1.6  deraadt 				continue;
    214  1.10  deraadt 			if (dvp->id_masunit != isdp->id_unit)
    215   1.6  deraadt 				continue;
    216   1.6  deraadt 			if (dvp->id_physid == -1)
    217   1.6  deraadt 				continue;
    218   1.8  deraadt 			dvp->id_alive = (*dp->attach)(dvp);
    219   1.6  deraadt 		}
    220   1.6  deraadt 		for(dvp = isa_subdev; dvp->id_driver; dvp++) {
    221   1.6  deraadt 			if (dvp->id_driver != dp)
    222   1.6  deraadt 				continue;
    223  1.10  deraadt 			if (dvp->id_masunit != isdp->id_unit)
    224   1.6  deraadt 				continue;
    225   1.6  deraadt 			if (dvp->id_physid != -1)
    226   1.6  deraadt 				continue;
    227   1.8  deraadt 			dvp->id_alive = (*dp->attach)(dvp);
    228   1.6  deraadt 		}
    229   1.6  deraadt 		return;
    230   1.6  deraadt 	}
    231   1.6  deraadt 	printf("id_masunit has weird value\n");
    232   1.6  deraadt }
    233   1.6  deraadt 
    234   1.1      cgd 
    235   1.1      cgd #define	IDTVEC(name)	__CONCAT(X,name)
    236   1.1      cgd /* default interrupt vector table entries */
    237   1.1      cgd extern	IDTVEC(intr0), IDTVEC(intr1), IDTVEC(intr2), IDTVEC(intr3),
    238   1.1      cgd 	IDTVEC(intr4), IDTVEC(intr5), IDTVEC(intr6), IDTVEC(intr7),
    239   1.1      cgd 	IDTVEC(intr8), IDTVEC(intr9), IDTVEC(intr10), IDTVEC(intr11),
    240   1.1      cgd 	IDTVEC(intr12), IDTVEC(intr13), IDTVEC(intr14), IDTVEC(intr15);
    241   1.1      cgd 
    242   1.1      cgd static *defvec[16] = {
    243   1.1      cgd 	&IDTVEC(intr0), &IDTVEC(intr1), &IDTVEC(intr2), &IDTVEC(intr3),
    244   1.1      cgd 	&IDTVEC(intr4), &IDTVEC(intr5), &IDTVEC(intr6), &IDTVEC(intr7),
    245   1.1      cgd 	&IDTVEC(intr8), &IDTVEC(intr9), &IDTVEC(intr10), &IDTVEC(intr11),
    246   1.1      cgd 	&IDTVEC(intr12), &IDTVEC(intr13), &IDTVEC(intr14), &IDTVEC(intr15) };
    247   1.1      cgd 
    248   1.1      cgd /* out of range default interrupt vector gate entry */
    249   1.1      cgd extern	IDTVEC(intrdefault);
    250  1.15      cgd 
    251   1.1      cgd /*
    252   1.1      cgd  * Fill in default interrupt table (in case of spuruious interrupt
    253   1.1      cgd  * during configuration of kernel, setup interrupt control unit
    254   1.1      cgd  */
    255  1.21   andrew void
    256   1.1      cgd isa_defaultirq() {
    257   1.1      cgd 	int i;
    258   1.1      cgd 
    259   1.1      cgd 	/* icu vectors */
    260   1.1      cgd 	for (i = NRSVIDT ; i < NRSVIDT+ICU_LEN ; i++)
    261   1.1      cgd 		setidt(i, defvec[i],  SDT_SYS386IGT, SEL_KPL);
    262  1.15      cgd 
    263   1.1      cgd 	/* out of range vectors */
    264   1.1      cgd 	for (i = NRSVIDT; i < NIDT; i++)
    265   1.1      cgd 		setidt(i, &IDTVEC(intrdefault), SDT_SYS386IGT, SEL_KPL);
    266   1.1      cgd 
    267   1.1      cgd 	/* initialize 8259's */
    268   1.1      cgd 	outb(IO_ICU1, 0x11);		/* reset; program device, four bytes */
    269   1.1      cgd 	outb(IO_ICU1+1, NRSVIDT);	/* starting at this vector index */
    270   1.1      cgd 	outb(IO_ICU1+1, 1<<2);		/* slave on line 2 */
    271  1.15      cgd #ifdef AUTO_EOI_1
    272  1.15      cgd 	outb(IO_ICU1+1, 2 | 1);		/* auto EOI, 8086 mode */
    273  1.15      cgd #else
    274   1.1      cgd 	outb(IO_ICU1+1, 1);		/* 8086 mode */
    275  1.15      cgd #endif
    276   1.1      cgd 	outb(IO_ICU1+1, 0xff);		/* leave interrupts masked */
    277  1.15      cgd 	outb(IO_ICU1, 0x0a);		/* default to IRR on read */
    278  1.21   andrew #ifdef REORDER_IRQ
    279  1.15      cgd 	outb(IO_ICU1, 0xc0 | (3 - 1));	/* pri order 3-7, 0-2 (com2 first) */
    280  1.21   andrew #endif
    281   1.1      cgd 
    282   1.1      cgd 	outb(IO_ICU2, 0x11);		/* reset; program device, four bytes */
    283   1.1      cgd 	outb(IO_ICU2+1, NRSVIDT+8);	/* staring at this vector index */
    284   1.1      cgd 	outb(IO_ICU2+1,2);		/* my slave id is 2 */
    285  1.15      cgd #ifdef AUTO_EOI_2
    286  1.15      cgd 	outb(IO_ICU2+1, 2 | 1);		/* auto EOI, 8086 mode */
    287  1.15      cgd #else
    288   1.1      cgd 	outb(IO_ICU2+1,1);		/* 8086 mode */
    289  1.15      cgd #endif
    290   1.1      cgd 	outb(IO_ICU2+1, 0xff);		/* leave interrupts masked */
    291  1.15      cgd 	outb(IO_ICU2, 0x0a);		/* default to IRR on read */
    292   1.1      cgd }
    293   1.1      cgd 
    294   1.1      cgd /* region of physical memory known to be contiguous */
    295   1.1      cgd vm_offset_t isaphysmem;
    296   1.1      cgd static caddr_t dma_bounce[8];		/* XXX */
    297   1.1      cgd static char bounced[8];		/* XXX */
    298   1.1      cgd #define MAXDMASZ 512		/* XXX */
    299   1.1      cgd 
    300   1.1      cgd /* high byte of address is stored in this port for i-th dma channel */
    301   1.1      cgd static short dmapageport[8] =
    302   1.1      cgd 	{ 0x87, 0x83, 0x81, 0x82, 0x8f, 0x8b, 0x89, 0x8a };
    303   1.1      cgd 
    304   1.1      cgd /*
    305   1.1      cgd  * isa_dmacascade(): program 8237 DMA controller channel to accept
    306   1.1      cgd  * external dma control by a board.
    307   1.1      cgd  */
    308  1.21   andrew void
    309  1.21   andrew isa_dmacascade(unsigned chan)
    310   1.2      cgd {
    311   1.1      cgd 	if (chan > 7)
    312   1.1      cgd 		panic("isa_dmacascade: impossible request");
    313   1.1      cgd 
    314   1.1      cgd 	/* set dma channel mode, and set dma channel mode */
    315   1.2      cgd 	if ((chan & 4) == 0) {
    316   1.2      cgd 		outb(DMA1_MODE, DMA37MD_CASCADE | chan);
    317   1.2      cgd 		outb(DMA1_SMSK, chan);
    318   1.2      cgd 	} else {
    319   1.2      cgd 		outb(DMA2_MODE, DMA37MD_CASCADE | (chan & 3));
    320   1.2      cgd 		outb(DMA2_SMSK, chan & 3);
    321   1.2      cgd 	}
    322   1.1      cgd }
    323   1.1      cgd 
    324   1.1      cgd /*
    325   1.1      cgd  * isa_dmastart(): program 8237 DMA controller channel, avoid page alignment
    326   1.1      cgd  * problems by using a bounce buffer.
    327   1.1      cgd  */
    328  1.21   andrew void
    329  1.21   andrew isa_dmastart(int flags, caddr_t addr, unsigned nbytes, unsigned chan)
    330   1.1      cgd {	vm_offset_t phys;
    331   1.2      cgd 	int waport;
    332   1.1      cgd 	caddr_t newaddr;
    333   1.1      cgd 
    334   1.2      cgd 	if (    chan > 7
    335   1.2      cgd 	    || (chan < 4 && nbytes > (1<<16))
    336   1.2      cgd 	    || (chan >= 4 && (nbytes > (1<<17) || (u_int)addr & 1)))
    337   1.1      cgd 		panic("isa_dmastart: impossible request");
    338   1.1      cgd 
    339   1.2      cgd 	if (isa_dmarangecheck(addr, nbytes, chan)) {
    340   1.1      cgd 		if (dma_bounce[chan] == 0)
    341   1.1      cgd 			dma_bounce[chan] =
    342   1.1      cgd 				/*(caddr_t)malloc(MAXDMASZ, M_TEMP, M_WAITOK);*/
    343   1.1      cgd 				(caddr_t) isaphysmem + NBPG*chan;
    344   1.1      cgd 		bounced[chan] = 1;
    345   1.1      cgd 		newaddr = dma_bounce[chan];
    346   1.1      cgd 		*(int *) newaddr = 0;	/* XXX */
    347   1.1      cgd 
    348   1.1      cgd 		/* copy bounce buffer on write */
    349   1.1      cgd 		if (!(flags & B_READ))
    350   1.1      cgd 			bcopy(addr, newaddr, nbytes);
    351   1.1      cgd 		addr = newaddr;
    352   1.1      cgd 	}
    353   1.1      cgd 
    354   1.1      cgd 	/* translate to physical */
    355   1.1      cgd 	phys = pmap_extract(pmap_kernel(), (vm_offset_t)addr);
    356   1.1      cgd 
    357   1.2      cgd 	if ((chan & 4) == 0) {
    358   1.2      cgd 		/*
    359   1.2      cgd 		 * Program one of DMA channels 0..3.  These are
    360   1.2      cgd 		 * byte mode channels.
    361   1.2      cgd 		 */
    362   1.2      cgd 		/* set dma channel mode, and reset address ff */
    363   1.2      cgd 		if (flags & B_READ)
    364   1.2      cgd 			outb(DMA1_MODE, DMA37MD_SINGLE|DMA37MD_WRITE|chan);
    365   1.2      cgd 		else
    366   1.2      cgd 			outb(DMA1_MODE, DMA37MD_SINGLE|DMA37MD_READ|chan);
    367   1.2      cgd 		outb(DMA1_FFC, 0);
    368   1.1      cgd 
    369   1.2      cgd 		/* send start address */
    370   1.2      cgd 		waport =  DMA1_CHN(chan);
    371   1.1      cgd 		outb(waport, phys);
    372   1.1      cgd 		outb(waport, phys>>8);
    373   1.2      cgd 		outb(dmapageport[chan], phys>>16);
    374   1.2      cgd 
    375   1.2      cgd 		/* send count */
    376   1.2      cgd 		outb(waport + 1, --nbytes);
    377   1.2      cgd 		outb(waport + 1, nbytes>>8);
    378   1.2      cgd 
    379   1.2      cgd 		/* unmask channel */
    380   1.2      cgd 		outb(DMA1_SMSK, chan);
    381   1.1      cgd 	} else {
    382   1.2      cgd 		/*
    383   1.2      cgd 		 * Program one of DMA channels 4..7.  These are
    384   1.2      cgd 		 * word mode channels.
    385   1.2      cgd 		 */
    386   1.2      cgd 		/* set dma channel mode, and reset address ff */
    387   1.2      cgd 		if (flags & B_READ)
    388   1.2      cgd 			outb(DMA2_MODE, DMA37MD_SINGLE|DMA37MD_WRITE|(chan&3));
    389   1.2      cgd 		else
    390   1.2      cgd 			outb(DMA2_MODE, DMA37MD_SINGLE|DMA37MD_READ|(chan&3));
    391   1.2      cgd 		outb(DMA2_FFC, 0);
    392   1.2      cgd 
    393   1.2      cgd 		/* send start address */
    394   1.2      cgd 		waport = DMA2_CHN(chan - 4);
    395   1.1      cgd 		outb(waport, phys>>1);
    396   1.1      cgd 		outb(waport, phys>>9);
    397   1.2      cgd 		outb(dmapageport[chan], phys>>16);
    398   1.1      cgd 
    399   1.2      cgd 		/* send count */
    400   1.2      cgd 		nbytes >>= 1;
    401   1.1      cgd 		outb(waport + 2, --nbytes);
    402   1.1      cgd 		outb(waport + 2, nbytes>>8);
    403   1.2      cgd 
    404   1.2      cgd 		/* unmask channel */
    405   1.2      cgd 		outb(DMA2_SMSK, chan & 3);
    406   1.1      cgd 	}
    407   1.1      cgd }
    408   1.1      cgd 
    409  1.21   andrew void
    410  1.21   andrew isa_dmadone(int flags, caddr_t addr, int nbytes, int chan)
    411   1.1      cgd {
    412   1.1      cgd 
    413   1.1      cgd 	/* copy bounce buffer on read */
    414   1.1      cgd 	/*if ((flags & (B_PHYS|B_READ)) == (B_PHYS|B_READ))*/
    415   1.1      cgd 	if (bounced[chan]) {
    416   1.1      cgd 		bcopy(dma_bounce[chan], addr, nbytes);
    417   1.1      cgd 		bounced[chan] = 0;
    418   1.1      cgd 	}
    419   1.1      cgd }
    420   1.1      cgd 
    421   1.1      cgd /*
    422   1.1      cgd  * Check for problems with the address range of a DMA transfer
    423   1.2      cgd  * (non-contiguous physical pages, outside of bus address space,
    424   1.2      cgd  * crossing DMA page boundaries).
    425   1.1      cgd  * Return true if special handling needed.
    426   1.1      cgd  */
    427   1.1      cgd 
    428  1.21   andrew int
    429   1.2      cgd isa_dmarangecheck(caddr_t va, unsigned length, unsigned chan) {
    430   1.2      cgd 	vm_offset_t phys, priorpage = 0, endva;
    431   1.2      cgd 	u_int dma_pgmsk = (chan & 4) ?  ~(128*1024-1) : ~(64*1024-1);
    432   1.1      cgd 
    433   1.1      cgd 	endva = (vm_offset_t)round_page(va + length);
    434   1.1      cgd 	for (; va < (caddr_t) endva ; va += NBPG) {
    435   1.1      cgd 		phys = trunc_page(pmap_extract(pmap_kernel(), (vm_offset_t)va));
    436   1.1      cgd #define ISARAM_END	RAM_END
    437   1.1      cgd 		if (phys == 0)
    438   1.1      cgd 			panic("isa_dmacheck: no physical page present");
    439   1.1      cgd 		if (phys > ISARAM_END)
    440   1.1      cgd 			return (1);
    441   1.2      cgd 		if (priorpage) {
    442   1.2      cgd 			if (priorpage + NBPG != phys)
    443   1.2      cgd 				return (1);
    444   1.2      cgd 			/* check if crossing a DMA page boundary */
    445   1.2      cgd 			if (((u_int)priorpage ^ (u_int)phys) & dma_pgmsk)
    446   1.2      cgd 				return (1);
    447   1.2      cgd 		}
    448   1.1      cgd 		priorpage = phys;
    449   1.1      cgd 	}
    450   1.1      cgd 	return (0);
    451   1.1      cgd }
    452   1.1      cgd 
    453   1.1      cgd /* head of queue waiting for physmem to become available */
    454   1.1      cgd struct buf isa_physmemq;
    455   1.1      cgd 
    456   1.1      cgd /* blocked waiting for resource to become free for exclusive use */
    457   1.1      cgd static isaphysmemflag;
    458   1.1      cgd /* if waited for and call requested when free (B_CALL) */
    459   1.1      cgd static void (*isaphysmemunblock)(); /* needs to be a list */
    460   1.1      cgd 
    461   1.1      cgd /*
    462   1.1      cgd  * Allocate contiguous physical memory for transfer, returning
    463   1.1      cgd  * a *virtual* address to region. May block waiting for resource.
    464   1.1      cgd  * (assumed to be called at splbio())
    465   1.1      cgd  */
    466   1.1      cgd caddr_t
    467   1.1      cgd isa_allocphysmem(caddr_t va, unsigned length, void (*func)()) {
    468   1.1      cgd 
    469   1.1      cgd 	isaphysmemunblock = func;
    470   1.1      cgd 	while (isaphysmemflag & B_BUSY) {
    471   1.1      cgd 		isaphysmemflag |= B_WANTED;
    472  1.24  deraadt 		sleep((caddr_t)&isaphysmemflag, PRIBIO);
    473   1.1      cgd 	}
    474   1.1      cgd 	isaphysmemflag |= B_BUSY;
    475   1.1      cgd 
    476   1.1      cgd 	return((caddr_t)isaphysmem);
    477   1.1      cgd }
    478   1.1      cgd 
    479   1.1      cgd /*
    480   1.1      cgd  * Free contiguous physical memory used for transfer.
    481   1.1      cgd  * (assumed to be called at splbio())
    482   1.1      cgd  */
    483   1.1      cgd void
    484   1.1      cgd isa_freephysmem(caddr_t va, unsigned length) {
    485   1.1      cgd 
    486   1.1      cgd 	isaphysmemflag &= ~B_BUSY;
    487   1.1      cgd 	if (isaphysmemflag & B_WANTED) {
    488   1.1      cgd 		isaphysmemflag &= B_WANTED;
    489  1.24  deraadt 		wakeup((caddr_t)&isaphysmemflag);
    490   1.1      cgd 		if (isaphysmemunblock)
    491   1.1      cgd 			(*isaphysmemunblock)();
    492   1.1      cgd 	}
    493   1.1      cgd }
    494   1.1      cgd 
    495   1.1      cgd /*
    496   1.1      cgd  * Handle a NMI, possibly a machine check.
    497   1.1      cgd  * return true to panic system, false to ignore.
    498   1.1      cgd  */
    499  1.21   andrew int
    500   1.1      cgd isa_nmi(cd) {
    501   1.1      cgd 
    502   1.1      cgd 	log(LOG_CRIT, "\nNMI port 61 %x, port 70 %x\n", inb(0x61), inb(0x70));
    503   1.1      cgd 	return(0);
    504   1.1      cgd }
    505   1.1      cgd 
    506   1.1      cgd /*
    507   1.1      cgd  * Caught a stray interrupt, notify
    508   1.1      cgd  */
    509  1.21   andrew void
    510   1.1      cgd isa_strayintr(d) {
    511   1.1      cgd 
    512   1.1      cgd 	/* DON'T BOTHER FOR NOW! */
    513   1.1      cgd 	/* for some reason, we get bursts of intr #7, even if not enabled! */
    514   1.4      cgd 	/*
    515   1.4      cgd 	 * Well the reason you got bursts of intr #7 is because someone
    516   1.4      cgd 	 * raised an interrupt line and dropped it before the 8259 could
    517   1.4      cgd 	 * prioritize it.  This is documented in the intel data book.  This
    518   1.4      cgd 	 * means you have BAD hardware!  I have changed this so that only
    519  1.15      cgd 	 * the first 5 get logged, then it quits logging them, and puts
    520   1.4      cgd 	 * out a special message. rgrimes 3/25/1993
    521   1.4      cgd 	 */
    522  1.15      cgd 	extern u_long intrcnt_stray;
    523   1.4      cgd 
    524  1.15      cgd 	intrcnt_stray++;
    525  1.15      cgd 	if (intrcnt_stray <= 5)
    526   1.4      cgd 		log(LOG_ERR,"ISA strayintr %x\n", d);
    527  1.15      cgd 	if (intrcnt_stray == 5)
    528   1.4      cgd 		log(LOG_CRIT,"Too many ISA strayintr not logging any more\n");
    529   1.1      cgd }
    530   1.1      cgd 
    531   1.1      cgd /*
    532  1.15      cgd  * Wait "n" microseconds.
    533  1.15      cgd  * Relies on timer 1 counting down from (TIMER_FREQ / hz) at
    534  1.17  mycroft  * (1 * TIMER_FREQ) Hz.
    535  1.15      cgd  * Note: timer had better have been programmed before this is first used!
    536  1.17  mycroft  * (Note that we use `rate generator' mode, which counts at 1:1; `square
    537  1.17  mycroft  * wave' mode counts at 2:1).
    538  1.15      cgd  */
    539  1.17  mycroft #define       CF              (1 * TIMER_FREQ)
    540  1.15      cgd 
    541  1.15      cgd extern int hz;                        /* XXX - should be elsewhere */
    542  1.15      cgd 
    543  1.21   andrew void
    544  1.21   andrew DELAY(n)
    545  1.15      cgd 	int n;
    546  1.15      cgd {
    547  1.15      cgd 	int counter_limit;
    548  1.15      cgd 	int prev_tick;
    549  1.15      cgd 	int tick;
    550  1.15      cgd 	int ticks_left;
    551  1.15      cgd 	int sec;
    552  1.15      cgd 	int usec;
    553  1.15      cgd 
    554  1.15      cgd #ifdef DELAYDEBUG
    555  1.16  mycroft 	int gettick_calls = 1;
    556  1.15      cgd 	int n1;
    557  1.15      cgd 	static int state = 0;
    558  1.15      cgd 
    559  1.15      cgd 	if (state == 0) {
    560  1.15      cgd 		state = 1;
    561  1.15      cgd 		for (n1 = 1; n1 <= 10000000; n1 *= 10)
    562  1.15      cgd 			DELAY(n1);
    563  1.15      cgd 		state = 2;
    564  1.15      cgd 	}
    565  1.15      cgd 	if (state == 1)
    566  1.15      cgd 		printf("DELAY(%d)...", n);
    567  1.15      cgd #endif
    568  1.15      cgd 
    569  1.15      cgd 	/*
    570  1.15      cgd 	 * Read the counter first, so that the rest of the setup overhead is
    571  1.15      cgd 	 * counted.  Guess the initial overhead is 20 usec (on most systems it
    572  1.16  mycroft 	 * takes about 1.5 usec for each of the i/o's in gettick().  The loop
    573  1.15      cgd 	 * takes about 6 usec on a 486/33 and 13 usec on a 386/20.  The
    574  1.15      cgd 	 * multiplications and divisions to scale the count take a while).
    575  1.15      cgd 	 */
    576  1.16  mycroft 	prev_tick = gettick();
    577  1.15      cgd 	n -= 20;
    578  1.15      cgd 
    579  1.15      cgd 	/*
    580  1.15      cgd 	 * Calculate (n * (CF / 1e6)) without using floating point and without
    581  1.15      cgd 	 * any avoidable overflows.
    582  1.15      cgd 	 */
    583  1.15      cgd 	sec = n / 1000000;
    584  1.15      cgd 	usec = n - sec * 1000000;
    585  1.15      cgd 	ticks_left = sec * CF
    586  1.15      cgd 		+ usec * (CF / 1000000)
    587  1.15      cgd 		+ usec * ((CF % 1000000) / 1000) / 1000
    588  1.15      cgd 		+ usec * (CF % 1000) / 1000000;
    589  1.15      cgd 
    590  1.15      cgd 	counter_limit = TIMER_FREQ / hz;
    591  1.15      cgd 	while (ticks_left > 0) {
    592  1.16  mycroft 		tick = gettick();
    593  1.15      cgd #ifdef DELAYDEBUG
    594  1.16  mycroft 		++gettick_calls;
    595  1.15      cgd #endif
    596  1.15      cgd 		if (tick > prev_tick)
    597  1.15      cgd 			ticks_left -= prev_tick - (tick - counter_limit);
    598  1.15      cgd 		else
    599  1.15      cgd 			ticks_left -= prev_tick - tick;
    600  1.15      cgd 		prev_tick = tick;
    601   1.1      cgd 	}
    602  1.15      cgd #ifdef DELAYDEBUG
    603  1.15      cgd 	if (state == 1)
    604  1.16  mycroft 		printf(" %d calls to gettick() at %d usec each\n",
    605  1.16  mycroft 			gettick_calls, (n + 5) / gettick_calls);
    606  1.15      cgd #endif
    607   1.1      cgd }
    608   1.1      cgd 
    609  1.21   andrew int
    610  1.16  mycroft gettick() {
    611  1.15      cgd 	int high;
    612  1.15      cgd 	int low;
    613  1.15      cgd 
    614  1.15      cgd 	/*
    615  1.15      cgd 	 * Protect ourself against interrupts.
    616  1.15      cgd 	 */
    617  1.15      cgd 	disable_intr();
    618  1.15      cgd 	/*
    619  1.15      cgd 	 * Latch the count for 'timer' (cc00xxxx, c = counter, x = any).
    620  1.15      cgd 	 */
    621  1.16  mycroft 	outb(TIMER_MODE, TIMER_SEL0 | TIMER_LATCH);
    622  1.16  mycroft 	low = inb(TIMER_CNTR0);
    623  1.16  mycroft 	high = inb(TIMER_CNTR0);
    624  1.15      cgd 	enable_intr();
    625  1.15      cgd 	return ((high << 8) | low);
    626   1.1      cgd }
    627   1.1      cgd 
    628   1.1      cgd static beeping;
    629  1.21   andrew static void
    630  1.21   andrew sysbeepstop(int f)
    631   1.1      cgd {
    632  1.16  mycroft 	int s = splhigh();
    633  1.16  mycroft 
    634   1.1      cgd 	/* disable counter 2 */
    635  1.16  mycroft 	disable_intr();
    636  1.28   brezak 	outb(PITAUX_PORT, inb(PITAUX_PORT) & ~PIT_SPKR);
    637  1.16  mycroft 	enable_intr();
    638   1.1      cgd 	if (f)
    639  1.24  deraadt 		timeout((timeout_t)sysbeepstop, (caddr_t)0, f);
    640   1.1      cgd 	else
    641   1.1      cgd 		beeping = 0;
    642  1.16  mycroft 
    643  1.16  mycroft 	splx(s);
    644   1.1      cgd }
    645   1.1      cgd 
    646  1.21   andrew void
    647  1.21   andrew sysbeep(int pitch, int period)
    648   1.1      cgd {
    649  1.16  mycroft 	int s = splhigh();
    650  1.16  mycroft 	static int last_pitch, last_period;
    651   1.1      cgd 
    652  1.16  mycroft 	if (beeping) {
    653  1.24  deraadt 		untimeout((timeout_t)sysbeepstop, (caddr_t)(last_period/2));
    654  1.24  deraadt 		untimeout((timeout_t)sysbeepstop, (caddr_t)0);
    655   1.1      cgd 	}
    656  1.16  mycroft 	if (!beeping || last_pitch != pitch) {
    657  1.16  mycroft 		/*
    658  1.16  mycroft 	 	* XXX - move timer stuff to clock.c.
    659  1.16  mycroft 	 	*/
    660  1.16  mycroft 		disable_intr();
    661  1.16  mycroft 		outb(TIMER_MODE, TIMER_SEL2|TIMER_16BIT|TIMER_SQWAVE);
    662  1.19  mycroft 		outb(TIMER_CNTR2, TIMER_DIV(pitch)%256);
    663  1.19  mycroft 		outb(TIMER_CNTR2, TIMER_DIV(pitch)/256);
    664  1.28   brezak 		outb(PITAUX_PORT, inb(PITAUX_PORT) | PIT_SPKR);	/* enable counter 2 */
    665  1.16  mycroft 		enable_intr();
    666  1.16  mycroft 	}
    667  1.16  mycroft 	last_pitch = pitch;
    668  1.16  mycroft 	beeping = last_period = period;
    669  1.24  deraadt 	timeout((timeout_t)sysbeepstop, (caddr_t)(period/2), period);
    670  1.16  mycroft 
    671  1.16  mycroft 	splx(s);
    672   1.1      cgd }
    673   1.1      cgd 
    674   1.1      cgd /*
    675   1.1      cgd  * Pass command to keyboard controller (8042)
    676   1.1      cgd  */
    677  1.21   andrew unsigned
    678  1.21   andrew kbc_8042cmd(int val)
    679  1.21   andrew {
    680   1.1      cgd 	while (inb(KBSTATP)&KBS_IBF);
    681   1.1      cgd 	if (val) outb(KBCMDP, val);
    682   1.1      cgd 	while (inb(KBSTATP)&KBS_IBF);
    683   1.1      cgd 	return (inb(KBDATAP));
    684  1.28   brezak }
    685  1.28   brezak 
    686  1.28   brezak /*
    687  1.28   brezak  * find an ISA device in a given isa_devtab_* table, given
    688  1.28   brezak  * the table to search, the expected id_driver entry, and the unit number.
    689  1.28   brezak  *
    690  1.28   brezak  * this function is defined in isa_device.h, and this location is debatable;
    691  1.28   brezak  * i put it there because it's useless w/o, and directly operates on
    692  1.28   brezak  * the other stuff in that file.
    693  1.28   brezak  *
    694  1.28   brezak  */
    695  1.28   brezak 
    696  1.28   brezak struct isa_device *find_isadev(table, driverp, unit)
    697  1.28   brezak 	struct isa_device *table;
    698  1.28   brezak 	struct isa_driver *driverp;
    699  1.28   brezak 	int unit;
    700  1.28   brezak {
    701  1.28   brezak 	if (driverp == NULL) /* sanity check */
    702  1.28   brezak 		return NULL;
    703  1.28   brezak 
    704  1.28   brezak 	while ((table->id_driver != driverp) || (table->id_unit != unit)) {
    705  1.28   brezak 		if (table->id_driver == 0)
    706  1.28   brezak 			return NULL;
    707  1.28   brezak 
    708  1.28   brezak 		table++;
    709  1.28   brezak         }
    710  1.28   brezak 
    711  1.28   brezak 	return table;
    712  1.15      cgd }
    713  1.15      cgd 
    714  1.15      cgd /*
    715  1.15      cgd  * Return nonzero if a (masked) irq is pending for a given device.
    716  1.15      cgd  */
    717  1.15      cgd int
    718  1.15      cgd isa_irq_pending(dvp)
    719  1.15      cgd 	struct isa_device *dvp;
    720  1.15      cgd {
    721  1.15      cgd 	unsigned id_irq;
    722  1.15      cgd 
    723  1.15      cgd 	id_irq = (unsigned short) dvp->id_irq;	/* XXX silly type in struct */
    724  1.15      cgd 	if (id_irq & 0xff)
    725  1.15      cgd 		return (inb(IO_ICU1) & id_irq);
    726  1.15      cgd 	return (inb(IO_ICU2) & (id_irq >> 8));
    727   1.1      cgd }
    728