isa.c revision 1.28.2.6 1 /*-
2 * Copyright (c) 1991 The Regents of the University of California.
3 * All rights reserved.
4 *
5 * This code is derived from software contributed to Berkeley by
6 * William Jolitz.
7 *
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions
10 * are met:
11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the distribution.
16 * 3. All advertising materials mentioning features or use of this software
17 * must display the following acknowledgement:
18 * This product includes software developed by the University of
19 * California, Berkeley and its contributors.
20 * 4. Neither the name of the University nor the names of its contributors
21 * may be used to endorse or promote products derived from this software
22 * without specific prior written permission.
23 *
24 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
25 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
27 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
30 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
31 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
32 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
33 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
34 * SUCH DAMAGE.
35 *
36 * from: @(#)isa.c 7.2 (Berkeley) 5/13/91
37 * $Id: isa.c,v 1.28.2.6 1993/10/11 01:51:26 mycroft Exp $
38 */
39
40 /*
41 * code to manage AT bus
42 *
43 * 92/08/18 Frank P. MacLachlan (fpm (at) crash.cts.com):
44 * Fixed uninitialized variable problem and added code to deal
45 * with DMA page boundaries in isa_dmarangecheck(). Fixed word
46 * mode DMA count compution and reorganized DMA setup code in
47 * isa_dmastart()
48 */
49
50 #include "param.h"
51 #include "systm.h"
52 #include "conf.h"
53 #include "file.h"
54 #include "buf.h"
55 #include "uio.h"
56 #include "syslog.h"
57 #include "malloc.h"
58 #include "machine/cpu.h"
59 #include "machine/pio.h"
60 #include "sys/device.h"
61 #include "vm/vm.h"
62 #include "i386/isa/isa.h"
63 #include "i386/isa/isavar.h"
64 #include "i386/isa/icu.h"
65 #include "i386/isa/ic/i8237.h"
66 #include "i386/isa/ic/i8042.h"
67 #include "i386/isa/timerreg.h"
68 #include "i386/isa/spkr_reg.h"
69
70 /*
71 ** Register definitions for DMA controller 1 (channels 0..3):
72 */
73 #define DMA1_CHN(c) (IO_DMA1 + 1*(2*(c))) /* addr reg for channel c */
74 #define DMA1_SMSK (IO_DMA1 + 1*10) /* single mask register */
75 #define DMA1_MODE (IO_DMA1 + 1*11) /* mode register */
76 #define DMA1_FFC (IO_DMA1 + 1*12) /* clear first/last FF */
77
78 /*
79 ** Register definitions for DMA controller 2 (channels 4..7):
80 */
81 #define DMA2_CHN(c) (IO_DMA1 + 2*(2*(c))) /* addr reg for channel c */
82 #define DMA2_SMSK (IO_DMA2 + 2*10) /* single mask register */
83 #define DMA2_MODE (IO_DMA2 + 2*11) /* mode register */
84 #define DMA2_FFC (IO_DMA2 + 2*12) /* clear first/last FF */
85
86 isa_type isa_bustype; /* type of bus */
87
88 static int isaprobe __P((struct device *, struct cfdata *, void *));
89 static void isaattach __P((struct device *, struct device *, void *));
90 static int isasubmatch __P((struct device *, struct cfdata *, void *));
91
92 struct cfdriver isacd =
93 { NULL, "isa", isaprobe, isaattach, DV_DULL, sizeof(struct isa_softc) };
94
95 void isa_defaultirq __P((void));
96 static int isaprint __P((void *, char *));
97
98 /*
99 * We think there might be an ISA bus here. Check it out.
100 */
101 static int
102 isaprobe(parent, cf, aux)
103 struct device *parent;
104 struct cfdata *cf;
105 void *aux;
106 {
107
108 /* XXX should do a real probe */
109 isa_bustype = BUS_ISA;
110 return 1;
111 }
112
113 /*
114 * Probe succeeded, someone called config_attach. Now we have to
115 * probe the ISA bus itself in our turn.
116 */
117 static void
118 isaattach(parent, self, aux)
119 struct device *parent, *self;
120 void *aux;
121 {
122
123 /* should print ISA/EISA & bus clock frequency and anything else
124 we can figure out? */
125 printf("\n");
126
127 isa_defaultirq();
128
129 enable_intr();
130 splhigh();
131 intr_enable(IRQ_SLAVE);
132
133 /* Iterate ``isasubmatch'' over all devices configured here. */
134 (void)config_search(isasubmatch, self, (void *)NULL);
135
136 printf("biomask %x ttymask %x netmask %x impmask %x astmask %s\n",
137 biomask, ttymask, netmask, impmask, astmask);
138 splnone();
139 }
140
141 /*
142 * isaattach (above) iterates this function over all the sub-devices that
143 * were configured at the ``isa'' device. Our job is to provide defaults
144 * and do some internal/external representation conversion (some of which
145 * is scheduled to get cleaned up later), then call the device's probe
146 * function. If this says the device is there, we try to reserve ISA
147 * bus memory and ports for the device, and attach it.
148 *
149 * Note that we always return 0, but our ultimate caller (isaattach)
150 * does not care that we never `match' anything. (In fact, our return
151 * value is entirely irrelevant; this function is run entirely for its
152 * side effects.)
153 */
154 static int
155 isasubmatch(isa, cf, aux)
156 struct device *isa;
157 struct cfdata *cf;
158 void *aux;
159 {
160 struct isa_attach_args ia;
161
162 #ifdef DIAGNOSTIC
163 if (cf->cf_driver->cd_match == NULL) {
164 /* we really ought to add printf formats to panic(). */
165 printf("isasubmatch: no match function for `%s' device\n",
166 cf->cf_driver->cd_name);
167 panic("isasubmatch: no match function\n");
168 }
169 #endif
170
171 /* Init the info needed in the device probe routine. */
172 ia.ia_iobase = cf->cf_iobase;
173 ia.ia_iosize = cf->cf_iosize;
174 if (cf->cf_irq == -1)
175 ia.ia_irq = IRQUNK;
176 else
177 ia.ia_irq = 1 << cf->cf_irq;
178 ia.ia_drq = cf->cf_drq;
179 ia.ia_maddr = (caddr_t)cf->cf_maddr;
180 ia.ia_msize = cf->cf_msize;
181
182 /* If driver says it's not there, believe it. */
183 if (!cf->cf_driver->cd_match(isa, cf, &ia))
184 return 0;
185
186 /* Driver says it is there. Try to reserve ports and memory. */
187 if (isa_reserveports(ia.ia_iobase, ia.ia_iosize)) {
188 if (isa_reservemem(ia.ia_maddr, ia.ia_msize))
189 config_attach(isa, cf, &ia, isaprint); /* victory! */
190 else
191 isa_unreserveports(ia.ia_iobase, ia.ia_iosize);
192 }
193
194 /* In any case, move on to next config entry. */
195 return 0;
196 }
197
198 /*
199 * Called indirectly via config_attach (see above). Config has already
200 * printed, e.g., "wdc0 at isa0". We can ignore our ``isaname'' arg
201 * (it is always NULL, by definition) and just extend the line with
202 * the standard info (port(s), irq, drq, and iomem).
203 */
204 static int
205 isaprint(aux, isaname)
206 void *aux;
207 char *isaname;
208 {
209 struct isa_attach_args *ia = aux;
210
211 if (ia->ia_iosize)
212 printf(" port 0x%x", ia->ia_iobase);
213 if (ia->ia_iosize > 1)
214 printf("-0x%x", ia->ia_iobase + ia->ia_iosize - 1);
215 #ifdef DIAGNOSTIC
216 if (ia->ia_irq == IRQUNK)
217 printf(" THIS IS A BUG ->");
218 #endif
219 if (ia->ia_irq != IRQNONE)
220 printf(" irq %d", ffs(ia->ia_irq) - 1);
221 if (ia->ia_drq != DRQUNK)
222 printf(" drq %d", ia->ia_drq);
223 if (ia->ia_msize)
224 printf(" iomem 0x%x", ia->ia_maddr);
225 if (ia->ia_msize > 1)
226 printf("-0x%x", ia->ia_maddr + ia->ia_msize - 1);
227 /* XXXX need to print flags */
228 return QUIET; /* actually, our return value is irrelevant. */
229 }
230
231
232 #define IDTVEC(name) __CONCAT(X,name)
233 /* default interrupt vector table entries */
234 extern IDTVEC(intr0), IDTVEC(intr1), IDTVEC(intr2), IDTVEC(intr3),
235 IDTVEC(intr4), IDTVEC(intr5), IDTVEC(intr6), IDTVEC(intr7),
236 IDTVEC(intr8), IDTVEC(intr9), IDTVEC(intr10), IDTVEC(intr11),
237 IDTVEC(intr12), IDTVEC(intr13), IDTVEC(intr14), IDTVEC(intr15);
238
239 static *defvec[16] = {
240 &IDTVEC(intr0), &IDTVEC(intr1), &IDTVEC(intr2), &IDTVEC(intr3),
241 &IDTVEC(intr4), &IDTVEC(intr5), &IDTVEC(intr6), &IDTVEC(intr7),
242 &IDTVEC(intr8), &IDTVEC(intr9), &IDTVEC(intr10), &IDTVEC(intr11),
243 &IDTVEC(intr12), &IDTVEC(intr13), &IDTVEC(intr14), &IDTVEC(intr15) };
244
245 /* out of range default interrupt vector gate entry */
246 extern IDTVEC(intrdefault);
247
248 /*
249 * Fill in default interrupt table, and mask all interrupts.
250 */
251 void
252 isa_defaultirq()
253 {
254 int i;
255
256 /* icu vectors */
257 for (i = ICU_OFFSET; i < ICU_OFFSET + ICU_LEN ; i++)
258 setidt(i, defvec[i], SDT_SYS386IGT, SEL_KPL);
259
260 /* out of range vectors */
261 for (; i < NIDT; i++)
262 setidt(i, &IDTVEC(intrdefault), SDT_SYS386IGT, SEL_KPL);
263
264 /* initialize 8259's */
265 outb(IO_ICU1, 0x11); /* reset; program device, four bytes */
266 outb(IO_ICU1+1, ICU_OFFSET); /* starting at this vector index */
267 outb(IO_ICU1+1, IRQ_SLAVE);
268 #ifdef AUTO_EOI_1
269 outb(IO_ICU1+1, 2 | 1); /* auto EOI, 8086 mode */
270 #else
271 outb(IO_ICU1+1, 1); /* 8086 mode */
272 #endif
273 outb(IO_ICU1+1, 0xff); /* leave interrupts masked */
274 outb(IO_ICU1, 0x0a); /* default to IRR on read */
275 #ifdef REORDER_IRQ
276 outb(IO_ICU1, 0xc0 | (3 - 1)); /* pri order 3-7, 0-2 (com2 first) */
277 #endif
278
279 outb(IO_ICU2, 0x11); /* reset; program device, four bytes */
280 outb(IO_ICU2+1, ICU_OFFSET+8); /* staring at this vector index */
281 outb(IO_ICU2+1, ffs(IRQ_SLAVE)-1);
282 #ifdef AUTO_EOI_2
283 outb(IO_ICU2+1, 2 | 1); /* auto EOI, 8086 mode */
284 #else
285 outb(IO_ICU2+1, 1); /* 8086 mode */
286 #endif
287 outb(IO_ICU2+1, 0xff); /* leave interrupts masked */
288 outb(IO_ICU2, 0x0a); /* default to IRR on read */
289 }
290
291
292 /* XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX */
293
294 int
295 config_isadev(isdp, mp)
296 struct isa_device *isdp;
297 u_int *mp;
298 {
299 if (isdp->id_irq) {
300 int intrno;
301
302 intrno = ffs(isdp->id_irq)-1;
303 setidt(ICU_OFFSET+intrno, isdp->id_intr,
304 SDT_SYS386IGT, SEL_KPL);
305 if(mp)
306 INTRMASK(*mp,isdp->id_irq);
307 INTREN(isdp->id_irq);
308 }
309 }
310
311
312 /* region of physical memory known to be contiguous */
313 vm_offset_t isaphysmem;
314 static caddr_t bouncebuf[8]; /* XXX */
315 static caddr_t bounced[8]; /* XXX */
316 static vm_size_t bouncesize[8]; /* XXX */
317 #define MAXDMASZ 512 /* XXX */
318
319 /* high byte of address is stored in this port for i-th dma channel */
320 static short dmapageport[8] =
321 { 0x87, 0x83, 0x81, 0x82, 0x8f, 0x8b, 0x89, 0x8a };
322
323 /*
324 * isa_dmacascade(): program 8237 DMA controller channel to accept
325 * external dma control by a board.
326 */
327 void
328 at_dma_cascade(chan)
329 unsigned chan;
330 {
331 #ifdef DEBUG
332 if (chan > 7)
333 panic("at_dma_cascade: impossible request");
334 #endif
335
336 /* set dma channel mode, and set dma channel mode */
337 if ((chan & 4) == 0) {
338 outb(DMA1_MODE, DMA37MD_CASCADE | chan);
339 outb(DMA1_SMSK, chan);
340 } else {
341 outb(DMA2_MODE, DMA37MD_CASCADE | (chan & 3));
342 outb(DMA2_SMSK, chan & 3);
343 }
344 }
345
346 /*
347 * at_dma(): program 8237 DMA controller channel, avoid page alignment
348 * problems by using a bounce buffer.
349 */
350 void
351 at_dma(flags, addr, nbytes, chan)
352 int read;
353 caddr_t addr;
354 vm_size_t nbytes;
355 unsigned chan;
356 {
357 vm_offset_t phys;
358 int waport;
359 caddr_t newaddr;
360
361 ppp if ( chan > 7
362 || (chan < 4 && nbytes > (1<<16))
363 || (chan >= 4 && (nbytes > (1<<17) || (u_int)addr & 1)))
364 panic("isa_dmastart: impossible request");
365
366 if (at_dma_rangecheck(addr, nbytes, chan)) {
367 panic("bounce buffers don't work yet\n");
368 /* XXX totally braindead; NBPG is not enough */
369 if (bouncebuf[chan] == 0)
370 bouncebuf[chan] =
371 /*(caddr_t)malloc(MAXDMASZ, M_TEMP, M_WAITOK);*/
372 (caddr_t) isaphysmem + NBPG*chan;
373 bouncesize[chan] = nbytes;
374 newaddr = bouncebuf[chan];
375 /* copy bounce buffer on write */
376 if (!read)
377 bcopy(addr, newaddr, nbytes);
378 else
379 bounced[chan] = addr;
380 addr = newaddr;
381 }
382
383 /* translate to physical */
384 phys = pmap_extract(pmap_kernel(), (vm_offset_t)addr);
385
386 if ((chan & 4) == 0) {
387 /*
388 * Program one of DMA channels 0..3. These are
389 * byte mode channels.
390 */
391 /* set dma channel mode, and reset address ff */
392 if (read)
393 outb(DMA1_MODE, DMA37MD_SINGLE|DMA37MD_WRITE|chan);
394 else
395 outb(DMA1_MODE, DMA37MD_SINGLE|DMA37MD_READ|chan);
396 outb(DMA1_FFC, 0);
397
398 /* send start address */
399 waport = DMA1_CHN(chan);
400 outb(waport, phys);
401 outb(waport, phys>>8);
402 outb(dmapageport[chan], phys>>16);
403
404 /* send count */
405 outb(waport + 1, --nbytes);
406 outb(waport + 1, nbytes>>8);
407
408 /* unmask channel */
409 outb(DMA1_SMSK, chan);
410 } else {
411 /*
412 * Program one of DMA channels 4..7. These are
413 * word mode channels.
414 */
415 /* set dma channel mode, and reset address ff */
416 if (read)
417 outb(DMA2_MODE, DMA37MD_SINGLE|DMA37MD_WRITE|(chan&3));
418 else
419 outb(DMA2_MODE, DMA37MD_SINGLE|DMA37MD_READ|(chan&3));
420 outb(DMA2_FFC, 0);
421
422 /* send start address */
423 waport = DMA2_CHN(chan - 4);
424 outb(waport, phys>>1);
425 outb(waport, phys>>9);
426 outb(dmapageport[chan], phys>>16);
427
428 /* send count */
429 nbytes >>= 1;
430 outb(waport + 2, --nbytes);
431 outb(waport + 2, nbytes>>8);
432
433 /* unmask channel */
434 outb(DMA2_SMSK, chan & 3);
435 }
436 }
437
438 void
439 at_dma_terminate(int flags, caddr_t addr, int nbytes, int chan)
440 {
441
442 if (bounced[chan]) {
443 bcopy(bouncebuf[chan], bounced[chan], bouncesize[chan]);
444 bounced[chan] = 0;
445 }
446 }
447
448 /*
449 * Check for problems with the address range of a DMA transfer
450 * (non-contiguous physical pages, outside of bus address space,
451 * crossing DMA page boundaries).
452 * Return true if special handling needed.
453 */
454
455 int
456 at_dma_rangecheck(caddr_t va, unsigned length, unsigned chan) {
457 vm_offset_t phys, priorpage = 0, endva;
458 u_int dma_pgmsk = (chan & 4) ? ~(128*1024-1) : ~(64*1024-1);
459
460 endva = (vm_offset_t)round_page(va + length);
461 for (; va < (caddr_t) endva ; va += NBPG) {
462 phys = trunc_page(pmap_extract(pmap_kernel(), (vm_offset_t)va));
463 if (phys == 0)
464 panic("isa_dmacheck: no physical page present");
465 if (phys > physmem)
466 return (1);
467 if (priorpage) {
468 if (priorpage + NBPG != phys)
469 return (1);
470 /* check if crossing a DMA page boundary */
471 if (((u_int)priorpage ^ (u_int)phys) & dma_pgmsk)
472 return (1);
473 }
474 priorpage = phys;
475 }
476 return (0);
477 }
478
479 /* head of queue waiting for physmem to become available */
480 struct buf isa_physmemq;
481
482 /* blocked waiting for resource to become free for exclusive use */
483 static isaphysmemflag;
484 /* if waited for and call requested when free (B_CALL) */
485 static void (*isaphysmemunblock)(); /* XXX needs to be a list */
486
487 /*
488 * Allocate contiguous physical memory for transfer, returning
489 * a *virtual* address to region. May block waiting for resource.
490 * (assumed to be called at splbio())
491 */
492 caddr_t
493 isa_allocphysmem(caddr_t va, unsigned length, void (*func)()) {
494
495 isaphysmemunblock = func;
496 while (isaphysmemflag & B_BUSY) {
497 isaphysmemflag |= B_WANTED;
498 sleep((caddr_t)&isaphysmemflag, PRIBIO);
499 }
500 isaphysmemflag |= B_BUSY;
501
502 return((caddr_t)isaphysmem);
503 }
504
505 /*
506 * Free contiguous physical memory used for transfer.
507 * (assumed to be called at splbio())
508 */
509 void
510 isa_freephysmem(caddr_t va, unsigned length) {
511
512 isaphysmemflag &= ~B_BUSY;
513 if (isaphysmemflag & B_WANTED) {
514 isaphysmemflag &= B_WANTED;
515 wakeup((caddr_t)&isaphysmemflag);
516 if (isaphysmemunblock)
517 (*isaphysmemunblock)();
518 }
519 }
520
521 /*
522 * Handle a NMI, possibly a machine check.
523 * return true to panic system, false to ignore.
524 */
525 int
526 isa_nmi(cd) {
527
528 log(LOG_CRIT, "\nNMI port 61 %x, port 70 %x\n", inb(0x61), inb(0x70));
529 return(0);
530 }
531
532 /*
533 * Caught a stray interrupt, notify
534 */
535 void
536 isa_strayintr(d)
537 int d;
538 {
539
540 /*
541 * Stray level 7 interrupts occur when someone raises an interrupt
542 * and then drops it before the CPU acknowledges it. This means
543 * either the device is screwed or something is cli'ing too long.
544 */
545 extern u_long intrcnt_stray;
546
547 intrcnt_stray++;
548 if (intrcnt_stray <= 5)
549 log(LOG_ERR, "stray interrupt %d\n", d);
550 if (intrcnt_stray == 5)
551 log(LOG_CRIT,"too many stray interrupts; stopped logging\n");
552 }
553
554 static beeping;
555 static void
556 sysbeepstop(int f)
557 {
558 int s = splhigh();
559
560 /* disable counter 2 */
561 disable_intr();
562 outb(PITAUX_PORT, inb(PITAUX_PORT) & ~PIT_SPKR);
563 enable_intr();
564 if (f)
565 timeout((timeout_t)sysbeepstop, (caddr_t)0, f);
566 else
567 beeping = 0;
568
569 splx(s);
570 }
571
572 void
573 sysbeep(int pitch, int period)
574 {
575 int s = splhigh();
576 static int last_pitch, last_period;
577
578 if (beeping) {
579 untimeout((timeout_t)sysbeepstop, (caddr_t)(last_period/2));
580 untimeout((timeout_t)sysbeepstop, (caddr_t)0);
581 }
582 if (!beeping || last_pitch != pitch) {
583 /*
584 * XXX - move timer stuff to clock.c.
585 */
586 disable_intr();
587 outb(TIMER_MODE, TIMER_SEL2|TIMER_16BIT|TIMER_SQWAVE);
588 outb(TIMER_CNTR2, TIMER_DIV(pitch)%256);
589 outb(TIMER_CNTR2, TIMER_DIV(pitch)/256);
590 outb(PITAUX_PORT, inb(PITAUX_PORT) | PIT_SPKR); /* enable counter 2 */
591 enable_intr();
592 }
593 last_pitch = pitch;
594 beeping = last_period = period;
595 timeout((timeout_t)sysbeepstop, (caddr_t)(period/2), period);
596
597 splx(s);
598 }
599
600 /*
601 * Pass command to keyboard controller (8042)
602 */
603 unsigned
604 kbc_8042cmd(int val)
605 {
606 while (inb(KBSTATP)&KBS_IBF);
607 if (val) outb(KBCMDP, val);
608 while (inb(KBSTATP)&KBS_IBF);
609 return (inb(KBDATAP));
610 }
611
612 /*
613 * find an ISA device in a given isa_devtab_* table, given
614 * the table to search, the expected id_driver entry, and the unit number.
615 *
616 * this function is defined in isa_device.h, and this location is debatable;
617 * i put it there because it's useless w/o, and directly operates on
618 * the other stuff in that file.
619 *
620 */
621
622 struct isa_device *find_isadev(table, driverp, unit)
623 struct isa_device *table;
624 struct isa_driver *driverp;
625 int unit;
626 {
627 if (driverp == NULL) /* sanity check */
628 return NULL;
629
630 while ((table->id_driver != driverp) || (table->id_unit != unit)) {
631 if (table->id_driver == 0)
632 return NULL;
633
634 table++;
635 }
636
637 return table;
638 }
639
640 /*
641 * Return nonzero if a (masked) irq is pending for a given device.
642 */
643 int
644 isa_irq_pending(dvp)
645 struct isa_device *dvp;
646 {
647 unsigned id_irq;
648
649 id_irq = (unsigned short) dvp->id_irq; /* XXX silly type in struct */
650 if (id_irq & 0xff)
651 return (inb(IO_ICU1) & id_irq);
652 return (inb(IO_ICU2) & (id_irq >> 8));
653 }
654