isa.c revision 1.30 1 /*-
2 * Copyright (c) 1991 The Regents of the University of California.
3 * All rights reserved.
4 *
5 * This code is derived from software contributed to Berkeley by
6 * William Jolitz.
7 *
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions
10 * are met:
11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the distribution.
16 * 3. All advertising materials mentioning features or use of this software
17 * must display the following acknowledgement:
18 * This product includes software developed by the University of
19 * California, Berkeley and its contributors.
20 * 4. Neither the name of the University nor the names of its contributors
21 * may be used to endorse or promote products derived from this software
22 * without specific prior written permission.
23 *
24 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
25 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
27 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
30 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
31 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
32 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
33 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
34 * SUCH DAMAGE.
35 *
36 * from: @(#)isa.c 7.2 (Berkeley) 5/13/91
37 * $Id: isa.c,v 1.30 1993/12/17 00:11:48 mycroft Exp $
38 */
39
40 /*
41 * code to manage AT bus
42 *
43 * 92/08/18 Frank P. MacLachlan (fpm (at) crash.cts.com):
44 * Fixed uninitialized variable problem and added code to deal
45 * with DMA page boundaries in isa_dmarangecheck(). Fixed word
46 * mode DMA count compution and reorganized DMA setup code in
47 * isa_dmastart()
48 */
49
50 #include "param.h"
51 #include "systm.h"
52 #include "conf.h"
53 #include "file.h"
54 #include "buf.h"
55 #include "uio.h"
56 #include "syslog.h"
57 #include "malloc.h"
58 #include "machine/segments.h"
59 #include "machine/cpufunc.h"
60 #include "vm/vm.h"
61 #include "i386/isa/isa_device.h"
62 #include "i386/isa/isa.h"
63 #include "i386/isa/icu.h"
64 #include "i386/isa/ic/i8237.h"
65 #include "i386/isa/ic/i8042.h"
66 #include "i386/isa/timerreg.h"
67 #include "i386/isa/spkr_reg.h"
68
69 /* sorry, has to be here, no place else really suitable */
70 #include "machine/pc/display.h"
71 u_short *Crtat = (u_short *)MONO_BUF;
72
73 /*
74 ** Register definitions for DMA controller 1 (channels 0..3):
75 */
76 #define DMA1_CHN(c) (IO_DMA1 + 1*(2*(c))) /* addr reg for channel c */
77 #define DMA1_SMSK (IO_DMA1 + 1*10) /* single mask register */
78 #define DMA1_MODE (IO_DMA1 + 1*11) /* mode register */
79 #define DMA1_FFC (IO_DMA1 + 1*12) /* clear first/last FF */
80
81 /*
82 ** Register definitions for DMA controller 2 (channels 4..7):
83 */
84 #define DMA2_CHN(c) (IO_DMA2 + 2*(2*(c))) /* addr reg for channel c */
85 #define DMA2_SMSK (IO_DMA2 + 2*10) /* single mask register */
86 #define DMA2_MODE (IO_DMA2 + 2*11) /* mode register */
87 #define DMA2_FFC (IO_DMA2 + 2*12) /* clear first/last FF */
88
89 int config_isadev(struct isa_device *, u_int *);
90 void config_attach(struct isa_driver *, struct isa_device *);
91 static void sysbeepstop(int);
92
93 /*
94 * Configure all ISA devices
95 */
96 void
97 isa_configure()
98 {
99 struct isa_device *dvp;
100 struct isa_driver *dp;
101
102 splhigh();
103 INTREN(IRQ_SLAVE);
104 enable_intr();
105
106 for (dvp = isa_devtab_tty; config_isadev(dvp,&ttymask); dvp++)
107 ;
108 for (dvp = isa_devtab_bio; config_isadev(dvp,&biomask); dvp++)
109 ;
110 for (dvp = isa_devtab_net; config_isadev(dvp,&netmask); dvp++)
111 ;
112 for (dvp = isa_devtab_null; config_isadev(dvp, (u_int *) NULL); dvp++)
113 ;
114
115 printf("biomask %x ttymask %x netmask %x\n",
116 biomask, ttymask, netmask);
117
118 biomask |= astmask;
119 ttymask |= astmask;
120 netmask |= astmask;
121 impmask = netmask | ttymask;
122
123 spl0();
124 }
125
126 /*
127 * Configure an ISA device.
128 */
129 int
130 config_isadev(isdp, mp)
131 struct isa_device *isdp;
132 u_int *mp;
133 {
134 struct isa_driver *dp;
135
136 if (dp = isdp->id_driver) {
137 if (isdp->id_maddr) {
138 extern u_int atdevbase;
139
140 isdp->id_maddr -= 0xa0000; /* XXX should be a define */
141 isdp->id_maddr += atdevbase;
142 }
143 isdp->id_alive = (*dp->probe)(isdp);
144 if (isdp->id_irq == (u_short)-1)
145 isdp->id_alive = 0;
146 /*
147 * Only print the I/O address range if id_alive != -1
148 * Right now this is a temporary fix just for the new
149 * NPX code so that if it finds a 486 that can use trap
150 * 16 it will not report I/O addresses.
151 * Rod Grimes 04/26/94
152 *
153 * XXX -- cgd
154 */
155 if (isdp->id_alive) {
156 printf("%s%d", dp->name, isdp->id_unit);
157 if (isdp->id_iobase) {
158 printf(" at 0x%x", isdp->id_iobase);
159 if ((isdp->id_iobase + isdp->id_alive - 1) !=
160 isdp->id_iobase)
161 printf("-0x%x", isdp->id_iobase +
162 isdp->id_alive - 1);
163 }
164 if (isdp->id_irq != 0)
165 printf(" irq %d", ffs(isdp->id_irq)-1);
166 if (isdp->id_drq != -1)
167 printf(" drq %d", isdp->id_drq);
168 if (isdp->id_maddr != 0)
169 printf(" maddr 0x%x", kvtop(isdp->id_maddr));
170 if (isdp->id_msize != 0)
171 printf("-0x%x", kvtop(isdp->id_maddr) +
172 isdp->id_msize - 1);
173 if (isdp->id_flags != 0)
174 printf(" flags 0x%x", isdp->id_flags);
175 printf(" on isa\n");
176
177 config_attach(dp, isdp);
178
179 if (isdp->id_irq) {
180 int intrno;
181
182 intrno = ffs(isdp->id_irq)-1;
183 setidt(ICU_OFFSET+intrno, isdp->id_intr,
184 SDT_SYS386IGT, SEL_KPL);
185 if(mp)
186 INTRMASK(*mp,isdp->id_irq);
187 INTREN(isdp->id_irq);
188 }
189 }
190 return (1);
191 } else return(0);
192 }
193
194 void
195 config_attach(struct isa_driver *dp, struct isa_device *isdp)
196 {
197 extern struct isa_device isa_subdev[];
198 struct isa_device *dvp;
199
200 if(isdp->id_masunit==-1) {
201 (void)(*dp->attach)(isdp);
202 return;
203 }
204
205 if(isdp->id_masunit==0) {
206 for(dvp = isa_subdev; dvp->id_driver; dvp++) {
207 if (dvp->id_driver != dp)
208 continue;
209 if (dvp->id_masunit != isdp->id_unit)
210 continue;
211 if (dvp->id_physid == -1)
212 continue;
213 dvp->id_alive = (*dp->attach)(dvp);
214 }
215 for(dvp = isa_subdev; dvp->id_driver; dvp++) {
216 if (dvp->id_driver != dp)
217 continue;
218 if (dvp->id_masunit != isdp->id_unit)
219 continue;
220 if (dvp->id_physid != -1)
221 continue;
222 dvp->id_alive = (*dp->attach)(dvp);
223 }
224 return;
225 }
226 printf("id_masunit has weird value\n");
227 }
228
229
230 #define IDTVEC(name) __CONCAT(X,name)
231 /* default interrupt vector table entries */
232 extern IDTVEC(intr0), IDTVEC(intr1), IDTVEC(intr2), IDTVEC(intr3),
233 IDTVEC(intr4), IDTVEC(intr5), IDTVEC(intr6), IDTVEC(intr7),
234 IDTVEC(intr8), IDTVEC(intr9), IDTVEC(intr10), IDTVEC(intr11),
235 IDTVEC(intr12), IDTVEC(intr13), IDTVEC(intr14), IDTVEC(intr15);
236
237 static *defvec[16] = {
238 &IDTVEC(intr0), &IDTVEC(intr1), &IDTVEC(intr2), &IDTVEC(intr3),
239 &IDTVEC(intr4), &IDTVEC(intr5), &IDTVEC(intr6), &IDTVEC(intr7),
240 &IDTVEC(intr8), &IDTVEC(intr9), &IDTVEC(intr10), &IDTVEC(intr11),
241 &IDTVEC(intr12), &IDTVEC(intr13), &IDTVEC(intr14), &IDTVEC(intr15) };
242
243 /* out of range default interrupt vector gate entry */
244 extern IDTVEC(intrdefault);
245
246 /*
247 * Fill in default interrupt table (in case of spuruious interrupt
248 * during configuration of kernel, setup interrupt control unit
249 */
250 void
251 isa_defaultirq() {
252 int i;
253
254 /* icu vectors */
255 for (i = NRSVIDT ; i < NRSVIDT+ICU_LEN ; i++)
256 setidt(i, defvec[i], SDT_SYS386IGT, SEL_KPL);
257
258 /* out of range vectors */
259 for (i = NRSVIDT; i < NIDT; i++)
260 setidt(i, &IDTVEC(intrdefault), SDT_SYS386IGT, SEL_KPL);
261
262 /* initialize 8259's */
263 outb(IO_ICU1, 0x11); /* reset; program device, four bytes */
264 outb(IO_ICU1+1, NRSVIDT); /* starting at this vector index */
265 outb(IO_ICU1+1, 1<<2); /* slave on line 2 */
266 #ifdef AUTO_EOI_1
267 outb(IO_ICU1+1, 2 | 1); /* auto EOI, 8086 mode */
268 #else
269 outb(IO_ICU1+1, 1); /* 8086 mode */
270 #endif
271 outb(IO_ICU1+1, 0xff); /* leave interrupts masked */
272 outb(IO_ICU1, 0x0a); /* default to IRR on read */
273 #ifdef REORDER_IRQ
274 outb(IO_ICU1, 0xc0 | (3 - 1)); /* pri order 3-7, 0-2 (com2 first) */
275 #endif
276
277 outb(IO_ICU2, 0x11); /* reset; program device, four bytes */
278 outb(IO_ICU2+1, NRSVIDT+8); /* staring at this vector index */
279 outb(IO_ICU2+1,2); /* my slave id is 2 */
280 #ifdef AUTO_EOI_2
281 outb(IO_ICU2+1, 2 | 1); /* auto EOI, 8086 mode */
282 #else
283 outb(IO_ICU2+1,1); /* 8086 mode */
284 #endif
285 outb(IO_ICU2+1, 0xff); /* leave interrupts masked */
286 outb(IO_ICU2, 0x0a); /* default to IRR on read */
287 }
288
289 /* region of physical memory known to be contiguous */
290 vm_offset_t isaphysmem;
291 static caddr_t dma_bounce[8]; /* XXX */
292 static char bounced[8]; /* XXX */
293 #define MAXDMASZ 512 /* XXX */
294
295 /* high byte of address is stored in this port for i-th dma channel */
296 static short dmapageport[8] =
297 { 0x87, 0x83, 0x81, 0x82, 0x8f, 0x8b, 0x89, 0x8a };
298
299 /*
300 * isa_dmacascade(): program 8237 DMA controller channel to accept
301 * external dma control by a board.
302 */
303 void
304 isa_dmacascade(unsigned chan)
305 {
306 if (chan > 7)
307 panic("isa_dmacascade: impossible request");
308
309 /* set dma channel mode, and set dma channel mode */
310 if ((chan & 4) == 0) {
311 outb(DMA1_MODE, DMA37MD_CASCADE | chan);
312 outb(DMA1_SMSK, chan);
313 } else {
314 outb(DMA2_MODE, DMA37MD_CASCADE | (chan & 3));
315 outb(DMA2_SMSK, chan & 3);
316 }
317 }
318
319 /*
320 * isa_dmastart(): program 8237 DMA controller channel, avoid page alignment
321 * problems by using a bounce buffer.
322 */
323 void
324 isa_dmastart(int flags, caddr_t addr, unsigned nbytes, unsigned chan)
325 { vm_offset_t phys;
326 int waport;
327 caddr_t newaddr;
328
329 if ( chan > 7
330 || (chan < 4 && nbytes > (1<<16))
331 || (chan >= 4 && (nbytes > (1<<17) || (u_int)addr & 1)))
332 panic("isa_dmastart: impossible request");
333
334 if (isa_dmarangecheck(addr, nbytes, chan)) {
335 if (dma_bounce[chan] == 0)
336 dma_bounce[chan] =
337 /*(caddr_t)malloc(MAXDMASZ, M_TEMP, M_WAITOK);*/
338 (caddr_t) isaphysmem + NBPG*chan;
339 bounced[chan] = 1;
340 newaddr = dma_bounce[chan];
341 *(int *) newaddr = 0; /* XXX */
342
343 /* copy bounce buffer on write */
344 if (!(flags & B_READ))
345 bcopy(addr, newaddr, nbytes);
346 addr = newaddr;
347 }
348
349 /* translate to physical */
350 phys = pmap_extract(pmap_kernel(), (vm_offset_t)addr);
351
352 if ((chan & 4) == 0) {
353 /*
354 * Program one of DMA channels 0..3. These are
355 * byte mode channels.
356 */
357 /* set dma channel mode, and reset address ff */
358 if (flags & B_READ)
359 outb(DMA1_MODE, DMA37MD_SINGLE|DMA37MD_WRITE|chan);
360 else
361 outb(DMA1_MODE, DMA37MD_SINGLE|DMA37MD_READ|chan);
362 outb(DMA1_FFC, 0);
363
364 /* send start address */
365 waport = DMA1_CHN(chan);
366 outb(waport, phys);
367 outb(waport, phys>>8);
368 outb(dmapageport[chan], phys>>16);
369
370 /* send count */
371 outb(waport + 1, --nbytes);
372 outb(waport + 1, nbytes>>8);
373
374 /* unmask channel */
375 outb(DMA1_SMSK, chan);
376 } else {
377 /*
378 * Program one of DMA channels 4..7. These are
379 * word mode channels.
380 */
381 /* set dma channel mode, and reset address ff */
382 if (flags & B_READ)
383 outb(DMA2_MODE, DMA37MD_SINGLE|DMA37MD_WRITE|(chan&3));
384 else
385 outb(DMA2_MODE, DMA37MD_SINGLE|DMA37MD_READ|(chan&3));
386 outb(DMA2_FFC, 0);
387
388 /* send start address */
389 waport = DMA2_CHN(chan - 4);
390 outb(waport, phys>>1);
391 outb(waport, phys>>9);
392 outb(dmapageport[chan], phys>>16);
393
394 /* send count */
395 nbytes >>= 1;
396 outb(waport + 2, --nbytes);
397 outb(waport + 2, nbytes>>8);
398
399 /* unmask channel */
400 outb(DMA2_SMSK, chan & 3);
401 }
402 }
403
404 void
405 isa_dmadone(int flags, caddr_t addr, int nbytes, int chan)
406 {
407
408 /* copy bounce buffer on read */
409 /*if ((flags & (B_PHYS|B_READ)) == (B_PHYS|B_READ))*/
410 if (bounced[chan]) {
411 bcopy(dma_bounce[chan], addr, nbytes);
412 bounced[chan] = 0;
413 }
414 }
415
416 /*
417 * Check for problems with the address range of a DMA transfer
418 * (non-contiguous physical pages, outside of bus address space,
419 * crossing DMA page boundaries).
420 * Return true if special handling needed.
421 */
422
423 int
424 isa_dmarangecheck(caddr_t va, unsigned length, unsigned chan) {
425 vm_offset_t phys, priorpage = 0, endva;
426 u_int dma_pgmsk = (chan & 4) ? ~(128*1024-1) : ~(64*1024-1);
427
428 endva = (vm_offset_t)round_page(va + length);
429 for (; va < (caddr_t) endva ; va += NBPG) {
430 phys = trunc_page(pmap_extract(pmap_kernel(), (vm_offset_t)va));
431 #define ISARAM_END RAM_END
432 if (phys == 0)
433 panic("isa_dmacheck: no physical page present");
434 if (phys > ISARAM_END)
435 return (1);
436 if (priorpage) {
437 if (priorpage + NBPG != phys)
438 return (1);
439 /* check if crossing a DMA page boundary */
440 if (((u_int)priorpage ^ (u_int)phys) & dma_pgmsk)
441 return (1);
442 }
443 priorpage = phys;
444 }
445 return (0);
446 }
447
448 /* head of queue waiting for physmem to become available */
449 struct buf isa_physmemq;
450
451 /* blocked waiting for resource to become free for exclusive use */
452 static isaphysmemflag;
453 /* if waited for and call requested when free (B_CALL) */
454 static void (*isaphysmemunblock)(); /* needs to be a list */
455
456 /*
457 * Allocate contiguous physical memory for transfer, returning
458 * a *virtual* address to region. May block waiting for resource.
459 * (assumed to be called at splbio())
460 */
461 caddr_t
462 isa_allocphysmem(caddr_t va, unsigned length, void (*func)()) {
463
464 isaphysmemunblock = func;
465 while (isaphysmemflag & B_BUSY) {
466 isaphysmemflag |= B_WANTED;
467 sleep((caddr_t)&isaphysmemflag, PRIBIO);
468 }
469 isaphysmemflag |= B_BUSY;
470
471 return((caddr_t)isaphysmem);
472 }
473
474 /*
475 * Free contiguous physical memory used for transfer.
476 * (assumed to be called at splbio())
477 */
478 void
479 isa_freephysmem(caddr_t va, unsigned length) {
480
481 isaphysmemflag &= ~B_BUSY;
482 if (isaphysmemflag & B_WANTED) {
483 isaphysmemflag &= B_WANTED;
484 wakeup((caddr_t)&isaphysmemflag);
485 if (isaphysmemunblock)
486 (*isaphysmemunblock)();
487 }
488 }
489
490 /*
491 * Handle a NMI, possibly a machine check.
492 * return true to panic system, false to ignore.
493 */
494 int
495 isa_nmi(cd) {
496
497 log(LOG_CRIT, "\nNMI port 61 %x, port 70 %x\n", inb(0x61), inb(0x70));
498 return(0);
499 }
500
501 /*
502 * Caught a stray interrupt, notify
503 */
504 void
505 isa_strayintr(d) {
506
507 /* DON'T BOTHER FOR NOW! */
508 /* for some reason, we get bursts of intr #7, even if not enabled! */
509 /*
510 * Well the reason you got bursts of intr #7 is because someone
511 * raised an interrupt line and dropped it before the 8259 could
512 * prioritize it. This is documented in the intel data book. This
513 * means you have BAD hardware! I have changed this so that only
514 * the first 5 get logged, then it quits logging them, and puts
515 * out a special message. rgrimes 3/25/1993
516 */
517 extern u_long intrcnt_stray;
518
519 intrcnt_stray++;
520 if (intrcnt_stray <= 5)
521 log(LOG_ERR,"ISA strayintr %x\n", d);
522 if (intrcnt_stray == 5)
523 log(LOG_CRIT,"Too many ISA strayintr not logging any more\n");
524 }
525
526 /*
527 * Wait "n" microseconds.
528 * Relies on timer 1 counting down from (TIMER_FREQ / hz) at
529 * (1 * TIMER_FREQ) Hz.
530 * Note: timer had better have been programmed before this is first used!
531 * (Note that we use `rate generator' mode, which counts at 1:1; `square
532 * wave' mode counts at 2:1).
533 */
534 #define CF (1 * TIMER_FREQ)
535
536 extern int hz; /* XXX - should be elsewhere */
537
538 void
539 DELAY(n)
540 int n;
541 {
542 int counter_limit;
543 int prev_tick;
544 int tick;
545 int ticks_left;
546 int sec;
547 int usec;
548
549 #ifdef DELAYDEBUG
550 int gettick_calls = 1;
551 int n1;
552 static int state = 0;
553
554 if (state == 0) {
555 state = 1;
556 for (n1 = 1; n1 <= 10000000; n1 *= 10)
557 DELAY(n1);
558 state = 2;
559 }
560 if (state == 1)
561 printf("DELAY(%d)...", n);
562 #endif
563
564 /*
565 * Read the counter first, so that the rest of the setup overhead is
566 * counted. Guess the initial overhead is 20 usec (on most systems it
567 * takes about 1.5 usec for each of the i/o's in gettick(). The loop
568 * takes about 6 usec on a 486/33 and 13 usec on a 386/20. The
569 * multiplications and divisions to scale the count take a while).
570 */
571 prev_tick = gettick();
572 n -= 20;
573
574 /*
575 * Calculate (n * (CF / 1e6)) without using floating point and without
576 * any avoidable overflows.
577 */
578 sec = n / 1000000;
579 usec = n - sec * 1000000;
580 ticks_left = sec * CF
581 + usec * (CF / 1000000)
582 + usec * ((CF % 1000000) / 1000) / 1000
583 + usec * (CF % 1000) / 1000000;
584
585 counter_limit = TIMER_FREQ / hz;
586 while (ticks_left > 0) {
587 tick = gettick();
588 #ifdef DELAYDEBUG
589 ++gettick_calls;
590 #endif
591 if (tick > prev_tick)
592 ticks_left -= prev_tick - (tick - counter_limit);
593 else
594 ticks_left -= prev_tick - tick;
595 prev_tick = tick;
596 }
597 #ifdef DELAYDEBUG
598 if (state == 1)
599 printf(" %d calls to gettick() at %d usec each\n",
600 gettick_calls, (n + 5) / gettick_calls);
601 #endif
602 }
603
604 int
605 gettick() {
606 int high;
607 int low;
608
609 /*
610 * Protect ourself against interrupts.
611 */
612 disable_intr();
613 /*
614 * Latch the count for 'timer' (cc00xxxx, c = counter, x = any).
615 */
616 outb(TIMER_MODE, TIMER_SEL0 | TIMER_LATCH);
617 low = inb(TIMER_CNTR0);
618 high = inb(TIMER_CNTR0);
619 enable_intr();
620 return ((high << 8) | low);
621 }
622
623 static beeping;
624 static void
625 sysbeepstop(int f)
626 {
627 int s = splhigh();
628
629 /* disable counter 2 */
630 disable_intr();
631 outb(PITAUX_PORT, inb(PITAUX_PORT) & ~PIT_SPKR);
632 enable_intr();
633 if (f)
634 timeout((timeout_t)sysbeepstop, (caddr_t)0, f);
635 else
636 beeping = 0;
637
638 splx(s);
639 }
640
641 void
642 sysbeep(int pitch, int period)
643 {
644 int s = splhigh();
645 static int last_pitch, last_period;
646
647 if (beeping) {
648 untimeout((timeout_t)sysbeepstop, (caddr_t)(last_period/2));
649 untimeout((timeout_t)sysbeepstop, (caddr_t)0);
650 }
651 if (!beeping || last_pitch != pitch) {
652 /*
653 * XXX - move timer stuff to clock.c.
654 */
655 disable_intr();
656 outb(TIMER_MODE, TIMER_SEL2|TIMER_16BIT|TIMER_SQWAVE);
657 outb(TIMER_CNTR2, TIMER_DIV(pitch)%256);
658 outb(TIMER_CNTR2, TIMER_DIV(pitch)/256);
659 outb(PITAUX_PORT, inb(PITAUX_PORT) | PIT_SPKR); /* enable counter 2 */
660 enable_intr();
661 }
662 last_pitch = pitch;
663 beeping = last_period = period;
664 timeout((timeout_t)sysbeepstop, (caddr_t)(period/2), period);
665
666 splx(s);
667 }
668
669 /*
670 * Pass command to keyboard controller (8042)
671 */
672 unsigned
673 kbc_8042cmd(int val)
674 {
675 while (inb(KBSTATP)&KBS_IBF);
676 if (val) outb(KBCMDP, val);
677 while (inb(KBSTATP)&KBS_IBF);
678 return (inb(KBDATAP));
679 }
680
681 /*
682 * find an ISA device in a given isa_devtab_* table, given
683 * the table to search, the expected id_driver entry, and the unit number.
684 *
685 * this function is defined in isa_device.h, and this location is debatable;
686 * i put it there because it's useless w/o, and directly operates on
687 * the other stuff in that file.
688 *
689 */
690
691 struct isa_device *find_isadev(table, driverp, unit)
692 struct isa_device *table;
693 struct isa_driver *driverp;
694 int unit;
695 {
696 if (driverp == NULL) /* sanity check */
697 return NULL;
698
699 while ((table->id_driver != driverp) || (table->id_unit != unit)) {
700 if (table->id_driver == 0)
701 return NULL;
702
703 table++;
704 }
705
706 return table;
707 }
708
709 /*
710 * Return nonzero if a (masked) irq is pending for a given device.
711 */
712 int
713 isa_irq_pending(dvp)
714 struct isa_device *dvp;
715 {
716 unsigned id_irq;
717
718 id_irq = (unsigned short) dvp->id_irq; /* XXX silly type in struct */
719 if (id_irq & 0xff)
720 return (inb(IO_ICU1) & id_irq);
721 return (inb(IO_ICU2) & (id_irq >> 8));
722 }
723