isa.c revision 1.36
1 /*- 2 * Copyright (c) 1991 The Regents of the University of California. 3 * All rights reserved. 4 * 5 * This code is derived from software contributed to Berkeley by 6 * William Jolitz. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 3. All advertising materials mentioning features or use of this software 17 * must display the following acknowledgement: 18 * This product includes software developed by the University of 19 * California, Berkeley and its contributors. 20 * 4. Neither the name of the University nor the names of its contributors 21 * may be used to endorse or promote products derived from this software 22 * without specific prior written permission. 23 * 24 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 25 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 27 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 30 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 31 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 32 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 33 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 34 * SUCH DAMAGE. 35 * 36 * from: @(#)isa.c 7.2 (Berkeley) 5/13/91 37 * $Id: isa.c,v 1.36 1994/02/22 23:39:32 mycroft Exp $ 38 */ 39 40 /* 41 * code to manage AT bus 42 * 43 * 92/08/18 Frank P. MacLachlan (fpm (at) crash.cts.com): 44 * Fixed uninitialized variable problem and added code to deal 45 * with DMA page boundaries in isa_dmarangecheck(). Fixed word 46 * mode DMA count compution and reorganized DMA setup code in 47 * isa_dmastart() 48 */ 49 50 #include <sys/param.h> 51 #include <sys/systm.h> 52 #include <sys/conf.h> 53 #include <sys/file.h> 54 #include <sys/buf.h> 55 #include <sys/uio.h> 56 #include <sys/syslog.h> 57 #include <sys/malloc.h> 58 59 #include <vm/vm.h> 60 61 #include <machine/segments.h> 62 #include <machine/pio.h> 63 #include <machine/cpufunc.h> 64 65 #include <i386/isa/isa_device.h> 66 #include <i386/isa/isa.h> 67 #include <i386/isa/icu.h> 68 #include <i386/isa/ic/i8237.h> 69 #include <i386/isa/ic/i8042.h> 70 #include <i386/isa/timerreg.h> 71 #include <i386/isa/spkr_reg.h> 72 73 /* sorry, has to be here, no place else really suitable */ 74 #include <machine/pc/display.h> 75 u_short *Crtat = (u_short *)MONO_BUF; 76 77 /* 78 ** Register definitions for DMA controller 1 (channels 0..3): 79 */ 80 #define DMA1_CHN(c) (IO_DMA1 + 1*(2*(c))) /* addr reg for channel c */ 81 #define DMA1_SMSK (IO_DMA1 + 1*10) /* single mask register */ 82 #define DMA1_MODE (IO_DMA1 + 1*11) /* mode register */ 83 #define DMA1_FFC (IO_DMA1 + 1*12) /* clear first/last FF */ 84 85 /* 86 ** Register definitions for DMA controller 2 (channels 4..7): 87 */ 88 #define DMA2_CHN(c) (IO_DMA2 + 2*(2*(c))) /* addr reg for channel c */ 89 #define DMA2_SMSK (IO_DMA2 + 2*10) /* single mask register */ 90 #define DMA2_MODE (IO_DMA2 + 2*11) /* mode register */ 91 #define DMA2_FFC (IO_DMA2 + 2*12) /* clear first/last FF */ 92 93 int config_isadev(struct isa_device *, u_int *); 94 void config_attach(struct isa_driver *, struct isa_device *); 95 static void sysbeepstop(int); 96 97 /* 98 * Configure all ISA devices 99 */ 100 void 101 isa_configure() 102 { 103 struct isa_device *dvp; 104 struct isa_driver *dp; 105 106 splhigh(); 107 INTREN(IRQ_SLAVE); 108 enable_intr(); 109 110 for (dvp = isa_devtab_tty; config_isadev(dvp, &ttymask); dvp++) 111 ; 112 for (dvp = isa_devtab_bio; config_isadev(dvp, &biomask); dvp++) 113 ; 114 for (dvp = isa_devtab_net; config_isadev(dvp, &netmask); dvp++) 115 ; 116 for (dvp = isa_devtab_null; config_isadev(dvp, (u_int *) NULL); dvp++) 117 ; 118 119 printf("biomask %x ttymask %x netmask %x\n", 120 biomask, ttymask, netmask); 121 122 clockmask |= astmask; 123 biomask |= astmask; 124 ttymask |= astmask; 125 netmask |= astmask; 126 impmask = netmask | ttymask; 127 128 spl0(); 129 } 130 131 /* 132 * Configure an ISA device. 133 */ 134 int 135 config_isadev(isdp, mp) 136 struct isa_device *isdp; 137 u_int *mp; 138 { 139 struct isa_driver *dp; 140 141 if (dp = isdp->id_driver) { 142 if (isdp->id_maddr) { 143 extern u_int atdevbase; 144 145 isdp->id_maddr -= 0xa0000; /* XXX should be a define */ 146 isdp->id_maddr += atdevbase; 147 } 148 isdp->id_alive = (*dp->probe)(isdp); 149 if (isdp->id_irq == (u_short)-1) 150 isdp->id_alive = 0; 151 /* 152 * Only print the I/O address range if id_alive != -1 153 * Right now this is a temporary fix just for the new 154 * NPX code so that if it finds a 486 that can use trap 155 * 16 it will not report I/O addresses. 156 * Rod Grimes 04/26/94 157 * 158 * XXX -- cgd 159 */ 160 if (isdp->id_alive) { 161 printf("%s%d", dp->name, isdp->id_unit); 162 if (isdp->id_iobase) { 163 printf(" at 0x%x", isdp->id_iobase); 164 if ((isdp->id_iobase + isdp->id_alive - 1) != 165 isdp->id_iobase) 166 printf("-0x%x", isdp->id_iobase + 167 isdp->id_alive - 1); 168 } 169 if (isdp->id_irq != 0) 170 printf(" irq %d", ffs(isdp->id_irq)-1); 171 if (isdp->id_drq != -1) 172 printf(" drq %d", isdp->id_drq); 173 if (isdp->id_maddr != 0) 174 printf(" maddr 0x%x", kvtop(isdp->id_maddr)); 175 if (isdp->id_msize != 0) 176 printf("-0x%x", kvtop(isdp->id_maddr) + 177 isdp->id_msize - 1); 178 if (isdp->id_flags != 0) 179 printf(" flags 0x%x", isdp->id_flags); 180 printf(" on isa\n"); 181 182 config_attach(dp, isdp); 183 184 if (isdp->id_irq) { 185 int intrno; 186 187 intrno = ffs(isdp->id_irq)-1; 188 setidt(ICU_OFFSET+intrno, isdp->id_intr, 189 SDT_SYS386IGT, SEL_KPL); 190 if(mp) 191 INTRMASK(*mp,isdp->id_irq); 192 INTREN(isdp->id_irq); 193 } 194 } 195 return (1); 196 } else return(0); 197 } 198 199 void 200 config_attach(struct isa_driver *dp, struct isa_device *isdp) 201 { 202 extern struct isa_device isa_subdev[]; 203 struct isa_device *dvp; 204 205 if(isdp->id_masunit==-1) { 206 (void)(*dp->attach)(isdp); 207 return; 208 } 209 210 if(isdp->id_masunit==0) { 211 for(dvp = isa_subdev; dvp->id_driver; dvp++) { 212 if (dvp->id_driver != dp) 213 continue; 214 if (dvp->id_masunit != isdp->id_unit) 215 continue; 216 if (dvp->id_physid == -1) 217 continue; 218 dvp->id_alive = (*dp->attach)(dvp); 219 } 220 for(dvp = isa_subdev; dvp->id_driver; dvp++) { 221 if (dvp->id_driver != dp) 222 continue; 223 if (dvp->id_masunit != isdp->id_unit) 224 continue; 225 if (dvp->id_physid != -1) 226 continue; 227 dvp->id_alive = (*dp->attach)(dvp); 228 } 229 return; 230 } 231 printf("id_masunit has weird value\n"); 232 } 233 234 235 #define IDTVEC(name) __CONCAT(X,name) 236 /* default interrupt vector table entries */ 237 extern IDTVEC(intr0), IDTVEC(intr1), IDTVEC(intr2), IDTVEC(intr3), 238 IDTVEC(intr4), IDTVEC(intr5), IDTVEC(intr6), IDTVEC(intr7), 239 IDTVEC(intr8), IDTVEC(intr9), IDTVEC(intr10), IDTVEC(intr11), 240 IDTVEC(intr12), IDTVEC(intr13), IDTVEC(intr14), IDTVEC(intr15); 241 242 static *defvec[16] = { 243 &IDTVEC(intr0), &IDTVEC(intr1), &IDTVEC(intr2), &IDTVEC(intr3), 244 &IDTVEC(intr4), &IDTVEC(intr5), &IDTVEC(intr6), &IDTVEC(intr7), 245 &IDTVEC(intr8), &IDTVEC(intr9), &IDTVEC(intr10), &IDTVEC(intr11), 246 &IDTVEC(intr12), &IDTVEC(intr13), &IDTVEC(intr14), &IDTVEC(intr15) }; 247 248 /* out of range default interrupt vector gate entry */ 249 extern IDTVEC(intrdefault); 250 251 /* 252 * Fill in default interrupt table (in case of spuruious interrupt 253 * during configuration of kernel, setup interrupt control unit 254 */ 255 void 256 isa_defaultirq() { 257 int i; 258 259 /* icu vectors */ 260 for (i = NRSVIDT ; i < NRSVIDT+ICU_LEN ; i++) 261 setidt(i, defvec[i], SDT_SYS386IGT, SEL_KPL); 262 263 /* out of range vectors */ 264 for (i = NRSVIDT; i < NIDT; i++) 265 setidt(i, &IDTVEC(intrdefault), SDT_SYS386IGT, SEL_KPL); 266 267 /* initialize 8259's */ 268 outb(IO_ICU1, 0x11); /* reset; program device, four bytes */ 269 outb(IO_ICU1+1, NRSVIDT); /* starting at this vector index */ 270 outb(IO_ICU1+1, 1<<2); /* slave on line 2 */ 271 #ifdef AUTO_EOI_1 272 outb(IO_ICU1+1, 2 | 1); /* auto EOI, 8086 mode */ 273 #else 274 outb(IO_ICU1+1, 1); /* 8086 mode */ 275 #endif 276 outb(IO_ICU1+1, 0xff); /* leave interrupts masked */ 277 outb(IO_ICU1, 0x0a); /* default to IRR on read */ 278 #ifdef REORDER_IRQ 279 outb(IO_ICU1, 0xc0 | (3 - 1)); /* pri order 3-7, 0-2 (com2 first) */ 280 #endif 281 282 outb(IO_ICU2, 0x11); /* reset; program device, four bytes */ 283 outb(IO_ICU2+1, NRSVIDT+8); /* staring at this vector index */ 284 outb(IO_ICU2+1,2); /* my slave id is 2 */ 285 #ifdef AUTO_EOI_2 286 outb(IO_ICU2+1, 2 | 1); /* auto EOI, 8086 mode */ 287 #else 288 outb(IO_ICU2+1,1); /* 8086 mode */ 289 #endif 290 outb(IO_ICU2+1, 0xff); /* leave interrupts masked */ 291 outb(IO_ICU2, 0x0a); /* default to IRR on read */ 292 } 293 294 /* region of physical memory known to be contiguous */ 295 vm_offset_t isaphysmem; 296 static caddr_t dma_bounce[8]; /* XXX */ 297 static char bounced[8]; /* XXX */ 298 #define MAXDMASZ 512 /* XXX */ 299 300 /* high byte of address is stored in this port for i-th dma channel */ 301 static short dmapageport[8] = 302 { 0x87, 0x83, 0x81, 0x82, 0x8f, 0x8b, 0x89, 0x8a }; 303 304 /* 305 * isa_dmacascade(): program 8237 DMA controller channel to accept 306 * external dma control by a board. 307 */ 308 void 309 isa_dmacascade(unsigned chan) 310 { 311 if (chan > 7) 312 panic("isa_dmacascade: impossible request"); 313 314 /* set dma channel mode, and set dma channel mode */ 315 if ((chan & 4) == 0) { 316 outb(DMA1_MODE, DMA37MD_CASCADE | chan); 317 outb(DMA1_SMSK, chan); 318 } else { 319 outb(DMA2_MODE, DMA37MD_CASCADE | (chan & 3)); 320 outb(DMA2_SMSK, chan & 3); 321 } 322 } 323 324 /* 325 * isa_dmastart(): program 8237 DMA controller channel, avoid page alignment 326 * problems by using a bounce buffer. 327 */ 328 void 329 isa_dmastart(int flags, caddr_t addr, unsigned nbytes, unsigned chan) 330 { vm_offset_t phys; 331 int waport; 332 caddr_t newaddr; 333 334 if ( chan > 7 335 || (chan < 4 && nbytes > (1<<16)) 336 || (chan >= 4 && (nbytes > (1<<17) || (u_int)addr & 1))) 337 panic("isa_dmastart: impossible request"); 338 339 if (isa_dmarangecheck(addr, nbytes, chan)) { 340 if (dma_bounce[chan] == 0) 341 dma_bounce[chan] = 342 /*(caddr_t)malloc(MAXDMASZ, M_TEMP, M_WAITOK);*/ 343 (caddr_t) isaphysmem + NBPG*chan; 344 bounced[chan] = 1; 345 newaddr = dma_bounce[chan]; 346 *(int *) newaddr = 0; /* XXX */ 347 348 /* copy bounce buffer on write */ 349 if (!(flags & B_READ)) 350 bcopy(addr, newaddr, nbytes); 351 addr = newaddr; 352 } 353 354 /* translate to physical */ 355 phys = pmap_extract(pmap_kernel(), (vm_offset_t)addr); 356 357 if ((chan & 4) == 0) { 358 /* 359 * Program one of DMA channels 0..3. These are 360 * byte mode channels. 361 */ 362 /* set dma channel mode, and reset address ff */ 363 if (flags & B_READ) 364 outb(DMA1_MODE, DMA37MD_SINGLE|DMA37MD_WRITE|chan); 365 else 366 outb(DMA1_MODE, DMA37MD_SINGLE|DMA37MD_READ|chan); 367 outb(DMA1_FFC, 0); 368 369 /* send start address */ 370 waport = DMA1_CHN(chan); 371 outb(waport, phys); 372 outb(waport, phys>>8); 373 outb(dmapageport[chan], phys>>16); 374 375 /* send count */ 376 outb(waport + 1, --nbytes); 377 outb(waport + 1, nbytes>>8); 378 379 /* unmask channel */ 380 outb(DMA1_SMSK, chan); 381 } else { 382 /* 383 * Program one of DMA channels 4..7. These are 384 * word mode channels. 385 */ 386 /* set dma channel mode, and reset address ff */ 387 if (flags & B_READ) 388 outb(DMA2_MODE, DMA37MD_SINGLE|DMA37MD_WRITE|(chan&3)); 389 else 390 outb(DMA2_MODE, DMA37MD_SINGLE|DMA37MD_READ|(chan&3)); 391 outb(DMA2_FFC, 0); 392 393 /* send start address */ 394 waport = DMA2_CHN(chan - 4); 395 outb(waport, phys>>1); 396 outb(waport, phys>>9); 397 outb(dmapageport[chan], phys>>16); 398 399 /* send count */ 400 nbytes >>= 1; 401 outb(waport + 2, --nbytes); 402 outb(waport + 2, nbytes>>8); 403 404 /* unmask channel */ 405 outb(DMA2_SMSK, chan & 3); 406 } 407 } 408 409 void 410 isa_dmadone(int flags, caddr_t addr, int nbytes, int chan) 411 { 412 413 /* copy bounce buffer on read */ 414 /*if ((flags & (B_PHYS|B_READ)) == (B_PHYS|B_READ))*/ 415 if (bounced[chan]) { 416 bcopy(dma_bounce[chan], addr, nbytes); 417 bounced[chan] = 0; 418 } 419 } 420 421 /* 422 * Check for problems with the address range of a DMA transfer 423 * (non-contiguous physical pages, outside of bus address space, 424 * crossing DMA page boundaries). 425 * Return true if special handling needed. 426 */ 427 428 int 429 isa_dmarangecheck(caddr_t va, unsigned length, unsigned chan) { 430 vm_offset_t phys, priorpage = 0, endva; 431 u_int dma_pgmsk = (chan & 4) ? ~(128*1024-1) : ~(64*1024-1); 432 433 endva = (vm_offset_t)round_page(va + length); 434 for (; va < (caddr_t) endva ; va += NBPG) { 435 phys = trunc_page(pmap_extract(pmap_kernel(), (vm_offset_t)va)); 436 #define ISARAM_END RAM_END 437 if (phys == 0) 438 panic("isa_dmacheck: no physical page present"); 439 if (phys > ISARAM_END) 440 return (1); 441 if (priorpage) { 442 if (priorpage + NBPG != phys) 443 return (1); 444 /* check if crossing a DMA page boundary */ 445 if (((u_int)priorpage ^ (u_int)phys) & dma_pgmsk) 446 return (1); 447 } 448 priorpage = phys; 449 } 450 return (0); 451 } 452 453 /* head of queue waiting for physmem to become available */ 454 struct buf isa_physmemq; 455 456 /* blocked waiting for resource to become free for exclusive use */ 457 static isaphysmemflag; 458 /* if waited for and call requested when free (B_CALL) */ 459 static void (*isaphysmemunblock)(); /* needs to be a list */ 460 461 /* 462 * Allocate contiguous physical memory for transfer, returning 463 * a *virtual* address to region. May block waiting for resource. 464 * (assumed to be called at splbio()) 465 */ 466 caddr_t 467 isa_allocphysmem(caddr_t va, unsigned length, void (*func)()) { 468 469 isaphysmemunblock = func; 470 while (isaphysmemflag & B_BUSY) { 471 isaphysmemflag |= B_WANTED; 472 sleep((caddr_t)&isaphysmemflag, PRIBIO); 473 } 474 isaphysmemflag |= B_BUSY; 475 476 return((caddr_t)isaphysmem); 477 } 478 479 /* 480 * Free contiguous physical memory used for transfer. 481 * (assumed to be called at splbio()) 482 */ 483 void 484 isa_freephysmem(caddr_t va, unsigned length) { 485 486 isaphysmemflag &= ~B_BUSY; 487 if (isaphysmemflag & B_WANTED) { 488 isaphysmemflag &= B_WANTED; 489 wakeup((caddr_t)&isaphysmemflag); 490 if (isaphysmemunblock) 491 (*isaphysmemunblock)(); 492 } 493 } 494 495 /* 496 * Handle a NMI, possibly a machine check. 497 * return true to panic system, false to ignore. 498 */ 499 int 500 isa_nmi(cd) { 501 502 log(LOG_CRIT, "\nNMI port 61 %x, port 70 %x\n", inb(0x61), inb(0x70)); 503 return(0); 504 } 505 506 /* 507 * Caught a stray interrupt, notify 508 */ 509 void 510 isa_strayintr(d) { 511 512 /* DON'T BOTHER FOR NOW! */ 513 /* for some reason, we get bursts of intr #7, even if not enabled! */ 514 /* 515 * Well the reason you got bursts of intr #7 is because someone 516 * raised an interrupt line and dropped it before the 8259 could 517 * prioritize it. This is documented in the intel data book. This 518 * means you have BAD hardware! I have changed this so that only 519 * the first 5 get logged, then it quits logging them, and puts 520 * out a special message. rgrimes 3/25/1993 521 */ 522 extern u_long intrcnt_stray; 523 524 intrcnt_stray++; 525 if (intrcnt_stray <= 5) 526 log(LOG_ERR,"ISA strayintr %x\n", d); 527 if (intrcnt_stray == 5) 528 log(LOG_CRIT,"Too many ISA strayintr not logging any more\n"); 529 } 530 531 /* 532 * Wait "n" microseconds. 533 * Relies on timer 1 counting down from (TIMER_FREQ / hz) at 534 * (1 * TIMER_FREQ) Hz. 535 * Note: timer had better have been programmed before this is first used! 536 * (Note that we use `rate generator' mode, which counts at 1:1; `square 537 * wave' mode counts at 2:1). 538 */ 539 #define CF (1 * TIMER_FREQ) 540 541 extern int hz; /* XXX - should be elsewhere */ 542 543 void 544 DELAY(n) 545 int n; 546 { 547 int counter_limit; 548 int prev_tick; 549 int tick; 550 int ticks_left; 551 int sec; 552 int usec; 553 554 #ifdef DELAYDEBUG 555 int gettick_calls = 1; 556 int n1; 557 static int state = 0; 558 559 if (state == 0) { 560 state = 1; 561 for (n1 = 1; n1 <= 10000000; n1 *= 10) 562 DELAY(n1); 563 state = 2; 564 } 565 if (state == 1) 566 printf("DELAY(%d)...", n); 567 #endif 568 569 /* 570 * Read the counter first, so that the rest of the setup overhead is 571 * counted. Guess the initial overhead is 20 usec (on most systems it 572 * takes about 1.5 usec for each of the i/o's in gettick(). The loop 573 * takes about 6 usec on a 486/33 and 13 usec on a 386/20. The 574 * multiplications and divisions to scale the count take a while). 575 */ 576 prev_tick = gettick(); 577 n -= 20; 578 579 /* 580 * Calculate (n * (CF / 1e6)) without using floating point and without 581 * any avoidable overflows. 582 */ 583 sec = n / 1000000; 584 usec = n - sec * 1000000; 585 ticks_left = sec * CF 586 + usec * (CF / 1000000) 587 + usec * ((CF % 1000000) / 1000) / 1000 588 + usec * (CF % 1000) / 1000000; 589 590 counter_limit = TIMER_FREQ / hz; 591 while (ticks_left > 0) { 592 tick = gettick(); 593 #ifdef DELAYDEBUG 594 ++gettick_calls; 595 #endif 596 if (tick > prev_tick) 597 ticks_left -= prev_tick - (tick - counter_limit); 598 else 599 ticks_left -= prev_tick - tick; 600 prev_tick = tick; 601 } 602 #ifdef DELAYDEBUG 603 if (state == 1) 604 printf(" %d calls to gettick() at %d usec each\n", 605 gettick_calls, (n + 5) / gettick_calls); 606 #endif 607 } 608 609 int 610 gettick() { 611 int high; 612 int low; 613 614 /* 615 * Protect ourself against interrupts. 616 */ 617 disable_intr(); 618 /* 619 * Latch the count for 'timer' (cc00xxxx, c = counter, x = any). 620 */ 621 outb(TIMER_MODE, TIMER_SEL0 | TIMER_LATCH); 622 low = inb(TIMER_CNTR0); 623 high = inb(TIMER_CNTR0); 624 enable_intr(); 625 return ((high << 8) | low); 626 } 627 628 static beeping; 629 static void 630 sysbeepstop(int f) 631 { 632 int s = splhigh(); 633 634 /* disable counter 2 */ 635 disable_intr(); 636 outb(PITAUX_PORT, inb(PITAUX_PORT) & ~PIT_SPKR); 637 enable_intr(); 638 if (f) 639 timeout((timeout_t)sysbeepstop, (caddr_t)0, f); 640 else 641 beeping = 0; 642 643 splx(s); 644 } 645 646 void 647 sysbeep(int pitch, int period) 648 { 649 int s = splhigh(); 650 static int last_pitch, last_period; 651 652 if (beeping) { 653 untimeout((timeout_t)sysbeepstop, (caddr_t)(last_period/2)); 654 untimeout((timeout_t)sysbeepstop, (caddr_t)0); 655 } 656 if (!beeping || last_pitch != pitch) { 657 /* 658 * XXX - move timer stuff to clock.c. 659 */ 660 disable_intr(); 661 outb(TIMER_MODE, TIMER_SEL2|TIMER_16BIT|TIMER_SQWAVE); 662 outb(TIMER_CNTR2, TIMER_DIV(pitch)%256); 663 outb(TIMER_CNTR2, TIMER_DIV(pitch)/256); 664 outb(PITAUX_PORT, inb(PITAUX_PORT) | PIT_SPKR); /* enable counter 2 */ 665 enable_intr(); 666 } 667 last_pitch = pitch; 668 beeping = last_period = period; 669 timeout((timeout_t)sysbeepstop, (caddr_t)(period/2), period); 670 671 splx(s); 672 } 673 674 /* 675 * Pass command to keyboard controller (8042) 676 */ 677 unsigned 678 kbc_8042cmd(int val) 679 { 680 while (inb(KBSTATP)&KBS_IBF); 681 if (val) outb(KBCMDP, val); 682 while (inb(KBSTATP)&KBS_IBF); 683 return (inb(KBDATAP)); 684 } 685 686 /* 687 * find an ISA device in a given isa_devtab_* table, given 688 * the table to search, the expected id_driver entry, and the unit number. 689 * 690 * this function is defined in isa_device.h, and this location is debatable; 691 * i put it there because it's useless w/o, and directly operates on 692 * the other stuff in that file. 693 * 694 */ 695 696 struct isa_device *find_isadev(table, driverp, unit) 697 struct isa_device *table; 698 struct isa_driver *driverp; 699 int unit; 700 { 701 if (driverp == NULL) /* sanity check */ 702 return NULL; 703 704 while ((table->id_driver != driverp) || (table->id_unit != unit)) { 705 if (table->id_driver == 0) 706 return NULL; 707 708 table++; 709 } 710 711 return table; 712 } 713 714 /* 715 * Return nonzero if a (masked) irq is pending for a given device. 716 */ 717 int 718 isa_irq_pending(dvp) 719 struct isa_device *dvp; 720 { 721 unsigned id_irq; 722 723 id_irq = (unsigned short) dvp->id_irq; /* XXX silly type in struct */ 724 if (id_irq & 0xff) 725 return (inb(IO_ICU1) & id_irq); 726 return (inb(IO_ICU2) & (id_irq >> 8)); 727 } 728
Indexes created Tue Sep 30 11:09:46 GMT 2025