isa.c revision 1.37
1 /*- 2 * Copyright (c) 1991 The Regents of the University of California. 3 * All rights reserved. 4 * 5 * This code is derived from software contributed to Berkeley by 6 * William Jolitz. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 3. All advertising materials mentioning features or use of this software 17 * must display the following acknowledgement: 18 * This product includes software developed by the University of 19 * California, Berkeley and its contributors. 20 * 4. Neither the name of the University nor the names of its contributors 21 * may be used to endorse or promote products derived from this software 22 * without specific prior written permission. 23 * 24 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 25 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 27 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 30 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 31 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 32 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 33 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 34 * SUCH DAMAGE. 35 * 36 * from: @(#)isa.c 7.2 (Berkeley) 5/13/91 37 * $Id: isa.c,v 1.37 1994/03/01 18:16:33 mycroft Exp $ 38 */ 39 40 /* 41 * code to manage AT bus 42 * 43 * 92/08/18 Frank P. MacLachlan (fpm (at) crash.cts.com): 44 * Fixed uninitialized variable problem and added code to deal 45 * with DMA page boundaries in isa_dmarangecheck(). Fixed word 46 * mode DMA count compution and reorganized DMA setup code in 47 * isa_dmastart() 48 */ 49 50 #include <sys/param.h> 51 #include <sys/systm.h> 52 #include <sys/conf.h> 53 #include <sys/file.h> 54 #include <sys/buf.h> 55 #include <sys/uio.h> 56 #include <sys/syslog.h> 57 #include <sys/malloc.h> 58 59 #include <vm/vm.h> 60 61 #include <machine/segments.h> 62 #include <machine/pio.h> 63 #include <machine/cpufunc.h> 64 65 #include <i386/isa/isa_device.h> 66 #include <i386/isa/isa.h> 67 #include <i386/isa/icu.h> 68 #include <i386/isa/ic/i8237.h> 69 #include <i386/isa/ic/i8042.h> 70 #include <i386/isa/timerreg.h> 71 #include <i386/isa/spkr_reg.h> 72 73 /* sorry, has to be here, no place else really suitable */ 74 #include <machine/pc/display.h> 75 u_short *Crtat = (u_short *)MONO_BUF; 76 77 /* 78 ** Register definitions for DMA controller 1 (channels 0..3): 79 */ 80 #define DMA1_CHN(c) (IO_DMA1 + 1*(2*(c))) /* addr reg for channel c */ 81 #define DMA1_SR (IO_DMA1 + 1*8) /* status register */ 82 #define DMA1_SMSK (IO_DMA1 + 1*10) /* single mask register */ 83 #define DMA1_MODE (IO_DMA1 + 1*11) /* mode register */ 84 #define DMA1_FFC (IO_DMA1 + 1*12) /* clear first/last FF */ 85 86 /* 87 ** Register definitions for DMA controller 2 (channels 4..7): 88 */ 89 #define DMA2_CHN(c) (IO_DMA2 + 2*(2*(c))) /* addr reg for channel c */ 90 #define DMA2_SR (IO_DMA2 + 2*8) /* status register */ 91 #define DMA2_SMSK (IO_DMA2 + 2*10) /* single mask register */ 92 #define DMA2_MODE (IO_DMA2 + 2*11) /* mode register */ 93 #define DMA2_FFC (IO_DMA2 + 2*12) /* clear first/last FF */ 94 95 int config_isadev(struct isa_device *, u_int *); 96 void config_attach(struct isa_driver *, struct isa_device *); 97 static void sysbeepstop(int); 98 99 /* 100 * Configure all ISA devices 101 */ 102 void 103 isa_configure() 104 { 105 struct isa_device *dvp; 106 struct isa_driver *dp; 107 108 splhigh(); 109 INTREN(IRQ_SLAVE); 110 enable_intr(); 111 112 for (dvp = isa_devtab_tty; config_isadev(dvp, &ttymask); dvp++) 113 ; 114 for (dvp = isa_devtab_bio; config_isadev(dvp, &biomask); dvp++) 115 ; 116 for (dvp = isa_devtab_net; config_isadev(dvp, &netmask); dvp++) 117 ; 118 for (dvp = isa_devtab_null; config_isadev(dvp, (u_int *) NULL); dvp++) 119 ; 120 121 printf("biomask %x ttymask %x netmask %x\n", 122 biomask, ttymask, netmask); 123 124 clockmask |= astmask; 125 biomask |= astmask; 126 ttymask |= astmask; 127 netmask |= astmask; 128 impmask = netmask | ttymask; 129 130 spl0(); 131 } 132 133 /* 134 * Configure an ISA device. 135 */ 136 int 137 config_isadev(isdp, mp) 138 struct isa_device *isdp; 139 u_int *mp; 140 { 141 struct isa_driver *dp; 142 143 if (dp = isdp->id_driver) { 144 if (isdp->id_maddr) { 145 extern u_int atdevbase; 146 147 isdp->id_maddr -= 0xa0000; /* XXX should be a define */ 148 isdp->id_maddr += atdevbase; 149 } 150 isdp->id_alive = (*dp->probe)(isdp); 151 if (isdp->id_irq == (u_short)-1) 152 isdp->id_alive = 0; 153 /* 154 * Only print the I/O address range if id_alive != -1 155 * Right now this is a temporary fix just for the new 156 * NPX code so that if it finds a 486 that can use trap 157 * 16 it will not report I/O addresses. 158 * Rod Grimes 04/26/94 159 * 160 * XXX -- cgd 161 */ 162 if (isdp->id_alive) { 163 printf("%s%d", dp->name, isdp->id_unit); 164 if (isdp->id_iobase) { 165 printf(" at 0x%x", isdp->id_iobase); 166 if ((isdp->id_iobase + isdp->id_alive - 1) != 167 isdp->id_iobase) 168 printf("-0x%x", isdp->id_iobase + 169 isdp->id_alive - 1); 170 } 171 if (isdp->id_irq != 0) 172 printf(" irq %d", ffs(isdp->id_irq)-1); 173 if (isdp->id_drq != -1) 174 printf(" drq %d", isdp->id_drq); 175 if (isdp->id_maddr != 0) 176 printf(" maddr 0x%x", kvtop(isdp->id_maddr)); 177 if (isdp->id_msize != 0) 178 printf("-0x%x", kvtop(isdp->id_maddr) + 179 isdp->id_msize - 1); 180 if (isdp->id_flags != 0) 181 printf(" flags 0x%x", isdp->id_flags); 182 printf(" on isa\n"); 183 184 config_attach(dp, isdp); 185 186 if (isdp->id_irq) { 187 int intrno; 188 189 intrno = ffs(isdp->id_irq)-1; 190 setidt(ICU_OFFSET+intrno, isdp->id_intr, 191 SDT_SYS386IGT, SEL_KPL); 192 if(mp) 193 INTRMASK(*mp,isdp->id_irq); 194 INTREN(isdp->id_irq); 195 } 196 } 197 return (1); 198 } else return(0); 199 } 200 201 void 202 config_attach(struct isa_driver *dp, struct isa_device *isdp) 203 { 204 extern struct isa_device isa_subdev[]; 205 struct isa_device *dvp; 206 207 if(isdp->id_masunit==-1) { 208 (void)(*dp->attach)(isdp); 209 return; 210 } 211 212 if(isdp->id_masunit==0) { 213 for(dvp = isa_subdev; dvp->id_driver; dvp++) { 214 if (dvp->id_driver != dp) 215 continue; 216 if (dvp->id_masunit != isdp->id_unit) 217 continue; 218 if (dvp->id_physid == -1) 219 continue; 220 dvp->id_alive = (*dp->attach)(dvp); 221 } 222 for(dvp = isa_subdev; dvp->id_driver; dvp++) { 223 if (dvp->id_driver != dp) 224 continue; 225 if (dvp->id_masunit != isdp->id_unit) 226 continue; 227 if (dvp->id_physid != -1) 228 continue; 229 dvp->id_alive = (*dp->attach)(dvp); 230 } 231 return; 232 } 233 printf("id_masunit has weird value\n"); 234 } 235 236 237 #define IDTVEC(name) __CONCAT(X,name) 238 /* default interrupt vector table entries */ 239 extern IDTVEC(intr0), IDTVEC(intr1), IDTVEC(intr2), IDTVEC(intr3), 240 IDTVEC(intr4), IDTVEC(intr5), IDTVEC(intr6), IDTVEC(intr7), 241 IDTVEC(intr8), IDTVEC(intr9), IDTVEC(intr10), IDTVEC(intr11), 242 IDTVEC(intr12), IDTVEC(intr13), IDTVEC(intr14), IDTVEC(intr15); 243 244 static *defvec[16] = { 245 &IDTVEC(intr0), &IDTVEC(intr1), &IDTVEC(intr2), &IDTVEC(intr3), 246 &IDTVEC(intr4), &IDTVEC(intr5), &IDTVEC(intr6), &IDTVEC(intr7), 247 &IDTVEC(intr8), &IDTVEC(intr9), &IDTVEC(intr10), &IDTVEC(intr11), 248 &IDTVEC(intr12), &IDTVEC(intr13), &IDTVEC(intr14), &IDTVEC(intr15) }; 249 250 /* out of range default interrupt vector gate entry */ 251 extern IDTVEC(intrdefault); 252 253 /* 254 * Fill in default interrupt table (in case of spuruious interrupt 255 * during configuration of kernel, setup interrupt control unit 256 */ 257 void 258 isa_defaultirq() { 259 int i; 260 261 /* icu vectors */ 262 for (i = NRSVIDT ; i < NRSVIDT+ICU_LEN ; i++) 263 setidt(i, defvec[i], SDT_SYS386IGT, SEL_KPL); 264 265 /* out of range vectors */ 266 for (i = NRSVIDT; i < NIDT; i++) 267 setidt(i, &IDTVEC(intrdefault), SDT_SYS386IGT, SEL_KPL); 268 269 /* initialize 8259's */ 270 outb(IO_ICU1, 0x11); /* reset; program device, four bytes */ 271 outb(IO_ICU1+1, NRSVIDT); /* starting at this vector index */ 272 outb(IO_ICU1+1, 1<<2); /* slave on line 2 */ 273 #ifdef AUTO_EOI_1 274 outb(IO_ICU1+1, 2 | 1); /* auto EOI, 8086 mode */ 275 #else 276 outb(IO_ICU1+1, 1); /* 8086 mode */ 277 #endif 278 outb(IO_ICU1+1, 0xff); /* leave interrupts masked */ 279 outb(IO_ICU1, 0x0a); /* default to IRR on read */ 280 #ifdef REORDER_IRQ 281 outb(IO_ICU1, 0xc0 | (3 - 1)); /* pri order 3-7, 0-2 (com2 first) */ 282 #endif 283 284 outb(IO_ICU2, 0x11); /* reset; program device, four bytes */ 285 outb(IO_ICU2+1, NRSVIDT+8); /* staring at this vector index */ 286 outb(IO_ICU2+1,2); /* my slave id is 2 */ 287 #ifdef AUTO_EOI_2 288 outb(IO_ICU2+1, 2 | 1); /* auto EOI, 8086 mode */ 289 #else 290 outb(IO_ICU2+1,1); /* 8086 mode */ 291 #endif 292 outb(IO_ICU2+1, 0xff); /* leave interrupts masked */ 293 outb(IO_ICU2, 0x0a); /* default to IRR on read */ 294 } 295 296 /* region of physical memory known to be contiguous */ 297 vm_offset_t isaphysmem; 298 static caddr_t dma_bounce[8]; /* XXX */ 299 static char bounced[8]; /* XXX */ 300 #define MAXDMASZ 512 /* XXX */ 301 302 /* high byte of address is stored in this port for i-th dma channel */ 303 static short dmapageport[8] = 304 { 0x87, 0x83, 0x81, 0x82, 0x8f, 0x8b, 0x89, 0x8a }; 305 306 /* 307 * isa_dmacascade(): program 8237 DMA controller channel to accept 308 * external dma control by a board. 309 */ 310 void 311 isa_dmacascade(chan) 312 int chan; 313 { 314 315 #ifdef DIAGNOSTIC 316 if (chan < 0 || chan > 7) 317 panic("isa_dmacascade: impossible request"); 318 #endif 319 320 /* set dma channel mode, and set dma channel mode */ 321 if ((chan & 4) == 0) { 322 outb(DMA1_MODE, DMA37MD_CASCADE | chan); 323 outb(DMA1_SMSK, chan); 324 } else { 325 outb(DMA2_MODE, DMA37MD_CASCADE | (chan & 3)); 326 outb(DMA2_SMSK, chan & 3); 327 } 328 } 329 330 /* 331 * isa_dmastart(): program 8237 DMA controller channel, avoid page alignment 332 * problems by using a bounce buffer. 333 */ 334 void 335 isa_dmastart(flags, addr, nbytes, chan) 336 int flags; 337 caddr_t addr; 338 vm_size_t nbytes; 339 int chan; 340 { 341 vm_offset_t phys; 342 int waport; 343 caddr_t newaddr; 344 345 #ifdef DIAGNOSTIC 346 if (chan < 0 || chan > 7 || 347 ((chan & 4) ? (nbytes >= (1<<17) || nbytes & 1 || (u_int)addr & 1) : 348 (nbytes >= (1<<16)))) 349 panic("isa_dmastart: impossible request"); 350 #endif 351 352 if (isa_dmarangecheck(addr, nbytes, chan)) { 353 if (dma_bounce[chan] == 0) 354 dma_bounce[chan] = 355 /*(caddr_t)malloc(MAXDMASZ, M_TEMP, M_WAITOK);*/ 356 (caddr_t) isaphysmem + NBPG*chan; 357 bounced[chan] = 1; 358 newaddr = dma_bounce[chan]; 359 *(int *) newaddr = 0; /* XXX */ 360 /* copy bounce buffer on write */ 361 if ((flags & B_READ) == 0) 362 bcopy(addr, newaddr, nbytes); 363 addr = newaddr; 364 } 365 366 /* translate to physical */ 367 phys = pmap_extract(pmap_kernel(), (vm_offset_t)addr); 368 369 if ((chan & 4) == 0) { 370 /* 371 * Program one of DMA channels 0..3. These are 372 * byte mode channels. 373 */ 374 /* set dma channel mode, and reset address ff */ 375 if (flags & B_READ) 376 outb(DMA1_MODE, chan | DMA37MD_SINGLE | DMA37MD_WRITE); 377 else 378 outb(DMA1_MODE, chan | DMA37MD_SINGLE | DMA37MD_READ); 379 outb(DMA1_FFC, 0); 380 381 /* send start address */ 382 waport = DMA1_CHN(chan); 383 outb(waport, phys); 384 outb(waport, phys>>8); 385 outb(dmapageport[chan], phys>>16); 386 387 /* send count */ 388 outb(waport + 1, --nbytes); 389 outb(waport + 1, nbytes>>8); 390 391 /* unmask channel */ 392 outb(DMA1_SMSK, chan | DMA37SM_CLEAR); 393 } else { 394 /* 395 * Program one of DMA channels 4..7. These are 396 * word mode channels. 397 */ 398 /* set dma channel mode, and reset address ff */ 399 if (flags & B_READ) 400 outb(DMA2_MODE, (chan & 3) | DMA37MD_SINGLE | DMA37MD_WRITE); 401 else 402 outb(DMA2_MODE, (chan & 3) | DMA37MD_SINGLE | DMA37MD_READ); 403 outb(DMA2_FFC, 0); 404 405 /* send start address */ 406 waport = DMA2_CHN(chan & 3); 407 outb(waport, phys>>1); 408 outb(waport, phys>>9); 409 outb(dmapageport[chan], phys>>16); 410 411 /* send count */ 412 nbytes >>= 1; 413 outb(waport + 2, --nbytes); 414 outb(waport + 2, nbytes>>8); 415 416 /* unmask channel */ 417 outb(DMA2_SMSK, (chan & 3) | DMA37SM_CLEAR); 418 } 419 } 420 421 void 422 isa_dmadone(flags, addr, nbytes, chan) 423 int flags; 424 caddr_t addr; 425 vm_size_t nbytes; 426 int chan; 427 { 428 u_char tc; 429 430 #ifdef DIAGNOSTIC 431 if (chan < 0 || chan > 7) 432 panic("isa_dmadone: impossible request"); 433 #endif 434 435 /* check that the terminal count was reached */ 436 if ((chan & 4) == 0) 437 tc = inb(DMA1_SR) & (1 << chan); 438 else 439 tc = inb(DMA2_SR) & (1 << (chan & 3)); 440 if (tc == 0) 441 /* XXX probably should panic or something */ 442 log(LOG_ERR, "dma channel %d not finished\n", chan); 443 444 /* copy bounce buffer on read */ 445 if (bounced[chan]) { 446 bcopy(dma_bounce[chan], addr, nbytes); 447 bounced[chan] = 0; 448 } 449 450 /* mask channel */ 451 if ((chan & 4) == 0) 452 outb(DMA1_SMSK, DMA37SM_SET | chan); 453 else 454 outb(DMA2_SMSK, DMA37SM_SET | (chan & 3)); 455 } 456 457 /* 458 * Check for problems with the address range of a DMA transfer 459 * (non-contiguous physical pages, outside of bus address space, 460 * crossing DMA page boundaries). 461 * Return true if special handling needed. 462 */ 463 int 464 isa_dmarangecheck(va, length, chan) 465 vm_offset_t va; 466 u_long length; 467 int chan; 468 { 469 vm_offset_t phys, priorpage = 0, endva; 470 u_int dma_pgmsk = (chan & 4) ? ~(128*1024-1) : ~(64*1024-1); 471 472 endva = round_page(va + length); 473 for (; va < endva ; va += NBPG) { 474 phys = trunc_page(pmap_extract(pmap_kernel(), va)); 475 if (phys == 0) 476 panic("isa_dmacheck: no physical page present"); 477 if (phys >= (1<<24)) 478 return 1; 479 if (priorpage) { 480 if (priorpage + NBPG != phys) 481 return 1; 482 /* check if crossing a DMA page boundary */ 483 if ((priorpage ^ phys) & dma_pgmsk) 484 return 1; 485 } 486 priorpage = phys; 487 } 488 return 0; 489 } 490 491 /* head of queue waiting for physmem to become available */ 492 struct buf isa_physmemq; 493 494 /* blocked waiting for resource to become free for exclusive use */ 495 static isaphysmemflag; 496 /* if waited for and call requested when free (B_CALL) */ 497 static void (*isaphysmemunblock)(); /* needs to be a list */ 498 499 /* 500 * Allocate contiguous physical memory for transfer, returning 501 * a *virtual* address to region. May block waiting for resource. 502 * (assumed to be called at splbio()) 503 */ 504 caddr_t 505 isa_allocphysmem(caddr_t va, unsigned length, void (*func)()) { 506 507 isaphysmemunblock = func; 508 while (isaphysmemflag & B_BUSY) { 509 isaphysmemflag |= B_WANTED; 510 sleep((caddr_t)&isaphysmemflag, PRIBIO); 511 } 512 isaphysmemflag |= B_BUSY; 513 514 return((caddr_t)isaphysmem); 515 } 516 517 /* 518 * Free contiguous physical memory used for transfer. 519 * (assumed to be called at splbio()) 520 */ 521 void 522 isa_freephysmem(caddr_t va, unsigned length) { 523 524 isaphysmemflag &= ~B_BUSY; 525 if (isaphysmemflag & B_WANTED) { 526 isaphysmemflag &= B_WANTED; 527 wakeup((caddr_t)&isaphysmemflag); 528 if (isaphysmemunblock) 529 (*isaphysmemunblock)(); 530 } 531 } 532 533 /* 534 * Handle a NMI, possibly a machine check. 535 * return true to panic system, false to ignore. 536 */ 537 int 538 isa_nmi(cd) { 539 540 log(LOG_CRIT, "\nNMI port 61 %x, port 70 %x\n", inb(0x61), inb(0x70)); 541 return(0); 542 } 543 544 /* 545 * Caught a stray interrupt, notify 546 */ 547 void 548 isa_strayintr(d) { 549 550 /* DON'T BOTHER FOR NOW! */ 551 /* for some reason, we get bursts of intr #7, even if not enabled! */ 552 /* 553 * Well the reason you got bursts of intr #7 is because someone 554 * raised an interrupt line and dropped it before the 8259 could 555 * prioritize it. This is documented in the intel data book. This 556 * means you have BAD hardware! I have changed this so that only 557 * the first 5 get logged, then it quits logging them, and puts 558 * out a special message. rgrimes 3/25/1993 559 */ 560 extern u_long intrcnt_stray; 561 562 intrcnt_stray++; 563 if (intrcnt_stray <= 5) 564 log(LOG_ERR,"ISA strayintr %x\n", d); 565 if (intrcnt_stray == 5) 566 log(LOG_CRIT,"Too many ISA strayintr not logging any more\n"); 567 } 568 569 /* 570 * Wait "n" microseconds. 571 * Relies on timer 1 counting down from (TIMER_FREQ / hz) at 572 * (1 * TIMER_FREQ) Hz. 573 * Note: timer had better have been programmed before this is first used! 574 * (Note that we use `rate generator' mode, which counts at 1:1; `square 575 * wave' mode counts at 2:1). 576 */ 577 #define CF (1 * TIMER_FREQ) 578 579 extern int hz; /* XXX - should be elsewhere */ 580 581 void 582 DELAY(n) 583 int n; 584 { 585 int counter_limit; 586 int prev_tick; 587 int tick; 588 int ticks_left; 589 int sec; 590 int usec; 591 592 #ifdef DELAYDEBUG 593 int gettick_calls = 1; 594 int n1; 595 static int state = 0; 596 597 if (state == 0) { 598 state = 1; 599 for (n1 = 1; n1 <= 10000000; n1 *= 10) 600 DELAY(n1); 601 state = 2; 602 } 603 if (state == 1) 604 printf("DELAY(%d)...", n); 605 #endif 606 607 /* 608 * Read the counter first, so that the rest of the setup overhead is 609 * counted. Guess the initial overhead is 20 usec (on most systems it 610 * takes about 1.5 usec for each of the i/o's in gettick(). The loop 611 * takes about 6 usec on a 486/33 and 13 usec on a 386/20. The 612 * multiplications and divisions to scale the count take a while). 613 */ 614 prev_tick = gettick(); 615 n -= 20; 616 617 /* 618 * Calculate (n * (CF / 1e6)) without using floating point and without 619 * any avoidable overflows. 620 */ 621 sec = n / 1000000; 622 usec = n - sec * 1000000; 623 ticks_left = sec * CF 624 + usec * (CF / 1000000) 625 + usec * ((CF % 1000000) / 1000) / 1000 626 + usec * (CF % 1000) / 1000000; 627 628 counter_limit = TIMER_FREQ / hz; 629 while (ticks_left > 0) { 630 tick = gettick(); 631 #ifdef DELAYDEBUG 632 ++gettick_calls; 633 #endif 634 if (tick > prev_tick) 635 ticks_left -= prev_tick - (tick - counter_limit); 636 else 637 ticks_left -= prev_tick - tick; 638 prev_tick = tick; 639 } 640 #ifdef DELAYDEBUG 641 if (state == 1) 642 printf(" %d calls to gettick() at %d usec each\n", 643 gettick_calls, (n + 5) / gettick_calls); 644 #endif 645 } 646 647 int 648 gettick() { 649 int high; 650 int low; 651 652 /* 653 * Protect ourself against interrupts. 654 */ 655 disable_intr(); 656 /* 657 * Latch the count for 'timer' (cc00xxxx, c = counter, x = any). 658 */ 659 outb(TIMER_MODE, TIMER_SEL0 | TIMER_LATCH); 660 low = inb(TIMER_CNTR0); 661 high = inb(TIMER_CNTR0); 662 enable_intr(); 663 return ((high << 8) | low); 664 } 665 666 static beeping; 667 static void 668 sysbeepstop(int f) 669 { 670 int s = splhigh(); 671 672 /* disable counter 2 */ 673 disable_intr(); 674 outb(PITAUX_PORT, inb(PITAUX_PORT) & ~PIT_SPKR); 675 enable_intr(); 676 if (f) 677 timeout((timeout_t)sysbeepstop, (caddr_t)0, f); 678 else 679 beeping = 0; 680 681 splx(s); 682 } 683 684 void 685 sysbeep(int pitch, int period) 686 { 687 int s = splhigh(); 688 static int last_pitch, last_period; 689 690 if (beeping) { 691 untimeout((timeout_t)sysbeepstop, (caddr_t)(last_period/2)); 692 untimeout((timeout_t)sysbeepstop, (caddr_t)0); 693 } 694 if (!beeping || last_pitch != pitch) { 695 /* 696 * XXX - move timer stuff to clock.c. 697 */ 698 disable_intr(); 699 outb(TIMER_MODE, TIMER_SEL2|TIMER_16BIT|TIMER_SQWAVE); 700 outb(TIMER_CNTR2, TIMER_DIV(pitch)%256); 701 outb(TIMER_CNTR2, TIMER_DIV(pitch)/256); 702 outb(PITAUX_PORT, inb(PITAUX_PORT) | PIT_SPKR); /* enable counter 2 */ 703 enable_intr(); 704 } 705 last_pitch = pitch; 706 beeping = last_period = period; 707 timeout((timeout_t)sysbeepstop, (caddr_t)(period/2), period); 708 709 splx(s); 710 } 711 712 /* 713 * Pass command to keyboard controller (8042) 714 */ 715 unsigned 716 kbc_8042cmd(int val) 717 { 718 while (inb(KBSTATP)&KBS_IBF); 719 if (val) outb(KBCMDP, val); 720 while (inb(KBSTATP)&KBS_IBF); 721 return (inb(KBDATAP)); 722 } 723 724 /* 725 * find an ISA device in a given isa_devtab_* table, given 726 * the table to search, the expected id_driver entry, and the unit number. 727 * 728 * this function is defined in isa_device.h, and this location is debatable; 729 * i put it there because it's useless w/o, and directly operates on 730 * the other stuff in that file. 731 * 732 */ 733 734 struct isa_device *find_isadev(table, driverp, unit) 735 struct isa_device *table; 736 struct isa_driver *driverp; 737 int unit; 738 { 739 if (driverp == NULL) /* sanity check */ 740 return NULL; 741 742 while ((table->id_driver != driverp) || (table->id_unit != unit)) { 743 if (table->id_driver == 0) 744 return NULL; 745 746 table++; 747 } 748 749 return table; 750 } 751 752 /* 753 * Return nonzero if a (masked) irq is pending for a given device. 754 */ 755 int 756 isa_irq_pending(dvp) 757 struct isa_device *dvp; 758 { 759 unsigned id_irq; 760 761 id_irq = (unsigned short) dvp->id_irq; /* XXX silly type in struct */ 762 if (id_irq & 0xff) 763 return (inb(IO_ICU1) & id_irq); 764 return (inb(IO_ICU2) & (id_irq >> 8)); 765 } 766
Indexes created Tue Sep 30 11:09:46 GMT 2025