isa.c revision 1.45
1 /*- 2 * Copyright (c) 1993, 1994 Charles Hannum. 3 * Copyright (c) 1991 The Regents of the University of California. 4 * All rights reserved. 5 * 6 * This code is derived from software contributed to Berkeley by 7 * William Jolitz. 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 1. Redistributions of source code must retain the above copyright 13 * notice, this list of conditions and the following disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 3. All advertising materials mentioning features or use of this software 18 * must display the following acknowledgement: 19 * This product includes software developed by the University of 20 * California, Berkeley and its contributors. 21 * 4. Neither the name of the University nor the names of its contributors 22 * may be used to endorse or promote products derived from this software 23 * without specific prior written permission. 24 * 25 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 26 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 27 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 28 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 29 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 30 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 31 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 32 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 33 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 34 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 35 * SUCH DAMAGE. 36 * 37 * from: @(#)isa.c 7.2 (Berkeley) 5/13/91 38 * $Id: isa.c,v 1.45 1994/03/12 03:29:20 mycroft Exp $ 39 */ 40 41 /* 42 * code to manage AT bus 43 * 44 * 92/08/18 Frank P. MacLachlan (fpm (at) crash.cts.com): 45 * Fixed uninitialized variable problem and added code to deal 46 * with DMA page boundaries in isa_dmarangecheck(). Fixed word 47 * mode DMA count compution and reorganized DMA setup code in 48 * isa_dmastart() 49 */ 50 51 #include <sys/param.h> 52 #include <sys/systm.h> 53 #include <sys/kernel.h> 54 #include <sys/conf.h> 55 #include <sys/file.h> 56 #include <sys/buf.h> 57 #include <sys/uio.h> 58 #include <sys/syslog.h> 59 #include <sys/malloc.h> 60 61 #include <vm/vm.h> 62 63 #include <machine/segments.h> 64 #include <machine/pio.h> 65 #include <machine/cpufunc.h> 66 67 #include <i386/isa/isa_device.h> 68 #include <i386/isa/isa.h> 69 #include <i386/isa/icu.h> 70 #include <i386/isa/ic/i8237.h> 71 #include <i386/isa/ic/i8042.h> 72 #include <i386/isa/timerreg.h> 73 #include <i386/isa/spkr_reg.h> 74 75 /* sorry, has to be here, no place else really suitable */ 76 #include <machine/pc/display.h> 77 u_short *Crtat = (u_short *)MONO_BUF; 78 79 /* 80 * Register definitions for DMA controller 1 (channels 0..3): 81 */ 82 #define DMA1_CHN(c) (IO_DMA1 + 1*(2*(c))) /* addr reg for channel c */ 83 #define DMA1_SR (IO_DMA1 + 1*8) /* status register */ 84 #define DMA1_SMSK (IO_DMA1 + 1*10) /* single mask register */ 85 #define DMA1_MODE (IO_DMA1 + 1*11) /* mode register */ 86 #define DMA1_FFC (IO_DMA1 + 1*12) /* clear first/last FF */ 87 88 /* 89 * Register definitions for DMA controller 2 (channels 4..7): 90 */ 91 #define DMA2_CHN(c) (IO_DMA2 + 2*(2*(c))) /* addr reg for channel c */ 92 #define DMA2_SR (IO_DMA2 + 2*8) /* status register */ 93 #define DMA2_SMSK (IO_DMA2 + 2*10) /* single mask register */ 94 #define DMA2_MODE (IO_DMA2 + 2*11) /* mode register */ 95 #define DMA2_FFC (IO_DMA2 + 2*12) /* clear first/last FF */ 96 97 int config_isadev(struct isa_device *); 98 static void sysbeepstop(int); 99 100 /* 101 * Configure all ISA devices 102 */ 103 void 104 isa_configure() 105 { 106 struct isa_device *dvp; 107 struct isa_driver *dp; 108 109 splhigh(); 110 INTREN(IRQ_SLAVE); 111 enable_intr(); 112 113 for (dvp = isa_devtab; dvp->id_driver; dvp++) 114 if (!dvp->id_parent || dvp->id_parent->id_alive) 115 config_isadev(dvp); 116 117 printf("biomask %x ttymask %x netmask %x\n", 118 biomask, ttymask, netmask); 119 120 clockmask |= astmask; 121 biomask |= astmask; 122 ttymask |= astmask; 123 netmask |= astmask; 124 impmask = netmask | ttymask; 125 126 spl0(); 127 } 128 129 /* 130 * Configure an ISA device. 131 */ 132 config_isadev(isdp) 133 struct isa_device *isdp; 134 { 135 struct isa_driver *dp = isdp->id_driver; 136 137 if (isdp->id_parent) { 138 /* Not really an ISA device; just call the probe and attach. */ 139 isdp->id_alive = (*dp->probe)(isdp); 140 if (isdp->id_alive) 141 (void)(*dp->attach)(isdp); 142 return; 143 } 144 145 if (isdp->id_maddr) { 146 extern u_int atdevbase; 147 148 isdp->id_maddr -= 0xa0000; /* XXX should be a define */ 149 isdp->id_maddr += atdevbase; 150 } 151 isdp->id_alive = (*dp->probe)(isdp); 152 if (isdp->id_irq == (u_short)-1) 153 isdp->id_alive = 0; 154 /* 155 * Only print the I/O address range if id_alive != -1 156 * Right now this is a temporary fix just for the new 157 * NPX code so that if it finds a 486 that can use trap 158 * 16 it will not report I/O addresses. 159 * Rod Grimes 04/26/94 160 * 161 * XXX -- cgd 162 */ 163 if (isdp->id_alive) { 164 printf("%s%d", dp->name, isdp->id_unit); 165 if (isdp->id_iobase) { 166 printf(" at 0x%x", isdp->id_iobase); 167 if ((isdp->id_iobase + isdp->id_alive - 1) != 168 isdp->id_iobase) 169 printf("-0x%x", isdp->id_iobase + 170 isdp->id_alive - 1); 171 } 172 if (isdp->id_irq != 0) 173 printf(" irq %d", ffs(isdp->id_irq)-1); 174 if (isdp->id_drq != -1) 175 printf(" drq %d", isdp->id_drq); 176 if (isdp->id_maddr != 0) 177 printf(" maddr 0x%x", kvtop(isdp->id_maddr)); 178 if (isdp->id_msize != 0) 179 printf("-0x%x", kvtop(isdp->id_maddr) + 180 isdp->id_msize - 1); 181 if (isdp->id_flags != 0) 182 printf(" flags 0x%x", isdp->id_flags); 183 printf(" on isa\n"); 184 185 (void)(*dp->attach)(isdp); 186 187 if (isdp->id_irq) { 188 int intrno; 189 190 intrno = ffs(isdp->id_irq)-1; 191 setidt(ICU_OFFSET+intrno, isdp->id_intr, 192 SDT_SYS386IGT, SEL_KPL); 193 if (isdp->id_mask) 194 INTRMASK(*isdp->id_mask, isdp->id_irq); 195 INTREN(isdp->id_irq); 196 } 197 } 198 } 199 200 201 #define IDTVEC(name) __CONCAT(X,name) 202 /* default interrupt vector table entries */ 203 extern IDTVEC(intr0), IDTVEC(intr1), IDTVEC(intr2), IDTVEC(intr3), 204 IDTVEC(intr4), IDTVEC(intr5), IDTVEC(intr6), IDTVEC(intr7), 205 IDTVEC(intr8), IDTVEC(intr9), IDTVEC(intr10), IDTVEC(intr11), 206 IDTVEC(intr12), IDTVEC(intr13), IDTVEC(intr14), IDTVEC(intr15); 207 208 static *defvec[16] = { 209 &IDTVEC(intr0), &IDTVEC(intr1), &IDTVEC(intr2), &IDTVEC(intr3), 210 &IDTVEC(intr4), &IDTVEC(intr5), &IDTVEC(intr6), &IDTVEC(intr7), 211 &IDTVEC(intr8), &IDTVEC(intr9), &IDTVEC(intr10), &IDTVEC(intr11), 212 &IDTVEC(intr12), &IDTVEC(intr13), &IDTVEC(intr14), &IDTVEC(intr15) }; 213 214 /* out of range default interrupt vector gate entry */ 215 extern IDTVEC(intrdefault); 216 217 /* 218 * Fill in default interrupt table (in case of spuruious interrupt 219 * during configuration of kernel, setup interrupt control unit 220 */ 221 void 222 isa_defaultirq() { 223 int i; 224 225 /* icu vectors */ 226 for (i = NRSVIDT ; i < NRSVIDT+ICU_LEN ; i++) 227 setidt(i, defvec[i], SDT_SYS386IGT, SEL_KPL); 228 229 /* out of range vectors */ 230 for (i = NRSVIDT; i < NIDT; i++) 231 setidt(i, &IDTVEC(intrdefault), SDT_SYS386IGT, SEL_KPL); 232 233 /* initialize 8259's */ 234 outb(IO_ICU1, 0x11); /* reset; program device, four bytes */ 235 outb(IO_ICU1+1, NRSVIDT); /* starting at this vector index */ 236 outb(IO_ICU1+1, 1<<2); /* slave on line 2 */ 237 #ifdef AUTO_EOI_1 238 outb(IO_ICU1+1, 2 | 1); /* auto EOI, 8086 mode */ 239 #else 240 outb(IO_ICU1+1, 1); /* 8086 mode */ 241 #endif 242 outb(IO_ICU1+1, 0xff); /* leave interrupts masked */ 243 outb(IO_ICU1, 0x0a); /* default to IRR on read */ 244 #ifdef REORDER_IRQ 245 outb(IO_ICU1, 0xc0 | (3 - 1)); /* pri order 3-7, 0-2 (com2 first) */ 246 #endif 247 248 outb(IO_ICU2, 0x11); /* reset; program device, four bytes */ 249 outb(IO_ICU2+1, NRSVIDT+8); /* staring at this vector index */ 250 outb(IO_ICU2+1,2); /* my slave id is 2 */ 251 #ifdef AUTO_EOI_2 252 outb(IO_ICU2+1, 2 | 1); /* auto EOI, 8086 mode */ 253 #else 254 outb(IO_ICU2+1,1); /* 8086 mode */ 255 #endif 256 outb(IO_ICU2+1, 0xff); /* leave interrupts masked */ 257 outb(IO_ICU2, 0x0a); /* default to IRR on read */ 258 } 259 260 /* region of physical memory known to be contiguous */ 261 vm_offset_t isaphysmem; 262 static caddr_t dma_bounce[8]; /* XXX */ 263 static char bounced[8]; /* XXX */ 264 #define MAXDMASZ 512 /* XXX */ 265 266 /* high byte of address is stored in this port for i-th dma channel */ 267 static short dmapageport[8] = 268 { 0x87, 0x83, 0x81, 0x82, 0x8f, 0x8b, 0x89, 0x8a }; 269 270 /* 271 * isa_dmacascade(): program 8237 DMA controller channel to accept 272 * external dma control by a board. 273 */ 274 void 275 isa_dmacascade(chan) 276 int chan; 277 { 278 279 #ifdef DIAGNOSTIC 280 if (chan < 0 || chan > 7) 281 panic("isa_dmacascade: impossible request"); 282 #endif 283 284 /* set dma channel mode, and set dma channel mode */ 285 if ((chan & 4) == 0) { 286 outb(DMA1_MODE, DMA37MD_CASCADE | chan); 287 outb(DMA1_SMSK, chan); 288 } else { 289 outb(DMA2_MODE, DMA37MD_CASCADE | (chan & 3)); 290 outb(DMA2_SMSK, chan & 3); 291 } 292 } 293 294 /* 295 * isa_dmastart(): program 8237 DMA controller channel, avoid page alignment 296 * problems by using a bounce buffer. 297 */ 298 void 299 isa_dmastart(flags, addr, nbytes, chan) 300 int flags; 301 caddr_t addr; 302 vm_size_t nbytes; 303 int chan; 304 { 305 vm_offset_t phys; 306 int waport; 307 caddr_t newaddr; 308 309 #ifdef DIAGNOSTIC 310 if (chan < 0 || chan > 7 || 311 ((chan & 4) ? (nbytes >= (1<<17) || nbytes & 1 || (u_int)addr & 1) : 312 (nbytes >= (1<<16)))) 313 panic("isa_dmastart: impossible request"); 314 #endif 315 316 if (isa_dmarangecheck(addr, nbytes, chan)) { 317 if (dma_bounce[chan] == 0) 318 dma_bounce[chan] = 319 /*(caddr_t)malloc(MAXDMASZ, M_TEMP, M_WAITOK);*/ 320 (caddr_t) isaphysmem + NBPG*chan; 321 bounced[chan] = 1; 322 newaddr = dma_bounce[chan]; 323 *(int *) newaddr = 0; /* XXX */ 324 /* copy bounce buffer on write */ 325 if ((flags & B_READ) == 0) 326 bcopy(addr, newaddr, nbytes); 327 addr = newaddr; 328 } 329 330 /* translate to physical */ 331 phys = pmap_extract(pmap_kernel(), (vm_offset_t)addr); 332 333 if ((chan & 4) == 0) { 334 /* 335 * Program one of DMA channels 0..3. These are 336 * byte mode channels. 337 */ 338 /* set dma channel mode, and reset address ff */ 339 if (flags & B_READ) 340 outb(DMA1_MODE, chan | DMA37MD_SINGLE | DMA37MD_WRITE); 341 else 342 outb(DMA1_MODE, chan | DMA37MD_SINGLE | DMA37MD_READ); 343 outb(DMA1_FFC, 0); 344 345 /* send start address */ 346 waport = DMA1_CHN(chan); 347 outb(waport, phys); 348 outb(waport, phys>>8); 349 outb(dmapageport[chan], phys>>16); 350 351 /* send count */ 352 outb(waport + 1, --nbytes); 353 outb(waport + 1, nbytes>>8); 354 355 /* unmask channel */ 356 outb(DMA1_SMSK, chan | DMA37SM_CLEAR); 357 } else { 358 /* 359 * Program one of DMA channels 4..7. These are 360 * word mode channels. 361 */ 362 /* set dma channel mode, and reset address ff */ 363 if (flags & B_READ) 364 outb(DMA2_MODE, (chan & 3) | DMA37MD_SINGLE | DMA37MD_WRITE); 365 else 366 outb(DMA2_MODE, (chan & 3) | DMA37MD_SINGLE | DMA37MD_READ); 367 outb(DMA2_FFC, 0); 368 369 /* send start address */ 370 waport = DMA2_CHN(chan & 3); 371 outb(waport, phys>>1); 372 outb(waport, phys>>9); 373 outb(dmapageport[chan], phys>>16); 374 375 /* send count */ 376 nbytes >>= 1; 377 outb(waport + 2, --nbytes); 378 outb(waport + 2, nbytes>>8); 379 380 /* unmask channel */ 381 outb(DMA2_SMSK, (chan & 3) | DMA37SM_CLEAR); 382 } 383 } 384 385 void 386 isa_dmaabort(chan) 387 int chan; 388 { 389 390 #ifdef DIAGNOSTIC 391 if (chan < 0 || chan > 7) 392 panic("isa_dmadone: impossible request"); 393 #endif 394 395 bounced[chan] = 0; 396 397 /* mask channel */ 398 if ((chan & 4) == 0) 399 outb(DMA1_SMSK, DMA37SM_SET | chan); 400 else 401 outb(DMA2_SMSK, DMA37SM_SET | (chan & 3)); 402 } 403 404 void 405 isa_dmadone(flags, addr, nbytes, chan) 406 int flags; 407 caddr_t addr; 408 vm_size_t nbytes; 409 int chan; 410 { 411 u_char tc; 412 413 #ifdef DIAGNOSTIC 414 if (chan < 0 || chan > 7) 415 panic("isa_dmadone: impossible request"); 416 #endif 417 418 /* check that the terminal count was reached */ 419 if ((chan & 4) == 0) 420 tc = inb(DMA1_SR) & (1 << chan); 421 else 422 tc = inb(DMA2_SR) & (1 << (chan & 3)); 423 if (tc == 0) 424 /* XXX probably should panic or something */ 425 log(LOG_ERR, "dma channel %d not finished\n", chan); 426 427 /* copy bounce buffer on read */ 428 if (bounced[chan]) { 429 bcopy(dma_bounce[chan], addr, nbytes); 430 bounced[chan] = 0; 431 } 432 433 /* mask channel */ 434 if ((chan & 4) == 0) 435 outb(DMA1_SMSK, DMA37SM_SET | chan); 436 else 437 outb(DMA2_SMSK, DMA37SM_SET | (chan & 3)); 438 } 439 440 /* 441 * Check for problems with the address range of a DMA transfer 442 * (non-contiguous physical pages, outside of bus address space, 443 * crossing DMA page boundaries). 444 * Return true if special handling needed. 445 */ 446 int 447 isa_dmarangecheck(va, length, chan) 448 vm_offset_t va; 449 u_long length; 450 int chan; 451 { 452 vm_offset_t phys, priorpage = 0, endva; 453 u_int dma_pgmsk = (chan & 4) ? ~(128*1024-1) : ~(64*1024-1); 454 455 endva = round_page(va + length); 456 for (; va < endva ; va += NBPG) { 457 phys = trunc_page(pmap_extract(pmap_kernel(), va)); 458 if (phys == 0) 459 panic("isa_dmacheck: no physical page present"); 460 if (phys >= (1<<24)) 461 return 1; 462 if (priorpage) { 463 if (priorpage + NBPG != phys) 464 return 1; 465 /* check if crossing a DMA page boundary */ 466 if ((priorpage ^ phys) & dma_pgmsk) 467 return 1; 468 } 469 priorpage = phys; 470 } 471 return 0; 472 } 473 474 /* head of queue waiting for physmem to become available */ 475 struct buf isa_physmemq; 476 477 /* blocked waiting for resource to become free for exclusive use */ 478 static isaphysmemflag; 479 /* if waited for and call requested when free (B_CALL) */ 480 static void (*isaphysmemunblock)(); /* needs to be a list */ 481 482 /* 483 * Allocate contiguous physical memory for transfer, returning 484 * a *virtual* address to region. May block waiting for resource. 485 * (assumed to be called at splbio()) 486 */ 487 caddr_t 488 isa_allocphysmem(caddr_t va, unsigned length, void (*func)()) { 489 490 isaphysmemunblock = func; 491 while (isaphysmemflag & B_BUSY) { 492 isaphysmemflag |= B_WANTED; 493 sleep((caddr_t)&isaphysmemflag, PRIBIO); 494 } 495 isaphysmemflag |= B_BUSY; 496 497 return((caddr_t)isaphysmem); 498 } 499 500 /* 501 * Free contiguous physical memory used for transfer. 502 * (assumed to be called at splbio()) 503 */ 504 void 505 isa_freephysmem(caddr_t va, unsigned length) { 506 507 isaphysmemflag &= ~B_BUSY; 508 if (isaphysmemflag & B_WANTED) { 509 isaphysmemflag &= B_WANTED; 510 wakeup((caddr_t)&isaphysmemflag); 511 if (isaphysmemunblock) 512 (*isaphysmemunblock)(); 513 } 514 } 515 516 /* 517 * Handle a NMI, possibly a machine check. 518 * return true to panic system, false to ignore. 519 */ 520 int 521 isa_nmi(cd) { 522 523 log(LOG_CRIT, "\nNMI port 61 %x, port 70 %x\n", inb(0x61), inb(0x70)); 524 return(0); 525 } 526 527 /* 528 * Caught a stray interrupt, notify 529 */ 530 void 531 isa_strayintr(d) { 532 533 /* DON'T BOTHER FOR NOW! */ 534 /* for some reason, we get bursts of intr #7, even if not enabled! */ 535 /* 536 * Well the reason you got bursts of intr #7 is because someone 537 * raised an interrupt line and dropped it before the 8259 could 538 * prioritize it. This is documented in the intel data book. This 539 * means you have BAD hardware! I have changed this so that only 540 * the first 5 get logged, then it quits logging them, and puts 541 * out a special message. rgrimes 3/25/1993 542 */ 543 extern u_long intrcnt_stray; 544 545 intrcnt_stray++; 546 if (intrcnt_stray <= 5) 547 log(LOG_ERR,"ISA strayintr %x\n", d); 548 if (intrcnt_stray == 5) 549 log(LOG_CRIT,"Too many ISA strayintr not logging any more\n"); 550 } 551 552 /* 553 * Wait "n" microseconds. 554 * Relies on timer 1 counting down from (TIMER_FREQ / hz) at TIMER_FREQ Hz. 555 * Note: timer had better have been programmed before this is first used! 556 * (Note that we use `rate generator' mode, which counts at 1:1; `square 557 * wave' mode counts at 2:1). 558 */ 559 void 560 delay(n) 561 int n; 562 { 563 int limit, tick, otick; 564 565 /* 566 * Read the counter first, so that the rest of the setup overhead is 567 * counted. 568 */ 569 otick = gettick(); 570 571 #ifdef __GNUC__ 572 /* 573 * Calculate ((n * TIMER_FREQ) / 1e6) using explicit assembler code so 574 * we can take advantage of the intermediate 64-bit quantity to prevent 575 * loss of significance. 576 */ 577 n -= 5; 578 if (n < 0) 579 return; 580 {register int m; 581 __asm __volatile("mul %3" 582 : "=a" (n), "=d" (m) 583 : "0" (n), "r" (TIMER_FREQ)); 584 __asm __volatile("div %3" 585 : "=a" (n) 586 : "0" (n), "d" (m), "r" (1000000) 587 : "%edx");} 588 #else 589 /* 590 * Calculate ((n * TIMER_FREQ) / 1e6) without using floating point and 591 * without any avoidable overflows. 592 */ 593 n -= 20; 594 { 595 int sec = n / 1000000, 596 usec = n % 1000000; 597 n = sec * TIMER_FREQ + 598 usec * (TIMER_FREQ / 1000000) + 599 usec * ((TIMER_FREQ % 1000000) / 1000) / 1000 + 600 usec * (TIMER_FREQ % 1000) / 1000000; 601 } 602 #endif 603 604 limit = TIMER_FREQ / hz; 605 606 while (n > 0) { 607 tick = gettick(); 608 if (tick > otick) 609 n -= limit - (tick - otick); 610 else 611 n -= otick - tick; 612 otick = tick; 613 } 614 } 615 616 int 617 gettick() 618 { 619 u_char lo, hi; 620 621 /* Don't want someone screwing with the counter while we're here. */ 622 disable_intr(); 623 /* Select counter 0 and latch it. */ 624 outb(TIMER_MODE, TIMER_SEL0 | TIMER_LATCH); 625 lo = inb(TIMER_CNTR0); 626 hi = inb(TIMER_CNTR0); 627 enable_intr(); 628 return ((hi << 8) | lo); 629 } 630 631 static beeping; 632 static void 633 sysbeepstop(int f) 634 { 635 int s = splhigh(); 636 637 /* disable counter 2 */ 638 disable_intr(); 639 outb(PITAUX_PORT, inb(PITAUX_PORT) & ~PIT_SPKR); 640 enable_intr(); 641 if (f) 642 timeout((timeout_t)sysbeepstop, (caddr_t)0, f); 643 else 644 beeping = 0; 645 646 splx(s); 647 } 648 649 void 650 sysbeep(int pitch, int period) 651 { 652 int s = splhigh(); 653 static int last_pitch, last_period; 654 655 if (beeping) { 656 untimeout((timeout_t)sysbeepstop, (caddr_t)(last_period/2)); 657 untimeout((timeout_t)sysbeepstop, (caddr_t)0); 658 } 659 if (!beeping || last_pitch != pitch) { 660 /* 661 * XXX - move timer stuff to clock.c. 662 */ 663 disable_intr(); 664 outb(TIMER_MODE, TIMER_SEL2|TIMER_16BIT|TIMER_SQWAVE); 665 outb(TIMER_CNTR2, TIMER_DIV(pitch)%256); 666 outb(TIMER_CNTR2, TIMER_DIV(pitch)/256); 667 outb(PITAUX_PORT, inb(PITAUX_PORT) | PIT_SPKR); /* enable counter 2 */ 668 enable_intr(); 669 } 670 last_pitch = pitch; 671 beeping = last_period = period; 672 timeout((timeout_t)sysbeepstop, (caddr_t)(period/2), period); 673 674 splx(s); 675 } 676 677 /* 678 * find an ISA device in a given isa_devtab_* table, given 679 * the table to search, the expected id_driver entry, and the unit number. 680 * 681 * this function is defined in isa_device.h, and this location is debatable; 682 * i put it there because it's useless w/o, and directly operates on 683 * the other stuff in that file. 684 * 685 */ 686 687 struct isa_device *find_isadev(table, driverp, unit) 688 struct isa_device *table; 689 struct isa_driver *driverp; 690 int unit; 691 { 692 if (driverp == NULL) /* sanity check */ 693 return NULL; 694 695 while ((table->id_driver != driverp) || (table->id_unit != unit)) { 696 if (table->id_driver == 0) 697 return NULL; 698 699 table++; 700 } 701 702 return table; 703 } 704 705 /* 706 * Return nonzero if a (masked) irq is pending for a given device. 707 */ 708 int 709 isa_irq_pending(dvp) 710 struct isa_device *dvp; 711 { 712 unsigned id_irq; 713 714 id_irq = (unsigned short) dvp->id_irq; /* XXX silly type in struct */ 715 if (id_irq & 0xff) 716 return (inb(IO_ICU1) & id_irq); 717 return (inb(IO_ICU2) & (id_irq >> 8)); 718 } 719
Indexes created Wed Oct 01 19:09:53 GMT 2025