isa.c revision 1.46
1 /*- 2 * Copyright (c) 1993, 1994 Charles Hannum. 3 * Copyright (c) 1991 The Regents of the University of California. 4 * All rights reserved. 5 * 6 * This code is derived from software contributed to Berkeley by 7 * William Jolitz. 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 1. Redistributions of source code must retain the above copyright 13 * notice, this list of conditions and the following disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 3. All advertising materials mentioning features or use of this software 18 * must display the following acknowledgement: 19 * This product includes software developed by the University of 20 * California, Berkeley and its contributors. 21 * 4. Neither the name of the University nor the names of its contributors 22 * may be used to endorse or promote products derived from this software 23 * without specific prior written permission. 24 * 25 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 26 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 27 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 28 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 29 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 30 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 31 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 32 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 33 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 34 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 35 * SUCH DAMAGE. 36 * 37 * from: @(#)isa.c 7.2 (Berkeley) 5/13/91 38 * $Id: isa.c,v 1.46 1994/03/29 04:34:18 mycroft Exp $ 39 */ 40 41 /* 42 * code to manage AT bus 43 * 44 * 92/08/18 Frank P. MacLachlan (fpm (at) crash.cts.com): 45 * Fixed uninitialized variable problem and added code to deal 46 * with DMA page boundaries in isa_dmarangecheck(). Fixed word 47 * mode DMA count compution and reorganized DMA setup code in 48 * isa_dmastart() 49 */ 50 51 #include <sys/param.h> 52 #include <sys/systm.h> 53 #include <sys/kernel.h> 54 #include <sys/conf.h> 55 #include <sys/file.h> 56 #include <sys/buf.h> 57 #include <sys/uio.h> 58 #include <sys/syslog.h> 59 #include <sys/malloc.h> 60 #include <sys/device.h> 61 62 #include <vm/vm.h> 63 64 #include <machine/segments.h> 65 #include <machine/pio.h> 66 #include <machine/cpufunc.h> 67 68 #include <i386/isa/isa.h> 69 #include <i386/isa/isa_device.h> 70 #include <i386/isa/isavar.h> 71 #include <i386/isa/icu.h> 72 #include <i386/isa/ic/i8237.h> 73 #include <i386/isa/ic/i8042.h> 74 #include <i386/isa/timerreg.h> 75 #include <i386/isa/spkr_reg.h> 76 77 /* sorry, has to be here, no place else really suitable */ 78 #include <machine/pc/display.h> 79 u_short *Crtat = (u_short *)MONO_BUF; 80 81 /* 82 * Register definitions for DMA controller 1 (channels 0..3): 83 */ 84 #define DMA1_CHN(c) (IO_DMA1 + 1*(2*(c))) /* addr reg for channel c */ 85 #define DMA1_SR (IO_DMA1 + 1*8) /* status register */ 86 #define DMA1_SMSK (IO_DMA1 + 1*10) /* single mask register */ 87 #define DMA1_MODE (IO_DMA1 + 1*11) /* mode register */ 88 #define DMA1_FFC (IO_DMA1 + 1*12) /* clear first/last FF */ 89 90 /* 91 * Register definitions for DMA controller 2 (channels 4..7): 92 */ 93 #define DMA2_CHN(c) (IO_DMA2 + 2*(2*(c))) /* addr reg for channel c */ 94 #define DMA2_SR (IO_DMA2 + 2*8) /* status register */ 95 #define DMA2_SMSK (IO_DMA2 + 2*10) /* single mask register */ 96 #define DMA2_MODE (IO_DMA2 + 2*11) /* mode register */ 97 #define DMA2_FFC (IO_DMA2 + 2*12) /* clear first/last FF */ 98 99 static void sysbeepstop(int); 100 101 /* 102 * Configure all ISA devices 103 * 104 * XXX This code is a hack. It wants to be new config, but can't be until the 105 * interrupt system is redone. For now, we do some gross hacks to make it look 106 * 99% like new config. 107 */ 108 static char *msgs[3] = { "", " not configured\n", " unsupported\n" }; 109 110 struct cfdata * 111 config_search(fn, parent, aux) 112 cfmatch_t fn; 113 struct device *parent; 114 void *aux; 115 { 116 struct cfdata *cf = 0; 117 struct device *dv = 0; 118 size_t devsize; 119 struct cfdriver *cd; 120 struct isa_device *id, 121 *idp = parent ? (void *)parent->dv_cfdata->cf_loc : 0; 122 123 for (id = isa_devtab; id->id_driver; id++) { 124 if (id->id_state == FSTATE_FOUND) 125 continue; 126 if (id->id_parent != idp) 127 continue; 128 cd = id->id_driver; 129 if (id->id_unit < cd->cd_ndevs) { 130 if (cd->cd_devs[id->id_unit] != 0) 131 continue; 132 } else { 133 int old = cd->cd_ndevs, new; 134 void **nsp; 135 136 if (old == 0) { 137 nsp = malloc(MINALLOCSIZE, M_DEVBUF, M_NOWAIT); 138 if (!nsp) 139 panic("config_search: creating dev array"); 140 bzero(nsp, MINALLOCSIZE); 141 cd->cd_ndevs = MINALLOCSIZE / sizeof(void *); 142 } else { 143 new = old; 144 do { 145 new *= 2; 146 } while (new <= id->id_unit); 147 cd->cd_ndevs = new; 148 nsp = malloc(new * sizeof(void *), M_DEVBUF, 149 M_NOWAIT); 150 if (!nsp) 151 panic("config_search: expanding dev array"); 152 bzero(nsp, new * sizeof(void *)); 153 bcopy(cd->cd_devs, nsp, old * sizeof(void *)); 154 free(cd->cd_devs, M_DEVBUF); 155 } 156 cd->cd_devs = nsp; 157 } 158 if (!cf) { 159 cf = malloc(sizeof(struct cfdata), M_DEVBUF, M_NOWAIT); if (!cf) 160 panic("config_search: creating cfdata"); 161 } 162 cf->cf_driver = cd; 163 cf->cf_unit = id->id_unit; 164 cf->cf_fstate = 0; 165 cf->cf_loc = (void *)id; 166 cf->cf_flags = id->id_flags; 167 cf->cf_parents = 0; 168 cf->cf_ivstubs = 0; 169 if (dv && devsize != cd->cd_devsize) { 170 free(dv, M_DEVBUF); 171 dv = 0; 172 } 173 if (!dv) { 174 devsize = cd->cd_devsize; 175 dv = malloc(devsize, M_DEVBUF, M_NOWAIT); 176 if (!dv) 177 panic("config_search: creating softc"); 178 } 179 bzero(dv, cd->cd_devsize); 180 dv->dv_class = cd->cd_class; 181 dv->dv_cfdata = cf; 182 dv->dv_unit = id->id_unit; 183 sprintf(dv->dv_xname, "%s%d", cd->cd_name, id->id_unit); 184 dv->dv_parent = parent; 185 cd->cd_devs[id->id_unit] = dv; 186 if (fn) { 187 if ((*fn)(parent, dv, aux)) 188 return cf; 189 } else { 190 if ((*cd->cd_match)(parent, dv, aux)) 191 return cf; 192 } 193 if (id->id_state == FSTATE_FOUND) { 194 cf = 0; 195 dv = 0; 196 } else 197 cd->cd_devs[id->id_unit] = 0; 198 } 199 if (cf) 200 free(cf, M_DEVBUF); 201 if (dv) 202 free(dv, M_DEVBUF); 203 return 0; 204 } 205 206 void 207 config_attach(parent, cf, aux, print) 208 struct device *parent; 209 struct cfdata *cf; 210 void *aux; 211 cfprint_t print; 212 { 213 struct isa_device *id = (void *)cf->cf_loc; 214 struct cfdriver *cd = cf->cf_driver; 215 struct device *dv = cd->cd_devs[id->id_unit]; 216 217 cf->cf_fstate = id->id_state = FSTATE_FOUND; 218 printf("%s at %s", dv->dv_xname, parent ? parent->dv_xname : "isa0"); 219 if (print) 220 (void) (*print)(aux, (char *)0); 221 (*cd->cd_attach)(parent, dv, aux); 222 } 223 224 int 225 config_found(parent, aux, print) 226 struct device *parent; 227 void *aux; 228 cfprint_t print; 229 { 230 struct cfdata *cf; 231 232 if ((cf = config_search((cfmatch_t)NULL, parent, aux)) != NULL) { 233 config_attach(parent, cf, aux, print); 234 return 1; 235 } 236 if (print) 237 printf(msgs[(*print)(aux, parent->dv_xname)]); 238 return 0; 239 } 240 241 int 242 isaprint(aux, isa) 243 void *aux; 244 char *isa; 245 { 246 struct isa_attach_args *ia = aux; 247 248 if (ia->ia_iosize) 249 printf(" port 0x%x", ia->ia_iobase); 250 if (ia->ia_iosize > 1) 251 printf("-0x%x", ia->ia_iobase + ia->ia_iosize - 1); 252 if (ia->ia_msize) 253 printf(" iomem 0x%x", ia->ia_maddr - atdevbase + 0xa0000); 254 if (ia->ia_msize > 1) 255 printf("-0x%x", 256 ia->ia_maddr - atdevbase + 0xa0000 + ia->ia_msize - 1); 257 if (ia->ia_irq) 258 printf(" irq %d", ffs(ia->ia_irq) - 1); 259 if (ia->ia_drq != (u_short)-1) 260 printf(" drq %d", ia->ia_drq); 261 /* XXXX print flags */ 262 return QUIET; 263 } 264 265 int 266 isasubmatch(parent, self, aux) 267 struct device *parent, *self; 268 void *aux; 269 { 270 struct isa_device *id = (void *)self->dv_cfdata->cf_loc; 271 struct isa_attach_args ia; 272 273 ia.ia_iobase = id->id_iobase; 274 ia.ia_iosize = 0x666; 275 ia.ia_irq = id->id_irq; 276 ia.ia_drq = id->id_drq; 277 ia.ia_maddr = id->id_maddr - 0xa0000 + atdevbase; 278 ia.ia_msize = id->id_msize; 279 280 if (!(*id->id_driver->cd_match)(parent, self, &ia)) { 281 /* 282 * If we don't do this, isa_configure() will repeatedly try to 283 * probe devices that weren't found. But we need to be careful 284 * to do it only for the ISA bus, or we would cause things like 285 * `com0 at ast? slave ?' to not probe on the second ast. 286 */ 287 if (!parent) 288 id->id_state = FSTATE_FOUND; 289 290 return 0; 291 } 292 293 config_attach(parent, self->dv_cfdata, &ia, isaprint); 294 295 if (id->id_irq) { 296 int intrno; 297 298 intrno = ffs(id->id_irq) - 1; 299 setidt(ICU_OFFSET+intrno, id->id_intr, SDT_SYS386IGT, SEL_KPL); 300 if (id->id_mask) 301 INTRMASK(*id->id_mask, id->id_irq); 302 INTREN(id->id_irq); 303 } 304 305 return 1; 306 } 307 308 void 309 isa_configure() 310 { 311 312 splhigh(); 313 INTREN(IRQ_SLAVE); 314 enable_intr(); 315 316 while (config_search(isasubmatch, NULL, NULL)); 317 318 printf("biomask %x ttymask %x netmask %x\n", 319 biomask, ttymask, netmask); 320 321 clockmask |= astmask; 322 biomask |= astmask; 323 ttymask |= astmask; 324 netmask |= astmask; 325 impmask = netmask | ttymask; 326 327 spl0(); 328 } 329 330 #define IDTVEC(name) __CONCAT(X,name) 331 /* default interrupt vector table entries */ 332 extern IDTVEC(intr0), IDTVEC(intr1), IDTVEC(intr2), IDTVEC(intr3), 333 IDTVEC(intr4), IDTVEC(intr5), IDTVEC(intr6), IDTVEC(intr7), 334 IDTVEC(intr8), IDTVEC(intr9), IDTVEC(intr10), IDTVEC(intr11), 335 IDTVEC(intr12), IDTVEC(intr13), IDTVEC(intr14), IDTVEC(intr15); 336 337 static *defvec[16] = { 338 &IDTVEC(intr0), &IDTVEC(intr1), &IDTVEC(intr2), &IDTVEC(intr3), 339 &IDTVEC(intr4), &IDTVEC(intr5), &IDTVEC(intr6), &IDTVEC(intr7), 340 &IDTVEC(intr8), &IDTVEC(intr9), &IDTVEC(intr10), &IDTVEC(intr11), 341 &IDTVEC(intr12), &IDTVEC(intr13), &IDTVEC(intr14), &IDTVEC(intr15) }; 342 343 /* out of range default interrupt vector gate entry */ 344 extern IDTVEC(intrdefault); 345 346 /* 347 * Fill in default interrupt table (in case of spuruious interrupt 348 * during configuration of kernel, setup interrupt control unit 349 */ 350 void 351 isa_defaultirq() { 352 int i; 353 354 /* icu vectors */ 355 for (i = NRSVIDT ; i < NRSVIDT+ICU_LEN ; i++) 356 setidt(i, defvec[i], SDT_SYS386IGT, SEL_KPL); 357 358 /* out of range vectors */ 359 for (i = NRSVIDT; i < NIDT; i++) 360 setidt(i, &IDTVEC(intrdefault), SDT_SYS386IGT, SEL_KPL); 361 362 /* initialize 8259's */ 363 outb(IO_ICU1, 0x11); /* reset; program device, four bytes */ 364 outb(IO_ICU1+1, NRSVIDT); /* starting at this vector index */ 365 outb(IO_ICU1+1, 1<<2); /* slave on line 2 */ 366 #ifdef AUTO_EOI_1 367 outb(IO_ICU1+1, 2 | 1); /* auto EOI, 8086 mode */ 368 #else 369 outb(IO_ICU1+1, 1); /* 8086 mode */ 370 #endif 371 outb(IO_ICU1+1, 0xff); /* leave interrupts masked */ 372 outb(IO_ICU1, 0x0a); /* default to IRR on read */ 373 #ifdef REORDER_IRQ 374 outb(IO_ICU1, 0xc0 | (3 - 1)); /* pri order 3-7, 0-2 (com2 first) */ 375 #endif 376 377 outb(IO_ICU2, 0x11); /* reset; program device, four bytes */ 378 outb(IO_ICU2+1, NRSVIDT+8); /* staring at this vector index */ 379 outb(IO_ICU2+1,2); /* my slave id is 2 */ 380 #ifdef AUTO_EOI_2 381 outb(IO_ICU2+1, 2 | 1); /* auto EOI, 8086 mode */ 382 #else 383 outb(IO_ICU2+1,1); /* 8086 mode */ 384 #endif 385 outb(IO_ICU2+1, 0xff); /* leave interrupts masked */ 386 outb(IO_ICU2, 0x0a); /* default to IRR on read */ 387 } 388 389 /* region of physical memory known to be contiguous */ 390 vm_offset_t isaphysmem; 391 static caddr_t dma_bounce[8]; /* XXX */ 392 static char bounced[8]; /* XXX */ 393 #define MAXDMASZ 512 /* XXX */ 394 395 /* high byte of address is stored in this port for i-th dma channel */ 396 static short dmapageport[8] = 397 { 0x87, 0x83, 0x81, 0x82, 0x8f, 0x8b, 0x89, 0x8a }; 398 399 /* 400 * isa_dmacascade(): program 8237 DMA controller channel to accept 401 * external dma control by a board. 402 */ 403 void 404 isa_dmacascade(chan) 405 int chan; 406 { 407 408 #ifdef DIAGNOSTIC 409 if (chan < 0 || chan > 7) 410 panic("isa_dmacascade: impossible request"); 411 #endif 412 413 /* set dma channel mode, and set dma channel mode */ 414 if ((chan & 4) == 0) { 415 outb(DMA1_MODE, DMA37MD_CASCADE | chan); 416 outb(DMA1_SMSK, chan); 417 } else { 418 outb(DMA2_MODE, DMA37MD_CASCADE | (chan & 3)); 419 outb(DMA2_SMSK, chan & 3); 420 } 421 } 422 423 /* 424 * isa_dmastart(): program 8237 DMA controller channel, avoid page alignment 425 * problems by using a bounce buffer. 426 */ 427 void 428 isa_dmastart(flags, addr, nbytes, chan) 429 int flags; 430 caddr_t addr; 431 vm_size_t nbytes; 432 int chan; 433 { 434 vm_offset_t phys; 435 int waport; 436 caddr_t newaddr; 437 438 #ifdef DIAGNOSTIC 439 if (chan < 0 || chan > 7 || 440 ((chan & 4) ? (nbytes >= (1<<17) || nbytes & 1 || (u_int)addr & 1) : 441 (nbytes >= (1<<16)))) 442 panic("isa_dmastart: impossible request"); 443 #endif 444 445 if (isa_dmarangecheck(addr, nbytes, chan)) { 446 if (dma_bounce[chan] == 0) 447 dma_bounce[chan] = 448 /*(caddr_t)malloc(MAXDMASZ, M_TEMP, M_WAITOK);*/ 449 (caddr_t) isaphysmem + NBPG*chan; 450 bounced[chan] = 1; 451 newaddr = dma_bounce[chan]; 452 *(int *) newaddr = 0; /* XXX */ 453 /* copy bounce buffer on write */ 454 if ((flags & B_READ) == 0) 455 bcopy(addr, newaddr, nbytes); 456 addr = newaddr; 457 } 458 459 /* translate to physical */ 460 phys = pmap_extract(pmap_kernel(), (vm_offset_t)addr); 461 462 if ((chan & 4) == 0) { 463 /* 464 * Program one of DMA channels 0..3. These are 465 * byte mode channels. 466 */ 467 /* set dma channel mode, and reset address ff */ 468 if (flags & B_READ) 469 outb(DMA1_MODE, chan | DMA37MD_SINGLE | DMA37MD_WRITE); 470 else 471 outb(DMA1_MODE, chan | DMA37MD_SINGLE | DMA37MD_READ); 472 outb(DMA1_FFC, 0); 473 474 /* send start address */ 475 waport = DMA1_CHN(chan); 476 outb(waport, phys); 477 outb(waport, phys>>8); 478 outb(dmapageport[chan], phys>>16); 479 480 /* send count */ 481 outb(waport + 1, --nbytes); 482 outb(waport + 1, nbytes>>8); 483 484 /* unmask channel */ 485 outb(DMA1_SMSK, chan | DMA37SM_CLEAR); 486 } else { 487 /* 488 * Program one of DMA channels 4..7. These are 489 * word mode channels. 490 */ 491 /* set dma channel mode, and reset address ff */ 492 if (flags & B_READ) 493 outb(DMA2_MODE, (chan & 3) | DMA37MD_SINGLE | DMA37MD_WRITE); 494 else 495 outb(DMA2_MODE, (chan & 3) | DMA37MD_SINGLE | DMA37MD_READ); 496 outb(DMA2_FFC, 0); 497 498 /* send start address */ 499 waport = DMA2_CHN(chan & 3); 500 outb(waport, phys>>1); 501 outb(waport, phys>>9); 502 outb(dmapageport[chan], phys>>16); 503 504 /* send count */ 505 nbytes >>= 1; 506 outb(waport + 2, --nbytes); 507 outb(waport + 2, nbytes>>8); 508 509 /* unmask channel */ 510 outb(DMA2_SMSK, (chan & 3) | DMA37SM_CLEAR); 511 } 512 } 513 514 void 515 isa_dmaabort(chan) 516 int chan; 517 { 518 519 #ifdef DIAGNOSTIC 520 if (chan < 0 || chan > 7) 521 panic("isa_dmadone: impossible request"); 522 #endif 523 524 bounced[chan] = 0; 525 526 /* mask channel */ 527 if ((chan & 4) == 0) 528 outb(DMA1_SMSK, DMA37SM_SET | chan); 529 else 530 outb(DMA2_SMSK, DMA37SM_SET | (chan & 3)); 531 } 532 533 void 534 isa_dmadone(flags, addr, nbytes, chan) 535 int flags; 536 caddr_t addr; 537 vm_size_t nbytes; 538 int chan; 539 { 540 u_char tc; 541 542 #ifdef DIAGNOSTIC 543 if (chan < 0 || chan > 7) 544 panic("isa_dmadone: impossible request"); 545 #endif 546 547 /* check that the terminal count was reached */ 548 if ((chan & 4) == 0) 549 tc = inb(DMA1_SR) & (1 << chan); 550 else 551 tc = inb(DMA2_SR) & (1 << (chan & 3)); 552 if (tc == 0) 553 /* XXX probably should panic or something */ 554 log(LOG_ERR, "dma channel %d not finished\n", chan); 555 556 /* copy bounce buffer on read */ 557 if (bounced[chan]) { 558 bcopy(dma_bounce[chan], addr, nbytes); 559 bounced[chan] = 0; 560 } 561 562 /* mask channel */ 563 if ((chan & 4) == 0) 564 outb(DMA1_SMSK, DMA37SM_SET | chan); 565 else 566 outb(DMA2_SMSK, DMA37SM_SET | (chan & 3)); 567 } 568 569 /* 570 * Check for problems with the address range of a DMA transfer 571 * (non-contiguous physical pages, outside of bus address space, 572 * crossing DMA page boundaries). 573 * Return true if special handling needed. 574 */ 575 int 576 isa_dmarangecheck(va, length, chan) 577 vm_offset_t va; 578 u_long length; 579 int chan; 580 { 581 vm_offset_t phys, priorpage = 0, endva; 582 u_int dma_pgmsk = (chan & 4) ? ~(128*1024-1) : ~(64*1024-1); 583 584 endva = round_page(va + length); 585 for (; va < endva ; va += NBPG) { 586 phys = trunc_page(pmap_extract(pmap_kernel(), va)); 587 if (phys == 0) 588 panic("isa_dmacheck: no physical page present"); 589 if (phys >= (1<<24)) 590 return 1; 591 if (priorpage) { 592 if (priorpage + NBPG != phys) 593 return 1; 594 /* check if crossing a DMA page boundary */ 595 if ((priorpage ^ phys) & dma_pgmsk) 596 return 1; 597 } 598 priorpage = phys; 599 } 600 return 0; 601 } 602 603 /* head of queue waiting for physmem to become available */ 604 struct buf isa_physmemq; 605 606 /* blocked waiting for resource to become free for exclusive use */ 607 static isaphysmemflag; 608 /* if waited for and call requested when free (B_CALL) */ 609 static void (*isaphysmemunblock)(); /* needs to be a list */ 610 611 /* 612 * Allocate contiguous physical memory for transfer, returning 613 * a *virtual* address to region. May block waiting for resource. 614 * (assumed to be called at splbio()) 615 */ 616 caddr_t 617 isa_allocphysmem(caddr_t va, unsigned length, void (*func)()) { 618 619 isaphysmemunblock = func; 620 while (isaphysmemflag & B_BUSY) { 621 isaphysmemflag |= B_WANTED; 622 sleep((caddr_t)&isaphysmemflag, PRIBIO); 623 } 624 isaphysmemflag |= B_BUSY; 625 626 return((caddr_t)isaphysmem); 627 } 628 629 /* 630 * Free contiguous physical memory used for transfer. 631 * (assumed to be called at splbio()) 632 */ 633 void 634 isa_freephysmem(caddr_t va, unsigned length) { 635 636 isaphysmemflag &= ~B_BUSY; 637 if (isaphysmemflag & B_WANTED) { 638 isaphysmemflag &= B_WANTED; 639 wakeup((caddr_t)&isaphysmemflag); 640 if (isaphysmemunblock) 641 (*isaphysmemunblock)(); 642 } 643 } 644 645 /* 646 * Handle a NMI, possibly a machine check. 647 * return true to panic system, false to ignore. 648 */ 649 int 650 isa_nmi(cd) { 651 652 log(LOG_CRIT, "\nNMI port 61 %x, port 70 %x\n", inb(0x61), inb(0x70)); 653 return(0); 654 } 655 656 /* 657 * Caught a stray interrupt, notify 658 */ 659 void 660 isa_strayintr(d) { 661 662 /* DON'T BOTHER FOR NOW! */ 663 /* for some reason, we get bursts of intr #7, even if not enabled! */ 664 /* 665 * Well the reason you got bursts of intr #7 is because someone 666 * raised an interrupt line and dropped it before the 8259 could 667 * prioritize it. This is documented in the intel data book. This 668 * means you have BAD hardware! I have changed this so that only 669 * the first 5 get logged, then it quits logging them, and puts 670 * out a special message. rgrimes 3/25/1993 671 */ 672 extern u_long intrcnt_stray; 673 674 intrcnt_stray++; 675 if (intrcnt_stray <= 5) 676 log(LOG_ERR,"ISA strayintr %x\n", d); 677 if (intrcnt_stray == 5) 678 log(LOG_CRIT,"Too many ISA strayintr not logging any more\n"); 679 } 680 681 static beeping; 682 static void 683 sysbeepstop(int f) 684 { 685 int s = splhigh(); 686 687 /* disable counter 2 */ 688 disable_intr(); 689 outb(PITAUX_PORT, inb(PITAUX_PORT) & ~PIT_SPKR); 690 enable_intr(); 691 if (f) 692 timeout((timeout_t)sysbeepstop, (caddr_t)0, f); 693 else 694 beeping = 0; 695 696 splx(s); 697 } 698 699 void 700 sysbeep(int pitch, int period) 701 { 702 int s = splhigh(); 703 static int last_pitch, last_period; 704 705 if (beeping) { 706 untimeout((timeout_t)sysbeepstop, (caddr_t)(last_period/2)); 707 untimeout((timeout_t)sysbeepstop, (caddr_t)0); 708 } 709 if (!beeping || last_pitch != pitch) { 710 /* 711 * XXX - move timer stuff to clock.c. 712 */ 713 disable_intr(); 714 outb(TIMER_MODE, TIMER_SEL2|TIMER_16BIT|TIMER_SQWAVE); 715 outb(TIMER_CNTR2, TIMER_DIV(pitch)%256); 716 outb(TIMER_CNTR2, TIMER_DIV(pitch)/256); 717 outb(PITAUX_PORT, inb(PITAUX_PORT) | PIT_SPKR); /* enable counter 2 */ 718 enable_intr(); 719 } 720 last_pitch = pitch; 721 beeping = last_period = period; 722 timeout((timeout_t)sysbeepstop, (caddr_t)(period/2), period); 723 724 splx(s); 725 } 726 727 /* 728 * Return nonzero if a (masked) irq is pending for a given device. 729 */ 730 int 731 isa_irq_pending(dvp) 732 struct isa_device *dvp; 733 { 734 unsigned id_irq; 735 736 id_irq = (unsigned short) dvp->id_irq; /* XXX silly type in struct */ 737 if (id_irq & 0xff) 738 return (inb(IO_ICU1) & id_irq); 739 return (inb(IO_ICU2) & (id_irq >> 8)); 740 } 741
Indexes created Tue Sep 30 06:09:59 GMT 2025