isadma.c revision 1.17
1 /* $NetBSD: isadma.c,v 1.17 1996/03/01 04:35:27 mycroft Exp $ */ 2 3 #include <sys/param.h> 4 #include <sys/systm.h> 5 #include <sys/file.h> 6 #include <sys/buf.h> 7 #include <sys/syslog.h> 8 #include <sys/malloc.h> 9 #include <sys/uio.h> 10 11 #include <vm/vm.h> 12 13 #include <machine/pio.h> 14 15 #include <dev/isa/isareg.h> 16 #include <dev/isa/isadmavar.h> 17 #include <dev/isa/isadmareg.h> 18 19 /* region of physical memory known to be contiguous */ 20 vm_offset_t isaphysmem; 21 static caddr_t dma_bounce[8]; /* XXX */ 22 static char bounced[8]; /* XXX */ 23 #define MAXDMASZ 512 /* XXX */ 24 static u_int8_t dma_finished; 25 26 /* high byte of address is stored in this port for i-th dma channel */ 27 static int dmapageport[8] = { 28 0x87, 0x83, 0x81, 0x82, 0x8f, 0x8b, 0x89, 0x8a 29 }; 30 31 static u_int8_t dmamode[4] = { 32 DMA37MD_READ | DMA37MD_SINGLE, 33 DMA37MD_WRITE | DMA37MD_SINGLE, 34 DMA37MD_READ | DMA37MD_LOOP, 35 DMA37MD_WRITE | DMA37MD_LOOP 36 }; 37 38 /* 39 * isa_dmacascade(): program 8237 DMA controller channel to accept 40 * external dma control by a board. 41 */ 42 void 43 isa_dmacascade(chan) 44 int chan; 45 { 46 47 #ifdef ISADMA_DEBUG 48 if (chan < 0 || chan > 7) 49 panic("isa_dmacascade: impossible request"); 50 #endif 51 52 /* set dma channel mode, and set dma channel mode */ 53 if ((chan & 4) == 0) { 54 outb(DMA1_MODE, chan | DMA37MD_CASCADE); 55 outb(DMA1_SMSK, chan); 56 } else { 57 chan &= 3; 58 59 outb(DMA2_MODE, chan | DMA37MD_CASCADE); 60 outb(DMA2_SMSK, chan); 61 } 62 } 63 64 /* 65 * isa_dmastart(): program 8237 DMA controller channel, avoid page alignment 66 * problems by using a bounce buffer. 67 */ 68 void 69 isa_dmastart(flags, addr, nbytes, chan) 70 int flags; 71 caddr_t addr; 72 vm_size_t nbytes; 73 int chan; 74 { 75 vm_offset_t phys; 76 int waport; 77 caddr_t newaddr; 78 79 #ifdef ISADMA_DEBUG 80 if (chan < 0 || chan > 7 || 81 ((chan & 4) ? (nbytes >= (1<<17) || nbytes & 1 || (u_int)addr & 1) : 82 (nbytes >= (1<<16)))) 83 panic("isa_dmastart: impossible request"); 84 #endif 85 86 if (isa_dmarangecheck(addr, nbytes, chan)) { 87 if (dma_bounce[chan] == 0) 88 dma_bounce[chan] = 89 /*(caddr_t)malloc(MAXDMASZ, M_TEMP, M_WAITOK);*/ 90 (caddr_t) isaphysmem + NBPG*chan; 91 bounced[chan] = 1; 92 newaddr = dma_bounce[chan]; 93 *(int *) newaddr = 0; /* XXX */ 94 /* copy bounce buffer on write */ 95 if ((flags & DMAMODE_READ) == 0) 96 bcopy(addr, newaddr, nbytes); 97 addr = newaddr; 98 } 99 100 /* translate to physical */ 101 phys = pmap_extract(pmap_kernel(), (vm_offset_t)addr); 102 103 dma_finished &= ~(1 << chan); 104 105 if ((chan & 4) == 0) { 106 /* 107 * Program one of DMA channels 0..3. These are 108 * byte mode channels. 109 */ 110 /* set dma channel mode, and reset address ff */ 111 outb(DMA1_MODE, chan | dmamode[flags]); 112 outb(DMA1_FFC, 0); 113 114 /* send start address */ 115 waport = DMA1_CHN(chan); 116 outb(dmapageport[chan], phys>>16); 117 outb(waport, phys); 118 outb(waport, phys>>8); 119 120 /* send count */ 121 outb(waport + 1, --nbytes); 122 outb(waport + 1, nbytes>>8); 123 124 /* unmask channel */ 125 outb(DMA1_SMSK, chan | DMA37SM_CLEAR); 126 } else { 127 chan &= 3; 128 129 /* 130 * Program one of DMA channels 4..7. These are 131 * word mode channels. 132 */ 133 /* set dma channel mode, and reset address ff */ 134 outb(DMA2_MODE, chan | dmamode[flags]); 135 outb(DMA2_FFC, 0); 136 137 /* send start address */ 138 waport = DMA2_CHN(chan); 139 outb(dmapageport[chan], phys>>16); 140 phys >>= 1; 141 outb(waport, phys); 142 outb(waport, phys>>8); 143 144 /* send count */ 145 nbytes >>= 1; 146 outb(waport + 2, --nbytes); 147 outb(waport + 2, nbytes>>8); 148 149 /* unmask channel */ 150 outb(DMA2_SMSK, chan | DMA37SM_CLEAR); 151 } 152 } 153 154 void 155 isa_dmaabort(chan) 156 int chan; 157 { 158 159 #ifdef ISADMA_DEBUG 160 if (chan < 0 || chan > 7) 161 panic("isa_dmaabort: impossible request"); 162 #endif 163 164 bounced[chan] = 0; 165 166 /* mask channel */ 167 if ((chan & 4) == 0) 168 outb(DMA1_SMSK, DMA37SM_SET | chan); 169 else 170 outb(DMA2_SMSK, DMA37SM_SET | (chan & 3)); 171 } 172 173 int 174 isa_dmafinished(chan) 175 int chan; 176 { 177 178 #ifdef ISADMA_DEBUG 179 if (chan < 0 || chan > 7) 180 panic("isa_dmafinished: impossible request"); 181 #endif 182 183 /* check that the terminal count was reached */ 184 if ((chan & 4) == 0) 185 dma_finished |= inb(DMA1_SR) & 0x0f; 186 else 187 dma_finished |= (inb(DMA2_SR) & 0x0f) << 4; 188 189 return ((dma_finished & (1 << chan)) != 0); 190 } 191 192 void 193 isa_dmadone(flags, addr, nbytes, chan) 194 int flags; 195 caddr_t addr; 196 vm_size_t nbytes; 197 int chan; 198 { 199 200 #ifdef ISADMA_DEBUG 201 if (chan < 0 || chan > 7) 202 panic("isa_dmadone: impossible request"); 203 #endif 204 205 if (!isa_dmafinished(chan)) 206 printf("isa_dmadone: channel %d not finished\n", chan); 207 208 /* mask channel */ 209 if ((chan & 4) == 0) 210 outb(DMA1_SMSK, DMA37SM_SET | chan); 211 else 212 outb(DMA2_SMSK, DMA37SM_SET | (chan & 3)); 213 214 /* copy bounce buffer on read */ 215 if (bounced[chan]) { 216 bcopy(dma_bounce[chan], addr, nbytes); 217 bounced[chan] = 0; 218 } 219 } 220 221 /* 222 * Check for problems with the address range of a DMA transfer 223 * (non-contiguous physical pages, outside of bus address space, 224 * crossing DMA page boundaries). 225 * Return true if special handling needed. 226 */ 227 int 228 isa_dmarangecheck(va, length, chan) 229 vm_offset_t va; 230 u_long length; 231 int chan; 232 { 233 vm_offset_t phys, priorpage = 0, endva; 234 u_int dma_pgmsk = (chan & 4) ? ~(128*1024-1) : ~(64*1024-1); 235 236 endva = round_page(va + length); 237 for (; va < endva ; va += NBPG) { 238 phys = trunc_page(pmap_extract(pmap_kernel(), va)); 239 if (phys == 0) 240 panic("isa_dmacheck: no physical page present"); 241 if (phys >= (1<<24)) 242 return 1; 243 if (priorpage) { 244 if (priorpage + NBPG != phys) 245 return 1; 246 /* check if crossing a DMA page boundary */ 247 if ((priorpage ^ phys) & dma_pgmsk) 248 return 1; 249 } 250 priorpage = phys; 251 } 252 return 0; 253 } 254 255 /* head of queue waiting for physmem to become available */ 256 struct buf isa_physmemq; 257 258 /* blocked waiting for resource to become free for exclusive use */ 259 static isaphysmemflag; 260 /* if waited for and call requested when free (B_CALL) */ 261 static void (*isaphysmemunblock)(); /* needs to be a list */ 262 263 /* 264 * Allocate contiguous physical memory for transfer, returning 265 * a *virtual* address to region. May block waiting for resource. 266 * (assumed to be called at splbio()) 267 */ 268 caddr_t 269 isa_allocphysmem(caddr_t va, unsigned length, void (*func)()) { 270 271 isaphysmemunblock = func; 272 while (isaphysmemflag & B_BUSY) { 273 isaphysmemflag |= B_WANTED; 274 sleep((caddr_t)&isaphysmemflag, PRIBIO); 275 } 276 isaphysmemflag |= B_BUSY; 277 278 return((caddr_t)isaphysmem); 279 } 280 281 /* 282 * Free contiguous physical memory used for transfer. 283 * (assumed to be called at splbio()) 284 */ 285 void 286 isa_freephysmem(caddr_t va, unsigned length) { 287 288 isaphysmemflag &= ~B_BUSY; 289 if (isaphysmemflag & B_WANTED) { 290 isaphysmemflag &= B_WANTED; 291 wakeup((caddr_t)&isaphysmemflag); 292 if (isaphysmemunblock) 293 (*isaphysmemunblock)(); 294 } 295 } 296
Indexes created Tue Sep 23 14:10:03 GMT 2025