isadma.c revision 1.22 1 /* $NetBSD: isadma.c,v 1.22 1997/03/21 00:00:21 mycroft Exp $ */
2
3 #include <sys/param.h>
4 #include <sys/systm.h>
5 #include <sys/file.h>
6 #include <sys/buf.h>
7 #include <sys/syslog.h>
8 #include <sys/malloc.h>
9 #include <sys/proc.h>
10 #include <sys/uio.h>
11
12 #include <vm/vm.h>
13
14 #include <machine/pio.h>
15
16 #include <dev/isa/isareg.h>
17 #include <dev/isa/isadmavar.h>
18 #include <dev/isa/isadmareg.h>
19
20 /* region of physical memory known to be contiguous */
21 vm_offset_t isaphysmem;
22 static caddr_t dma_bounce[8]; /* XXX */
23 static char bounced[8]; /* XXX */
24 #define MAXDMASZ 512 /* XXX */
25 static u_int8_t dma_finished;
26
27 /* high byte of address is stored in this port for i-th dma channel */
28 static int dmapageport[2][4] = {
29 {0x87, 0x83, 0x81, 0x82},
30 {0x8f, 0x8b, 0x89, 0x8a}
31 };
32
33 static u_int8_t dmamode[4] = {
34 DMA37MD_READ | DMA37MD_SINGLE,
35 DMA37MD_WRITE | DMA37MD_SINGLE,
36 DMA37MD_READ | DMA37MD_LOOP,
37 DMA37MD_WRITE | DMA37MD_LOOP
38 };
39
40 int isa_dmarangecheck __P((vm_offset_t, u_long, int));
41 caddr_t isa_allocphysmem __P((caddr_t, unsigned, void (*)(void)));
42 void isa_freephysmem __P((caddr_t, unsigned));
43
44 /*
45 * isa_dmacascade(): program 8237 DMA controller channel to accept
46 * external dma control by a board.
47 */
48 void
49 isa_dmacascade(chan)
50 int chan;
51 {
52
53 #ifdef ISADMA_DEBUG
54 if (chan < 0 || chan > 7)
55 panic("isa_dmacascade: impossible request");
56 #endif
57
58 /* set dma channel mode, and set dma channel mode */
59 if ((chan & 4) == 0) {
60 outb(DMA1_MODE, chan | DMA37MD_CASCADE);
61 outb(DMA1_SMSK, chan | DMA37SM_CLEAR);
62 } else {
63 chan &= 3;
64
65 outb(DMA2_MODE, chan | DMA37MD_CASCADE);
66 outb(DMA2_SMSK, chan | DMA37SM_CLEAR);
67 }
68 }
69
70 /*
71 * isa_dmastart(): program 8237 DMA controller channel, avoid page alignment
72 * problems by using a bounce buffer.
73 */
74 void
75 isa_dmastart(flags, addr, nbytes, chan)
76 int flags;
77 caddr_t addr;
78 vm_size_t nbytes;
79 int chan;
80 {
81 vm_offset_t phys;
82 int waport;
83 caddr_t newaddr;
84
85 #ifdef ISADMA_DEBUG
86 if (chan < 0 || chan > 7 ||
87 ((chan & 4) ? (nbytes >= (1<<17) || nbytes & 1 || (u_int)addr & 1) :
88 (nbytes >= (1<<16))))
89 panic("isa_dmastart: impossible request");
90 #endif
91
92 if (isa_dmarangecheck((vm_offset_t) addr, nbytes, chan)) {
93 if (dma_bounce[chan] == 0)
94 dma_bounce[chan] =
95 /*(caddr_t)malloc(MAXDMASZ, M_TEMP, M_WAITOK);*/
96 (caddr_t) isaphysmem + NBPG*chan;
97 bounced[chan] = 1;
98 newaddr = dma_bounce[chan];
99 *(int *) newaddr = 0; /* XXX */
100 /* copy bounce buffer on write */
101 if ((flags & DMAMODE_READ) == 0)
102 bcopy(addr, newaddr, nbytes);
103 addr = newaddr;
104 }
105
106 /* translate to physical */
107 phys = pmap_extract(pmap_kernel(), (vm_offset_t)addr);
108
109 dma_finished &= ~(1 << chan);
110
111 if ((chan & 4) == 0) {
112 /*
113 * Program one of DMA channels 0..3. These are
114 * byte mode channels.
115 */
116 /* set dma channel mode, and reset address ff */
117 outb(DMA1_MODE, chan | dmamode[flags]);
118 outb(DMA1_FFC, 0);
119
120 /* send start address */
121 waport = DMA1_CHN(chan);
122 outb(dmapageport[0][chan], phys>>16);
123 outb(waport, phys);
124 outb(waport, phys>>8);
125
126 /* send count */
127 outb(waport + 1, --nbytes);
128 outb(waport + 1, nbytes>>8);
129
130 /* unmask channel */
131 outb(DMA1_SMSK, chan | DMA37SM_CLEAR);
132 } else {
133 chan &= 3;
134
135 /*
136 * Program one of DMA channels 4..7. These are
137 * word mode channels.
138 */
139 /* set dma channel mode, and reset address ff */
140 outb(DMA2_MODE, chan | dmamode[flags]);
141 outb(DMA2_FFC, 0);
142
143 /* send start address */
144 waport = DMA2_CHN(chan);
145 outb(dmapageport[1][chan], phys>>16);
146 phys >>= 1;
147 outb(waport, phys);
148 outb(waport, phys>>8);
149
150 /* send count */
151 nbytes >>= 1;
152 outb(waport + 2, --nbytes);
153 outb(waport + 2, nbytes>>8);
154
155 /* unmask channel */
156 outb(DMA2_SMSK, chan | DMA37SM_CLEAR);
157 }
158 }
159
160 void
161 isa_dmaabort(chan)
162 int chan;
163 {
164
165 #ifdef ISADMA_DEBUG
166 if (chan < 0 || chan > 7)
167 panic("isa_dmaabort: impossible request");
168 #endif
169
170 bounced[chan] = 0;
171
172 /* mask channel */
173 if ((chan & 4) == 0) {
174 outb(DMA1_SMSK, chan | DMA37SM_SET);
175 } else {
176 chan &= 3;
177
178 outb(DMA2_SMSK, chan | DMA37SM_SET);
179 }
180 }
181
182 vm_size_t
183 isa_dmacount(chan)
184 int chan;
185 {
186 int waport;
187 vm_size_t nbytes;
188
189 #ifdef ISADMA_DEBUG
190 if (chan < 0 || chan > 7)
191 panic("isa_dmafinished: impossible request");
192 #endif
193
194 /* check that the terminal count was reached */
195 if ((chan & 4) == 0) {
196 /* mask channel */
197 outb(DMA1_SMSK, chan | DMA37SM_SET);
198 outb(DMA1_FFC, 0);
199
200 if (!isa_dmafinished(chan)) {
201 /* read count */
202 waport = DMA1_CHN(chan);
203 nbytes = inb(waport + 1) + 1;
204 nbytes += inb(waport + 1) << 8;
205 } else
206 nbytes = 0;
207
208 /* unmask channel */
209 outb(DMA1_SMSK, chan | DMA37SM_CLEAR);
210 } else {
211 chan &= 3;
212
213 /* mask channel */
214 outb(DMA2_SMSK, chan | DMA37SM_SET);
215 outb(DMA2_FFC, 0);
216
217 if (!isa_dmafinished(chan | 4)) {
218 /* read count */
219 waport = DMA2_CHN(chan);
220 nbytes = inb(waport + 2) + 1;
221 nbytes += inb(waport + 2) << 8;
222 nbytes <<= 1;
223 } else
224 nbytes = 0;
225
226 /* unmask channel */
227 outb(DMA2_SMSK, chan | DMA37SM_CLEAR);
228 }
229
230 return (nbytes);
231 }
232
233 int
234 isa_dmafinished(chan)
235 int chan;
236 {
237
238 #ifdef ISADMA_DEBUG
239 if (chan < 0 || chan > 7)
240 panic("isa_dmafinished: impossible request");
241 #endif
242
243 /* check that the terminal count was reached */
244 if ((chan & 4) == 0)
245 dma_finished |= inb(DMA1_SR) & 0x0f;
246 else
247 dma_finished |= (inb(DMA2_SR) & 0x0f) << 4;
248
249 return ((dma_finished & (1 << chan)) != 0);
250 }
251
252 void
253 isa_dmadone(flags, addr, nbytes, chan)
254 int flags;
255 caddr_t addr;
256 vm_size_t nbytes;
257 int chan;
258 {
259
260 #ifdef ISADMA_DEBUG
261 if (chan < 0 || chan > 7)
262 panic("isa_dmadone: impossible request");
263 #endif
264
265 if (!isa_dmafinished(chan))
266 printf("isa_dmadone: channel %d not finished\n", chan);
267
268 /* mask channel */
269 if ((chan & 4) == 0) {
270 outb(DMA1_SMSK, chan | DMA37SM_SET);
271 } else {
272 chan &= 3;
273
274 outb(DMA2_SMSK, chan | DMA37SM_SET);
275 }
276
277 /* copy bounce buffer on read */
278 if (bounced[chan]) {
279 bcopy(dma_bounce[chan], addr, nbytes);
280 bounced[chan] = 0;
281 }
282 }
283
284 /*
285 * Check for problems with the address range of a DMA transfer
286 * (non-contiguous physical pages, outside of bus address space,
287 * crossing DMA page boundaries).
288 * Return true if special handling needed.
289 */
290 int
291 isa_dmarangecheck(va, length, chan)
292 vm_offset_t va;
293 u_long length;
294 int chan;
295 {
296 vm_offset_t phys, priorpage = 0, endva;
297 u_int dma_pgmsk = (chan & 4) ? ~(128*1024-1) : ~(64*1024-1);
298
299 endva = round_page(va + length);
300 for (; va < endva ; va += NBPG) {
301 phys = trunc_page(pmap_extract(pmap_kernel(), va));
302 if (phys == 0)
303 panic("isa_dmacheck: no physical page present");
304 if (phys >= (1<<24))
305 return 1;
306 if (priorpage) {
307 if (priorpage + NBPG != phys)
308 return 1;
309 /* check if crossing a DMA page boundary */
310 if ((priorpage ^ phys) & dma_pgmsk)
311 return 1;
312 }
313 priorpage = phys;
314 }
315 return 0;
316 }
317
318 /* head of queue waiting for physmem to become available */
319 struct buf isa_physmemq;
320
321 /* blocked waiting for resource to become free for exclusive use */
322 static isaphysmemflag;
323 /* if waited for and call requested when free (B_CALL) */
324 static void (*isaphysmemunblock) __P((void)); /* needs to be a list */
325
326 /*
327 * Allocate contiguous physical memory for transfer, returning
328 * a *virtual* address to region. May block waiting for resource.
329 * (assumed to be called at splbio())
330 */
331 caddr_t
332 isa_allocphysmem(ca, length, func)
333 caddr_t ca;
334 unsigned length;
335 void (*func) __P((void));
336 {
337
338 isaphysmemunblock = func;
339 while (isaphysmemflag & B_BUSY) {
340 isaphysmemflag |= B_WANTED;
341 sleep((caddr_t)&isaphysmemflag, PRIBIO);
342 }
343 isaphysmemflag |= B_BUSY;
344
345 return((caddr_t)isaphysmem);
346 }
347
348 /*
349 * Free contiguous physical memory used for transfer.
350 * (assumed to be called at splbio())
351 */
352 void
353 isa_freephysmem(va, length)
354 caddr_t va;
355 unsigned length;
356 {
357
358 isaphysmemflag &= ~B_BUSY;
359 if (isaphysmemflag & B_WANTED) {
360 isaphysmemflag &= B_WANTED;
361 wakeup((caddr_t)&isaphysmemflag);
362 if (isaphysmemunblock)
363 (*isaphysmemunblock)();
364 }
365 }
366