isadma.c revision 1.26
1 /* $NetBSD: isadma.c,v 1.26 1997/06/06 23:43:55 thorpej Exp $ */ 2 3 /*- 4 * Copyright (c) 1997 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, 9 * NASA Ames Research Center. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 3. All advertising materials mentioning features or use of this software 20 * must display the following acknowledgement: 21 * This product includes software developed by the NetBSD 22 * Foundation, Inc. and its contributors. 23 * 4. Neither the name of The NetBSD Foundation nor the names of its 24 * contributors may be used to endorse or promote products derived 25 * from this software without specific prior written permission. 26 * 27 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 28 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 29 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 30 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 31 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 32 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 33 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 34 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 35 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 36 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 37 * POSSIBILITY OF SUCH DAMAGE. 38 */ 39 40 /* 41 * Device driver for the ISA on-board DMA controller. 42 */ 43 44 #include <sys/param.h> 45 #include <sys/systm.h> 46 #include <sys/proc.h> 47 #include <sys/device.h> 48 49 #include <vm/vm.h> 50 51 #include <machine/bus.h> 52 53 #include <dev/isa/isareg.h> 54 #include <dev/isa/isavar.h> 55 #include <dev/isa/isadmavar.h> 56 #include <dev/isa/isadmareg.h> 57 58 /* 59 * High byte of DMA address is stored in this DMAPG register for 60 * the Nth DMA channel. 61 */ 62 static int dmapageport[2][4] = { 63 {0x7, 0x3, 0x1, 0x2}, 64 {0xf, 0xb, 0x9, 0xa} 65 }; 66 67 static u_int8_t dmamode[4] = { 68 DMA37MD_READ | DMA37MD_SINGLE, 69 DMA37MD_WRITE | DMA37MD_SINGLE, 70 DMA37MD_READ | DMA37MD_SINGLE | DMA37MD_LOOP, 71 DMA37MD_WRITE | DMA37MD_SINGLE | DMA37MD_LOOP 72 }; 73 74 static inline void isa_dmaunmask __P((struct isa_softc *, int)); 75 static inline void isa_dmamask __P((struct isa_softc *, int)); 76 77 static inline void 78 isa_dmaunmask(sc, chan) 79 struct isa_softc *sc; 80 int chan; 81 { 82 int ochan = chan & 3; 83 84 /* set dma channel mode, and set dma channel mode */ 85 if ((chan & 4) == 0) 86 bus_space_write_1(sc->sc_iot, sc->sc_dma1h, 87 DMA1_SMSK, ochan | DMA37SM_CLEAR); 88 else 89 bus_space_write_1(sc->sc_iot, sc->sc_dma2h, 90 DMA2_SMSK, ochan | DMA37SM_CLEAR); 91 } 92 93 static inline void 94 isa_dmamask(sc, chan) 95 struct isa_softc *sc; 96 int chan; 97 { 98 int ochan = chan & 3; 99 100 /* set dma channel mode, and set dma channel mode */ 101 if ((chan & 4) == 0) { 102 bus_space_write_1(sc->sc_iot, sc->sc_dma1h, 103 DMA1_SMSK, ochan | DMA37SM_SET); 104 bus_space_write_1(sc->sc_iot, sc->sc_dma1h, 105 DMA1_FFC, 0); 106 } else { 107 bus_space_write_1(sc->sc_iot, sc->sc_dma2h, 108 DMA2_SMSK, ochan | DMA37SM_SET); 109 bus_space_write_1(sc->sc_iot, sc->sc_dma2h, 110 DMA2_FFC, 0); 111 } 112 } 113 114 /* 115 * isa_dmacascade(): program 8237 DMA controller channel to accept 116 * external dma control by a board. 117 */ 118 void 119 isa_dmacascade(isadev, chan) 120 struct device *isadev; 121 int chan; 122 { 123 struct isa_softc *sc = (struct isa_softc *)isadev; 124 int ochan = chan & 3; 125 126 if (chan < 0 || chan > 7) { 127 printf("%s: bogus drq %d\n", sc->sc_dev.dv_xname, chan); 128 goto lose; 129 } 130 131 if (ISA_DRQ_ISFREE(sc, chan) == 0) { 132 printf("%s: DRQ %d is not free\n", sc->sc_dev.dv_xname, chan); 133 goto lose; 134 } 135 136 ISA_DRQ_ALLOC(sc, chan); 137 138 /* set dma channel mode, and set dma channel mode */ 139 if ((chan & 4) == 0) 140 bus_space_write_1(sc->sc_iot, sc->sc_dma1h, 141 DMA1_MODE, ochan | DMA37MD_CASCADE); 142 else 143 bus_space_write_1(sc->sc_iot, sc->sc_dma2h, 144 DMA2_MODE, ochan | DMA37MD_CASCADE); 145 146 isa_dmaunmask(sc, chan); 147 return; 148 149 lose: 150 panic("isa_dmacascade"); 151 } 152 153 int 154 isa_dmamap_create(isadev, chan, size, flags) 155 struct device *isadev; 156 int chan; 157 bus_size_t size; 158 int flags; 159 { 160 struct isa_softc *sc = (struct isa_softc *)isadev; 161 bus_size_t maxsize; 162 163 if (chan < 0 || chan > 7) { 164 printf("%s: bogus drq %d\n", sc->sc_dev.dv_xname, chan); 165 goto lose; 166 } 167 168 if (chan & 4) 169 maxsize = (1 << 17); 170 else 171 maxsize = (1 << 16); 172 173 if (size > maxsize) 174 return (EINVAL); 175 176 if (ISA_DRQ_ISFREE(sc, chan) == 0) { 177 printf("%s: drq %d is not free\n", sc->sc_dev.dv_xname, chan); 178 goto lose; 179 } 180 181 ISA_DRQ_ALLOC(sc, chan); 182 183 return (bus_dmamap_create(sc->sc_dmat, size, 1, size, maxsize, 184 flags, &sc->sc_dmamaps[chan])); 185 186 lose: 187 panic("isa_dmamap_create"); 188 } 189 190 void 191 isa_dmamap_destroy(isadev, chan) 192 struct device *isadev; 193 int chan; 194 { 195 struct isa_softc *sc = (struct isa_softc *)isadev; 196 197 if (chan < 0 || chan > 7) { 198 printf("%s: bogus drq %d\n", sc->sc_dev.dv_xname, chan); 199 goto lose; 200 } 201 202 if (ISA_DRQ_ISFREE(sc, chan)) { 203 printf("%s: drq %d is already free\n", 204 sc->sc_dev.dv_xname, chan); 205 goto lose; 206 } 207 208 ISA_DRQ_FREE(sc, chan); 209 210 bus_dmamap_destroy(sc->sc_dmat, sc->sc_dmamaps[chan]); 211 return; 212 213 lose: 214 panic("isa_dmamap_destroy"); 215 } 216 217 /* 218 * isa_dmastart(): program 8237 DMA controller channel and set it 219 * in motion. 220 */ 221 int 222 isa_dmastart(isadev, chan, addr, nbytes, p, flags, busdmaflags) 223 struct device *isadev; 224 int chan; 225 void *addr; 226 bus_size_t nbytes; 227 struct proc *p; 228 int flags; 229 int busdmaflags; 230 { 231 struct isa_softc *sc = (struct isa_softc *)isadev; 232 bus_dmamap_t dmam; 233 bus_addr_t dmaaddr; 234 int waport; 235 int ochan = chan & 3; 236 int error; 237 238 if (chan < 0 || chan > 7) { 239 printf("%s: bogus drq %d\n", sc->sc_dev.dv_xname, chan); 240 goto lose; 241 } 242 243 #ifdef ISADMA_DEBUG 244 printf("isa_dmastart: drq %d, addr %p, nbytes 0x%lx, p %p, " 245 "flags 0x%x, dmaflags 0x%x\n", 246 chan, addr, nbytes, p, flags, busdmaflags); 247 #endif 248 249 if (chan & 4) { 250 if (nbytes > (1 << 17) || nbytes & 1 || (u_long)addr & 1) { 251 printf("%s: drq %d, nbytes 0x%lx, addr %p\n", 252 sc->sc_dev.dv_xname, chan, nbytes, addr); 253 goto lose; 254 } 255 } else { 256 if (nbytes > (1 << 16)) { 257 printf("%s: drq %d, nbytes 0x%lx\n", 258 sc->sc_dev.dv_xname, chan, nbytes); 259 goto lose; 260 } 261 } 262 263 dmam = sc->sc_dmamaps[chan]; 264 265 error = bus_dmamap_load(sc->sc_dmat, dmam, addr, nbytes, 266 p, busdmaflags); 267 if (error) 268 return (error); 269 270 #ifdef ISADMA_DEBUG 271 __asm(".globl isa_dmastart_afterload ; isa_dmastart_afterload:"); 272 #endif 273 274 if (flags & DMAMODE_READ) { 275 bus_dmamap_sync(sc->sc_dmat, dmam, BUS_DMASYNC_PREREAD); 276 sc->sc_dmareads |= (1 << chan); 277 } else { 278 bus_dmamap_sync(sc->sc_dmat, dmam, BUS_DMASYNC_PREWRITE); 279 sc->sc_dmareads &= ~(1 << chan); 280 } 281 282 dmaaddr = dmam->dm_segs[0].ds_addr; 283 284 #ifdef ISADMA_DEBUG 285 printf(" dmaaddr 0x%lx\n", dmaaddr); 286 287 __asm(".globl isa_dmastart_aftersync ; isa_dmastart_aftersync:"); 288 #endif 289 290 sc->sc_dmalength[chan] = nbytes; 291 292 isa_dmamask(sc, chan); 293 sc->sc_dmafinished &= ~(1 << chan); 294 295 if ((chan & 4) == 0) { 296 /* set dma channel mode */ 297 bus_space_write_1(sc->sc_iot, sc->sc_dma1h, DMA1_MODE, 298 ochan | dmamode[flags]); 299 300 /* send start address */ 301 waport = DMA1_CHN(ochan); 302 bus_space_write_1(sc->sc_iot, sc->sc_dmapgh, 303 dmapageport[0][ochan], (dmaaddr >> 16) & 0xff); 304 bus_space_write_1(sc->sc_iot, sc->sc_dma1h, waport, 305 dmaaddr & 0xff); 306 bus_space_write_1(sc->sc_iot, sc->sc_dma1h, waport, 307 (dmaaddr >> 8) & 0xff); 308 309 /* send count */ 310 bus_space_write_1(sc->sc_iot, sc->sc_dma1h, waport + 1, 311 (--nbytes) & 0xff); 312 bus_space_write_1(sc->sc_iot, sc->sc_dma1h, waport + 1, 313 (nbytes >> 8) & 0xff); 314 } else { 315 /* set dma channel mode */ 316 bus_space_write_1(sc->sc_iot, sc->sc_dma2h, DMA2_MODE, 317 ochan | dmamode[flags]); 318 319 /* send start address */ 320 waport = DMA2_CHN(ochan); 321 bus_space_write_1(sc->sc_iot, sc->sc_dmapgh, 322 dmapageport[1][ochan], (dmaaddr >> 16) & 0xff); 323 dmaaddr >>= 1; 324 bus_space_write_1(sc->sc_iot, sc->sc_dma2h, waport, 325 dmaaddr & 0xff); 326 bus_space_write_1(sc->sc_iot, sc->sc_dma2h, waport, 327 (dmaaddr >> 8) & 0xff); 328 329 /* send count */ 330 nbytes >>= 1; 331 bus_space_write_1(sc->sc_iot, sc->sc_dma2h, waport + 2, 332 (--nbytes) & 0xff); 333 bus_space_write_1(sc->sc_iot, sc->sc_dma2h, waport + 2, 334 (nbytes >> 8) & 0xff); 335 } 336 337 isa_dmaunmask(sc, chan); 338 return (0); 339 340 lose: 341 panic("isa_dmastart"); 342 } 343 344 void 345 isa_dmaabort(isadev, chan) 346 struct device *isadev; 347 int chan; 348 { 349 struct isa_softc *sc = (struct isa_softc *)isadev; 350 351 if (chan < 0 || chan > 7) { 352 printf("%s: bogus drq %d\n", sc->sc_dev.dv_xname, chan); 353 panic("isa_dmaabort"); 354 } 355 356 isa_dmamask(sc, chan); 357 bus_dmamap_unload(sc->sc_dmat, sc->sc_dmamaps[chan]); 358 sc->sc_dmareads &= ~(1 << chan); 359 } 360 361 bus_size_t 362 isa_dmacount(isadev, chan) 363 struct device *isadev; 364 int chan; 365 { 366 struct isa_softc *sc = (struct isa_softc *)isadev; 367 int waport; 368 bus_size_t nbytes; 369 int ochan = chan & 3; 370 371 if (chan < 0 || chan > 7) { 372 printf("%s: bogus drq %d\n", sc->sc_dev.dv_xname, chan); 373 panic("isa_dmacount"); 374 } 375 376 isa_dmamask(sc, chan); 377 378 /* 379 * We have to shift the byte count by 1. If we're in auto-initialize 380 * mode, the count may have wrapped around to the initial value. We 381 * can't use the TC bit to check for this case, so instead we compare 382 * against the original byte count. 383 * If we're not in auto-initialize mode, then the count will wrap to 384 * -1, so we also handle that case. 385 */ 386 if ((chan & 4) == 0) { 387 waport = DMA1_CHN(ochan); 388 nbytes = bus_space_read_1(sc->sc_iot, sc->sc_dma1h, 389 waport + 1) + 1; 390 nbytes += bus_space_read_1(sc->sc_iot, sc->sc_dma1h, 391 waport + 1) << 8; 392 nbytes &= 0xffff; 393 } else { 394 waport = DMA2_CHN(ochan); 395 nbytes = bus_space_read_1(sc->sc_iot, sc->sc_dma2h, 396 waport + 2) + 1; 397 nbytes += bus_space_read_1(sc->sc_iot, sc->sc_dma2h, 398 waport + 2) << 8; 399 nbytes <<= 1; 400 nbytes &= 0x1ffff; 401 } 402 403 if (nbytes == sc->sc_dmalength[chan]) 404 nbytes = 0; 405 406 isa_dmaunmask(sc, chan); 407 return (nbytes); 408 } 409 410 int 411 isa_dmafinished(isadev, chan) 412 struct device *isadev; 413 int chan; 414 { 415 struct isa_softc *sc = (struct isa_softc *)isadev; 416 417 if (chan < 0 || chan > 7) { 418 printf("%s: bogus drq %d\n", sc->sc_dev.dv_xname, chan); 419 panic("isa_dmafinished"); 420 } 421 422 /* check that the terminal count was reached */ 423 if ((chan & 4) == 0) 424 sc->sc_dmafinished |= bus_space_read_1(sc->sc_iot, 425 sc->sc_dma1h, DMA1_SR) & 0x0f; 426 else 427 sc->sc_dmafinished |= (bus_space_read_1(sc->sc_iot, 428 sc->sc_dma2h, DMA2_SR) & 0x0f) << 4; 429 430 return ((sc->sc_dmafinished & (1 << chan)) != 0); 431 } 432 433 void 434 isa_dmadone(isadev, chan) 435 struct device *isadev; 436 int chan; 437 { 438 struct isa_softc *sc = (struct isa_softc *)isadev; 439 bus_dmamap_t dmam; 440 441 if (chan < 0 || chan > 7) { 442 printf("%s: bogus drq %d\n", sc->sc_dev.dv_xname, chan); 443 panic("isa_dmadone"); 444 } 445 446 dmam = sc->sc_dmamaps[chan]; 447 448 isa_dmamask(sc, chan); 449 450 if (isa_dmafinished(isadev, chan) == 0) 451 printf("%s: isa_dmadone: channel %d not finished\n", 452 sc->sc_dev.dv_xname, chan); 453 454 bus_dmamap_sync(sc->sc_dmat, dmam, 455 (sc->sc_dmareads & (1 << chan)) ? BUS_DMASYNC_POSTREAD : 456 BUS_DMASYNC_POSTWRITE); 457 458 bus_dmamap_unload(sc->sc_dmat, dmam); 459 sc->sc_dmareads &= ~(1 << chan); 460 } 461 462 int 463 isa_dmamem_alloc(isadev, chan, size, addrp, flags) 464 struct device *isadev; 465 int chan; 466 bus_size_t size; 467 bus_addr_t *addrp; 468 int flags; 469 { 470 struct isa_softc *sc = (struct isa_softc *)isadev; 471 bus_dma_segment_t seg; 472 int error, boundary, rsegs; 473 474 if (chan < 0 || chan > 7) { 475 printf("%s: bogus drq %d\n", sc->sc_dev.dv_xname, chan); 476 panic("isa_dmamem_alloc"); 477 } 478 479 boundary = (chan & 4) ? (1 << 17) : (1 << 16); 480 481 size = round_page(size); 482 483 error = bus_dmamem_alloc(sc->sc_dmat, size, NBPG, boundary, 484 &seg, 1, &rsegs, flags); 485 if (error) 486 return (error); 487 488 *addrp = seg.ds_addr; 489 return (0); 490 } 491 492 void 493 isa_dmamem_free(isadev, chan, addr, size) 494 struct device *isadev; 495 int chan; 496 bus_addr_t addr; 497 bus_size_t size; 498 { 499 struct isa_softc *sc = (struct isa_softc *)isadev; 500 bus_dma_segment_t seg; 501 502 if (chan < 0 || chan > 7) { 503 printf("%s: bogus drq %d\n", sc->sc_dev.dv_xname, chan); 504 panic("isa_dmamem_free"); 505 } 506 507 seg.ds_addr = addr; 508 seg.ds_len = size; 509 510 bus_dmamem_free(sc->sc_dmat, &seg, 1); 511 } 512 513 int 514 isa_dmamem_map(isadev, chan, addr, size, kvap, flags) 515 struct device *isadev; 516 int chan; 517 bus_addr_t addr; 518 bus_size_t size; 519 caddr_t *kvap; 520 int flags; 521 { 522 struct isa_softc *sc = (struct isa_softc *)isadev; 523 bus_dma_segment_t seg; 524 525 if (chan < 0 || chan > 7) { 526 printf("%s: bogus drq %d\n", sc->sc_dev.dv_xname, chan); 527 panic("isa_dmamem_map"); 528 } 529 530 seg.ds_addr = addr; 531 seg.ds_len = size; 532 533 return (bus_dmamem_map(sc->sc_dmat, &seg, 1, size, kvap, flags)); 534 } 535 536 void 537 isa_dmamem_unmap(isadev, chan, kva, size) 538 struct device *isadev; 539 int chan; 540 caddr_t kva; 541 size_t size; 542 { 543 struct isa_softc *sc = (struct isa_softc *)isadev; 544 545 if (chan < 0 || chan > 7) { 546 printf("%s: bogus drq %d\n", sc->sc_dev.dv_xname, chan); 547 panic("isa_dmamem_unmap"); 548 } 549 550 bus_dmamem_unmap(sc->sc_dmat, kva, size); 551 } 552 553 int 554 isa_dmamem_mmap(isadev, chan, addr, size, off, prot, flags) 555 struct device *isadev; 556 int chan; 557 bus_addr_t addr; 558 bus_size_t size; 559 int off, prot, flags; 560 { 561 struct isa_softc *sc = (struct isa_softc *)isadev; 562 bus_dma_segment_t seg; 563 564 if (chan < 0 || chan > 7) { 565 printf("%s: bogus drq %d\n", sc->sc_dev.dv_xname, chan); 566 panic("isa_dmamem_mmap"); 567 } 568 569 seg.ds_addr = addr; 570 seg.ds_len = size; 571 572 return (bus_dmamem_mmap(sc->sc_dmat, &seg, 1, off, prot, flags)); 573 } 574
Indexes created Mon Sep 22 13:09:51 GMT 2025