isadma.c revision 1.33
1 /* $NetBSD: isadma.c,v 1.33 1998/02/04 05:14:35 thorpej Exp $ */ 2 3 /*- 4 * Copyright (c) 1997, 1998 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, 9 * NASA Ames Research Center. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 3. All advertising materials mentioning features or use of this software 20 * must display the following acknowledgement: 21 * This product includes software developed by the NetBSD 22 * Foundation, Inc. and its contributors. 23 * 4. Neither the name of The NetBSD Foundation nor the names of its 24 * contributors may be used to endorse or promote products derived 25 * from this software without specific prior written permission. 26 * 27 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 28 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 29 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 30 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 31 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 32 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 33 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 34 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 35 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 36 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 37 * POSSIBILITY OF SUCH DAMAGE. 38 */ 39 40 /* 41 * Device driver for the ISA on-board DMA controller. 42 */ 43 44 #include <sys/param.h> 45 #include <sys/systm.h> 46 #include <sys/proc.h> 47 #include <sys/device.h> 48 49 #include <vm/vm.h> 50 51 #include <machine/bus.h> 52 53 #include <dev/isa/isareg.h> 54 #include <dev/isa/isavar.h> 55 #include <dev/isa/isadmavar.h> 56 #include <dev/isa/isadmareg.h> 57 58 /* Used by isa_malloc() */ 59 #include <sys/malloc.h> 60 struct isa_mem { 61 struct device *isadev; 62 int chan; 63 bus_size_t size; 64 bus_addr_t addr; 65 caddr_t kva; 66 struct isa_mem *next; 67 } *isa_mem_head = 0; 68 69 /* 70 * High byte of DMA address is stored in this DMAPG register for 71 * the Nth DMA channel. 72 */ 73 static int dmapageport[2][4] = { 74 {0x7, 0x3, 0x1, 0x2}, 75 {0xf, 0xb, 0x9, 0xa} 76 }; 77 78 static u_int8_t dmamode[4] = { 79 DMA37MD_READ | DMA37MD_SINGLE, 80 DMA37MD_WRITE | DMA37MD_SINGLE, 81 DMA37MD_READ | DMA37MD_SINGLE | DMA37MD_LOOP, 82 DMA37MD_WRITE | DMA37MD_SINGLE | DMA37MD_LOOP 83 }; 84 85 static inline void isa_dmaunmask __P((struct isa_softc *, int)); 86 static inline void isa_dmamask __P((struct isa_softc *, int)); 87 88 static inline void 89 isa_dmaunmask(sc, chan) 90 struct isa_softc *sc; 91 int chan; 92 { 93 int ochan = chan & 3; 94 95 /* set dma channel mode, and set dma channel mode */ 96 if ((chan & 4) == 0) 97 bus_space_write_1(sc->sc_iot, sc->sc_dma1h, 98 DMA1_SMSK, ochan | DMA37SM_CLEAR); 99 else 100 bus_space_write_1(sc->sc_iot, sc->sc_dma2h, 101 DMA2_SMSK, ochan | DMA37SM_CLEAR); 102 } 103 104 static inline void 105 isa_dmamask(sc, chan) 106 struct isa_softc *sc; 107 int chan; 108 { 109 int ochan = chan & 3; 110 111 /* set dma channel mode, and set dma channel mode */ 112 if ((chan & 4) == 0) { 113 bus_space_write_1(sc->sc_iot, sc->sc_dma1h, 114 DMA1_SMSK, ochan | DMA37SM_SET); 115 bus_space_write_1(sc->sc_iot, sc->sc_dma1h, 116 DMA1_FFC, 0); 117 } else { 118 bus_space_write_1(sc->sc_iot, sc->sc_dma2h, 119 DMA2_SMSK, ochan | DMA37SM_SET); 120 bus_space_write_1(sc->sc_iot, sc->sc_dma2h, 121 DMA2_FFC, 0); 122 } 123 } 124 125 /* 126 * isa_dmacascade(): program 8237 DMA controller channel to accept 127 * external dma control by a board. 128 */ 129 void 130 isa_dmacascade(isadev, chan) 131 struct device *isadev; 132 int chan; 133 { 134 struct isa_softc *sc = (struct isa_softc *)isadev; 135 int ochan = chan & 3; 136 137 if (chan < 0 || chan > 7) { 138 printf("%s: bogus drq %d\n", sc->sc_dev.dv_xname, chan); 139 goto lose; 140 } 141 142 if (ISA_DRQ_ISFREE(sc, chan) == 0) { 143 printf("%s: DRQ %d is not free\n", sc->sc_dev.dv_xname, chan); 144 goto lose; 145 } 146 147 ISA_DRQ_ALLOC(sc, chan); 148 149 /* set dma channel mode, and set dma channel mode */ 150 if ((chan & 4) == 0) 151 bus_space_write_1(sc->sc_iot, sc->sc_dma1h, 152 DMA1_MODE, ochan | DMA37MD_CASCADE); 153 else 154 bus_space_write_1(sc->sc_iot, sc->sc_dma2h, 155 DMA2_MODE, ochan | DMA37MD_CASCADE); 156 157 isa_dmaunmask(sc, chan); 158 return; 159 160 lose: 161 panic("isa_dmacascade"); 162 } 163 164 int 165 isa_dmamap_create(isadev, chan, size, flags) 166 struct device *isadev; 167 int chan; 168 bus_size_t size; 169 int flags; 170 { 171 struct isa_softc *sc = (struct isa_softc *)isadev; 172 bus_size_t maxsize; 173 174 if (chan < 0 || chan > 7) { 175 printf("%s: bogus drq %d\n", sc->sc_dev.dv_xname, chan); 176 goto lose; 177 } 178 179 if (chan & 4) 180 maxsize = (1 << 17); 181 else 182 maxsize = (1 << 16); 183 184 if (size > maxsize) 185 return (EINVAL); 186 187 if (ISA_DRQ_ISFREE(sc, chan) == 0) { 188 printf("%s: drq %d is not free\n", sc->sc_dev.dv_xname, chan); 189 goto lose; 190 } 191 192 ISA_DRQ_ALLOC(sc, chan); 193 194 return (bus_dmamap_create(sc->sc_dmat, size, 1, size, maxsize, 195 flags, &sc->sc_dmamaps[chan])); 196 197 lose: 198 panic("isa_dmamap_create"); 199 } 200 201 void 202 isa_dmamap_destroy(isadev, chan) 203 struct device *isadev; 204 int chan; 205 { 206 struct isa_softc *sc = (struct isa_softc *)isadev; 207 208 if (chan < 0 || chan > 7) { 209 printf("%s: bogus drq %d\n", sc->sc_dev.dv_xname, chan); 210 goto lose; 211 } 212 213 if (ISA_DRQ_ISFREE(sc, chan)) { 214 printf("%s: drq %d is already free\n", 215 sc->sc_dev.dv_xname, chan); 216 goto lose; 217 } 218 219 ISA_DRQ_FREE(sc, chan); 220 221 bus_dmamap_destroy(sc->sc_dmat, sc->sc_dmamaps[chan]); 222 return; 223 224 lose: 225 panic("isa_dmamap_destroy"); 226 } 227 228 /* 229 * isa_dmastart(): program 8237 DMA controller channel and set it 230 * in motion. 231 */ 232 int 233 isa_dmastart(isadev, chan, addr, nbytes, p, flags, busdmaflags) 234 struct device *isadev; 235 int chan; 236 void *addr; 237 bus_size_t nbytes; 238 struct proc *p; 239 int flags; 240 int busdmaflags; 241 { 242 struct isa_softc *sc = (struct isa_softc *)isadev; 243 bus_dmamap_t dmam; 244 bus_addr_t dmaaddr; 245 int waport; 246 int ochan = chan & 3; 247 int error; 248 249 if (chan < 0 || chan > 7) { 250 printf("%s: bogus drq %d\n", sc->sc_dev.dv_xname, chan); 251 goto lose; 252 } 253 254 #ifdef ISADMA_DEBUG 255 printf("isa_dmastart: drq %d, addr %p, nbytes 0x%lx, p %p, " 256 "flags 0x%x, dmaflags 0x%x\n", 257 chan, addr, nbytes, p, flags, busdmaflags); 258 #endif 259 260 if (chan & 4) { 261 if (nbytes > (1 << 17) || nbytes & 1 || (u_long)addr & 1) { 262 printf("%s: drq %d, nbytes 0x%lx, addr %p\n", 263 sc->sc_dev.dv_xname, chan, nbytes, addr); 264 goto lose; 265 } 266 } else { 267 if (nbytes > (1 << 16)) { 268 printf("%s: drq %d, nbytes 0x%lx\n", 269 sc->sc_dev.dv_xname, chan, nbytes); 270 goto lose; 271 } 272 } 273 274 dmam = sc->sc_dmamaps[chan]; 275 if (dmam == NULL) 276 panic("isa_dmastart: no DMA map for chan %d\n", chan); 277 278 error = bus_dmamap_load(sc->sc_dmat, dmam, addr, nbytes, 279 p, busdmaflags); 280 if (error) 281 return (error); 282 283 #ifdef ISADMA_DEBUG 284 __asm(".globl isa_dmastart_afterload ; isa_dmastart_afterload:"); 285 #endif 286 287 if (flags & DMAMODE_READ) { 288 bus_dmamap_sync(sc->sc_dmat, dmam, 0, dmam->dm_mapsize, 289 BUS_DMASYNC_PREREAD); 290 sc->sc_dmareads |= (1 << chan); 291 } else { 292 bus_dmamap_sync(sc->sc_dmat, dmam, 0, dmam->dm_mapsize, 293 BUS_DMASYNC_PREWRITE); 294 sc->sc_dmareads &= ~(1 << chan); 295 } 296 297 dmaaddr = dmam->dm_segs[0].ds_addr; 298 299 #ifdef ISADMA_DEBUG 300 printf(" dmaaddr 0x%lx\n", dmaaddr); 301 302 __asm(".globl isa_dmastart_aftersync ; isa_dmastart_aftersync:"); 303 #endif 304 305 sc->sc_dmalength[chan] = nbytes; 306 307 isa_dmamask(sc, chan); 308 sc->sc_dmafinished &= ~(1 << chan); 309 310 if ((chan & 4) == 0) { 311 /* set dma channel mode */ 312 bus_space_write_1(sc->sc_iot, sc->sc_dma1h, DMA1_MODE, 313 ochan | dmamode[flags]); 314 315 /* send start address */ 316 waport = DMA1_CHN(ochan); 317 bus_space_write_1(sc->sc_iot, sc->sc_dmapgh, 318 dmapageport[0][ochan], (dmaaddr >> 16) & 0xff); 319 bus_space_write_1(sc->sc_iot, sc->sc_dma1h, waport, 320 dmaaddr & 0xff); 321 bus_space_write_1(sc->sc_iot, sc->sc_dma1h, waport, 322 (dmaaddr >> 8) & 0xff); 323 324 /* send count */ 325 bus_space_write_1(sc->sc_iot, sc->sc_dma1h, waport + 1, 326 (--nbytes) & 0xff); 327 bus_space_write_1(sc->sc_iot, sc->sc_dma1h, waport + 1, 328 (nbytes >> 8) & 0xff); 329 } else { 330 /* set dma channel mode */ 331 bus_space_write_1(sc->sc_iot, sc->sc_dma2h, DMA2_MODE, 332 ochan | dmamode[flags]); 333 334 /* send start address */ 335 waport = DMA2_CHN(ochan); 336 bus_space_write_1(sc->sc_iot, sc->sc_dmapgh, 337 dmapageport[1][ochan], (dmaaddr >> 16) & 0xff); 338 dmaaddr >>= 1; 339 bus_space_write_1(sc->sc_iot, sc->sc_dma2h, waport, 340 dmaaddr & 0xff); 341 bus_space_write_1(sc->sc_iot, sc->sc_dma2h, waport, 342 (dmaaddr >> 8) & 0xff); 343 344 /* send count */ 345 nbytes >>= 1; 346 bus_space_write_1(sc->sc_iot, sc->sc_dma2h, waport + 2, 347 (--nbytes) & 0xff); 348 bus_space_write_1(sc->sc_iot, sc->sc_dma2h, waport + 2, 349 (nbytes >> 8) & 0xff); 350 } 351 352 isa_dmaunmask(sc, chan); 353 return (0); 354 355 lose: 356 panic("isa_dmastart"); 357 } 358 359 void 360 isa_dmaabort(isadev, chan) 361 struct device *isadev; 362 int chan; 363 { 364 struct isa_softc *sc = (struct isa_softc *)isadev; 365 366 if (chan < 0 || chan > 7) { 367 printf("%s: bogus drq %d\n", sc->sc_dev.dv_xname, chan); 368 panic("isa_dmaabort"); 369 } 370 371 isa_dmamask(sc, chan); 372 bus_dmamap_unload(sc->sc_dmat, sc->sc_dmamaps[chan]); 373 sc->sc_dmareads &= ~(1 << chan); 374 } 375 376 bus_size_t 377 isa_dmacount(isadev, chan) 378 struct device *isadev; 379 int chan; 380 { 381 struct isa_softc *sc = (struct isa_softc *)isadev; 382 int waport; 383 bus_size_t nbytes; 384 int ochan = chan & 3; 385 386 if (chan < 0 || chan > 7) { 387 printf("%s: bogus drq %d\n", sc->sc_dev.dv_xname, chan); 388 panic("isa_dmacount"); 389 } 390 391 isa_dmamask(sc, chan); 392 393 /* 394 * We have to shift the byte count by 1. If we're in auto-initialize 395 * mode, the count may have wrapped around to the initial value. We 396 * can't use the TC bit to check for this case, so instead we compare 397 * against the original byte count. 398 * If we're not in auto-initialize mode, then the count will wrap to 399 * -1, so we also handle that case. 400 */ 401 if ((chan & 4) == 0) { 402 waport = DMA1_CHN(ochan); 403 nbytes = bus_space_read_1(sc->sc_iot, sc->sc_dma1h, 404 waport + 1) + 1; 405 nbytes += bus_space_read_1(sc->sc_iot, sc->sc_dma1h, 406 waport + 1) << 8; 407 nbytes &= 0xffff; 408 } else { 409 waport = DMA2_CHN(ochan); 410 nbytes = bus_space_read_1(sc->sc_iot, sc->sc_dma2h, 411 waport + 2) + 1; 412 nbytes += bus_space_read_1(sc->sc_iot, sc->sc_dma2h, 413 waport + 2) << 8; 414 nbytes <<= 1; 415 nbytes &= 0x1ffff; 416 } 417 418 if (nbytes == sc->sc_dmalength[chan]) 419 nbytes = 0; 420 421 isa_dmaunmask(sc, chan); 422 return (nbytes); 423 } 424 425 int 426 isa_dmafinished(isadev, chan) 427 struct device *isadev; 428 int chan; 429 { 430 struct isa_softc *sc = (struct isa_softc *)isadev; 431 432 if (chan < 0 || chan > 7) { 433 printf("%s: bogus drq %d\n", sc->sc_dev.dv_xname, chan); 434 panic("isa_dmafinished"); 435 } 436 437 /* check that the terminal count was reached */ 438 if ((chan & 4) == 0) 439 sc->sc_dmafinished |= bus_space_read_1(sc->sc_iot, 440 sc->sc_dma1h, DMA1_SR) & 0x0f; 441 else 442 sc->sc_dmafinished |= (bus_space_read_1(sc->sc_iot, 443 sc->sc_dma2h, DMA2_SR) & 0x0f) << 4; 444 445 return ((sc->sc_dmafinished & (1 << chan)) != 0); 446 } 447 448 void 449 isa_dmadone(isadev, chan) 450 struct device *isadev; 451 int chan; 452 { 453 struct isa_softc *sc = (struct isa_softc *)isadev; 454 bus_dmamap_t dmam; 455 456 if (chan < 0 || chan > 7) { 457 printf("%s: bogus drq %d\n", sc->sc_dev.dv_xname, chan); 458 panic("isa_dmadone"); 459 } 460 461 dmam = sc->sc_dmamaps[chan]; 462 463 isa_dmamask(sc, chan); 464 465 if (isa_dmafinished(isadev, chan) == 0) 466 printf("%s: isa_dmadone: channel %d not finished\n", 467 sc->sc_dev.dv_xname, chan); 468 469 bus_dmamap_sync(sc->sc_dmat, dmam, 0, dmam->dm_mapsize, 470 (sc->sc_dmareads & (1 << chan)) ? BUS_DMASYNC_POSTREAD : 471 BUS_DMASYNC_POSTWRITE); 472 473 bus_dmamap_unload(sc->sc_dmat, dmam); 474 sc->sc_dmareads &= ~(1 << chan); 475 } 476 477 int 478 isa_dmamem_alloc(isadev, chan, size, addrp, flags) 479 struct device *isadev; 480 int chan; 481 bus_size_t size; 482 bus_addr_t *addrp; 483 int flags; 484 { 485 struct isa_softc *sc = (struct isa_softc *)isadev; 486 bus_dma_segment_t seg; 487 int error, boundary, rsegs; 488 489 if (chan < 0 || chan > 7) { 490 printf("%s: bogus drq %d\n", sc->sc_dev.dv_xname, chan); 491 panic("isa_dmamem_alloc"); 492 } 493 494 boundary = (chan & 4) ? (1 << 17) : (1 << 16); 495 496 size = round_page(size); 497 498 error = bus_dmamem_alloc(sc->sc_dmat, size, NBPG, boundary, 499 &seg, 1, &rsegs, flags); 500 if (error) 501 return (error); 502 503 *addrp = seg.ds_addr; 504 return (0); 505 } 506 507 void 508 isa_dmamem_free(isadev, chan, addr, size) 509 struct device *isadev; 510 int chan; 511 bus_addr_t addr; 512 bus_size_t size; 513 { 514 struct isa_softc *sc = (struct isa_softc *)isadev; 515 bus_dma_segment_t seg; 516 517 if (chan < 0 || chan > 7) { 518 printf("%s: bogus drq %d\n", sc->sc_dev.dv_xname, chan); 519 panic("isa_dmamem_free"); 520 } 521 522 seg.ds_addr = addr; 523 seg.ds_len = size; 524 525 bus_dmamem_free(sc->sc_dmat, &seg, 1); 526 } 527 528 int 529 isa_dmamem_map(isadev, chan, addr, size, kvap, flags) 530 struct device *isadev; 531 int chan; 532 bus_addr_t addr; 533 bus_size_t size; 534 caddr_t *kvap; 535 int flags; 536 { 537 struct isa_softc *sc = (struct isa_softc *)isadev; 538 bus_dma_segment_t seg; 539 540 if (chan < 0 || chan > 7) { 541 printf("%s: bogus drq %d\n", sc->sc_dev.dv_xname, chan); 542 panic("isa_dmamem_map"); 543 } 544 545 seg.ds_addr = addr; 546 seg.ds_len = size; 547 548 return (bus_dmamem_map(sc->sc_dmat, &seg, 1, size, kvap, flags)); 549 } 550 551 void 552 isa_dmamem_unmap(isadev, chan, kva, size) 553 struct device *isadev; 554 int chan; 555 caddr_t kva; 556 size_t size; 557 { 558 struct isa_softc *sc = (struct isa_softc *)isadev; 559 560 if (chan < 0 || chan > 7) { 561 printf("%s: bogus drq %d\n", sc->sc_dev.dv_xname, chan); 562 panic("isa_dmamem_unmap"); 563 } 564 565 bus_dmamem_unmap(sc->sc_dmat, kva, size); 566 } 567 568 int 569 isa_dmamem_mmap(isadev, chan, addr, size, off, prot, flags) 570 struct device *isadev; 571 int chan; 572 bus_addr_t addr; 573 bus_size_t size; 574 int off, prot, flags; 575 { 576 struct isa_softc *sc = (struct isa_softc *)isadev; 577 bus_dma_segment_t seg; 578 579 if (chan < 0 || chan > 7) { 580 printf("%s: bogus drq %d\n", sc->sc_dev.dv_xname, chan); 581 panic("isa_dmamem_mmap"); 582 } 583 584 seg.ds_addr = addr; 585 seg.ds_len = size; 586 587 return (bus_dmamem_mmap(sc->sc_dmat, &seg, 1, off, prot, flags)); 588 } 589 590 int 591 isa_drq_isfree(isadev, chan) 592 struct device *isadev; 593 int chan; 594 { 595 struct isa_softc *sc = (struct isa_softc *)isadev; 596 if (chan < 0 || chan > 7) { 597 printf("%s: bogus drq %d\n", sc->sc_dev.dv_xname, chan); 598 panic("isa_drq_isfree"); 599 } 600 return ISA_DRQ_ISFREE(sc, chan); 601 } 602 603 void * 604 isa_malloc(isadev, chan, size, pool, flags) 605 struct device *isadev; 606 int chan; 607 size_t size; 608 int pool; 609 int flags; 610 { 611 bus_addr_t addr; 612 caddr_t kva; 613 int bflags; 614 struct isa_mem *m; 615 616 bflags = flags & M_WAITOK ? BUS_DMA_WAITOK : BUS_DMA_NOWAIT; 617 618 if (isa_dmamem_alloc(isadev, chan, size, &addr, bflags)) 619 return 0; 620 if (isa_dmamem_map(isadev, chan, addr, size, &kva, bflags)) { 621 isa_dmamem_free(isadev, chan, addr, size); 622 return 0; 623 } 624 m = malloc(sizeof(*m), pool, flags); 625 if (m == 0) { 626 isa_dmamem_unmap(isadev, chan, kva, size); 627 isa_dmamem_free(isadev, chan, addr, size); 628 return 0; 629 } 630 m->isadev = isadev; 631 m->chan = chan; 632 m->size = size; 633 m->addr = addr; 634 m->kva = kva; 635 m->next = isa_mem_head; 636 isa_mem_head = m; 637 return (void *)kva; 638 } 639 640 void 641 isa_free(addr, pool) 642 void *addr; 643 int pool; 644 { 645 struct isa_mem **mp, *m; 646 caddr_t kva = (caddr_t)addr; 647 648 for(mp = &isa_mem_head; *mp && (*mp)->kva != kva; mp = &(*mp)->next) 649 ; 650 m = *mp; 651 if (!m) { 652 printf("isa_free: freeing unallocted memory\n"); 653 return; 654 } 655 *mp = m->next; 656 isa_dmamem_unmap(m->isadev, m->chan, kva, m->size); 657 isa_dmamem_free(m->isadev, m->chan, m->addr, m->size); 658 free(m, pool); 659 } 660 661 int 662 isa_mappage(mem, off, prot) 663 void *mem; 664 int off; 665 int prot; 666 { 667 struct isa_mem *m; 668 669 for(m = isa_mem_head; m && m->kva != (caddr_t)mem; m = m->next) 670 ; 671 if (!m) { 672 printf("isa_mappage: mapping unallocted memory\n"); 673 return -1; 674 } 675 return isa_dmamem_mmap(m->isadev, m->chan, m->addr, 676 m->size, off, prot, BUS_DMA_WAITOK); 677 } 678
Indexes created Fri Sep 26 08:10:20 GMT 2025