1 #include <i386/isa/ic/i8237.h> 2 3 /* 4 * Register definitions for DMA controller 1 (channels 0..3): 5 */ 6 #define DMA1_CHN(c) (IO_DMA1 + 1*(2*(c))) /* addr reg for channel c */ 7 #define DMA1_SR (IO_DMA1 + 1*8) /* status register */ 8 #define DMA1_SMSK (IO_DMA1 + 1*10) /* single mask register */ 9 #define DMA1_MODE (IO_DMA1 + 1*11) /* mode register */ 10 #define DMA1_FFC (IO_DMA1 + 1*12) /* clear first/last FF */ 11 12 /* 13 * Register definitions for DMA controller 2 (channels 4..7): 14 */ 15 #define DMA2_CHN(c) (IO_DMA2 + 2*(2*(c))) /* addr reg for channel c */ 16 #define DMA2_SR (IO_DMA2 + 2*8) /* status register */ 17 #define DMA2_SMSK (IO_DMA2 + 2*10) /* single mask register */ 18 #define DMA2_MODE (IO_DMA2 + 2*11) /* mode register */ 19 #define DMA2_FFC (IO_DMA2 + 2*12) /* clear first/last FF */ 20