isadmavar.h revision 1.13
1 /* $NetBSD: isadmavar.h,v 1.13 1998/06/25 19:18:06 thorpej Exp $ */ 2 3 /*- 4 * Copyright (c) 1997, 1998 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, 9 * NASA Ames Research Center. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 3. All advertising materials mentioning features or use of this software 20 * must display the following acknowledgement: 21 * This product includes software developed by the NetBSD 22 * Foundation, Inc. and its contributors. 23 * 4. Neither the name of The NetBSD Foundation nor the names of its 24 * contributors may be used to endorse or promote products derived 25 * from this software without specific prior written permission. 26 * 27 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 28 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 29 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 30 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 31 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 32 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 33 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 34 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 35 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 36 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 37 * POSSIBILITY OF SUCH DAMAGE. 38 */ 39 40 #ifndef _DEV_ISA_ISADMAVAR_H_ 41 #define _DEV_ISA_ISADMAVAR_H_ 42 43 #define MAX_ISADMA 65536 44 45 #define DMAMODE_WRITE 0 46 #define DMAMODE_READ 1 47 #define DMAMODE_LOOP 2 48 49 /* 50 * ISA DMA state. This structure is provided by the ISA chipset 51 * DMA entry points to the generic back-end functions that actually 52 * frob the controller. 53 */ 54 struct isa_dma_state { 55 struct device *ids_dev; /* associated device (for dv_xname) */ 56 bus_space_tag_t ids_bst; /* bus space tag for DMA controller */ 57 bus_space_handle_t ids_dma1h; /* handle for DMA controller #1 */ 58 bus_space_handle_t ids_dma2h; /* handle for DMA controller #2 */ 59 bus_space_handle_t ids_dmapgh; /* handle for DMA page registers */ 60 bus_dma_tag_t ids_dmat; /* DMA tag for DMA controller */ 61 bus_dmamap_t ids_dmamaps[8]; /* DMA maps for each channel */ 62 bus_size_t ids_dmalength[8]; /* size of DMA transfer per channel */ 63 int ids_drqmap; /* available DRQs (bitmap) */ 64 int ids_dmareads; /* state for isa_dmadone() (bitmap) */ 65 int ids_dmafinished; /* DMA completion state (bitmap) */ 66 int ids_masked; /* masked channels (bitmap) */ 67 int ids_frozen; /* `frozen' count */ 68 int ids_initialized; /* only initialize once... */ 69 }; 70 71 #define ISA_DMA_DRQ_ISFREE(state, drq) \ 72 (((state)->ids_drqmap & (1 << (drq))) == 0) 73 74 #define ISA_DMA_DRQ_ALLOC(state, drq) \ 75 (state)->ids_drqmap |= (1 << (drq)) 76 77 #define ISA_DMA_DRQ_FREE(state, drq) \ 78 (state)->ids_drqmap &= ~(1 << (drq)) 79 80 #define ISA_DMA_MASK_SET(state, drq) \ 81 (state)->ids_masked |= (1 << (drq)) 82 83 #define ISA_DMA_MASK_CLR(state, drq) \ 84 (state)->ids_masked &= ~(1 << (drq)) 85 86 /* 87 * Memory list used by _isa_malloc(). 88 */ 89 struct isa_mem { 90 struct isa_dma_state *ids; 91 int chan; 92 bus_size_t size; 93 bus_addr_t addr; 94 caddr_t kva; 95 struct isa_mem *next; 96 }; 97 98 #ifdef _KERNEL 99 struct proc; 100 101 void _isa_dmainit __P((struct isa_dma_state *, bus_space_tag_t, 102 bus_dma_tag_t, struct device *)); 103 104 int _isa_dmacascade __P((struct isa_dma_state *, int)); 105 106 int _isa_dmamap_create __P((struct isa_dma_state *, int, 107 bus_size_t, int)); 108 void _isa_dmamap_destroy __P((struct isa_dma_state *, int)); 109 110 int _isa_dmastart __P((struct isa_dma_state *, int, void *, bus_size_t, 111 struct proc *, int, int)); 112 void _isa_dmaabort __P((struct isa_dma_state *, int)); 113 bus_size_t _isa_dmacount __P((struct isa_dma_state *, int)); 114 int _isa_dmafinished __P((struct isa_dma_state *, int)); 115 void _isa_dmadone __P((struct isa_dma_state *, int)); 116 117 void _isa_dmafreeze __P((struct isa_dma_state *)); 118 void _isa_dmathaw __P((struct isa_dma_state *)); 119 120 int _isa_dmamem_alloc __P((struct isa_dma_state *, int, bus_size_t, 121 bus_addr_t *, int)); 122 void _isa_dmamem_free __P((struct isa_dma_state *, int, bus_addr_t, 123 bus_size_t)); 124 int _isa_dmamem_map __P((struct isa_dma_state *, int, bus_addr_t, 125 bus_size_t, caddr_t *, int)); 126 void _isa_dmamem_unmap __P((struct isa_dma_state *, int, caddr_t, 127 size_t)); 128 int _isa_dmamem_mmap __P((struct isa_dma_state *, int, bus_addr_t, 129 bus_size_t, int, int, int)); 130 131 int _isa_drq_isfree __P((struct isa_dma_state *, int)); 132 133 void *_isa_malloc __P((struct isa_dma_state *, int, size_t, int, int)); 134 void _isa_free __P((void *, int)); 135 int _isa_mappage __P((void *, int, int)); 136 #endif /* _KERNEL */ 137 138 #endif /* _DEV_ISA_ISADMAVAR_H_ */ 139
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