itesio_isa.c revision 1.20 1 1.20 pgoyette /* $NetBSD: itesio_isa.c,v 1.20 2010/07/17 21:51:43 pgoyette Exp $ */
2 1.1 xtraeme /* Derived from $OpenBSD: it.c,v 1.19 2006/04/10 00:57:54 deraadt Exp $ */
3 1.1 xtraeme
4 1.1 xtraeme /*
5 1.13 xtraeme * Copyright (c) 2006-2007 Juan Romero Pardines <xtraeme (at) netbsd.org>
6 1.1 xtraeme * Copyright (c) 2003 Julien Bordet <zejames (at) greyhats.org>
7 1.1 xtraeme * All rights reserved.
8 1.1 xtraeme *
9 1.1 xtraeme * Redistribution and use in source and binary forms, with or without
10 1.1 xtraeme * modification, are permitted provided that the following conditions
11 1.1 xtraeme * are met:
12 1.1 xtraeme * 1. Redistributions of source code must retain the above copyright
13 1.1 xtraeme * notice, this list of conditions and the following disclaimer.
14 1.1 xtraeme * 2. Redistributions in binary form must reproduce the above copyright
15 1.1 xtraeme * notice, this list of conditions and the following disclaimer in the
16 1.1 xtraeme * documentation and/or other materials provided with the distribution.
17 1.1 xtraeme *
18 1.1 xtraeme * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
19 1.1 xtraeme * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITD TO, THE IMPLIED WARRANTIES
20 1.1 xtraeme * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
21 1.1 xtraeme * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
22 1.1 xtraeme * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
23 1.1 xtraeme * NOT LIMITD TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
24 1.1 xtraeme * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
25 1.1 xtraeme * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
26 1.1 xtraeme * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
27 1.1 xtraeme * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
28 1.1 xtraeme */
29 1.1 xtraeme
30 1.1 xtraeme /*
31 1.1 xtraeme * Driver for the iTE IT87xxF Super I/O. Currently supporting
32 1.11 xtraeme * the Environmental Controller to monitor the sensors and the
33 1.11 xtraeme * Watchdog Timer.
34 1.1 xtraeme */
35 1.1 xtraeme
36 1.1 xtraeme #include <sys/cdefs.h>
37 1.20 pgoyette __KERNEL_RCSID(0, "$NetBSD: itesio_isa.c,v 1.20 2010/07/17 21:51:43 pgoyette Exp $");
38 1.1 xtraeme
39 1.1 xtraeme #include <sys/param.h>
40 1.1 xtraeme #include <sys/kernel.h>
41 1.1 xtraeme #include <sys/device.h>
42 1.1 xtraeme
43 1.1 xtraeme #include <sys/bus.h>
44 1.1 xtraeme
45 1.1 xtraeme #include <dev/isa/isareg.h>
46 1.1 xtraeme #include <dev/isa/isavar.h>
47 1.1 xtraeme
48 1.1 xtraeme #include <dev/sysmon/sysmonvar.h>
49 1.1 xtraeme
50 1.1 xtraeme #include <dev/isa/itesio_isavar.h>
51 1.1 xtraeme
52 1.1 xtraeme #define IT_VOLTSTART_IDX 3 /* voltage start index */
53 1.1 xtraeme #define IT_FANSTART_IDX 12 /* fan start index */
54 1.1 xtraeme
55 1.1 xtraeme #if defined(ITESIO_DEBUG)
56 1.1 xtraeme #define DPRINTF(x) do { printf x; } while (0)
57 1.1 xtraeme #else
58 1.1 xtraeme #define DPRINTF(x)
59 1.1 xtraeme #endif
60 1.1 xtraeme
61 1.1 xtraeme /*
62 1.1 xtraeme * IT87-compatible chips can typically measure voltages up to 4.096 V.
63 1.1 xtraeme * To measure higher voltages the input is attenuated with (external)
64 1.1 xtraeme * resistors. Negative voltages are measured using a reference
65 1.1 xtraeme * voltage. So we have to convert the sensor values back to real
66 1.1 xtraeme * voltages by applying the appropriate resistor factor.
67 1.1 xtraeme */
68 1.1 xtraeme #define RFACT_NONE 10000
69 1.1 xtraeme #define RFACT(x, y) (RFACT_NONE * ((x) + (y)) / (y))
70 1.1 xtraeme
71 1.1 xtraeme /* autoconf(9) functions */
72 1.14 xtraeme static int itesio_isa_match(device_t, cfdata_t, void *);
73 1.1 xtraeme static void itesio_isa_attach(device_t, device_t, void *);
74 1.1 xtraeme static int itesio_isa_detach(device_t, int);
75 1.1 xtraeme
76 1.1 xtraeme CFATTACH_DECL_NEW(itesio, sizeof(struct itesio_softc),
77 1.1 xtraeme itesio_isa_match, itesio_isa_attach, itesio_isa_detach, NULL);
78 1.1 xtraeme
79 1.1 xtraeme /* driver functions */
80 1.1 xtraeme static uint8_t itesio_ecreadreg(struct itesio_softc *, int);
81 1.1 xtraeme static void itesio_ecwritereg(struct itesio_softc *, int, int);
82 1.1 xtraeme static uint8_t itesio_readreg(bus_space_tag_t, bus_space_handle_t, int);
83 1.1 xtraeme static void itesio_writereg(bus_space_tag_t, bus_space_handle_t, int, int);
84 1.1 xtraeme static void itesio_enter(bus_space_tag_t, bus_space_handle_t);
85 1.1 xtraeme static void itesio_exit(bus_space_tag_t, bus_space_handle_t);
86 1.1 xtraeme
87 1.10 xtraeme /* sysmon_envsys(9) glue */
88 1.1 xtraeme static void itesio_setup_sensors(struct itesio_softc *);
89 1.1 xtraeme static void itesio_refresh_temp(struct itesio_softc *, envsys_data_t *);
90 1.1 xtraeme static void itesio_refresh_volts(struct itesio_softc *, envsys_data_t *);
91 1.1 xtraeme static void itesio_refresh_fans(struct itesio_softc *, envsys_data_t *);
92 1.4 xtraeme static void itesio_refresh(struct sysmon_envsys *, envsys_data_t *);
93 1.1 xtraeme
94 1.9 xtraeme /* sysmon_wdog glue */
95 1.19 pgoyette static bool itesio_wdt_suspend(device_t, const pmf_qual_t *);
96 1.9 xtraeme static int itesio_wdt_setmode(struct sysmon_wdog *);
97 1.9 xtraeme static int itesio_wdt_tickle(struct sysmon_wdog *);
98 1.9 xtraeme
99 1.1 xtraeme /* rfact values for voltage sensors */
100 1.1 xtraeme static const int itesio_vrfact[] = {
101 1.1 xtraeme RFACT_NONE, /* VCORE_A */
102 1.1 xtraeme RFACT_NONE, /* VCORE_B */
103 1.1 xtraeme RFACT_NONE, /* +3.3V */
104 1.1 xtraeme RFACT(68, 100), /* +5V */
105 1.1 xtraeme RFACT(30, 10), /* +12V */
106 1.16 xtraeme RFACT(21, 10), /* -5V */
107 1.16 xtraeme RFACT(83, 20), /* -12V */
108 1.1 xtraeme RFACT(68, 100), /* STANDBY */
109 1.1 xtraeme RFACT_NONE /* VBAT */
110 1.1 xtraeme };
111 1.1 xtraeme
112 1.1 xtraeme static int
113 1.14 xtraeme itesio_isa_match(device_t parent, cfdata_t match, void *aux)
114 1.1 xtraeme {
115 1.1 xtraeme struct isa_attach_args *ia = aux;
116 1.1 xtraeme bus_space_handle_t ioh;
117 1.1 xtraeme uint16_t cr;
118 1.1 xtraeme
119 1.1 xtraeme /* Must supply an address */
120 1.1 xtraeme if (ia->ia_nio < 1)
121 1.1 xtraeme return 0;
122 1.1 xtraeme
123 1.1 xtraeme if (ISA_DIRECT_CONFIG(ia))
124 1.1 xtraeme return 0;
125 1.1 xtraeme
126 1.1 xtraeme if (ia->ia_io[0].ir_addr == ISA_UNKNOWN_PORT)
127 1.1 xtraeme return 0;
128 1.1 xtraeme
129 1.1 xtraeme if (bus_space_map(ia->ia_iot, ia->ia_io[0].ir_addr, 2, 0, &ioh))
130 1.1 xtraeme return 0;
131 1.1 xtraeme
132 1.1 xtraeme itesio_enter(ia->ia_iot, ioh);
133 1.1 xtraeme cr = (itesio_readreg(ia->ia_iot, ioh, ITESIO_CHIPID1) << 8);
134 1.1 xtraeme cr |= itesio_readreg(ia->ia_iot, ioh, ITESIO_CHIPID2);
135 1.1 xtraeme itesio_exit(ia->ia_iot, ioh);
136 1.1 xtraeme bus_space_unmap(ia->ia_iot, ioh, 2);
137 1.1 xtraeme
138 1.1 xtraeme switch (cr) {
139 1.1 xtraeme case ITESIO_ID8705:
140 1.1 xtraeme case ITESIO_ID8712:
141 1.1 xtraeme case ITESIO_ID8716:
142 1.1 xtraeme case ITESIO_ID8718:
143 1.17 xtraeme case ITESIO_ID8726:
144 1.1 xtraeme ia->ia_nio = 1;
145 1.1 xtraeme ia->ia_io[0].ir_size = 2;
146 1.1 xtraeme ia->ia_niomem = 0;
147 1.1 xtraeme ia->ia_nirq = 0;
148 1.1 xtraeme ia->ia_ndrq = 0;
149 1.1 xtraeme return 1;
150 1.1 xtraeme default:
151 1.1 xtraeme return 0;
152 1.1 xtraeme }
153 1.1 xtraeme }
154 1.1 xtraeme
155 1.1 xtraeme static void
156 1.1 xtraeme itesio_isa_attach(device_t parent, device_t self, void *aux)
157 1.1 xtraeme {
158 1.1 xtraeme struct itesio_softc *sc = device_private(self);
159 1.1 xtraeme struct isa_attach_args *ia = aux;
160 1.1 xtraeme int i;
161 1.1 xtraeme uint8_t cr;
162 1.1 xtraeme
163 1.9 xtraeme sc->sc_iot = ia->ia_iot;
164 1.1 xtraeme
165 1.9 xtraeme if (bus_space_map(sc->sc_iot, ia->ia_io[0].ir_addr, 2, 0,
166 1.18 jakllsch &sc->sc_pnp_ioh)) {
167 1.18 jakllsch aprint_error(": can't map pnp i/o space\n");
168 1.1 xtraeme return;
169 1.1 xtraeme }
170 1.6 jmcneill
171 1.6 jmcneill aprint_naive("\n");
172 1.6 jmcneill
173 1.1 xtraeme /*
174 1.1 xtraeme * Enter to the Super I/O MB PNP mode.
175 1.1 xtraeme */
176 1.18 jakllsch itesio_enter(sc->sc_iot, sc->sc_pnp_ioh);
177 1.1 xtraeme /*
178 1.1 xtraeme * Get info from the Super I/O Global Configuration Registers:
179 1.1 xtraeme * Chip IDs and Device Revision.
180 1.1 xtraeme */
181 1.18 jakllsch sc->sc_chipid = (itesio_readreg(sc->sc_iot, sc->sc_pnp_ioh,
182 1.9 xtraeme ITESIO_CHIPID1) << 8);
183 1.18 jakllsch sc->sc_chipid |= itesio_readreg(sc->sc_iot, sc->sc_pnp_ioh,
184 1.9 xtraeme ITESIO_CHIPID2);
185 1.18 jakllsch sc->sc_devrev = (itesio_readreg(sc->sc_iot, sc->sc_pnp_ioh,
186 1.9 xtraeme ITESIO_DEVREV) & 0x0f);
187 1.1 xtraeme /*
188 1.1 xtraeme * Select the EC LDN to get the Base Address.
189 1.1 xtraeme */
190 1.18 jakllsch itesio_writereg(sc->sc_iot, sc->sc_pnp_ioh, ITESIO_LDNSEL,
191 1.18 jakllsch ITESIO_EC_LDN);
192 1.1 xtraeme sc->sc_hwmon_baseaddr =
193 1.18 jakllsch (itesio_readreg(sc->sc_iot, sc->sc_pnp_ioh, ITESIO_EC_MSB) << 8);
194 1.18 jakllsch sc->sc_hwmon_baseaddr |= itesio_readreg(sc->sc_iot, sc->sc_pnp_ioh,
195 1.9 xtraeme ITESIO_EC_LSB);
196 1.1 xtraeme /*
197 1.9 xtraeme * We are done, exit MB PNP mode.
198 1.1 xtraeme */
199 1.18 jakllsch itesio_exit(sc->sc_iot, sc->sc_pnp_ioh);
200 1.1 xtraeme
201 1.1 xtraeme aprint_normal(": iTE IT%4xF Super I/O (rev %d)\n",
202 1.1 xtraeme sc->sc_chipid, sc->sc_devrev);
203 1.1 xtraeme aprint_normal_dev(self, "Hardware Monitor registers at 0x%x\n",
204 1.1 xtraeme sc->sc_hwmon_baseaddr);
205 1.1 xtraeme
206 1.18 jakllsch if (bus_space_map(sc->sc_iot, sc->sc_hwmon_baseaddr, 8, 0,
207 1.9 xtraeme &sc->sc_ec_ioh)) {
208 1.1 xtraeme aprint_error_dev(self, "cannot map hwmon i/o space\n");
209 1.15 xtraeme goto out2;
210 1.1 xtraeme }
211 1.1 xtraeme
212 1.1 xtraeme sc->sc_hwmon_mapped = true;
213 1.1 xtraeme
214 1.1 xtraeme /* Activate monitoring */
215 1.1 xtraeme cr = itesio_ecreadreg(sc, ITESIO_EC_CONFIG);
216 1.1 xtraeme SET(cr, 0x01);
217 1.1 xtraeme itesio_ecwritereg(sc, ITESIO_EC_CONFIG, cr);
218 1.1 xtraeme
219 1.1 xtraeme #ifdef notyet
220 1.1 xtraeme /* Enable beep alarms */
221 1.1 xtraeme cr = itesio_ecreadreg(sc, ITESIO_EC_BEEPEER);
222 1.1 xtraeme SET(cr, 0x02); /* Voltage exceeds limit */
223 1.1 xtraeme SET(cr, 0x04); /* Temperature exceeds limit */
224 1.1 xtraeme itesio_ecwritereg(sc, ITESIO_EC_BEEPEER, cr);
225 1.1 xtraeme #endif
226 1.1 xtraeme
227 1.4 xtraeme /*
228 1.4 xtraeme * Initialize and attach sensors.
229 1.4 xtraeme */
230 1.4 xtraeme itesio_setup_sensors(sc);
231 1.4 xtraeme sc->sc_sme = sysmon_envsys_create();
232 1.4 xtraeme for (i = 0; i < IT_NUM_SENSORS; i++) {
233 1.4 xtraeme if (sysmon_envsys_sensor_attach(sc->sc_sme,
234 1.4 xtraeme &sc->sc_sensor[i])) {
235 1.4 xtraeme sysmon_envsys_destroy(sc->sc_sme);
236 1.15 xtraeme goto out;
237 1.4 xtraeme }
238 1.1 xtraeme }
239 1.1 xtraeme /*
240 1.1 xtraeme * Hook into the system monitor.
241 1.1 xtraeme */
242 1.4 xtraeme sc->sc_sme->sme_name = device_xname(self);
243 1.4 xtraeme sc->sc_sme->sme_cookie = sc;
244 1.4 xtraeme sc->sc_sme->sme_refresh = itesio_refresh;
245 1.1 xtraeme
246 1.5 xtraeme if ((i = sysmon_envsys_register(sc->sc_sme))) {
247 1.5 xtraeme aprint_error_dev(self,
248 1.5 xtraeme "unable to register with sysmon (%d)\n", i);
249 1.4 xtraeme sysmon_envsys_destroy(sc->sc_sme);
250 1.15 xtraeme goto out;
251 1.1 xtraeme }
252 1.1 xtraeme sc->sc_hwmon_enabled = true;
253 1.9 xtraeme
254 1.20 pgoyette if (!pmf_device_register(self, NULL, NULL))
255 1.20 pgoyette aprint_error_dev(self, "couldn't establish power handler\n");
256 1.20 pgoyette
257 1.15 xtraeme /* The IT8705 doesn't support the WDT */
258 1.15 xtraeme if (sc->sc_chipid == ITESIO_ID8705)
259 1.15 xtraeme goto out2;
260 1.9 xtraeme
261 1.9 xtraeme /*
262 1.9 xtraeme * Initialize the watchdog timer.
263 1.9 xtraeme */
264 1.9 xtraeme sc->sc_smw.smw_name = device_xname(self);
265 1.9 xtraeme sc->sc_smw.smw_cookie = sc;
266 1.9 xtraeme sc->sc_smw.smw_setmode = itesio_wdt_setmode;
267 1.9 xtraeme sc->sc_smw.smw_tickle = itesio_wdt_tickle;
268 1.9 xtraeme sc->sc_smw.smw_period = 60;
269 1.9 xtraeme
270 1.9 xtraeme if (sysmon_wdog_register(&sc->sc_smw)) {
271 1.9 xtraeme aprint_error_dev(self, "unable to register watchdog timer\n");
272 1.15 xtraeme goto out2;
273 1.9 xtraeme }
274 1.9 xtraeme sc->sc_wdt_enabled = true;
275 1.9 xtraeme aprint_normal_dev(self, "Watchdog Timer present\n");
276 1.19 pgoyette
277 1.20 pgoyette pmf_device_deregister(self);
278 1.19 pgoyette if (!pmf_device_register(self, itesio_wdt_suspend, NULL))
279 1.19 pgoyette aprint_error_dev(self, "couldn't establish power handler\n");
280 1.19 pgoyette
281 1.15 xtraeme return;
282 1.15 xtraeme
283 1.15 xtraeme out:
284 1.18 jakllsch bus_space_unmap(sc->sc_iot, sc->sc_ec_ioh, 8);
285 1.15 xtraeme out2:
286 1.18 jakllsch bus_space_unmap(sc->sc_iot, sc->sc_pnp_ioh, 2);
287 1.1 xtraeme }
288 1.1 xtraeme
289 1.1 xtraeme static int
290 1.1 xtraeme itesio_isa_detach(device_t self, int flags)
291 1.1 xtraeme {
292 1.1 xtraeme struct itesio_softc *sc = device_private(self);
293 1.1 xtraeme
294 1.1 xtraeme if (sc->sc_hwmon_enabled)
295 1.4 xtraeme sysmon_envsys_unregister(sc->sc_sme);
296 1.1 xtraeme if (sc->sc_hwmon_mapped)
297 1.18 jakllsch bus_space_unmap(sc->sc_iot, sc->sc_ec_ioh, 8);
298 1.9 xtraeme if (sc->sc_wdt_enabled) {
299 1.12 wiz sysmon_wdog_unregister(&sc->sc_smw);
300 1.18 jakllsch bus_space_unmap(sc->sc_iot, sc->sc_pnp_ioh, 2);
301 1.9 xtraeme }
302 1.9 xtraeme
303 1.1 xtraeme return 0;
304 1.1 xtraeme }
305 1.1 xtraeme
306 1.19 pgoyette static bool
307 1.19 pgoyette itesio_wdt_suspend(device_t dev, const pmf_qual_t *qual)
308 1.19 pgoyette {
309 1.19 pgoyette struct itesio_softc *sc = device_private(dev);
310 1.19 pgoyette
311 1.19 pgoyette /* Don't allow suspend if watchdog is armed */
312 1.19 pgoyette if ((sc->sc_smw.smw_mode & WDOG_MODE_MASK) != WDOG_MODE_DISARMED)
313 1.19 pgoyette return false;
314 1.19 pgoyette return true;
315 1.19 pgoyette }
316 1.19 pgoyette
317 1.1 xtraeme /*
318 1.1 xtraeme * Functions to read/write to the Environmental Controller.
319 1.1 xtraeme */
320 1.1 xtraeme static uint8_t
321 1.1 xtraeme itesio_ecreadreg(struct itesio_softc *sc, int reg)
322 1.1 xtraeme {
323 1.18 jakllsch bus_space_write_1(sc->sc_iot, sc->sc_ec_ioh, ITESIO_EC_ADDR, reg);
324 1.18 jakllsch return bus_space_read_1(sc->sc_iot, sc->sc_ec_ioh, ITESIO_EC_DATA);
325 1.1 xtraeme }
326 1.1 xtraeme
327 1.1 xtraeme static void
328 1.1 xtraeme itesio_ecwritereg(struct itesio_softc *sc, int reg, int val)
329 1.1 xtraeme {
330 1.18 jakllsch bus_space_write_1(sc->sc_iot, sc->sc_ec_ioh, ITESIO_EC_ADDR, reg);
331 1.18 jakllsch bus_space_write_1(sc->sc_iot, sc->sc_ec_ioh, ITESIO_EC_DATA, val);
332 1.1 xtraeme }
333 1.1 xtraeme
334 1.1 xtraeme /*
335 1.1 xtraeme * Functions to enter/exit/read/write to the Super I/O.
336 1.1 xtraeme */
337 1.1 xtraeme static uint8_t
338 1.1 xtraeme itesio_readreg(bus_space_tag_t iot, bus_space_handle_t ioh, int reg)
339 1.1 xtraeme {
340 1.1 xtraeme bus_space_write_1(iot, ioh, ITESIO_ADDR, reg);
341 1.1 xtraeme return bus_space_read_1(iot, ioh, ITESIO_DATA);
342 1.1 xtraeme }
343 1.1 xtraeme
344 1.1 xtraeme static void
345 1.1 xtraeme itesio_writereg(bus_space_tag_t iot, bus_space_handle_t ioh, int reg, int val)
346 1.1 xtraeme {
347 1.1 xtraeme bus_space_write_1(iot, ioh, ITESIO_ADDR, reg);
348 1.1 xtraeme bus_space_write_1(iot, ioh, ITESIO_DATA, val);
349 1.1 xtraeme }
350 1.1 xtraeme
351 1.1 xtraeme static void
352 1.1 xtraeme itesio_enter(bus_space_tag_t iot, bus_space_handle_t ioh)
353 1.1 xtraeme {
354 1.1 xtraeme bus_space_write_1(iot, ioh, ITESIO_ADDR, 0x87);
355 1.1 xtraeme bus_space_write_1(iot, ioh, ITESIO_ADDR, 0x01);
356 1.1 xtraeme bus_space_write_1(iot, ioh, ITESIO_ADDR, 0x55);
357 1.1 xtraeme bus_space_write_1(iot, ioh, ITESIO_ADDR, 0x55);
358 1.1 xtraeme }
359 1.1 xtraeme
360 1.1 xtraeme static void
361 1.1 xtraeme itesio_exit(bus_space_tag_t iot, bus_space_handle_t ioh)
362 1.1 xtraeme {
363 1.1 xtraeme bus_space_write_1(iot, ioh, ITESIO_ADDR, 0x02);
364 1.1 xtraeme bus_space_write_1(iot, ioh, ITESIO_DATA, 0x02);
365 1.1 xtraeme }
366 1.1 xtraeme
367 1.1 xtraeme
368 1.1 xtraeme #define COPYDESCR(x, y) \
369 1.1 xtraeme do { \
370 1.1 xtraeme strlcpy((x), (y), sizeof(x)); \
371 1.1 xtraeme } while (0)
372 1.1 xtraeme /*
373 1.1 xtraeme * sysmon_envsys(9) glue.
374 1.1 xtraeme */
375 1.1 xtraeme static void
376 1.1 xtraeme itesio_setup_sensors(struct itesio_softc *sc)
377 1.1 xtraeme {
378 1.1 xtraeme int i;
379 1.1 xtraeme
380 1.1 xtraeme /* temperatures */
381 1.1 xtraeme for (i = 0; i < IT_VOLTSTART_IDX; i++)
382 1.4 xtraeme sc->sc_sensor[i].units = ENVSYS_STEMP;
383 1.1 xtraeme
384 1.4 xtraeme COPYDESCR(sc->sc_sensor[0].desc, "CPU Temp");
385 1.4 xtraeme COPYDESCR(sc->sc_sensor[1].desc, "System Temp");
386 1.4 xtraeme COPYDESCR(sc->sc_sensor[2].desc, "Aux Temp");
387 1.1 xtraeme
388 1.1 xtraeme /* voltages */
389 1.1 xtraeme for (i = IT_VOLTSTART_IDX; i < IT_FANSTART_IDX; i++) {
390 1.4 xtraeme sc->sc_sensor[i].units = ENVSYS_SVOLTS_DC;
391 1.4 xtraeme sc->sc_sensor[i].flags = ENVSYS_FCHANGERFACT;
392 1.1 xtraeme }
393 1.1 xtraeme
394 1.4 xtraeme COPYDESCR(sc->sc_sensor[3].desc, "VCORE_A");
395 1.4 xtraeme COPYDESCR(sc->sc_sensor[4].desc, "VCORE_B");
396 1.4 xtraeme COPYDESCR(sc->sc_sensor[5].desc, "+3.3V");
397 1.4 xtraeme COPYDESCR(sc->sc_sensor[6].desc, "+5V");
398 1.4 xtraeme COPYDESCR(sc->sc_sensor[7].desc, "+12V");
399 1.16 xtraeme COPYDESCR(sc->sc_sensor[8].desc, "-5V");
400 1.16 xtraeme COPYDESCR(sc->sc_sensor[9].desc, "-12V");
401 1.4 xtraeme COPYDESCR(sc->sc_sensor[10].desc, "STANDBY");
402 1.4 xtraeme COPYDESCR(sc->sc_sensor[11].desc, "VBAT");
403 1.1 xtraeme
404 1.1 xtraeme /* fans */
405 1.1 xtraeme for (i = IT_FANSTART_IDX; i < IT_NUM_SENSORS; i++)
406 1.4 xtraeme sc->sc_sensor[i].units = ENVSYS_SFANRPM;
407 1.1 xtraeme
408 1.4 xtraeme COPYDESCR(sc->sc_sensor[12].desc, "CPU Fan");
409 1.4 xtraeme COPYDESCR(sc->sc_sensor[13].desc, "System Fan");
410 1.4 xtraeme COPYDESCR(sc->sc_sensor[14].desc, "Aux Fan");
411 1.1 xtraeme }
412 1.1 xtraeme #undef COPYDESCR
413 1.1 xtraeme
414 1.1 xtraeme static void
415 1.1 xtraeme itesio_refresh_temp(struct itesio_softc *sc, envsys_data_t *edata)
416 1.1 xtraeme {
417 1.1 xtraeme int sdata;
418 1.1 xtraeme
419 1.1 xtraeme sdata = itesio_ecreadreg(sc, ITESIO_EC_SENSORTEMPBASE + edata->sensor);
420 1.1 xtraeme /* sensor is not connected or reporting invalid data */
421 1.1 xtraeme if (sdata == 0 || sdata >= 0xfa) {
422 1.1 xtraeme edata->state = ENVSYS_SINVALID;
423 1.1 xtraeme return;
424 1.1 xtraeme }
425 1.1 xtraeme
426 1.1 xtraeme DPRINTF(("%s: sdata[temp%d] 0x%x\n", __func__, edata->sensor, sdata));
427 1.1 xtraeme /* Convert temperature to uK */
428 1.1 xtraeme edata->value_cur = sdata * 1000000 + 273150000;
429 1.1 xtraeme edata->state = ENVSYS_SVALID;
430 1.1 xtraeme }
431 1.1 xtraeme
432 1.1 xtraeme static void
433 1.1 xtraeme itesio_refresh_volts(struct itesio_softc *sc, envsys_data_t *edata)
434 1.1 xtraeme {
435 1.1 xtraeme uint8_t vbatcr = 0;
436 1.1 xtraeme int i, sdata;
437 1.1 xtraeme
438 1.1 xtraeme i = edata->sensor - IT_VOLTSTART_IDX;
439 1.1 xtraeme
440 1.1 xtraeme sdata = itesio_ecreadreg(sc, ITESIO_EC_SENSORVOLTBASE + i);
441 1.1 xtraeme /* not connected */
442 1.1 xtraeme if (sdata == 0 || sdata == 0xff) {
443 1.1 xtraeme edata->state = ENVSYS_SINVALID;
444 1.1 xtraeme return;
445 1.1 xtraeme }
446 1.1 xtraeme
447 1.1 xtraeme /*
448 1.1 xtraeme * update VBAT voltage reading every time we read it, to get
449 1.1 xtraeme * latest value.
450 1.1 xtraeme */
451 1.1 xtraeme if (i == 8) {
452 1.1 xtraeme vbatcr = itesio_ecreadreg(sc, ITESIO_EC_CONFIG);
453 1.1 xtraeme SET(vbatcr, ITESIO_EC_UPDATEVBAT);
454 1.1 xtraeme itesio_ecwritereg(sc, ITESIO_EC_CONFIG, vbatcr);
455 1.1 xtraeme }
456 1.1 xtraeme
457 1.1 xtraeme DPRINTF(("%s: sdata[volt%d] 0x%x\n", __func__, i, sdata));
458 1.1 xtraeme
459 1.1 xtraeme /* voltage returned as (mV << 4) */
460 1.1 xtraeme edata->value_cur = (sdata << 4);
461 1.16 xtraeme /* negative values */
462 1.16 xtraeme if (i == 5 || i == 6)
463 1.16 xtraeme edata->value_cur -= ITESIO_EC_VREF;
464 1.1 xtraeme /* rfact is (factor * 10^4) */
465 1.1 xtraeme edata->value_cur *= itesio_vrfact[i];
466 1.1 xtraeme if (edata->rfact)
467 1.1 xtraeme edata->value_cur += edata->rfact;
468 1.1 xtraeme /* division by 10 gets us back to uVDC */
469 1.1 xtraeme edata->value_cur /= 10;
470 1.16 xtraeme if (i == 5 || i == 6)
471 1.16 xtraeme edata->value_cur += ITESIO_EC_VREF * 1000;
472 1.16 xtraeme
473 1.1 xtraeme edata->state = ENVSYS_SVALID;
474 1.1 xtraeme }
475 1.1 xtraeme
476 1.1 xtraeme static void
477 1.1 xtraeme itesio_refresh_fans(struct itesio_softc *sc, envsys_data_t *edata)
478 1.1 xtraeme {
479 1.1 xtraeme uint8_t mode = 0;
480 1.1 xtraeme uint16_t sdata = 0;
481 1.1 xtraeme int i, divisor, odivisor, ndivisor;
482 1.1 xtraeme
483 1.1 xtraeme i = edata->sensor - IT_FANSTART_IDX;
484 1.1 xtraeme divisor = odivisor = ndivisor = 0;
485 1.1 xtraeme
486 1.1 xtraeme if (sc->sc_chipid == ITESIO_ID8705 || sc->sc_chipid == ITESIO_ID8712) {
487 1.1 xtraeme /*
488 1.1 xtraeme * Use the Fan Tachometer Divisor Register for
489 1.1 xtraeme * IT8705F and IT8712F.
490 1.1 xtraeme */
491 1.1 xtraeme divisor = odivisor = ndivisor =
492 1.1 xtraeme itesio_ecreadreg(sc, ITESIO_EC_FAN_TDR);
493 1.1 xtraeme sdata = itesio_ecreadreg(sc, ITESIO_EC_SENSORFANBASE + i);
494 1.1 xtraeme if (sdata == 0xff) {
495 1.1 xtraeme edata->state = ENVSYS_SINVALID;
496 1.1 xtraeme if (i == 2)
497 1.1 xtraeme ndivisor |= 0x40;
498 1.1 xtraeme else {
499 1.1 xtraeme ndivisor &= ~(7 << (i * 3));
500 1.1 xtraeme ndivisor |= ((divisor + 1) & 7) << (i * 3);
501 1.1 xtraeme }
502 1.1 xtraeme } else {
503 1.1 xtraeme if (i == 2)
504 1.1 xtraeme divisor = divisor & 1 ? 3 : 1;
505 1.1 xtraeme
506 1.1 xtraeme if ((sdata << (divisor & 7)) == 0)
507 1.1 xtraeme edata->state = ENVSYS_SINVALID;
508 1.1 xtraeme else {
509 1.1 xtraeme edata->value_cur =
510 1.1 xtraeme 1350000 / (sdata << (divisor & 7));
511 1.1 xtraeme edata->state = ENVSYS_SVALID;
512 1.1 xtraeme }
513 1.1 xtraeme }
514 1.1 xtraeme DPRINTF(("%s: 8bit sdata[fan%d] 0x%x div: 0x%x\n", __func__,
515 1.1 xtraeme i, sdata, divisor));
516 1.1 xtraeme if (ndivisor != odivisor)
517 1.1 xtraeme itesio_ecwritereg(sc, ITESIO_EC_FAN_TDR, ndivisor);
518 1.1 xtraeme } else {
519 1.1 xtraeme mode = itesio_ecreadreg(sc, ITESIO_EC_FAN16_CER);
520 1.1 xtraeme sdata = itesio_ecreadreg(sc, ITESIO_EC_SENSORFANBASE + i);
521 1.1 xtraeme if (mode & (1 << i))
522 1.1 xtraeme sdata += (itesio_ecreadreg(sc,
523 1.1 xtraeme ITESIO_EC_SENSORFANEXTBASE + i) << 8);
524 1.1 xtraeme edata->state = ENVSYS_SVALID;
525 1.1 xtraeme if (sdata == 0 ||
526 1.1 xtraeme sdata == ((mode & (1 << i)) ? 0xffff : 0xff))
527 1.1 xtraeme edata->state = ENVSYS_SINVALID;
528 1.1 xtraeme else {
529 1.1 xtraeme edata->value_cur = 1350000 / 2 / sdata;
530 1.1 xtraeme edata->state = ENVSYS_SVALID;
531 1.1 xtraeme }
532 1.1 xtraeme DPRINTF(("%s: 16bit sdata[fan%d] 0x%x\n", __func__, i, sdata));
533 1.1 xtraeme }
534 1.1 xtraeme }
535 1.1 xtraeme
536 1.4 xtraeme static void
537 1.4 xtraeme itesio_refresh(struct sysmon_envsys *sme, struct envsys_data *edata)
538 1.1 xtraeme {
539 1.1 xtraeme struct itesio_softc *sc = sme->sme_cookie;
540 1.1 xtraeme
541 1.1 xtraeme if (edata->sensor < IT_VOLTSTART_IDX)
542 1.1 xtraeme itesio_refresh_temp(sc, edata);
543 1.1 xtraeme else if (edata->sensor >= IT_VOLTSTART_IDX &&
544 1.1 xtraeme edata->sensor < IT_FANSTART_IDX)
545 1.1 xtraeme itesio_refresh_volts(sc, edata);
546 1.1 xtraeme else
547 1.1 xtraeme itesio_refresh_fans(sc, edata);
548 1.1 xtraeme }
549 1.9 xtraeme
550 1.9 xtraeme static int
551 1.9 xtraeme itesio_wdt_setmode(struct sysmon_wdog *smw)
552 1.9 xtraeme {
553 1.9 xtraeme struct itesio_softc *sc = smw->smw_cookie;
554 1.9 xtraeme int period = smw->smw_period;
555 1.9 xtraeme
556 1.9 xtraeme /* Enter MB PNP mode and select the WDT LDN */
557 1.18 jakllsch itesio_enter(sc->sc_iot, sc->sc_pnp_ioh);
558 1.18 jakllsch itesio_writereg(sc->sc_iot, sc->sc_pnp_ioh, ITESIO_LDNSEL,
559 1.18 jakllsch ITESIO_WDT_LDN);
560 1.9 xtraeme
561 1.9 xtraeme if ((smw->smw_mode & WDOG_MODE_MASK) == WDOG_MODE_DISARMED) {
562 1.9 xtraeme /* Disable the watchdog */
563 1.18 jakllsch itesio_writereg(sc->sc_iot, sc->sc_pnp_ioh, ITESIO_WDT_CTL, 0);
564 1.18 jakllsch itesio_writereg(sc->sc_iot, sc->sc_pnp_ioh, ITESIO_WDT_CNF, 0);
565 1.18 jakllsch itesio_writereg(sc->sc_iot, sc->sc_pnp_ioh, ITESIO_WDT_TMO_MSB, 0);
566 1.18 jakllsch itesio_writereg(sc->sc_iot, sc->sc_pnp_ioh, ITESIO_WDT_TMO_LSB, 0);
567 1.9 xtraeme } else {
568 1.9 xtraeme /* Enable the watchdog */
569 1.9 xtraeme if (period > ITESIO_WDT_MAXTIMO || period < 1)
570 1.9 xtraeme period = smw->smw_period = ITESIO_WDT_MAXTIMO;
571 1.9 xtraeme
572 1.9 xtraeme period *= 2;
573 1.9 xtraeme
574 1.9 xtraeme /* set the timeout and start the watchdog */
575 1.18 jakllsch itesio_writereg(sc->sc_iot, sc->sc_pnp_ioh, ITESIO_WDT_TMO_MSB,
576 1.9 xtraeme period >> 8);
577 1.18 jakllsch itesio_writereg(sc->sc_iot, sc->sc_pnp_ioh, ITESIO_WDT_TMO_LSB,
578 1.9 xtraeme period & 0xff);
579 1.18 jakllsch itesio_writereg(sc->sc_iot, sc->sc_pnp_ioh, ITESIO_WDT_CNF,
580 1.9 xtraeme ITESIO_WDT_CNF_SECS | ITESIO_WDT_CNF_KRST |
581 1.9 xtraeme ITESIO_WDT_CNF_PWROK);
582 1.9 xtraeme }
583 1.9 xtraeme /* we are done, exit MB PNP mode */
584 1.18 jakllsch itesio_exit(sc->sc_iot, sc->sc_pnp_ioh);
585 1.9 xtraeme
586 1.9 xtraeme return 0;
587 1.9 xtraeme }
588 1.9 xtraeme
589 1.9 xtraeme static int
590 1.9 xtraeme itesio_wdt_tickle(struct sysmon_wdog *smw)
591 1.9 xtraeme {
592 1.9 xtraeme struct itesio_softc *sc = smw->smw_cookie;
593 1.9 xtraeme int period = smw->smw_period * 2;
594 1.9 xtraeme
595 1.9 xtraeme /* refresh timeout value and exit */
596 1.18 jakllsch itesio_enter(sc->sc_iot, sc->sc_pnp_ioh);
597 1.18 jakllsch itesio_writereg(sc->sc_iot, sc->sc_pnp_ioh, ITESIO_LDNSEL,
598 1.18 jakllsch ITESIO_WDT_LDN);
599 1.18 jakllsch itesio_writereg(sc->sc_iot, sc->sc_pnp_ioh, ITESIO_WDT_TMO_MSB,
600 1.9 xtraeme period >> 8);
601 1.18 jakllsch itesio_writereg(sc->sc_iot, sc->sc_pnp_ioh, ITESIO_WDT_TMO_LSB,
602 1.9 xtraeme period & 0xff);
603 1.18 jakllsch itesio_exit(sc->sc_iot, sc->sc_pnp_ioh);
604 1.9 xtraeme
605 1.9 xtraeme return 0;
606 1.9 xtraeme }
607