nsclpcsio_isa.c revision 1.1 1 1.1 drochner /* $NetBSD: nsclpcsio_isa.c,v 1.1 2002/07/17 21:10:29 drochner Exp $ */
2 1.1 drochner
3 1.1 drochner /*
4 1.1 drochner * Copyright (c) 2002
5 1.1 drochner * Matthias Drochner. All rights reserved.
6 1.1 drochner *
7 1.1 drochner * Redistribution and use in source and binary forms, with or without
8 1.1 drochner * modification, are permitted provided that the following conditions
9 1.1 drochner * are met:
10 1.1 drochner * 1. Redistributions of source code must retain the above copyright
11 1.1 drochner * notice, this list of conditions, and the following disclaimer.
12 1.1 drochner * 2. Redistributions in binary form must reproduce the above copyright
13 1.1 drochner * notice, this list of conditions and the following disclaimer in the
14 1.1 drochner * documentation and/or other materials provided with the distribution.
15 1.1 drochner *
16 1.1 drochner * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
17 1.1 drochner * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18 1.1 drochner * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19 1.1 drochner * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
20 1.1 drochner * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21 1.1 drochner * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22 1.1 drochner * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23 1.1 drochner * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
24 1.1 drochner * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25 1.1 drochner * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26 1.1 drochner * SUCH DAMAGE.
27 1.1 drochner */
28 1.1 drochner
29 1.1 drochner #include <sys/cdefs.h>
30 1.1 drochner __KERNEL_RCSID(0, "$NetBSD: nsclpcsio_isa.c,v 1.1 2002/07/17 21:10:29 drochner Exp $");
31 1.1 drochner
32 1.1 drochner #include <sys/param.h>
33 1.1 drochner #include <sys/systm.h>
34 1.1 drochner #include <sys/device.h>
35 1.1 drochner #include <machine/bus.h>
36 1.1 drochner
37 1.1 drochner #include <dev/isa/isareg.h>
38 1.1 drochner #include <dev/isa/isavar.h>
39 1.1 drochner #include <dev/sysmon/sysmonvar.h>
40 1.1 drochner
41 1.1 drochner static int nsclpcsio_isa_match __P((struct device *, struct cfdata *, void *));
42 1.1 drochner static void nsclpcsio_isa_attach __P((struct device *, struct device *,
43 1.1 drochner void *));
44 1.1 drochner
45 1.1 drochner struct nsclpcsio_softc {
46 1.1 drochner struct device sc_dev;
47 1.1 drochner bus_space_tag_t sc_iot, sc_tms_iot;
48 1.1 drochner bus_space_handle_t sc_ioh, sc_tms_ioh;
49 1.1 drochner
50 1.1 drochner struct envsys_tre_data sc_data[3];
51 1.1 drochner struct envsys_basic_info sc_info[3];
52 1.1 drochner struct sysmon_envsys sc_sysmon;
53 1.1 drochner };
54 1.1 drochner
55 1.1 drochner struct cfattach nsclpcsio_isa_ca = {
56 1.1 drochner sizeof(struct nsclpcsio_softc),
57 1.1 drochner nsclpcsio_isa_match, nsclpcsio_isa_attach
58 1.1 drochner };
59 1.1 drochner
60 1.1 drochner static const struct envsys_range tms_ranges[] = {
61 1.1 drochner { 0, 2, ENVSYS_STEMP },
62 1.1 drochner };
63 1.1 drochner
64 1.1 drochner static u_int8_t nsread(bus_space_tag_t, bus_space_handle_t, int);
65 1.1 drochner static void nswrite(bus_space_tag_t, bus_space_handle_t, int, u_int8_t);
66 1.1 drochner static int nscheck(bus_space_tag_t, int);
67 1.1 drochner
68 1.1 drochner static void tms_update(struct nsclpcsio_softc *, int);
69 1.1 drochner static int tms_gtredata(struct sysmon_envsys *, struct envsys_tre_data *);
70 1.1 drochner static int tms_streinfo(struct sysmon_envsys *, struct envsys_basic_info *);
71 1.1 drochner
72 1.1 drochner static u_int8_t
73 1.1 drochner nsread(iot, ioh, idx)
74 1.1 drochner bus_space_tag_t iot;
75 1.1 drochner bus_space_handle_t ioh;
76 1.1 drochner int idx;
77 1.1 drochner {
78 1.1 drochner
79 1.1 drochner bus_space_write_1(iot, ioh, 0, idx);
80 1.1 drochner return (bus_space_read_1(iot, ioh, 1));
81 1.1 drochner }
82 1.1 drochner
83 1.1 drochner static void
84 1.1 drochner nswrite(iot, ioh, idx, data)
85 1.1 drochner bus_space_tag_t iot;
86 1.1 drochner bus_space_handle_t ioh;
87 1.1 drochner int idx;
88 1.1 drochner u_int8_t data;
89 1.1 drochner {
90 1.1 drochner
91 1.1 drochner bus_space_write_1(iot, ioh, 0, idx);
92 1.1 drochner bus_space_write_1(iot, ioh, 1, data);
93 1.1 drochner }
94 1.1 drochner
95 1.1 drochner static int
96 1.1 drochner nscheck(iot, base)
97 1.1 drochner bus_space_tag_t iot;
98 1.1 drochner int base;
99 1.1 drochner {
100 1.1 drochner bus_space_handle_t ioh;
101 1.1 drochner int rv = 0;
102 1.1 drochner
103 1.1 drochner if (bus_space_map(iot, base, 2, 0, &ioh))
104 1.1 drochner return (0);
105 1.1 drochner
106 1.1 drochner /* XXX this is for PC87366 only for now */
107 1.1 drochner if (nsread(iot, ioh, 0x20) == 0xe9)
108 1.1 drochner rv = 1;
109 1.1 drochner
110 1.1 drochner bus_space_unmap(iot, ioh, 2);
111 1.1 drochner return (rv);
112 1.1 drochner }
113 1.1 drochner
114 1.1 drochner static int
115 1.1 drochner nsclpcsio_isa_match(parent, match, aux)
116 1.1 drochner struct device *parent;
117 1.1 drochner struct cfdata *match;
118 1.1 drochner void *aux;
119 1.1 drochner {
120 1.1 drochner struct isa_attach_args *ia = aux;
121 1.1 drochner int iobase;
122 1.1 drochner
123 1.1 drochner if (ISA_DIRECT_CONFIG(ia))
124 1.1 drochner return (0);
125 1.1 drochner
126 1.1 drochner if (ia->ia_nio > 0 && ia->ia_io[0].ir_addr != ISACF_PORT_DEFAULT) {
127 1.1 drochner /* XXX check for legal iobase ??? */
128 1.1 drochner if (nscheck(ia->ia_iot, ia->ia_io[0].ir_addr)) {
129 1.1 drochner iobase = ia->ia_io[0].ir_addr;
130 1.1 drochner goto found;
131 1.1 drochner }
132 1.1 drochner }
133 1.1 drochner
134 1.1 drochner /* PC87366 has two possible locations depending on wiring */
135 1.1 drochner if (nscheck(ia->ia_iot, 0x2e)) {
136 1.1 drochner iobase = 0x2e;
137 1.1 drochner goto found;
138 1.1 drochner }
139 1.1 drochner if (nscheck(ia->ia_iot, 0x4e)) {
140 1.1 drochner iobase = 0x4e;
141 1.1 drochner goto found;
142 1.1 drochner }
143 1.1 drochner return (0);
144 1.1 drochner
145 1.1 drochner found:
146 1.1 drochner ia->ia_nio = 1;
147 1.1 drochner ia->ia_io[0].ir_addr = iobase;
148 1.1 drochner ia->ia_io[0].ir_size = 2;
149 1.1 drochner ia->ia_niomem = 0;
150 1.1 drochner ia->ia_nirq = 0;
151 1.1 drochner ia->ia_ndrq = 0;
152 1.1 drochner return (1);
153 1.1 drochner }
154 1.1 drochner
155 1.1 drochner static void
156 1.1 drochner nsclpcsio_isa_attach(parent, self, aux)
157 1.1 drochner struct device *parent, *self;
158 1.1 drochner void *aux;
159 1.1 drochner {
160 1.1 drochner struct nsclpcsio_softc *sc = (void *)self;
161 1.1 drochner struct isa_attach_args *ia = aux;
162 1.1 drochner bus_space_tag_t iot;
163 1.1 drochner bus_space_handle_t ioh;
164 1.1 drochner u_int8_t val;
165 1.1 drochner int tms_iobase;
166 1.1 drochner int i;
167 1.1 drochner
168 1.1 drochner sc->sc_iot = iot = ia->ia_iot;
169 1.1 drochner if (bus_space_map(ia->ia_iot, ia->ia_io[0].ir_addr, 2, 0, &ioh)) {
170 1.1 drochner printf(": can't map i/o space\n");
171 1.1 drochner return;
172 1.1 drochner }
173 1.1 drochner sc->sc_ioh = ioh;
174 1.1 drochner printf(": NSC PC87366 rev. %d\n", nsread(iot, ioh, 0x27));
175 1.1 drochner
176 1.1 drochner nswrite(iot, ioh, 0x07, 0x0e); /* select tms */
177 1.1 drochner
178 1.1 drochner val = nsread(iot, ioh, 0x30); /* control register */
179 1.1 drochner if (!(val & 1)) {
180 1.1 drochner printf("%s: TMS disabled\n", sc->sc_dev.dv_xname);
181 1.1 drochner return;
182 1.1 drochner }
183 1.1 drochner
184 1.1 drochner tms_iobase = (nsread(iot, ioh, 0x60) << 8) | nsread(iot, ioh, 0x61);
185 1.1 drochner sc->sc_tms_iot = iot;
186 1.1 drochner if (bus_space_map(iot, tms_iobase, 16, 0, &sc->sc_tms_ioh)) {
187 1.1 drochner printf("%s: can't map TMS i/o space\n", sc->sc_dev.dv_xname);
188 1.1 drochner return;
189 1.1 drochner }
190 1.1 drochner printf("%s: TMS at 0x%x\n", sc->sc_dev.dv_xname, tms_iobase);
191 1.1 drochner
192 1.1 drochner if (bus_space_read_1(sc->sc_tms_iot, sc->sc_tms_ioh, 0x08) & 1) {
193 1.1 drochner printf("%s: TMS in standby mode\n", sc->sc_dev.dv_xname);
194 1.1 drochner /* XXX awake it ??? */
195 1.1 drochner return;
196 1.1 drochner }
197 1.1 drochner
198 1.1 drochner /* Initialize sensor meta data */
199 1.1 drochner for (i = 0; i < 3; i++) {
200 1.1 drochner sc->sc_data[i].sensor = sc->sc_info[i].sensor = i;
201 1.1 drochner sc->sc_data[i].units = sc->sc_info[i].units = ENVSYS_STEMP;
202 1.1 drochner }
203 1.1 drochner strcpy(sc->sc_info[0].desc, "TSENS1");
204 1.1 drochner strcpy(sc->sc_info[1].desc, "TSENS2");
205 1.1 drochner strcpy(sc->sc_info[2].desc, "TNSC");
206 1.1 drochner
207 1.1 drochner /* Get initial set of sensor values. */
208 1.1 drochner for (i = 0; i < 3; i++)
209 1.1 drochner tms_update(sc, i);
210 1.1 drochner
211 1.1 drochner /*
212 1.1 drochner * Hook into the System Monitor.
213 1.1 drochner */
214 1.1 drochner sc->sc_sysmon.sme_ranges = tms_ranges;
215 1.1 drochner sc->sc_sysmon.sme_sensor_info = sc->sc_info;
216 1.1 drochner sc->sc_sysmon.sme_sensor_data = sc->sc_data;
217 1.1 drochner sc->sc_sysmon.sme_cookie = sc;
218 1.1 drochner
219 1.1 drochner sc->sc_sysmon.sme_gtredata = tms_gtredata;
220 1.1 drochner sc->sc_sysmon.sme_streinfo = tms_streinfo;
221 1.1 drochner
222 1.1 drochner sc->sc_sysmon.sme_nsensors = 3;
223 1.1 drochner sc->sc_sysmon.sme_envsys_version = 1000;
224 1.1 drochner
225 1.1 drochner if (sysmon_envsys_register(&sc->sc_sysmon))
226 1.1 drochner printf("%s: unable to register with sysmon\n",
227 1.1 drochner sc->sc_dev.dv_xname);
228 1.1 drochner }
229 1.1 drochner
230 1.1 drochner static void
231 1.1 drochner tms_update(sc, chan)
232 1.1 drochner struct nsclpcsio_softc *sc;
233 1.1 drochner int chan;
234 1.1 drochner {
235 1.1 drochner bus_space_tag_t iot = sc->sc_tms_iot;
236 1.1 drochner bus_space_handle_t ioh = sc->sc_tms_ioh;
237 1.1 drochner u_int8_t status;
238 1.1 drochner int8_t temp, ctemp; /* signed!! */
239 1.1 drochner
240 1.1 drochner bus_space_write_1(iot, ioh, 0x09, chan); /* select */
241 1.1 drochner
242 1.1 drochner status = bus_space_read_1(iot, ioh, 0x0a); /* config/status */
243 1.1 drochner if (status & 0x01) {
244 1.1 drochner /* enabled */
245 1.1 drochner sc->sc_info[chan].validflags = ENVSYS_FVALID;
246 1.1 drochner }else {
247 1.1 drochner sc->sc_info[chan].validflags = 0;
248 1.1 drochner return;
249 1.1 drochner }
250 1.1 drochner
251 1.1 drochner /*
252 1.1 drochner * If the channel is enabled, it is considered valid.
253 1.1 drochner * An "open circuit" might be temporary.
254 1.1 drochner */
255 1.1 drochner sc->sc_data[chan].validflags = ENVSYS_FVALID;
256 1.1 drochner if (status & 0x40) {
257 1.1 drochner /*
258 1.1 drochner * open circuit
259 1.1 drochner * XXX should have a warning for it
260 1.1 drochner */
261 1.1 drochner sc->sc_data[chan].warnflags = ENVSYS_WARN_OK; /* XXX */
262 1.1 drochner return;
263 1.1 drochner }
264 1.1 drochner
265 1.1 drochner /* get current temperature in signed degree celsius */
266 1.1 drochner temp = bus_space_read_1(iot, ioh, 0x0b);
267 1.1 drochner sc->sc_data[chan].cur.data_us = (int)temp * 1000000 + 273150000;
268 1.1 drochner sc->sc_data[chan].validflags |= ENVSYS_FCURVALID;
269 1.1 drochner
270 1.1 drochner if (status & 0x0e) { /* any temperature warning? */
271 1.1 drochner /*
272 1.1 drochner * XXX the chip documentation is a bit fuzzy - it doesn't state
273 1.1 drochner * that the hardware OTS output depends on the "overtemp"
274 1.1 drochner * warning bit.
275 1.1 drochner * It seems the output gets cleared if the warning bit is reset.
276 1.1 drochner * This sucks.
277 1.1 drochner * The hardware might do something useful with output pins, eg
278 1.1 drochner * throttling the CPU, so we must do the comparision in
279 1.1 drochner * software, and only reset the bits if the reason is gone.
280 1.1 drochner */
281 1.1 drochner if (status & 0x02) { /* low limit */
282 1.1 drochner sc->sc_data[chan].warnflags = ENVSYS_WARN_UNDER;
283 1.1 drochner /* read low limit */
284 1.1 drochner ctemp = bus_space_read_1(iot, ioh, 0x0d);
285 1.1 drochner if (temp <= ctemp) /* still valid, don't reset */
286 1.1 drochner status &= ~0x02;
287 1.1 drochner }
288 1.1 drochner if (status & 0x04) { /* high limit */
289 1.1 drochner sc->sc_data[chan].warnflags = ENVSYS_WARN_OVER;
290 1.1 drochner /* read high limit */
291 1.1 drochner ctemp = bus_space_read_1(iot, ioh, 0x0c);
292 1.1 drochner if (temp >= ctemp) /* still valid, don't reset */
293 1.1 drochner status &= ~0x04;
294 1.1 drochner }
295 1.1 drochner if (status & 0x08) { /* overtemperature */
296 1.1 drochner sc->sc_data[chan].warnflags = ENVSYS_WARN_CRITOVER;
297 1.1 drochner /* read overtemperature limit */
298 1.1 drochner ctemp = bus_space_read_1(iot, ioh, 0x0e);
299 1.1 drochner if (temp >= ctemp) /* still valid, don't reset */
300 1.1 drochner status &= ~0x08;
301 1.1 drochner }
302 1.1 drochner
303 1.1 drochner /* clear outdated warnings */
304 1.1 drochner if (status & 0x0e)
305 1.1 drochner bus_space_write_1(iot, ioh, 0x0a, status);
306 1.1 drochner }
307 1.1 drochner }
308 1.1 drochner
309 1.1 drochner static int
310 1.1 drochner tms_gtredata(sme, data)
311 1.1 drochner struct sysmon_envsys *sme;
312 1.1 drochner struct envsys_tre_data *data;
313 1.1 drochner {
314 1.1 drochner struct nsclpcsio_softc *sc = sme->sme_cookie;
315 1.1 drochner
316 1.1 drochner tms_update(sc, data->sensor);
317 1.1 drochner
318 1.1 drochner *data = sc->sc_data[data->sensor];
319 1.1 drochner return (0);
320 1.1 drochner }
321 1.1 drochner
322 1.1 drochner static int
323 1.1 drochner tms_streinfo(sme, info)
324 1.1 drochner struct sysmon_envsys *sme;
325 1.1 drochner struct envsys_basic_info *info;
326 1.1 drochner {
327 1.1 drochner #if 0
328 1.1 drochner struct nsclpcsio_softc *sc = sme->sme_cookie;
329 1.1 drochner #endif
330 1.1 drochner /* XXX Not implemented */
331 1.1 drochner info->validflags = 0;
332 1.1 drochner
333 1.1 drochner return (0);
334 1.1 drochner }
335