nsclpcsio_isa.c revision 1.1.4.3 1 1.1.4.3 nathanw /* $NetBSD: nsclpcsio_isa.c,v 1.1.4.3 2002/10/18 02:42:28 nathanw Exp $ */
2 1.1.4.2 nathanw
3 1.1.4.2 nathanw /*
4 1.1.4.2 nathanw * Copyright (c) 2002
5 1.1.4.2 nathanw * Matthias Drochner. All rights reserved.
6 1.1.4.2 nathanw *
7 1.1.4.2 nathanw * Redistribution and use in source and binary forms, with or without
8 1.1.4.2 nathanw * modification, are permitted provided that the following conditions
9 1.1.4.2 nathanw * are met:
10 1.1.4.2 nathanw * 1. Redistributions of source code must retain the above copyright
11 1.1.4.2 nathanw * notice, this list of conditions, and the following disclaimer.
12 1.1.4.2 nathanw * 2. Redistributions in binary form must reproduce the above copyright
13 1.1.4.2 nathanw * notice, this list of conditions and the following disclaimer in the
14 1.1.4.2 nathanw * documentation and/or other materials provided with the distribution.
15 1.1.4.2 nathanw *
16 1.1.4.2 nathanw * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
17 1.1.4.2 nathanw * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18 1.1.4.2 nathanw * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19 1.1.4.2 nathanw * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
20 1.1.4.2 nathanw * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21 1.1.4.2 nathanw * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22 1.1.4.2 nathanw * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23 1.1.4.2 nathanw * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
24 1.1.4.2 nathanw * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25 1.1.4.2 nathanw * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26 1.1.4.2 nathanw * SUCH DAMAGE.
27 1.1.4.2 nathanw */
28 1.1.4.2 nathanw
29 1.1.4.2 nathanw #include <sys/cdefs.h>
30 1.1.4.3 nathanw __KERNEL_RCSID(0, "$NetBSD: nsclpcsio_isa.c,v 1.1.4.3 2002/10/18 02:42:28 nathanw Exp $");
31 1.1.4.2 nathanw
32 1.1.4.2 nathanw #include <sys/param.h>
33 1.1.4.2 nathanw #include <sys/systm.h>
34 1.1.4.2 nathanw #include <sys/device.h>
35 1.1.4.2 nathanw #include <machine/bus.h>
36 1.1.4.2 nathanw
37 1.1.4.2 nathanw #include <dev/isa/isareg.h>
38 1.1.4.2 nathanw #include <dev/isa/isavar.h>
39 1.1.4.2 nathanw #include <dev/sysmon/sysmonvar.h>
40 1.1.4.2 nathanw
41 1.1.4.2 nathanw static int nsclpcsio_isa_match __P((struct device *, struct cfdata *, void *));
42 1.1.4.2 nathanw static void nsclpcsio_isa_attach __P((struct device *, struct device *,
43 1.1.4.2 nathanw void *));
44 1.1.4.2 nathanw
45 1.1.4.2 nathanw struct nsclpcsio_softc {
46 1.1.4.2 nathanw struct device sc_dev;
47 1.1.4.2 nathanw bus_space_tag_t sc_iot, sc_tms_iot;
48 1.1.4.2 nathanw bus_space_handle_t sc_ioh, sc_tms_ioh;
49 1.1.4.2 nathanw
50 1.1.4.2 nathanw struct envsys_tre_data sc_data[3];
51 1.1.4.2 nathanw struct envsys_basic_info sc_info[3];
52 1.1.4.2 nathanw struct sysmon_envsys sc_sysmon;
53 1.1.4.2 nathanw };
54 1.1.4.2 nathanw
55 1.1.4.3 nathanw CFATTACH_DECL(nsclpcsio_isa, sizeof(struct nsclpcsio_isa_softc),
56 1.1.4.3 nathanw nsclpcsio_isa_match, nsclpcsio_isa_attach, NULL, NULL);
57 1.1.4.2 nathanw };
58 1.1.4.2 nathanw
59 1.1.4.2 nathanw static const struct envsys_range tms_ranges[] = {
60 1.1.4.2 nathanw { 0, 2, ENVSYS_STEMP },
61 1.1.4.2 nathanw };
62 1.1.4.2 nathanw
63 1.1.4.2 nathanw static u_int8_t nsread(bus_space_tag_t, bus_space_handle_t, int);
64 1.1.4.2 nathanw static void nswrite(bus_space_tag_t, bus_space_handle_t, int, u_int8_t);
65 1.1.4.2 nathanw static int nscheck(bus_space_tag_t, int);
66 1.1.4.2 nathanw
67 1.1.4.2 nathanw static void tms_update(struct nsclpcsio_softc *, int);
68 1.1.4.2 nathanw static int tms_gtredata(struct sysmon_envsys *, struct envsys_tre_data *);
69 1.1.4.2 nathanw static int tms_streinfo(struct sysmon_envsys *, struct envsys_basic_info *);
70 1.1.4.2 nathanw
71 1.1.4.2 nathanw static u_int8_t
72 1.1.4.2 nathanw nsread(iot, ioh, idx)
73 1.1.4.2 nathanw bus_space_tag_t iot;
74 1.1.4.2 nathanw bus_space_handle_t ioh;
75 1.1.4.2 nathanw int idx;
76 1.1.4.2 nathanw {
77 1.1.4.2 nathanw
78 1.1.4.2 nathanw bus_space_write_1(iot, ioh, 0, idx);
79 1.1.4.2 nathanw return (bus_space_read_1(iot, ioh, 1));
80 1.1.4.2 nathanw }
81 1.1.4.2 nathanw
82 1.1.4.2 nathanw static void
83 1.1.4.2 nathanw nswrite(iot, ioh, idx, data)
84 1.1.4.2 nathanw bus_space_tag_t iot;
85 1.1.4.2 nathanw bus_space_handle_t ioh;
86 1.1.4.2 nathanw int idx;
87 1.1.4.2 nathanw u_int8_t data;
88 1.1.4.2 nathanw {
89 1.1.4.2 nathanw
90 1.1.4.2 nathanw bus_space_write_1(iot, ioh, 0, idx);
91 1.1.4.2 nathanw bus_space_write_1(iot, ioh, 1, data);
92 1.1.4.2 nathanw }
93 1.1.4.2 nathanw
94 1.1.4.2 nathanw static int
95 1.1.4.2 nathanw nscheck(iot, base)
96 1.1.4.2 nathanw bus_space_tag_t iot;
97 1.1.4.2 nathanw int base;
98 1.1.4.2 nathanw {
99 1.1.4.2 nathanw bus_space_handle_t ioh;
100 1.1.4.2 nathanw int rv = 0;
101 1.1.4.2 nathanw
102 1.1.4.2 nathanw if (bus_space_map(iot, base, 2, 0, &ioh))
103 1.1.4.2 nathanw return (0);
104 1.1.4.2 nathanw
105 1.1.4.2 nathanw /* XXX this is for PC87366 only for now */
106 1.1.4.2 nathanw if (nsread(iot, ioh, 0x20) == 0xe9)
107 1.1.4.2 nathanw rv = 1;
108 1.1.4.2 nathanw
109 1.1.4.2 nathanw bus_space_unmap(iot, ioh, 2);
110 1.1.4.2 nathanw return (rv);
111 1.1.4.2 nathanw }
112 1.1.4.2 nathanw
113 1.1.4.2 nathanw static int
114 1.1.4.2 nathanw nsclpcsio_isa_match(parent, match, aux)
115 1.1.4.2 nathanw struct device *parent;
116 1.1.4.2 nathanw struct cfdata *match;
117 1.1.4.2 nathanw void *aux;
118 1.1.4.2 nathanw {
119 1.1.4.2 nathanw struct isa_attach_args *ia = aux;
120 1.1.4.2 nathanw int iobase;
121 1.1.4.2 nathanw
122 1.1.4.2 nathanw if (ISA_DIRECT_CONFIG(ia))
123 1.1.4.2 nathanw return (0);
124 1.1.4.2 nathanw
125 1.1.4.2 nathanw if (ia->ia_nio > 0 && ia->ia_io[0].ir_addr != ISACF_PORT_DEFAULT) {
126 1.1.4.2 nathanw /* XXX check for legal iobase ??? */
127 1.1.4.2 nathanw if (nscheck(ia->ia_iot, ia->ia_io[0].ir_addr)) {
128 1.1.4.2 nathanw iobase = ia->ia_io[0].ir_addr;
129 1.1.4.2 nathanw goto found;
130 1.1.4.2 nathanw }
131 1.1.4.2 nathanw }
132 1.1.4.2 nathanw
133 1.1.4.2 nathanw /* PC87366 has two possible locations depending on wiring */
134 1.1.4.2 nathanw if (nscheck(ia->ia_iot, 0x2e)) {
135 1.1.4.2 nathanw iobase = 0x2e;
136 1.1.4.2 nathanw goto found;
137 1.1.4.2 nathanw }
138 1.1.4.2 nathanw if (nscheck(ia->ia_iot, 0x4e)) {
139 1.1.4.2 nathanw iobase = 0x4e;
140 1.1.4.2 nathanw goto found;
141 1.1.4.2 nathanw }
142 1.1.4.2 nathanw return (0);
143 1.1.4.2 nathanw
144 1.1.4.2 nathanw found:
145 1.1.4.2 nathanw ia->ia_nio = 1;
146 1.1.4.2 nathanw ia->ia_io[0].ir_addr = iobase;
147 1.1.4.2 nathanw ia->ia_io[0].ir_size = 2;
148 1.1.4.2 nathanw ia->ia_niomem = 0;
149 1.1.4.2 nathanw ia->ia_nirq = 0;
150 1.1.4.2 nathanw ia->ia_ndrq = 0;
151 1.1.4.2 nathanw return (1);
152 1.1.4.2 nathanw }
153 1.1.4.2 nathanw
154 1.1.4.2 nathanw static void
155 1.1.4.2 nathanw nsclpcsio_isa_attach(parent, self, aux)
156 1.1.4.2 nathanw struct device *parent, *self;
157 1.1.4.2 nathanw void *aux;
158 1.1.4.2 nathanw {
159 1.1.4.2 nathanw struct nsclpcsio_softc *sc = (void *)self;
160 1.1.4.2 nathanw struct isa_attach_args *ia = aux;
161 1.1.4.2 nathanw bus_space_tag_t iot;
162 1.1.4.2 nathanw bus_space_handle_t ioh;
163 1.1.4.2 nathanw u_int8_t val;
164 1.1.4.2 nathanw int tms_iobase;
165 1.1.4.2 nathanw int i;
166 1.1.4.2 nathanw
167 1.1.4.2 nathanw sc->sc_iot = iot = ia->ia_iot;
168 1.1.4.2 nathanw if (bus_space_map(ia->ia_iot, ia->ia_io[0].ir_addr, 2, 0, &ioh)) {
169 1.1.4.2 nathanw printf(": can't map i/o space\n");
170 1.1.4.2 nathanw return;
171 1.1.4.2 nathanw }
172 1.1.4.2 nathanw sc->sc_ioh = ioh;
173 1.1.4.2 nathanw printf(": NSC PC87366 rev. %d\n", nsread(iot, ioh, 0x27));
174 1.1.4.2 nathanw
175 1.1.4.2 nathanw nswrite(iot, ioh, 0x07, 0x0e); /* select tms */
176 1.1.4.2 nathanw
177 1.1.4.2 nathanw val = nsread(iot, ioh, 0x30); /* control register */
178 1.1.4.2 nathanw if (!(val & 1)) {
179 1.1.4.2 nathanw printf("%s: TMS disabled\n", sc->sc_dev.dv_xname);
180 1.1.4.2 nathanw return;
181 1.1.4.2 nathanw }
182 1.1.4.2 nathanw
183 1.1.4.2 nathanw tms_iobase = (nsread(iot, ioh, 0x60) << 8) | nsread(iot, ioh, 0x61);
184 1.1.4.2 nathanw sc->sc_tms_iot = iot;
185 1.1.4.2 nathanw if (bus_space_map(iot, tms_iobase, 16, 0, &sc->sc_tms_ioh)) {
186 1.1.4.2 nathanw printf("%s: can't map TMS i/o space\n", sc->sc_dev.dv_xname);
187 1.1.4.2 nathanw return;
188 1.1.4.2 nathanw }
189 1.1.4.2 nathanw printf("%s: TMS at 0x%x\n", sc->sc_dev.dv_xname, tms_iobase);
190 1.1.4.2 nathanw
191 1.1.4.2 nathanw if (bus_space_read_1(sc->sc_tms_iot, sc->sc_tms_ioh, 0x08) & 1) {
192 1.1.4.2 nathanw printf("%s: TMS in standby mode\n", sc->sc_dev.dv_xname);
193 1.1.4.2 nathanw /* XXX awake it ??? */
194 1.1.4.2 nathanw return;
195 1.1.4.2 nathanw }
196 1.1.4.2 nathanw
197 1.1.4.2 nathanw /* Initialize sensor meta data */
198 1.1.4.2 nathanw for (i = 0; i < 3; i++) {
199 1.1.4.2 nathanw sc->sc_data[i].sensor = sc->sc_info[i].sensor = i;
200 1.1.4.2 nathanw sc->sc_data[i].units = sc->sc_info[i].units = ENVSYS_STEMP;
201 1.1.4.2 nathanw }
202 1.1.4.2 nathanw strcpy(sc->sc_info[0].desc, "TSENS1");
203 1.1.4.2 nathanw strcpy(sc->sc_info[1].desc, "TSENS2");
204 1.1.4.2 nathanw strcpy(sc->sc_info[2].desc, "TNSC");
205 1.1.4.2 nathanw
206 1.1.4.2 nathanw /* Get initial set of sensor values. */
207 1.1.4.2 nathanw for (i = 0; i < 3; i++)
208 1.1.4.2 nathanw tms_update(sc, i);
209 1.1.4.2 nathanw
210 1.1.4.2 nathanw /*
211 1.1.4.2 nathanw * Hook into the System Monitor.
212 1.1.4.2 nathanw */
213 1.1.4.2 nathanw sc->sc_sysmon.sme_ranges = tms_ranges;
214 1.1.4.2 nathanw sc->sc_sysmon.sme_sensor_info = sc->sc_info;
215 1.1.4.2 nathanw sc->sc_sysmon.sme_sensor_data = sc->sc_data;
216 1.1.4.2 nathanw sc->sc_sysmon.sme_cookie = sc;
217 1.1.4.2 nathanw
218 1.1.4.2 nathanw sc->sc_sysmon.sme_gtredata = tms_gtredata;
219 1.1.4.2 nathanw sc->sc_sysmon.sme_streinfo = tms_streinfo;
220 1.1.4.2 nathanw
221 1.1.4.2 nathanw sc->sc_sysmon.sme_nsensors = 3;
222 1.1.4.2 nathanw sc->sc_sysmon.sme_envsys_version = 1000;
223 1.1.4.2 nathanw
224 1.1.4.2 nathanw if (sysmon_envsys_register(&sc->sc_sysmon))
225 1.1.4.2 nathanw printf("%s: unable to register with sysmon\n",
226 1.1.4.2 nathanw sc->sc_dev.dv_xname);
227 1.1.4.2 nathanw }
228 1.1.4.2 nathanw
229 1.1.4.2 nathanw static void
230 1.1.4.2 nathanw tms_update(sc, chan)
231 1.1.4.2 nathanw struct nsclpcsio_softc *sc;
232 1.1.4.2 nathanw int chan;
233 1.1.4.2 nathanw {
234 1.1.4.2 nathanw bus_space_tag_t iot = sc->sc_tms_iot;
235 1.1.4.2 nathanw bus_space_handle_t ioh = sc->sc_tms_ioh;
236 1.1.4.2 nathanw u_int8_t status;
237 1.1.4.2 nathanw int8_t temp, ctemp; /* signed!! */
238 1.1.4.2 nathanw
239 1.1.4.2 nathanw bus_space_write_1(iot, ioh, 0x09, chan); /* select */
240 1.1.4.2 nathanw
241 1.1.4.2 nathanw status = bus_space_read_1(iot, ioh, 0x0a); /* config/status */
242 1.1.4.2 nathanw if (status & 0x01) {
243 1.1.4.2 nathanw /* enabled */
244 1.1.4.2 nathanw sc->sc_info[chan].validflags = ENVSYS_FVALID;
245 1.1.4.2 nathanw }else {
246 1.1.4.2 nathanw sc->sc_info[chan].validflags = 0;
247 1.1.4.2 nathanw return;
248 1.1.4.2 nathanw }
249 1.1.4.2 nathanw
250 1.1.4.2 nathanw /*
251 1.1.4.2 nathanw * If the channel is enabled, it is considered valid.
252 1.1.4.2 nathanw * An "open circuit" might be temporary.
253 1.1.4.2 nathanw */
254 1.1.4.2 nathanw sc->sc_data[chan].validflags = ENVSYS_FVALID;
255 1.1.4.2 nathanw if (status & 0x40) {
256 1.1.4.2 nathanw /*
257 1.1.4.2 nathanw * open circuit
258 1.1.4.2 nathanw * XXX should have a warning for it
259 1.1.4.2 nathanw */
260 1.1.4.2 nathanw sc->sc_data[chan].warnflags = ENVSYS_WARN_OK; /* XXX */
261 1.1.4.2 nathanw return;
262 1.1.4.2 nathanw }
263 1.1.4.2 nathanw
264 1.1.4.2 nathanw /* get current temperature in signed degree celsius */
265 1.1.4.2 nathanw temp = bus_space_read_1(iot, ioh, 0x0b);
266 1.1.4.2 nathanw sc->sc_data[chan].cur.data_us = (int)temp * 1000000 + 273150000;
267 1.1.4.2 nathanw sc->sc_data[chan].validflags |= ENVSYS_FCURVALID;
268 1.1.4.2 nathanw
269 1.1.4.2 nathanw if (status & 0x0e) { /* any temperature warning? */
270 1.1.4.2 nathanw /*
271 1.1.4.2 nathanw * XXX the chip documentation is a bit fuzzy - it doesn't state
272 1.1.4.2 nathanw * that the hardware OTS output depends on the "overtemp"
273 1.1.4.2 nathanw * warning bit.
274 1.1.4.2 nathanw * It seems the output gets cleared if the warning bit is reset.
275 1.1.4.2 nathanw * This sucks.
276 1.1.4.2 nathanw * The hardware might do something useful with output pins, eg
277 1.1.4.2 nathanw * throttling the CPU, so we must do the comparision in
278 1.1.4.2 nathanw * software, and only reset the bits if the reason is gone.
279 1.1.4.2 nathanw */
280 1.1.4.2 nathanw if (status & 0x02) { /* low limit */
281 1.1.4.2 nathanw sc->sc_data[chan].warnflags = ENVSYS_WARN_UNDER;
282 1.1.4.2 nathanw /* read low limit */
283 1.1.4.2 nathanw ctemp = bus_space_read_1(iot, ioh, 0x0d);
284 1.1.4.2 nathanw if (temp <= ctemp) /* still valid, don't reset */
285 1.1.4.2 nathanw status &= ~0x02;
286 1.1.4.2 nathanw }
287 1.1.4.2 nathanw if (status & 0x04) { /* high limit */
288 1.1.4.2 nathanw sc->sc_data[chan].warnflags = ENVSYS_WARN_OVER;
289 1.1.4.2 nathanw /* read high limit */
290 1.1.4.2 nathanw ctemp = bus_space_read_1(iot, ioh, 0x0c);
291 1.1.4.2 nathanw if (temp >= ctemp) /* still valid, don't reset */
292 1.1.4.2 nathanw status &= ~0x04;
293 1.1.4.2 nathanw }
294 1.1.4.2 nathanw if (status & 0x08) { /* overtemperature */
295 1.1.4.2 nathanw sc->sc_data[chan].warnflags = ENVSYS_WARN_CRITOVER;
296 1.1.4.2 nathanw /* read overtemperature limit */
297 1.1.4.2 nathanw ctemp = bus_space_read_1(iot, ioh, 0x0e);
298 1.1.4.2 nathanw if (temp >= ctemp) /* still valid, don't reset */
299 1.1.4.2 nathanw status &= ~0x08;
300 1.1.4.2 nathanw }
301 1.1.4.2 nathanw
302 1.1.4.2 nathanw /* clear outdated warnings */
303 1.1.4.2 nathanw if (status & 0x0e)
304 1.1.4.2 nathanw bus_space_write_1(iot, ioh, 0x0a, status);
305 1.1.4.2 nathanw }
306 1.1.4.2 nathanw }
307 1.1.4.2 nathanw
308 1.1.4.2 nathanw static int
309 1.1.4.2 nathanw tms_gtredata(sme, data)
310 1.1.4.2 nathanw struct sysmon_envsys *sme;
311 1.1.4.2 nathanw struct envsys_tre_data *data;
312 1.1.4.2 nathanw {
313 1.1.4.2 nathanw struct nsclpcsio_softc *sc = sme->sme_cookie;
314 1.1.4.2 nathanw
315 1.1.4.2 nathanw tms_update(sc, data->sensor);
316 1.1.4.2 nathanw
317 1.1.4.2 nathanw *data = sc->sc_data[data->sensor];
318 1.1.4.2 nathanw return (0);
319 1.1.4.2 nathanw }
320 1.1.4.2 nathanw
321 1.1.4.2 nathanw static int
322 1.1.4.2 nathanw tms_streinfo(sme, info)
323 1.1.4.2 nathanw struct sysmon_envsys *sme;
324 1.1.4.2 nathanw struct envsys_basic_info *info;
325 1.1.4.2 nathanw {
326 1.1.4.2 nathanw #if 0
327 1.1.4.2 nathanw struct nsclpcsio_softc *sc = sme->sme_cookie;
328 1.1.4.2 nathanw #endif
329 1.1.4.2 nathanw /* XXX Not implemented */
330 1.1.4.2 nathanw info->validflags = 0;
331 1.1.4.2 nathanw
332 1.1.4.2 nathanw return (0);
333 1.1.4.2 nathanw }
334