nsclpcsio_isa.c revision 1.1
1 /* $NetBSD: nsclpcsio_isa.c,v 1.1 2002/07/17 21:10:29 drochner Exp $ */ 2 3 /* 4 * Copyright (c) 2002 5 * Matthias Drochner. All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions, and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 * SUCH DAMAGE. 27 */ 28 29 #include <sys/cdefs.h> 30 __KERNEL_RCSID(0, "$NetBSD: nsclpcsio_isa.c,v 1.1 2002/07/17 21:10:29 drochner Exp $"); 31 32 #include <sys/param.h> 33 #include <sys/systm.h> 34 #include <sys/device.h> 35 #include <machine/bus.h> 36 37 #include <dev/isa/isareg.h> 38 #include <dev/isa/isavar.h> 39 #include <dev/sysmon/sysmonvar.h> 40 41 static int nsclpcsio_isa_match __P((struct device *, struct cfdata *, void *)); 42 static void nsclpcsio_isa_attach __P((struct device *, struct device *, 43 void *)); 44 45 struct nsclpcsio_softc { 46 struct device sc_dev; 47 bus_space_tag_t sc_iot, sc_tms_iot; 48 bus_space_handle_t sc_ioh, sc_tms_ioh; 49 50 struct envsys_tre_data sc_data[3]; 51 struct envsys_basic_info sc_info[3]; 52 struct sysmon_envsys sc_sysmon; 53 }; 54 55 struct cfattach nsclpcsio_isa_ca = { 56 sizeof(struct nsclpcsio_softc), 57 nsclpcsio_isa_match, nsclpcsio_isa_attach 58 }; 59 60 static const struct envsys_range tms_ranges[] = { 61 { 0, 2, ENVSYS_STEMP }, 62 }; 63 64 static u_int8_t nsread(bus_space_tag_t, bus_space_handle_t, int); 65 static void nswrite(bus_space_tag_t, bus_space_handle_t, int, u_int8_t); 66 static int nscheck(bus_space_tag_t, int); 67 68 static void tms_update(struct nsclpcsio_softc *, int); 69 static int tms_gtredata(struct sysmon_envsys *, struct envsys_tre_data *); 70 static int tms_streinfo(struct sysmon_envsys *, struct envsys_basic_info *); 71 72 static u_int8_t 73 nsread(iot, ioh, idx) 74 bus_space_tag_t iot; 75 bus_space_handle_t ioh; 76 int idx; 77 { 78 79 bus_space_write_1(iot, ioh, 0, idx); 80 return (bus_space_read_1(iot, ioh, 1)); 81 } 82 83 static void 84 nswrite(iot, ioh, idx, data) 85 bus_space_tag_t iot; 86 bus_space_handle_t ioh; 87 int idx; 88 u_int8_t data; 89 { 90 91 bus_space_write_1(iot, ioh, 0, idx); 92 bus_space_write_1(iot, ioh, 1, data); 93 } 94 95 static int 96 nscheck(iot, base) 97 bus_space_tag_t iot; 98 int base; 99 { 100 bus_space_handle_t ioh; 101 int rv = 0; 102 103 if (bus_space_map(iot, base, 2, 0, &ioh)) 104 return (0); 105 106 /* XXX this is for PC87366 only for now */ 107 if (nsread(iot, ioh, 0x20) == 0xe9) 108 rv = 1; 109 110 bus_space_unmap(iot, ioh, 2); 111 return (rv); 112 } 113 114 static int 115 nsclpcsio_isa_match(parent, match, aux) 116 struct device *parent; 117 struct cfdata *match; 118 void *aux; 119 { 120 struct isa_attach_args *ia = aux; 121 int iobase; 122 123 if (ISA_DIRECT_CONFIG(ia)) 124 return (0); 125 126 if (ia->ia_nio > 0 && ia->ia_io[0].ir_addr != ISACF_PORT_DEFAULT) { 127 /* XXX check for legal iobase ??? */ 128 if (nscheck(ia->ia_iot, ia->ia_io[0].ir_addr)) { 129 iobase = ia->ia_io[0].ir_addr; 130 goto found; 131 } 132 } 133 134 /* PC87366 has two possible locations depending on wiring */ 135 if (nscheck(ia->ia_iot, 0x2e)) { 136 iobase = 0x2e; 137 goto found; 138 } 139 if (nscheck(ia->ia_iot, 0x4e)) { 140 iobase = 0x4e; 141 goto found; 142 } 143 return (0); 144 145 found: 146 ia->ia_nio = 1; 147 ia->ia_io[0].ir_addr = iobase; 148 ia->ia_io[0].ir_size = 2; 149 ia->ia_niomem = 0; 150 ia->ia_nirq = 0; 151 ia->ia_ndrq = 0; 152 return (1); 153 } 154 155 static void 156 nsclpcsio_isa_attach(parent, self, aux) 157 struct device *parent, *self; 158 void *aux; 159 { 160 struct nsclpcsio_softc *sc = (void *)self; 161 struct isa_attach_args *ia = aux; 162 bus_space_tag_t iot; 163 bus_space_handle_t ioh; 164 u_int8_t val; 165 int tms_iobase; 166 int i; 167 168 sc->sc_iot = iot = ia->ia_iot; 169 if (bus_space_map(ia->ia_iot, ia->ia_io[0].ir_addr, 2, 0, &ioh)) { 170 printf(": can't map i/o space\n"); 171 return; 172 } 173 sc->sc_ioh = ioh; 174 printf(": NSC PC87366 rev. %d\n", nsread(iot, ioh, 0x27)); 175 176 nswrite(iot, ioh, 0x07, 0x0e); /* select tms */ 177 178 val = nsread(iot, ioh, 0x30); /* control register */ 179 if (!(val & 1)) { 180 printf("%s: TMS disabled\n", sc->sc_dev.dv_xname); 181 return; 182 } 183 184 tms_iobase = (nsread(iot, ioh, 0x60) << 8) | nsread(iot, ioh, 0x61); 185 sc->sc_tms_iot = iot; 186 if (bus_space_map(iot, tms_iobase, 16, 0, &sc->sc_tms_ioh)) { 187 printf("%s: can't map TMS i/o space\n", sc->sc_dev.dv_xname); 188 return; 189 } 190 printf("%s: TMS at 0x%x\n", sc->sc_dev.dv_xname, tms_iobase); 191 192 if (bus_space_read_1(sc->sc_tms_iot, sc->sc_tms_ioh, 0x08) & 1) { 193 printf("%s: TMS in standby mode\n", sc->sc_dev.dv_xname); 194 /* XXX awake it ??? */ 195 return; 196 } 197 198 /* Initialize sensor meta data */ 199 for (i = 0; i < 3; i++) { 200 sc->sc_data[i].sensor = sc->sc_info[i].sensor = i; 201 sc->sc_data[i].units = sc->sc_info[i].units = ENVSYS_STEMP; 202 } 203 strcpy(sc->sc_info[0].desc, "TSENS1"); 204 strcpy(sc->sc_info[1].desc, "TSENS2"); 205 strcpy(sc->sc_info[2].desc, "TNSC"); 206 207 /* Get initial set of sensor values. */ 208 for (i = 0; i < 3; i++) 209 tms_update(sc, i); 210 211 /* 212 * Hook into the System Monitor. 213 */ 214 sc->sc_sysmon.sme_ranges = tms_ranges; 215 sc->sc_sysmon.sme_sensor_info = sc->sc_info; 216 sc->sc_sysmon.sme_sensor_data = sc->sc_data; 217 sc->sc_sysmon.sme_cookie = sc; 218 219 sc->sc_sysmon.sme_gtredata = tms_gtredata; 220 sc->sc_sysmon.sme_streinfo = tms_streinfo; 221 222 sc->sc_sysmon.sme_nsensors = 3; 223 sc->sc_sysmon.sme_envsys_version = 1000; 224 225 if (sysmon_envsys_register(&sc->sc_sysmon)) 226 printf("%s: unable to register with sysmon\n", 227 sc->sc_dev.dv_xname); 228 } 229 230 static void 231 tms_update(sc, chan) 232 struct nsclpcsio_softc *sc; 233 int chan; 234 { 235 bus_space_tag_t iot = sc->sc_tms_iot; 236 bus_space_handle_t ioh = sc->sc_tms_ioh; 237 u_int8_t status; 238 int8_t temp, ctemp; /* signed!! */ 239 240 bus_space_write_1(iot, ioh, 0x09, chan); /* select */ 241 242 status = bus_space_read_1(iot, ioh, 0x0a); /* config/status */ 243 if (status & 0x01) { 244 /* enabled */ 245 sc->sc_info[chan].validflags = ENVSYS_FVALID; 246 }else { 247 sc->sc_info[chan].validflags = 0; 248 return; 249 } 250 251 /* 252 * If the channel is enabled, it is considered valid. 253 * An "open circuit" might be temporary. 254 */ 255 sc->sc_data[chan].validflags = ENVSYS_FVALID; 256 if (status & 0x40) { 257 /* 258 * open circuit 259 * XXX should have a warning for it 260 */ 261 sc->sc_data[chan].warnflags = ENVSYS_WARN_OK; /* XXX */ 262 return; 263 } 264 265 /* get current temperature in signed degree celsius */ 266 temp = bus_space_read_1(iot, ioh, 0x0b); 267 sc->sc_data[chan].cur.data_us = (int)temp * 1000000 + 273150000; 268 sc->sc_data[chan].validflags |= ENVSYS_FCURVALID; 269 270 if (status & 0x0e) { /* any temperature warning? */ 271 /* 272 * XXX the chip documentation is a bit fuzzy - it doesn't state 273 * that the hardware OTS output depends on the "overtemp" 274 * warning bit. 275 * It seems the output gets cleared if the warning bit is reset. 276 * This sucks. 277 * The hardware might do something useful with output pins, eg 278 * throttling the CPU, so we must do the comparision in 279 * software, and only reset the bits if the reason is gone. 280 */ 281 if (status & 0x02) { /* low limit */ 282 sc->sc_data[chan].warnflags = ENVSYS_WARN_UNDER; 283 /* read low limit */ 284 ctemp = bus_space_read_1(iot, ioh, 0x0d); 285 if (temp <= ctemp) /* still valid, don't reset */ 286 status &= ~0x02; 287 } 288 if (status & 0x04) { /* high limit */ 289 sc->sc_data[chan].warnflags = ENVSYS_WARN_OVER; 290 /* read high limit */ 291 ctemp = bus_space_read_1(iot, ioh, 0x0c); 292 if (temp >= ctemp) /* still valid, don't reset */ 293 status &= ~0x04; 294 } 295 if (status & 0x08) { /* overtemperature */ 296 sc->sc_data[chan].warnflags = ENVSYS_WARN_CRITOVER; 297 /* read overtemperature limit */ 298 ctemp = bus_space_read_1(iot, ioh, 0x0e); 299 if (temp >= ctemp) /* still valid, don't reset */ 300 status &= ~0x08; 301 } 302 303 /* clear outdated warnings */ 304 if (status & 0x0e) 305 bus_space_write_1(iot, ioh, 0x0a, status); 306 } 307 } 308 309 static int 310 tms_gtredata(sme, data) 311 struct sysmon_envsys *sme; 312 struct envsys_tre_data *data; 313 { 314 struct nsclpcsio_softc *sc = sme->sme_cookie; 315 316 tms_update(sc, data->sensor); 317 318 *data = sc->sc_data[data->sensor]; 319 return (0); 320 } 321 322 static int 323 tms_streinfo(sme, info) 324 struct sysmon_envsys *sme; 325 struct envsys_basic_info *info; 326 { 327 #if 0 328 struct nsclpcsio_softc *sc = sme->sme_cookie; 329 #endif 330 /* XXX Not implemented */ 331 info->validflags = 0; 332 333 return (0); 334 } 335
Indexes created Mon Sep 29 21:09:56 GMT 2025