nsclpcsio_isa.c revision 1.7
1 /* $NetBSD: nsclpcsio_isa.c,v 1.7 2005/02/04 02:10:41 perry Exp $ */ 2 3 /* 4 * Copyright (c) 2002 5 * Matthias Drochner. All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions, and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 * SUCH DAMAGE. 27 */ 28 29 #include <sys/cdefs.h> 30 __KERNEL_RCSID(0, "$NetBSD: nsclpcsio_isa.c,v 1.7 2005/02/04 02:10:41 perry Exp $"); 31 32 #include <sys/param.h> 33 #include <sys/systm.h> 34 #include <sys/device.h> 35 #include <machine/bus.h> 36 37 #include <dev/isa/isareg.h> 38 #include <dev/isa/isavar.h> 39 #include <dev/sysmon/sysmonvar.h> 40 41 static int nsclpcsio_isa_match(struct device *, struct cfdata *, void *); 42 static void nsclpcsio_isa_attach(struct device *, struct device *, void *); 43 44 struct nsclpcsio_softc { 45 struct device sc_dev; 46 bus_space_tag_t sc_iot, sc_tms_iot; 47 bus_space_handle_t sc_ioh, sc_tms_ioh; 48 49 struct envsys_tre_data sc_data[3]; 50 struct envsys_basic_info sc_info[3]; 51 struct sysmon_envsys sc_sysmon; 52 }; 53 54 CFATTACH_DECL(nsclpcsio_isa, sizeof(struct nsclpcsio_softc), 55 nsclpcsio_isa_match, nsclpcsio_isa_attach, NULL, NULL); 56 57 static const struct envsys_range tms_ranges[] = { 58 { 0, 2, ENVSYS_STEMP }, 59 }; 60 61 static u_int8_t nsread(bus_space_tag_t, bus_space_handle_t, int); 62 static void nswrite(bus_space_tag_t, bus_space_handle_t, int, u_int8_t); 63 static int nscheck(bus_space_tag_t, int); 64 65 static void tms_update(struct nsclpcsio_softc *, int); 66 static int tms_gtredata(struct sysmon_envsys *, struct envsys_tre_data *); 67 static int tms_streinfo(struct sysmon_envsys *, struct envsys_basic_info *); 68 69 static u_int8_t 70 nsread(iot, ioh, idx) 71 bus_space_tag_t iot; 72 bus_space_handle_t ioh; 73 int idx; 74 { 75 76 bus_space_write_1(iot, ioh, 0, idx); 77 return (bus_space_read_1(iot, ioh, 1)); 78 } 79 80 static void 81 nswrite(iot, ioh, idx, data) 82 bus_space_tag_t iot; 83 bus_space_handle_t ioh; 84 int idx; 85 u_int8_t data; 86 { 87 88 bus_space_write_1(iot, ioh, 0, idx); 89 bus_space_write_1(iot, ioh, 1, data); 90 } 91 92 static int 93 nscheck(iot, base) 94 bus_space_tag_t iot; 95 int base; 96 { 97 bus_space_handle_t ioh; 98 int rv = 0; 99 100 if (bus_space_map(iot, base, 2, 0, &ioh)) 101 return (0); 102 103 /* XXX this is for PC87366 only for now */ 104 if (nsread(iot, ioh, 0x20) == 0xe9) 105 rv = 1; 106 107 bus_space_unmap(iot, ioh, 2); 108 return (rv); 109 } 110 111 static int 112 nsclpcsio_isa_match(parent, match, aux) 113 struct device *parent; 114 struct cfdata *match; 115 void *aux; 116 { 117 struct isa_attach_args *ia = aux; 118 int iobase; 119 120 if (ISA_DIRECT_CONFIG(ia)) 121 return (0); 122 123 if (ia->ia_nio > 0 && ia->ia_io[0].ir_addr != ISA_UNKNOWN_PORT) { 124 /* XXX check for legal iobase ??? */ 125 if (nscheck(ia->ia_iot, ia->ia_io[0].ir_addr)) { 126 iobase = ia->ia_io[0].ir_addr; 127 goto found; 128 } 129 return (0); 130 } 131 132 /* PC87366 has two possible locations depending on wiring */ 133 if (nscheck(ia->ia_iot, 0x2e)) { 134 iobase = 0x2e; 135 goto found; 136 } 137 if (nscheck(ia->ia_iot, 0x4e)) { 138 iobase = 0x4e; 139 goto found; 140 } 141 return (0); 142 143 found: 144 ia->ia_nio = 1; 145 ia->ia_io[0].ir_addr = iobase; 146 ia->ia_io[0].ir_size = 2; 147 ia->ia_niomem = 0; 148 ia->ia_nirq = 0; 149 ia->ia_ndrq = 0; 150 return (1); 151 } 152 153 static void 154 nsclpcsio_isa_attach(parent, self, aux) 155 struct device *parent, *self; 156 void *aux; 157 { 158 struct nsclpcsio_softc *sc = (void *)self; 159 struct isa_attach_args *ia = aux; 160 bus_space_tag_t iot; 161 bus_space_handle_t ioh; 162 u_int8_t val; 163 int tms_iobase; 164 int i; 165 166 sc->sc_iot = iot = ia->ia_iot; 167 if (bus_space_map(ia->ia_iot, ia->ia_io[0].ir_addr, 2, 0, &ioh)) { 168 printf(": can't map i/o space\n"); 169 return; 170 } 171 sc->sc_ioh = ioh; 172 printf(": NSC PC87366 rev. %d\n", nsread(iot, ioh, 0x27)); 173 174 nswrite(iot, ioh, 0x07, 0x0e); /* select tms */ 175 176 val = nsread(iot, ioh, 0x30); /* control register */ 177 if (!(val & 1)) { 178 printf("%s: TMS disabled\n", sc->sc_dev.dv_xname); 179 return; 180 } 181 182 tms_iobase = (nsread(iot, ioh, 0x60) << 8) | nsread(iot, ioh, 0x61); 183 sc->sc_tms_iot = iot; 184 if (bus_space_map(iot, tms_iobase, 16, 0, &sc->sc_tms_ioh)) { 185 printf("%s: can't map TMS i/o space\n", sc->sc_dev.dv_xname); 186 return; 187 } 188 printf("%s: TMS at 0x%x\n", sc->sc_dev.dv_xname, tms_iobase); 189 190 if (bus_space_read_1(sc->sc_tms_iot, sc->sc_tms_ioh, 0x08) & 1) { 191 printf("%s: TMS in standby mode\n", sc->sc_dev.dv_xname); 192 /* XXX awake it ??? */ 193 return; 194 } 195 196 /* Initialize sensor meta data */ 197 for (i = 0; i < 3; i++) { 198 sc->sc_data[i].sensor = sc->sc_info[i].sensor = i; 199 sc->sc_data[i].units = sc->sc_info[i].units = ENVSYS_STEMP; 200 } 201 strcpy(sc->sc_info[0].desc, "TSENS1"); 202 strcpy(sc->sc_info[1].desc, "TSENS2"); 203 strcpy(sc->sc_info[2].desc, "TNSC"); 204 205 /* Get initial set of sensor values. */ 206 for (i = 0; i < 3; i++) 207 tms_update(sc, i); 208 209 /* 210 * Hook into the System Monitor. 211 */ 212 sc->sc_sysmon.sme_ranges = tms_ranges; 213 sc->sc_sysmon.sme_sensor_info = sc->sc_info; 214 sc->sc_sysmon.sme_sensor_data = sc->sc_data; 215 sc->sc_sysmon.sme_cookie = sc; 216 217 sc->sc_sysmon.sme_gtredata = tms_gtredata; 218 sc->sc_sysmon.sme_streinfo = tms_streinfo; 219 220 sc->sc_sysmon.sme_nsensors = 3; 221 sc->sc_sysmon.sme_envsys_version = 1000; 222 223 if (sysmon_envsys_register(&sc->sc_sysmon)) 224 printf("%s: unable to register with sysmon\n", 225 sc->sc_dev.dv_xname); 226 } 227 228 static void 229 tms_update(sc, chan) 230 struct nsclpcsio_softc *sc; 231 int chan; 232 { 233 bus_space_tag_t iot = sc->sc_tms_iot; 234 bus_space_handle_t ioh = sc->sc_tms_ioh; 235 u_int8_t status; 236 int8_t temp, ctemp; /* signed!! */ 237 238 bus_space_write_1(iot, ioh, 0x09, chan); /* select */ 239 240 status = bus_space_read_1(iot, ioh, 0x0a); /* config/status */ 241 if (status & 0x01) { 242 /* enabled */ 243 sc->sc_info[chan].validflags = ENVSYS_FVALID; 244 }else { 245 sc->sc_info[chan].validflags = 0; 246 return; 247 } 248 249 /* 250 * If the channel is enabled, it is considered valid. 251 * An "open circuit" might be temporary. 252 */ 253 sc->sc_data[chan].validflags = ENVSYS_FVALID; 254 if (status & 0x40) { 255 /* 256 * open circuit 257 * XXX should have a warning for it 258 */ 259 sc->sc_data[chan].warnflags = ENVSYS_WARN_OK; /* XXX */ 260 return; 261 } 262 263 /* get current temperature in signed degree celsius */ 264 temp = bus_space_read_1(iot, ioh, 0x0b); 265 sc->sc_data[chan].cur.data_us = (int)temp * 1000000 + 273150000; 266 sc->sc_data[chan].validflags |= ENVSYS_FCURVALID; 267 268 if (status & 0x0e) { /* any temperature warning? */ 269 /* 270 * XXX the chip documentation is a bit fuzzy - it doesn't state 271 * that the hardware OTS output depends on the "overtemp" 272 * warning bit. 273 * It seems the output gets cleared if the warning bit is reset. 274 * This sucks. 275 * The hardware might do something useful with output pins, eg 276 * throttling the CPU, so we must do the comparision in 277 * software, and only reset the bits if the reason is gone. 278 */ 279 if (status & 0x02) { /* low limit */ 280 sc->sc_data[chan].warnflags = ENVSYS_WARN_UNDER; 281 /* read low limit */ 282 ctemp = bus_space_read_1(iot, ioh, 0x0d); 283 if (temp <= ctemp) /* still valid, don't reset */ 284 status &= ~0x02; 285 } 286 if (status & 0x04) { /* high limit */ 287 sc->sc_data[chan].warnflags = ENVSYS_WARN_OVER; 288 /* read high limit */ 289 ctemp = bus_space_read_1(iot, ioh, 0x0c); 290 if (temp >= ctemp) /* still valid, don't reset */ 291 status &= ~0x04; 292 } 293 if (status & 0x08) { /* overtemperature */ 294 sc->sc_data[chan].warnflags = ENVSYS_WARN_CRITOVER; 295 /* read overtemperature limit */ 296 ctemp = bus_space_read_1(iot, ioh, 0x0e); 297 if (temp >= ctemp) /* still valid, don't reset */ 298 status &= ~0x08; 299 } 300 301 /* clear outdated warnings */ 302 if (status & 0x0e) 303 bus_space_write_1(iot, ioh, 0x0a, status); 304 } 305 } 306 307 static int 308 tms_gtredata(sme, data) 309 struct sysmon_envsys *sme; 310 struct envsys_tre_data *data; 311 { 312 struct nsclpcsio_softc *sc = sme->sme_cookie; 313 314 tms_update(sc, data->sensor); 315 316 *data = sc->sc_data[data->sensor]; 317 return (0); 318 } 319 320 static int 321 tms_streinfo(sme, info) 322 struct sysmon_envsys *sme; 323 struct envsys_basic_info *info; 324 { 325 #if 0 326 struct nsclpcsio_softc *sc = sme->sme_cookie; 327 #endif 328 /* XXX Not implemented */ 329 info->validflags = 0; 330 331 return (0); 332 } 333
Indexes created Mon Sep 29 03:10:08 GMT 2025