pcppi.c revision 1.25
1 /* $NetBSD: pcppi.c,v 1.25 2007/12/16 19:01:36 christos Exp $ */ 2 3 /* 4 * Copyright (c) 1996 Carnegie-Mellon University. 5 * All rights reserved. 6 * 7 * Author: Chris G. Demetriou 8 * 9 * Permission to use, copy, modify and distribute this software and 10 * its documentation is hereby granted, provided that both the copyright 11 * notice and this permission notice appear in all copies of the 12 * software, derivative works or modified versions, and any portions 13 * thereof, and that both notices appear in supporting documentation. 14 * 15 * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS" 16 * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND 17 * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE. 18 * 19 * Carnegie Mellon requests users of this software to return to 20 * 21 * Software Distribution Coordinator or Software.Distribution (at) CS.CMU.EDU 22 * School of Computer Science 23 * Carnegie Mellon University 24 * Pittsburgh PA 15213-3890 25 * 26 * any improvements or extensions that they make and grant Carnegie the 27 * rights to redistribute these changes. 28 */ 29 30 #include <sys/cdefs.h> 31 __KERNEL_RCSID(0, "$NetBSD: pcppi.c,v 1.25 2007/12/16 19:01:36 christos Exp $"); 32 33 #include "attimer.h" 34 35 #include <sys/param.h> 36 #include <sys/systm.h> 37 #include <sys/callout.h> 38 #include <sys/kernel.h> 39 #include <sys/proc.h> 40 #include <sys/device.h> 41 #include <sys/errno.h> 42 43 #include <sys/bus.h> 44 45 #include <dev/ic/attimervar.h> 46 47 #include <dev/isa/isareg.h> 48 #include <dev/isa/isavar.h> 49 #include <dev/isa/pcppireg.h> 50 #include <dev/isa/pcppivar.h> 51 52 #include "pckbd.h" 53 #if NPCKBD > 0 54 #include <dev/pckbport/pckbdvar.h> 55 56 void pcppi_pckbd_bell(void *, u_int, u_int, u_int, int); 57 #endif 58 59 int pcppi_match(struct device *, struct cfdata *, void *); 60 void pcppi_isa_attach(struct device *, struct device *, void *); 61 62 CFATTACH_DECL(pcppi, sizeof(struct pcppi_softc), 63 pcppi_match, pcppi_isa_attach, NULL, NULL); 64 65 static int pcppisearch(device_t, cfdata_t, const int *, void *); 66 static void pcppi_bell_stop(void*); 67 68 #if NATTIMER > 0 69 static void pcppi_attach_speaker(struct device *); 70 #endif 71 72 #define PCPPIPRI (PZERO - 1) 73 74 int 75 pcppi_match(struct device *parent, struct cfdata *match, 76 void *aux) 77 { 78 struct isa_attach_args *ia = aux; 79 bus_space_handle_t ppi_ioh; 80 int have_ppi, rv; 81 u_int8_t v, nv; 82 83 if (ISA_DIRECT_CONFIG(ia)) 84 return (0); 85 86 /* If values are hardwired to something that they can't be, punt. */ 87 if (ia->ia_nio < 1 || 88 (ia->ia_io[0].ir_addr != ISA_UNKNOWN_PORT && 89 ia->ia_io[0].ir_addr != IO_PPI)) 90 return (0); 91 92 if (ia->ia_niomem > 0 && 93 (ia->ia_iomem[0].ir_addr != ISA_UNKNOWN_IOMEM)) 94 return (0); 95 96 if (ia->ia_nirq > 0 && 97 (ia->ia_irq[0].ir_irq != ISA_UNKNOWN_IRQ)) 98 return (0); 99 100 if (ia->ia_ndrq > 0 && 101 (ia->ia_drq[0].ir_drq != ISA_UNKNOWN_DRQ)) 102 return (0); 103 104 rv = 0; 105 have_ppi = 0; 106 107 if (bus_space_map(ia->ia_iot, IO_PPI, 1, 0, &ppi_ioh)) 108 goto lose; 109 have_ppi = 1; 110 111 /* 112 * Check for existence of PPI. Realistically, this is either going to 113 * be here or nothing is going to be here. 114 * 115 * We don't want to have any chance of changing speaker output (which 116 * this test might, if it crashes in the middle, or something; 117 * normally it's be to quick to produce anthing audible), but 118 * many "combo chip" mock-PPI's don't seem to support the top bit 119 * of Port B as a settable bit. The bottom bit has to be settable, 120 * since the speaker driver hardware still uses it. 121 */ 122 v = bus_space_read_1(ia->ia_iot, ppi_ioh, 0); /* XXX */ 123 bus_space_write_1(ia->ia_iot, ppi_ioh, 0, v ^ 0x01); /* XXX */ 124 nv = bus_space_read_1(ia->ia_iot, ppi_ioh, 0); /* XXX */ 125 if (((nv ^ v) & 0x01) == 0x01) 126 rv = 1; 127 bus_space_write_1(ia->ia_iot, ppi_ioh, 0, v); /* XXX */ 128 nv = bus_space_read_1(ia->ia_iot, ppi_ioh, 0); /* XXX */ 129 if (((nv ^ v) & 0x01) != 0x00) { 130 rv = 0; 131 goto lose; 132 } 133 134 /* 135 * We assume that the programmable interval timer is there. 136 */ 137 138 lose: 139 if (have_ppi) 140 bus_space_unmap(ia->ia_iot, ppi_ioh, 1); 141 if (rv) { 142 ia->ia_io[0].ir_addr = IO_PPI; 143 ia->ia_io[0].ir_size = 1; 144 ia->ia_nio = 1; 145 146 ia->ia_niomem = 0; 147 ia->ia_nirq = 0; 148 ia->ia_ndrq = 0; 149 } 150 return (rv); 151 } 152 153 void 154 pcppi_isa_attach(struct device *parent, struct device *self, void *aux) 155 { 156 struct pcppi_softc *sc = (struct pcppi_softc *)self; 157 struct isa_attach_args *ia = aux; 158 bus_space_tag_t iot; 159 160 sc->sc_iot = iot = ia->ia_iot; 161 162 if (bus_space_map(iot, IO_PPI, 1, 0, &sc->sc_ppi_ioh)) 163 panic("pcppi_attach: couldn't map"); 164 165 printf("\n"); 166 167 pcppi_attach(sc); 168 if (!device_pmf_is_registered(self)) 169 if (!pmf_device_register(self, NULL, NULL)) 170 aprint_error_dev(self, 171 "couldn't establish power handler\n"); 172 173 } 174 175 void 176 pcppi_attach(struct pcppi_softc *sc) 177 { 178 struct pcppi_attach_args pa; 179 180 callout_init(&sc->sc_bell_ch, 0); 181 182 sc->sc_bellactive = sc->sc_bellpitch = sc->sc_slp = 0; 183 184 #if NPCKBD > 0 185 /* Provide a beeper for the PC Keyboard, if there isn't one already. */ 186 pckbd_hookup_bell(pcppi_pckbd_bell, sc); 187 #endif 188 #if NATTIMER > 0 189 config_defer((struct device *)sc, pcppi_attach_speaker); 190 #endif 191 192 pa.pa_cookie = sc; 193 config_search_loc(pcppisearch, &sc->sc_dv, "pcppi", NULL, &pa); 194 } 195 196 static int 197 pcppisearch(device_t parent, cfdata_t cf, const int *locs, void *aux) 198 { 199 200 if (config_match(parent, cf, aux)) 201 config_attach_loc(parent, cf, locs, aux, NULL); 202 203 return 0; 204 } 205 206 #if NATTIMER > 0 207 static void 208 pcppi_attach_speaker(struct device *self) 209 { 210 struct pcppi_softc *sc = (struct pcppi_softc *)self; 211 212 if ((sc->sc_timer = attimer_attach_speaker()) == NULL) 213 aprint_error("%s: could not find any available timer\n", 214 sc->sc_dv.dv_xname); 215 else 216 aprint_normal("%s: attached to %s\n", sc->sc_dv.dv_xname, 217 sc->sc_timer->sc_dev.dv_xname); 218 } 219 #endif 220 221 void 222 pcppi_bell(pcppi_tag_t self, int pitch, int period, int slp) 223 { 224 struct pcppi_softc *sc = self; 225 int s; 226 227 s = spltty(); /* ??? */ 228 if (sc->sc_bellactive) { 229 if (sc->sc_timeout) { 230 sc->sc_timeout = 0; 231 callout_stop(&sc->sc_bell_ch); 232 } 233 if (sc->sc_slp) 234 wakeup(pcppi_bell_stop); 235 } 236 if (pitch == 0 || period == 0) { 237 pcppi_bell_stop(sc); 238 sc->sc_bellpitch = 0; 239 splx(s); 240 return; 241 } 242 if (!sc->sc_bellactive || sc->sc_bellpitch != pitch) { 243 #if NATTIMER > 0 244 if (sc->sc_timer != NULL) 245 attimer_set_pitch(sc->sc_timer, pitch); 246 #endif 247 /* enable speaker */ 248 bus_space_write_1(sc->sc_iot, sc->sc_ppi_ioh, 0, 249 bus_space_read_1(sc->sc_iot, sc->sc_ppi_ioh, 0) 250 | PIT_SPKR); 251 } 252 sc->sc_bellpitch = pitch; 253 254 sc->sc_bellactive = 1; 255 if (slp & PCPPI_BELL_POLL) { 256 delay((period * 1000000) / hz); 257 pcppi_bell_stop(sc); 258 } else { 259 sc->sc_timeout = 1; 260 callout_reset(&sc->sc_bell_ch, period, pcppi_bell_stop, sc); 261 if (slp & PCPPI_BELL_SLEEP) { 262 sc->sc_slp = 1; 263 tsleep(pcppi_bell_stop, PCPPIPRI | PCATCH, "bell", 0); 264 sc->sc_slp = 0; 265 } 266 } 267 splx(s); 268 } 269 270 static void 271 pcppi_bell_stop(void *arg) 272 { 273 struct pcppi_softc *sc = arg; 274 int s; 275 276 s = spltty(); /* ??? */ 277 sc->sc_timeout = 0; 278 279 /* disable bell */ 280 bus_space_write_1(sc->sc_iot, sc->sc_ppi_ioh, 0, 281 bus_space_read_1(sc->sc_iot, sc->sc_ppi_ioh, 0) 282 & ~PIT_SPKR); 283 sc->sc_bellactive = 0; 284 if (sc->sc_slp) 285 wakeup(pcppi_bell_stop); 286 splx(s); 287 } 288 289 #if NPCKBD > 0 290 void 291 pcppi_pckbd_bell(void *arg, u_int pitch, u_int period, u_int volume, 292 int poll) 293 { 294 295 /* 296 * Comes in as ms, goes out at ticks; volume ignored. 297 */ 298 pcppi_bell(arg, pitch, (period * hz) / 1000, 299 poll ? PCPPI_BELL_POLL : 0); 300 } 301 #endif /* NPCKBD > 0 */ 302
Indexes created Thu Oct 02 14:10:14 GMT 2025