sb.c revision 1.8 1 1.1 cgd /*
2 1.1 cgd * Copyright (c) 1991-1993 Regents of the University of California.
3 1.1 cgd * All rights reserved.
4 1.1 cgd *
5 1.1 cgd * Redistribution and use in source and binary forms, with or without
6 1.1 cgd * modification, are permitted provided that the following conditions
7 1.1 cgd * are met:
8 1.1 cgd * 1. Redistributions of source code must retain the above copyright
9 1.1 cgd * notice, this list of conditions and the following disclaimer.
10 1.1 cgd * 2. Redistributions in binary form must reproduce the above copyright
11 1.1 cgd * notice, this list of conditions and the following disclaimer in the
12 1.1 cgd * documentation and/or other materials provided with the distribution.
13 1.1 cgd * 3. All advertising materials mentioning features or use of this software
14 1.1 cgd * must display the following acknowledgement:
15 1.1 cgd * This product includes software developed by the Computer Systems
16 1.1 cgd * Engineering Group at Lawrence Berkeley Laboratory.
17 1.1 cgd * 4. Neither the name of the University nor of the Laboratory may be used
18 1.1 cgd * to endorse or promote products derived from this software without
19 1.1 cgd * specific prior written permission.
20 1.1 cgd *
21 1.1 cgd * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
22 1.1 cgd * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
23 1.1 cgd * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
24 1.1 cgd * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
25 1.1 cgd * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
26 1.1 cgd * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
27 1.1 cgd * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
28 1.1 cgd * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
29 1.1 cgd * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
30 1.1 cgd * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
31 1.1 cgd * SUCH DAMAGE.
32 1.1 cgd *
33 1.8 mycroft * $Id: sb.c,v 1.8 1994/04/22 22:59:00 mycroft Exp $
34 1.1 cgd */
35 1.1 cgd
36 1.1 cgd #include <sys/param.h>
37 1.1 cgd #include <sys/systm.h>
38 1.1 cgd #include <sys/errno.h>
39 1.1 cgd #include <sys/ioctl.h>
40 1.1 cgd #include <sys/syslog.h>
41 1.6 mycroft #include <sys/device.h>
42 1.1 cgd
43 1.1 cgd #include <machine/cpu.h>
44 1.1 cgd #include <machine/pio.h>
45 1.1 cgd
46 1.1 cgd #include <i386/isa/isa.h>
47 1.6 mycroft #include <i386/isa/isavar.h>
48 1.8 mycroft #include <i386/isa/dmavar.h>
49 1.1 cgd #include <i386/isa/icu.h>
50 1.1 cgd
51 1.1 cgd #include "sbreg.h"
52 1.1 cgd
53 1.1 cgd /*
54 1.1 cgd * Software state, per SoundBlaster card.
55 1.1 cgd * The soundblaster has multiple functionality, which we must demultiplex.
56 1.1 cgd * One approach is to have one major device number for the soundblaster card,
57 1.1 cgd * and use different minor numbers to indicate which hardware function
58 1.1 cgd * we want. This would make for one large driver. Instead our approach
59 1.1 cgd * is to partition the design into a set of drivers that share an underlying
60 1.1 cgd * piece of hardware. Most things are hard to share, for example, the audio
61 1.1 cgd * and midi ports. For audio, we might want to mix two processes' signals,
62 1.1 cgd * and for midi we might want to merge streams (this is hard due to
63 1.1 cgd * running status). Moreover, we should be able to re-use the high-level
64 1.1 cgd * modules with other kinds of hardware. In this module, we only handle the
65 1.1 cgd * most basic communications with the sb card.
66 1.1 cgd */
67 1.1 cgd struct sb_softc {
68 1.1 cgd struct device sc_dev; /* base device */
69 1.1 cgd struct isadev sc_id; /* ISA device */
70 1.7 mycroft struct intrhand sc_ih; /* interrupt vectoring */
71 1.6 mycroft
72 1.1 cgd u_short sc_open; /* reference count of open calls */
73 1.1 cgd u_short sc_dmachan; /* dma channel */
74 1.6 mycroft u_short sc_locked; /* true when doing HS DMA */
75 1.6 mycroft u_short sc_iobase; /* I/O port base address */
76 1.1 cgd u_short sc_adacmode; /* low/high speed mode indicator */
77 1.1 cgd #define SB_ADAC_LS 0
78 1.1 cgd #define SB_ADAC_HS 1
79 1.1 cgd u_short sc_adactc; /* current adac time constant */
80 1.1 cgd u_long sc_interrupts; /* number of interrupts taken */
81 1.1 cgd void (*sc_intr)(void*); /* dma completion intr handler */
82 1.1 cgd void (*sc_mintr)(void*, int);/* midi input intr handler */
83 1.1 cgd void *sc_arg; /* arg for sc_intr() */
84 1.1 cgd };
85 1.1 cgd
86 1.6 mycroft int sbreset __P((struct sb_softc *));
87 1.6 mycroft void sb_spkron __P((struct sb_softc *));
88 1.6 mycroft void sb_spkroff __P((struct sb_softc *));
89 1.1 cgd
90 1.6 mycroft static int wdsp(u_short iobase, int v);
91 1.6 mycroft static int rdsp(u_short iobase);
92 1.1 cgd
93 1.6 mycroft #define splsb splhigh /* XXX */
94 1.6 mycroft struct sb_softc *sb_softc; /* XXX */
95 1.1 cgd
96 1.1 cgd #ifndef NEWCONFIG
97 1.1 cgd #define at_dma(flags, ptr, cc, chan) isa_dmastart(flags, ptr, cc, chan)
98 1.1 cgd #endif
99 1.1 cgd
100 1.1 cgd struct {
101 1.1 cgd int wdsp;
102 1.1 cgd int rdsp;
103 1.1 cgd int wmidi;
104 1.1 cgd } sberr;
105 1.1 cgd
106 1.7 mycroft int sbintr __P((struct sb_softc *));
107 1.6 mycroft int sbprobe();
108 1.6 mycroft void sbattach();
109 1.1 cgd #ifdef NEWCONFIG
110 1.1 cgd void sbforceintr(void *);
111 1.6 mycroft #endif
112 1.1 cgd
113 1.6 mycroft struct cfdriver sbcd = {
114 1.6 mycroft NULL, "sb", sbprobe, sbattach, DV_DULL, sizeof(struct sb_softc)
115 1.6 mycroft };
116 1.1 cgd
117 1.1 cgd int
118 1.6 mycroft sbprobe(parent, self, aux)
119 1.6 mycroft struct device *parent, *self;
120 1.6 mycroft void *aux;
121 1.1 cgd {
122 1.6 mycroft register struct sb_softc *sc = (void *)self;
123 1.6 mycroft register struct isa_attach_args *ia = aux;
124 1.6 mycroft register u_short iobase = ia->ia_iobase;
125 1.1 cgd
126 1.6 mycroft if (!SB_BASE_VALID(ia->ia_iobase)) {
127 1.6 mycroft printf("sb: configured iobase %d invalid\n", ia->ia_iobase);
128 1.6 mycroft return 0;
129 1.1 cgd }
130 1.6 mycroft sc->sc_iobase = iobase;
131 1.6 mycroft if (sbreset(sc) < 0) {
132 1.1 cgd printf("sb: couldn't reset card\n");
133 1.6 mycroft return 0;
134 1.1 cgd }
135 1.1 cgd /*
136 1.1 cgd * Cannot auto-discover DMA channel.
137 1.1 cgd */
138 1.1 cgd if (!SB_DRQ_VALID(ia->ia_drq)) {
139 1.1 cgd printf("sb: configured dma chan %d invalid\n", ia->ia_drq);
140 1.6 mycroft return 0;
141 1.1 cgd }
142 1.6 mycroft #ifdef NEWCONFIG
143 1.1 cgd /*
144 1.1 cgd * If the IRQ wasn't compiled in, auto-detect it.
145 1.1 cgd */
146 1.1 cgd if (ia->ia_irq == IRQUNK) {
147 1.1 cgd ia->ia_irq = isa_discoverintr(sbforceintr, aux);
148 1.6 mycroft sbreset(iobase);
149 1.1 cgd if (!SB_IRQ_VALID(ia->ia_irq)) {
150 1.1 cgd printf("sb: couldn't auto-detect interrupt");
151 1.6 mycroft return 0;
152 1.1 cgd }
153 1.6 mycroft } else
154 1.6 mycroft #endif
155 1.6 mycroft if (!SB_IRQ_VALID(ia->ia_irq)) {
156 1.1 cgd int irq = ffs(ia->ia_irq) - 1;
157 1.1 cgd printf("sb: configured irq %d invalid\n", irq);
158 1.6 mycroft return 0;
159 1.1 cgd }
160 1.6 mycroft ia->ia_iosize = SB_NPORT;
161 1.6 mycroft return 1;
162 1.1 cgd }
163 1.1 cgd
164 1.6 mycroft #ifdef NEWCONFIG
165 1.1 cgd void
166 1.6 mycroft sbforceintr(aux)
167 1.6 mycroft void *aux;
168 1.1 cgd {
169 1.1 cgd static char dmabuf;
170 1.6 mycroft struct isa_attach_args *ia = aux;
171 1.6 mycroft u_short iobase = ia->ia_iobase;
172 1.6 mycroft
173 1.1 cgd /*
174 1.1 cgd * Set up a DMA read of one byte.
175 1.1 cgd * XXX Note that at this point we haven't called
176 1.1 cgd * at_setup_dmachan(). This is okay because it just
177 1.1 cgd * allocates a buffer in case it needs to make a copy,
178 1.1 cgd * and it won't need to make a copy for a 1 byte buffer.
179 1.1 cgd * (I think that calling at_setup_dmachan() should be optional;
180 1.1 cgd * if you don't call it, it will be called the first time
181 1.1 cgd * it is needed (and you pay the latency). Also, you might
182 1.1 cgd * never need the buffer anyway.)
183 1.1 cgd */
184 1.1 cgd at_dma(1, &dmabuf, 1, ia->ia_drq);
185 1.6 mycroft if (wdsp(iobase, SB_DSP_RDMA) == 0) {
186 1.6 mycroft (void)wdsp(iobase, 0);
187 1.6 mycroft (void)wdsp(iobase, 0);
188 1.1 cgd }
189 1.1 cgd }
190 1.6 mycroft #endif
191 1.1 cgd
192 1.1 cgd void
193 1.1 cgd sbattach(parent, self, aux)
194 1.1 cgd struct device *parent, *self;
195 1.1 cgd void *aux;
196 1.1 cgd {
197 1.1 cgd register struct sb_softc *sc = (struct sb_softc *)self;
198 1.1 cgd struct isa_attach_args *ia = (struct isa_attach_args *)aux;
199 1.6 mycroft register u_short iobase = ia->ia_iobase;
200 1.1 cgd register int vers;
201 1.1 cgd
202 1.1 cgd /* XXX */
203 1.1 cgd sb_softc = sc;
204 1.1 cgd
205 1.6 mycroft sc->sc_iobase = iobase;
206 1.1 cgd sc->sc_dmachan = ia->ia_drq;
207 1.1 cgd sc->sc_locked = 0;
208 1.6 mycroft
209 1.6 mycroft #ifdef NEWCONFIG
210 1.1 cgd isa_establish(&sc->sc_id, &sc->sc_dev);
211 1.7 mycroft #endif
212 1.1 cgd sc->sc_ih.ih_fun = sbintr;
213 1.7 mycroft sc->sc_ih.ih_arg = sc;
214 1.7 mycroft sc->sc_ih.ih_level = IPL_BIO;
215 1.7 mycroft intr_establish(ia->ia_irq, &sc->sc_ih);
216 1.1 cgd
217 1.7 mycroft #ifdef NEWCONFIG
218 1.1 cgd /*
219 1.1 cgd * We limit DMA transfers to a page, and use the generic DMA handling
220 1.1 cgd * code in isa.c. This code can end up copying a buffer, but since
221 1.1 cgd * the audio driver uses relative small buffers this isn't likely.
222 1.1 cgd *
223 1.1 cgd * This allocation scheme means that the maximum transfer is limited
224 1.1 cgd * by the page size (rather than 64k). This is reasonable. For 4K
225 1.1 cgd * pages, the transfer time at 48KHz is 4096 / 48000 = 85ms. This
226 1.1 cgd * is plenty long enough to amortize any fixed time overhead.
227 1.1 cgd */
228 1.1 cgd at_setup_dmachan(sc->sc_dmachan, NBPG);
229 1.1 cgd #endif
230 1.1 cgd
231 1.6 mycroft vers = sbversion(sc);
232 1.6 mycroft printf(": dsp v%d.%d\n", vers >> 8, vers & 0xff);
233 1.1 cgd }
234 1.1 cgd
235 1.6 mycroft #define SBUNIT(x) (minor(x) & 0xf)
236 1.1 cgd
237 1.1 cgd struct sb_softc *
238 1.1 cgd sbopen()
239 1.1 cgd {
240 1.6 mycroft /* XXXX */
241 1.1 cgd struct sb_softc *sc = sb_softc;
242 1.1 cgd
243 1.1 cgd if (sc == 0)
244 1.1 cgd return 0;
245 1.1 cgd
246 1.6 mycroft if (sc->sc_open == 0 && sbreset(sc) == 0) {
247 1.1 cgd sc->sc_open = 1;
248 1.1 cgd sc->sc_mintr = 0;
249 1.1 cgd sc->sc_intr = 0;
250 1.6 mycroft return sc;
251 1.1 cgd }
252 1.6 mycroft return 0;
253 1.1 cgd }
254 1.1 cgd
255 1.1 cgd void
256 1.6 mycroft sbclose(sc)
257 1.6 mycroft struct sb_softc *sc;
258 1.1 cgd {
259 1.6 mycroft
260 1.1 cgd sc->sc_open = 0;
261 1.1 cgd sb_spkroff(sc);
262 1.1 cgd sc->sc_intr = 0;
263 1.1 cgd sc->sc_mintr = 0;
264 1.1 cgd /* XXX this will turn off any dma */
265 1.6 mycroft sbreset(sc);
266 1.1 cgd }
267 1.1 cgd
268 1.1 cgd /*
269 1.1 cgd * Write a byte to the dsp.
270 1.1 cgd * XXX We are at the mercy of the card as we use a
271 1.1 cgd * polling loop and wait until it can take the byte.
272 1.1 cgd */
273 1.1 cgd static int
274 1.6 mycroft wdsp(u_short iobase, int v)
275 1.1 cgd {
276 1.1 cgd register int i;
277 1.1 cgd
278 1.1 cgd for (i = 100; --i >= 0; ) {
279 1.6 mycroft if ((inb(iobase + SBP_DSP_WSTAT) & SB_DSP_BUSY) != 0)
280 1.1 cgd continue;
281 1.6 mycroft outb(iobase + SBP_DSP_WRITE, v);
282 1.6 mycroft return 0;
283 1.1 cgd }
284 1.1 cgd ++sberr.wdsp;
285 1.6 mycroft return -1;
286 1.1 cgd }
287 1.1 cgd
288 1.1 cgd /*
289 1.1 cgd * Read a byte from the DSP, using polling.
290 1.1 cgd */
291 1.1 cgd int
292 1.6 mycroft rdsp(u_short iobase)
293 1.1 cgd {
294 1.1 cgd register int i;
295 1.1 cgd
296 1.1 cgd for (i = 100; --i >= 0; ) {
297 1.6 mycroft if ((inb(iobase + SBP_DSP_RSTAT) & SB_DSP_READY) == 0)
298 1.1 cgd continue;
299 1.6 mycroft return inb(iobase + SBP_DSP_READ);
300 1.1 cgd }
301 1.1 cgd ++sberr.rdsp;
302 1.6 mycroft return -1;
303 1.1 cgd }
304 1.1 cgd
305 1.1 cgd /*
306 1.1 cgd * Reset the card.
307 1.1 cgd * Return non-zero if the card isn't detected.
308 1.1 cgd */
309 1.1 cgd int
310 1.6 mycroft sbreset(sc)
311 1.6 mycroft struct sb_softc *sc;
312 1.1 cgd {
313 1.6 mycroft register u_short iobase = sc->sc_iobase;
314 1.1 cgd register int i;
315 1.6 mycroft
316 1.1 cgd /*
317 1.1 cgd * See SBK, section 11.3.
318 1.1 cgd * We pulse a reset signal into the card.
319 1.1 cgd * Gee, what a brilliant hardware design.
320 1.1 cgd */
321 1.6 mycroft outb(iobase + SBP_DSP_RESET, 1);
322 1.5 mycroft delay(3);
323 1.6 mycroft outb(iobase + SBP_DSP_RESET, 0);
324 1.6 mycroft if (rdsp(iobase) != SB_MAGIC)
325 1.6 mycroft return -1;
326 1.6 mycroft return 0;
327 1.1 cgd }
328 1.1 cgd
329 1.1 cgd /*
330 1.1 cgd * Turn on the speaker. The SBK documention says this operation
331 1.1 cgd * can take up to 1/10 of a second. Higher level layers should
332 1.1 cgd * probably let the task sleep for this amount of time after
333 1.1 cgd * calling here. Otherwise, things might not work (because
334 1.1 cgd * wdsp() and rdsp() will probably timeout.)
335 1.1 cgd *
336 1.1 cgd * These engineers had their heads up their ass when
337 1.1 cgd * they designed this card.
338 1.1 cgd */
339 1.1 cgd void
340 1.6 mycroft sb_spkron(sc)
341 1.6 mycroft struct sb_softc *sc;
342 1.1 cgd {
343 1.6 mycroft
344 1.6 mycroft (void)wdsp(sc->sc_iobase, SB_DSP_SPKR_ON);
345 1.6 mycroft /* XXX bogus */
346 1.5 mycroft delay(1000);
347 1.1 cgd }
348 1.1 cgd
349 1.1 cgd /*
350 1.1 cgd * Turn off the speaker; see comment above.
351 1.1 cgd */
352 1.1 cgd void
353 1.6 mycroft sb_spkroff(sc)
354 1.6 mycroft struct sb_softc *sc;
355 1.1 cgd {
356 1.6 mycroft
357 1.6 mycroft (void)wdsp(sc->sc_iobase, SB_DSP_SPKR_OFF);
358 1.1 cgd }
359 1.1 cgd
360 1.1 cgd /*
361 1.1 cgd * Read the version number out of the card. Return major code
362 1.1 cgd * in high byte, and minor code in low byte.
363 1.1 cgd */
364 1.1 cgd int
365 1.6 mycroft sbversion(sc)
366 1.6 mycroft struct sb_softc *sc;
367 1.1 cgd {
368 1.6 mycroft register u_short iobase = sc->sc_iobase;
369 1.1 cgd int v;
370 1.1 cgd
371 1.6 mycroft if (wdsp(iobase, SB_DSP_VERSION) < 0)
372 1.6 mycroft return 0;
373 1.6 mycroft v = rdsp(iobase) << 8;
374 1.6 mycroft v |= rdsp(iobase);
375 1.1 cgd return ((v >= 0) ? v : 0);
376 1.1 cgd }
377 1.1 cgd
378 1.1 cgd /*
379 1.1 cgd * Halt a DMA in progress. A low-speed transfer can be
380 1.1 cgd * resumed with sb_contdma().
381 1.1 cgd */
382 1.1 cgd void
383 1.6 mycroft sb_haltdma(sc)
384 1.6 mycroft struct sb_softc *sc;
385 1.1 cgd {
386 1.6 mycroft
387 1.1 cgd if (sc->sc_locked)
388 1.6 mycroft sbreset(sc);
389 1.1 cgd else
390 1.6 mycroft (void)wdsp(sc->sc_iobase, SB_DSP_HALT);
391 1.1 cgd }
392 1.1 cgd
393 1.1 cgd void
394 1.6 mycroft sb_contdma(sc)
395 1.6 mycroft struct sb_softc *sc;
396 1.1 cgd {
397 1.6 mycroft
398 1.6 mycroft (void)wdsp(sc->sc_iobase, SB_DSP_CONT);
399 1.1 cgd }
400 1.1 cgd
401 1.1 cgd /*
402 1.1 cgd * Time constant routines follow. See SBK, section 12.
403 1.1 cgd * Although they don't come out and say it (in the docs),
404 1.1 cgd * the card clearly uses a 1MHz countdown timer, as the
405 1.1 cgd * low-speed formula (p. 12-4) is:
406 1.1 cgd * tc = 256 - 10^6 / sr
407 1.1 cgd * In high-speed mode, the constant is the upper byte of a 16-bit counter,
408 1.1 cgd * and a 256MHz clock is used:
409 1.1 cgd * tc = 65536 - 256 * 10^ 6 / sr
410 1.1 cgd * Since we can only use the upper byte of the HS TC, the two formulae
411 1.1 cgd * are equivalent. (Why didn't they say so?) E.g.,
412 1.1 cgd * (65536 - 256 * 10 ^ 6 / x) >> 8 = 256 - 10^6 / x
413 1.1 cgd *
414 1.1 cgd * The crossover point (from low- to high-speed modes) is different
415 1.1 cgd * for the SBPRO and SB20. The table on p. 12-5 gives the following data:
416 1.1 cgd *
417 1.1 cgd * SBPRO SB20
418 1.1 cgd * ----- --------
419 1.1 cgd * input ls min 4 KHz 4 HJz
420 1.1 cgd * input ls max 23 KHz 13 KHz
421 1.1 cgd * input hs max 44.1 KHz 15 KHz
422 1.1 cgd * output ls min 4 KHz 4 KHz
423 1.1 cgd * output ls max 23 KHz 23 KHz
424 1.1 cgd * output hs max 44.1 KHz 44.1 KHz
425 1.1 cgd */
426 1.1 cgd #define SB_LS_MIN 0x06 /* 4000 Hz */
427 1.1 cgd #ifdef SBPRO
428 1.1 cgd #define SB_ADC_LS_MAX 0xd4 /* 22727 Hz */
429 1.1 cgd #define SB_ADC_HS_MAX 0xe9 /* 43478 Hz */
430 1.1 cgd #else
431 1.1 cgd #define SB_ADC_LS_MAX 0xb3 /* 12987 Hz */
432 1.1 cgd #define SB_ADC_HS_MAX 0xbd /* 14925 Hz */
433 1.1 cgd #endif
434 1.1 cgd #define SB_DAC_LS_MAX 0xd4 /* 22727 Hz */
435 1.1 cgd #define SB_DAC_HS_MAX 0xe9 /* 43478 Hz */
436 1.1 cgd
437 1.1 cgd /*
438 1.1 cgd * Convert a linear sampling rate into the DAC time constant.
439 1.1 cgd * Set *mode to indicate the high/low-speed DMA operation.
440 1.1 cgd * Because of limitations of the card, not all rates are possible.
441 1.1 cgd * We return the time constant of the closest possible rate.
442 1.1 cgd * The sampling rate limits are different for the DAC and ADC,
443 1.1 cgd * so isdac indicates output, and !isdac indicates input.
444 1.1 cgd */
445 1.1 cgd int
446 1.6 mycroft sb_srtotc(sr, mode, isdac)
447 1.6 mycroft int sr;
448 1.6 mycroft int *mode;
449 1.6 mycroft int isdac;
450 1.1 cgd {
451 1.1 cgd register int tc = 256 - 1000000 / sr;
452 1.1 cgd
453 1.1 cgd if (tc < SB_LS_MIN) {
454 1.1 cgd tc = SB_LS_MIN;
455 1.1 cgd *mode = SB_ADAC_LS;
456 1.1 cgd } else if (isdac) {
457 1.1 cgd if (tc < SB_DAC_LS_MAX)
458 1.1 cgd *mode = SB_ADAC_LS;
459 1.1 cgd else {
460 1.1 cgd *mode = SB_ADAC_HS;
461 1.1 cgd if (tc > SB_DAC_HS_MAX)
462 1.1 cgd tc = SB_DAC_HS_MAX;
463 1.1 cgd }
464 1.1 cgd } else {
465 1.1 cgd if (tc < SB_ADC_LS_MAX)
466 1.1 cgd *mode = SB_ADAC_LS;
467 1.1 cgd else {
468 1.1 cgd *mode = SB_ADAC_HS;
469 1.1 cgd if (tc > SB_ADC_HS_MAX)
470 1.1 cgd tc = SB_ADC_HS_MAX;
471 1.1 cgd }
472 1.1 cgd }
473 1.6 mycroft return tc;
474 1.1 cgd }
475 1.1 cgd
476 1.1 cgd /*
477 1.1 cgd * Convert a DAC time constant to a sampling rate.
478 1.1 cgd * See SBK, section 12.
479 1.1 cgd */
480 1.1 cgd int
481 1.6 mycroft sb_tctosr(tc)
482 1.6 mycroft int tc;
483 1.1 cgd {
484 1.1 cgd return (1000000 / (256 - tc));
485 1.1 cgd }
486 1.1 cgd
487 1.1 cgd int
488 1.6 mycroft sb_set_sr(sc, sr, isdac)
489 1.6 mycroft register struct sb_softc *sc;
490 1.6 mycroft u_long *sr;
491 1.6 mycroft int isdac;
492 1.1 cgd {
493 1.1 cgd register int tc;
494 1.1 cgd int mode;
495 1.1 cgd
496 1.1 cgd tc = sb_srtotc(*sr, &mode, isdac);
497 1.6 mycroft if (wdsp(sc->sc_iobase, SB_DSP_TIMECONST) < 0 ||
498 1.6 mycroft wdsp(sc->sc_iobase, tc) < 0)
499 1.6 mycroft return -1;
500 1.1 cgd
501 1.1 cgd *sr = sb_tctosr(tc);
502 1.1 cgd sc->sc_adacmode = mode;
503 1.1 cgd sc->sc_adactc = tc;
504 1.1 cgd
505 1.6 mycroft return 0;
506 1.1 cgd }
507 1.1 cgd
508 1.1 cgd int
509 1.6 mycroft sb_round_sr(sr, isdac)
510 1.6 mycroft u_long sr;
511 1.6 mycroft int isdac;
512 1.1 cgd {
513 1.1 cgd int mode, tc;
514 1.1 cgd
515 1.1 cgd tc = sb_srtotc(sr, &mode, isdac);
516 1.6 mycroft return sb_tctosr(tc);
517 1.1 cgd }
518 1.1 cgd
519 1.1 cgd int
520 1.6 mycroft sb_dma_input(sc, p, cc, intr, arg)
521 1.6 mycroft struct sb_softc *sc;
522 1.6 mycroft void *p;
523 1.6 mycroft int cc;
524 1.6 mycroft void (*intr)();
525 1.6 mycroft void *arg;
526 1.1 cgd {
527 1.6 mycroft register u_short iobase;
528 1.1 cgd
529 1.1 cgd at_dma(1, p, cc, sc->sc_dmachan);
530 1.1 cgd sc->sc_intr = intr;
531 1.1 cgd sc->sc_arg = arg;
532 1.6 mycroft iobase = sc->sc_iobase;
533 1.1 cgd --cc;
534 1.1 cgd if (sc->sc_adacmode == SB_ADAC_LS) {
535 1.6 mycroft if (wdsp(iobase, SB_DSP_RDMA) < 0 ||
536 1.6 mycroft wdsp(iobase, cc) < 0 ||
537 1.6 mycroft wdsp(iobase, cc >> 8) < 0) {
538 1.6 mycroft sbreset(sc);
539 1.6 mycroft return EIO;
540 1.1 cgd }
541 1.1 cgd } else {
542 1.6 mycroft if (wdsp(iobase, SB_DSP_BLOCKSIZE) < 0 ||
543 1.6 mycroft wdsp(iobase, cc) < 0 ||
544 1.6 mycroft wdsp(iobase, cc >> 8) < 0 ||
545 1.6 mycroft wdsp(iobase, SB_DSP_HS_INPUT) < 0) {
546 1.6 mycroft sbreset(sc);
547 1.6 mycroft return EIO;
548 1.1 cgd }
549 1.1 cgd sc->sc_locked = 1;
550 1.1 cgd }
551 1.6 mycroft return 0;
552 1.1 cgd }
553 1.1 cgd
554 1.1 cgd int
555 1.6 mycroft sb_dma_output(sc, p, cc, intr, arg)
556 1.6 mycroft struct sb_softc *sc;
557 1.6 mycroft void *p;
558 1.6 mycroft int cc;
559 1.6 mycroft void (*intr)();
560 1.6 mycroft void *arg;
561 1.1 cgd {
562 1.6 mycroft register u_short iobase;
563 1.1 cgd
564 1.1 cgd at_dma(0, p, cc, sc->sc_dmachan);
565 1.1 cgd sc->sc_intr = intr;
566 1.1 cgd sc->sc_arg = arg;
567 1.6 mycroft iobase = sc->sc_iobase;
568 1.1 cgd --cc;
569 1.1 cgd if (sc->sc_adacmode == SB_ADAC_LS) {
570 1.6 mycroft if (wdsp(iobase, SB_DSP_WDMA) < 0 ||
571 1.6 mycroft wdsp(iobase, cc) < 0 ||
572 1.6 mycroft wdsp(iobase, cc >> 8) < 0) {
573 1.6 mycroft sbreset(sc);
574 1.6 mycroft return EIO;
575 1.1 cgd }
576 1.1 cgd } else {
577 1.6 mycroft if (wdsp(iobase, SB_DSP_BLOCKSIZE) < 0 ||
578 1.6 mycroft wdsp(iobase, cc) < 0 ||
579 1.6 mycroft wdsp(iobase, cc >> 8) < 0 ||
580 1.6 mycroft wdsp(iobase, SB_DSP_HS_OUTPUT) < 0) {
581 1.6 mycroft sbreset(sc);
582 1.6 mycroft return EIO;
583 1.1 cgd }
584 1.1 cgd sc->sc_locked = 1;
585 1.1 cgd }
586 1.6 mycroft return 0;
587 1.1 cgd }
588 1.1 cgd
589 1.1 cgd /*
590 1.1 cgd * Only the DSP unit on the sound blaster generates interrupts.
591 1.1 cgd * There are three cases of interrupt: reception of a midi byte
592 1.1 cgd * (when mode is enabled), completion of dma transmission, or
593 1.1 cgd * completion of a dma reception. The three modes are mutually
594 1.1 cgd * exclusive so we know a priori which event has occurred.
595 1.1 cgd */
596 1.1 cgd int
597 1.7 mycroft sbintr(sc)
598 1.7 mycroft register struct sb_softc *sc;
599 1.1 cgd {
600 1.1 cgd
601 1.1 cgd sc->sc_locked = 0;
602 1.1 cgd /* clear interrupt */
603 1.6 mycroft inb(sc->sc_iobase + SBP_DSP_RSTAT);
604 1.1 cgd if (sc->sc_mintr != 0) {
605 1.6 mycroft int c = rdsp(sc->sc_iobase);
606 1.1 cgd (*sc->sc_mintr)(sc->sc_arg, c);
607 1.6 mycroft } else if (sc->sc_intr != 0)
608 1.3 deraadt (*sc->sc_intr)(sc->sc_arg);
609 1.6 mycroft else
610 1.6 mycroft return 0;
611 1.6 mycroft return 1;
612 1.1 cgd }
613 1.1 cgd
614 1.1 cgd /*
615 1.1 cgd * Enter midi uart mode and arrange for read interrupts
616 1.1 cgd * to vector to `intr'. This puts the card in a mode
617 1.1 cgd * which allows only midi I/O; the card must be reset
618 1.1 cgd * to leave this mode. Unfortunately, the card does not
619 1.1 cgd * use transmit interrupts, so bytes must be output
620 1.1 cgd * using polling. To keep the polling overhead to a
621 1.1 cgd * minimum, output should be driven off a timer.
622 1.1 cgd * This is a little tricky since only 320us separate
623 1.1 cgd * consecutive midi bytes.
624 1.1 cgd */
625 1.1 cgd void
626 1.6 mycroft sb_set_midi_mode(sc, intr, arg)
627 1.6 mycroft struct sb_softc *sc;
628 1.6 mycroft void (*intr)();
629 1.6 mycroft void *arg;
630 1.1 cgd {
631 1.6 mycroft
632 1.6 mycroft wdsp(sc->sc_iobase, SB_MIDI_UART_INTR);
633 1.1 cgd sc->sc_mintr = intr;
634 1.1 cgd sc->sc_intr = 0;
635 1.1 cgd sc->sc_arg = arg;
636 1.1 cgd }
637 1.1 cgd
638 1.1 cgd /*
639 1.1 cgd * Write a byte to the midi port, when in midi uart mode.
640 1.1 cgd */
641 1.1 cgd void
642 1.6 mycroft sb_midi_output(sc, v)
643 1.6 mycroft struct sb_softc *sc;
644 1.6 mycroft int v;
645 1.1 cgd {
646 1.6 mycroft
647 1.6 mycroft if (wdsp(sc->sc_iobase, v) < 0)
648 1.1 cgd ++sberr.wmidi;
649 1.1 cgd }
650