sb.c revision 1.1 1 /*
2 * Copyright (c) 1991-1993 Regents of the University of California.
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * 3. All advertising materials mentioning features or use of this software
14 * must display the following acknowledgement:
15 * This product includes software developed by the Computer Systems
16 * Engineering Group at Lawrence Berkeley Laboratory.
17 * 4. Neither the name of the University nor of the Laboratory may be used
18 * to endorse or promote products derived from this software without
19 * specific prior written permission.
20 *
21 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
22 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
23 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
24 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
25 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
26 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
27 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
28 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
29 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
30 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
31 * SUCH DAMAGE.
32 *
33 * $Id: sb.c,v 1.1 1994/01/09 19:35:08 cgd Exp $
34 */
35
36 #include "sb.h"
37 #if NSB > 0
38
39 #include <sys/param.h>
40 #include <sys/systm.h>
41 #include <sys/errno.h>
42 #include <sys/ioctl.h>
43 #include <sys/syslog.h>
44
45 #include <machine/cpu.h>
46 #include <machine/pio.h>
47
48 #include <i386/isa/isa.h>
49 #include <i386/isa/isa_device.h>
50 #include <i386/isa/icu.h>
51
52 #include "sbreg.h"
53
54 /*
55 * Software state, per SoundBlaster card.
56 * The soundblaster has multiple functionality, which we must demultiplex.
57 * One approach is to have one major device number for the soundblaster card,
58 * and use different minor numbers to indicate which hardware function
59 * we want. This would make for one large driver. Instead our approach
60 * is to partition the design into a set of drivers that share an underlying
61 * piece of hardware. Most things are hard to share, for example, the audio
62 * and midi ports. For audio, we might want to mix two processes' signals,
63 * and for midi we might want to merge streams (this is hard due to
64 * running status). Moreover, we should be able to re-use the high-level
65 * modules with other kinds of hardware. In this module, we only handle the
66 * most basic communications with the sb card.
67 */
68 struct sb_softc {
69 #ifdef NEWCONFIG
70 struct device sc_dev; /* base device */
71 struct isadev sc_id; /* ISA device */
72 struct intrhand sc_ih; /* interrupt vectoring */
73 #endif
74 u_short sc_open; /* reference count of open calls */
75 u_short sc_dmachan; /* dma channel */
76 u_long sc_locked; /* true when doing HS DMA */
77 u_long sc_base; /* I/O port base address */
78 u_short sc_adacmode; /* low/high speed mode indicator */
79 #define SB_ADAC_LS 0
80 #define SB_ADAC_HS 1
81 u_short sc_adactc; /* current adac time constant */
82 u_long sc_interrupts; /* number of interrupts taken */
83 void (*sc_intr)(void*); /* dma completion intr handler */
84 void (*sc_mintr)(void*, int);/* midi input intr handler */
85 void *sc_arg; /* arg for sc_intr() */
86 };
87
88 int sbreset(u_long);
89
90 void sb_spkron(struct sb_softc *);
91 void sb_spkroff(struct sb_softc *);
92
93 static int wdsp(u_long base, int v);
94 static int rdsp(u_long base);
95
96 /* XXX */
97 #define splsb splhigh
98 /* XXX */
99 struct sb_softc *sb_softc;
100
101 #ifndef NEWCONFIG
102 struct sb_softc sb_softcs[NSB];
103 #define at_dma(flags, ptr, cc, chan) isa_dmastart(flags, ptr, cc, chan)
104 #endif
105
106 struct {
107 int wdsp;
108 int rdsp;
109 int wmidi;
110 } sberr;
111
112 #ifdef NEWCONFIG
113 int sbintr(struct sb_softc *);
114 int sbprobe(struct device *, struct cfdata *, void *);
115 void sbattach(struct device *, struct device *, void *);
116 void sbforceintr(void *);
117
118 struct cfdriver sbcd =
119 { NULL, "sb", sbprobe, sbattach, sizeof(struct sb_softc) };
120
121 int
122 sbprobe(struct device *parent, struct cfdata *cf, void *aux)
123 {
124 register struct isa_attach_args *ia = (struct isa_attach_args *)aux;
125 register int base = ia->ia_iobase;
126
127 if (!SB_BASE_VALID(base)) {
128 printf("sb: configured dma chan %d invalid\n", ia->ia_drq);
129 return (0);
130 }
131 ia->ia_iosize = SB_NPORT;
132 if (sbreset(base) < 0) {
133 printf("sb: couldn't reset card\n");
134 return (0);
135 }
136 /*
137 * Cannot auto-discover DMA channel.
138 */
139 if (!SB_DRQ_VALID(ia->ia_drq)) {
140 printf("sb: configured dma chan %d invalid\n", ia->ia_drq);
141 return (0);
142 }
143 /*
144 * If the IRQ wasn't compiled in, auto-detect it.
145 */
146 if (ia->ia_irq == IRQUNK) {
147 ia->ia_irq = isa_discoverintr(sbforceintr, aux);
148 sbreset(base);
149 if (!SB_IRQ_VALID(ia->ia_irq)) {
150 printf("sb: couldn't auto-detect interrupt");
151 return (0);
152 }
153 } else if (!SB_IRQ_VALID(ia->ia_irq)) {
154 int irq = ffs(ia->ia_irq) - 1;
155 printf("sb: configured irq %d invalid\n", irq);
156 }
157 return (1);
158 }
159
160 void
161 sbforceintr(void *arg)
162 {
163 static char dmabuf;
164 struct isa_attach_args *ia = (struct isa_attach_args *)arg;
165 int base = ia->ia_iobase;
166 /*
167 * Set up a DMA read of one byte.
168 * XXX Note that at this point we haven't called
169 * at_setup_dmachan(). This is okay because it just
170 * allocates a buffer in case it needs to make a copy,
171 * and it won't need to make a copy for a 1 byte buffer.
172 * (I think that calling at_setup_dmachan() should be optional;
173 * if you don't call it, it will be called the first time
174 * it is needed (and you pay the latency). Also, you might
175 * never need the buffer anyway.)
176 */
177 at_dma(1, &dmabuf, 1, ia->ia_drq);
178 if (wdsp(base, SB_DSP_RDMA) == 0) {
179 (void)wdsp(base, 0);
180 (void)wdsp(base, 0);
181 }
182 }
183
184 void
185 sbattach(parent, self, aux)
186 struct device *parent, *self;
187 void *aux;
188 {
189 register struct sb_softc *sc = (struct sb_softc *)self;
190 struct isa_attach_args *ia = (struct isa_attach_args *)aux;
191 register int base = ia->ia_iobase;
192 register int vers;
193
194 /* XXX */
195 sb_softc = sc;
196
197 sc->sc_base = base;
198 sc->sc_dmachan = ia->ia_drq;
199 sc->sc_locked = 0;
200 isa_establish(&sc->sc_id, &sc->sc_dev);
201 sc->sc_ih.ih_fun = sbintr;
202 sc->sc_ih.ih_arg = (void *)sc;
203 /* XXX DV_TAPE? */
204 intr_establish(ia->ia_irq, &sc->sc_ih, DV_TAPE);
205
206 /*
207 * We limit DMA transfers to a page, and use the generic DMA handling
208 * code in isa.c. This code can end up copying a buffer, but since
209 * the audio driver uses relative small buffers this isn't likely.
210 *
211 * This allocation scheme means that the maximum transfer is limited
212 * by the page size (rather than 64k). This is reasonable. For 4K
213 * pages, the transfer time at 48KHz is 4096 / 48000 = 85ms. This
214 * is plenty long enough to amortize any fixed time overhead.
215 */
216 at_setup_dmachan(sc->sc_dmachan, NBPG);
217
218 vers = sbversion(base);
219 printf(" dsp v%d.%d\n", vers >> 8, vers & 0xff);
220 }
221 #endif
222
223 #ifndef NEWCONFIG
224 int sbintr(int unit);
225 int sbprobe(struct isa_device *dev);
226 int sbattach(struct isa_device *dev);
227
228 struct isa_driver sbdriver = { sbprobe, sbattach, "sb" };
229
230 int
231 sbprobe(struct isa_device *dev)
232 {
233 register int base = dev->id_iobase;
234
235 if (!SB_BASE_VALID(base)) {
236 printf("sb: configured dma chan %d invalid\n", dev->id_drq);
237 return (0);
238 }
239 if (sbreset(base) < 0) {
240 printf("sb: couldn't reset card\n");
241 return (0);
242 }
243 /*
244 * Cannot auto-discover DMA channel.
245 */
246 if (!SB_DRQ_VALID(dev->id_drq)) {
247 printf("sb: configured dma chan %d invalid\n", dev->id_drq);
248 return (0);
249 }
250 /*
251 * If the IRQ wasn't compiled in, auto-detect it.
252 */
253 if (dev->id_irq == 0) {
254 printf("sb: no irq configured\n");
255 return (0);
256 } else if (!SB_IRQ_VALID(dev->id_irq)) {
257 int irq = ffs(dev->id_irq) - 1;
258 printf("sb: configured irq %d invalid\n", irq);
259 return (0);
260 }
261 return (1);
262 }
263
264 #define UNIT(x) (minor(x) & 0xf)
265
266 int
267 sbattach(struct isa_device *dev)
268 {
269 int unit = UNIT(dev->id_unit);
270 register struct sb_softc *sc = &sb_softcs[unit];
271 register int base = dev->id_iobase;
272 register int vers;
273
274 /* XXX */
275 sb_softc = sc;
276
277 sc->sc_base = base;
278 sc->sc_dmachan = dev->id_drq;
279 sc->sc_locked = 0;
280
281 vers = sbversion(base);
282 printf("sb%d: dsp v%d.%d\n", unit, vers >> 8, vers & 0xff);
283 }
284 #endif
285
286 struct sb_softc *
287 sbopen()
288 {
289 struct sb_softc *sc = sb_softc;
290
291 if (sc == 0)
292 return 0;
293
294 if (sc->sc_open == 0 && sbreset(sc->sc_base) == 0) {
295 sc->sc_open = 1;
296 sc->sc_mintr = 0;
297 sc->sc_intr = 0;
298 return (sc);
299 }
300 return (0);
301 }
302
303 void
304 sbclose(struct sb_softc *sc)
305 {
306 sc->sc_open = 0;
307 sb_spkroff(sc);
308 sc->sc_intr = 0;
309 sc->sc_mintr = 0;
310 /* XXX this will turn off any dma */
311 sbreset(sc->sc_base);
312 }
313
314 /*
315 * Write a byte to the dsp.
316 * XXX We are at the mercy of the card as we use a
317 * polling loop and wait until it can take the byte.
318 */
319 static int
320 wdsp(u_long base, int v)
321 {
322 register int i;
323
324 for (i = 100; --i >= 0; ) {
325 if ((inb(base + SBP_DSP_WSTAT) & SB_DSP_BUSY) != 0)
326 continue;
327 outb(base + SBP_DSP_WRITE, v);
328 return (0);
329 }
330 ++sberr.wdsp;
331 return (-1);
332 }
333
334 /*
335 * Read a byte from the DSP, using polling.
336 */
337 int
338 rdsp(u_long base)
339 {
340 register int i;
341
342 for (i = 100; --i >= 0; ) {
343 if ((inb(base + SBP_DSP_RSTAT) & SB_DSP_READY) == 0)
344 continue;
345 return (inb(base + SBP_DSP_READ));
346 }
347 ++sberr.rdsp;
348 return (-1);
349 }
350
351 /*
352 * Reset the card.
353 * Return non-zero if the card isn't detected.
354 */
355 int
356 sbreset(register u_long base)
357 {
358 register int i;
359 /*
360 * See SBK, section 11.3.
361 * We pulse a reset signal into the card.
362 * Gee, what a brilliant hardware design.
363 */
364 outb(base + SBP_DSP_RESET, 1);
365 DELAY(3);
366 outb(base + SBP_DSP_RESET, 0);
367 if (rdsp(base) != SB_MAGIC)
368 return (-1);
369 return (0);
370 }
371
372 /*
373 * Turn on the speaker. The SBK documention says this operation
374 * can take up to 1/10 of a second. Higher level layers should
375 * probably let the task sleep for this amount of time after
376 * calling here. Otherwise, things might not work (because
377 * wdsp() and rdsp() will probably timeout.)
378 *
379 * These engineers had their heads up their ass when
380 * they designed this card.
381 */
382 void
383 sb_spkron(struct sb_softc *sc)
384 {
385 (void)wdsp(sc->sc_base, SB_DSP_SPKR_ON);
386 }
387
388 /*
389 * Turn off the speaker; see comment above.
390 */
391 void
392 sb_spkroff(struct sb_softc *sc)
393 {
394 (void)wdsp(sc->sc_base, SB_DSP_SPKR_OFF);
395 }
396
397 /*
398 * Read the version number out of the card. Return major code
399 * in high byte, and minor code in low byte.
400 */
401 int
402 sbversion(register u_long base)
403 {
404 int v;
405
406 if (wdsp(base, SB_DSP_VERSION) < 0)
407 return (0);
408 v = rdsp(base) << 8;
409 v |= rdsp(base);
410 return ((v >= 0) ? v : 0);
411 }
412
413 /*
414 * Halt a DMA in progress. A low-speed transfer can be
415 * resumed with sb_contdma().
416 */
417 void
418 sb_haltdma(struct sb_softc *sc)
419 {
420 if (sc->sc_locked)
421 sbreset(sc->sc_base);
422 else
423 (void)wdsp(sc->sc_base, SB_DSP_HALT);
424 }
425
426 void
427 sb_contdma(struct sb_softc *sc)
428 {
429 (void)wdsp(sc->sc_base, SB_DSP_CONT);
430 }
431
432 /*
433 * Time constant routines follow. See SBK, section 12.
434 * Although they don't come out and say it (in the docs),
435 * the card clearly uses a 1MHz countdown timer, as the
436 * low-speed formula (p. 12-4) is:
437 * tc = 256 - 10^6 / sr
438 * In high-speed mode, the constant is the upper byte of a 16-bit counter,
439 * and a 256MHz clock is used:
440 * tc = 65536 - 256 * 10^ 6 / sr
441 * Since we can only use the upper byte of the HS TC, the two formulae
442 * are equivalent. (Why didn't they say so?) E.g.,
443 * (65536 - 256 * 10 ^ 6 / x) >> 8 = 256 - 10^6 / x
444 *
445 * The crossover point (from low- to high-speed modes) is different
446 * for the SBPRO and SB20. The table on p. 12-5 gives the following data:
447 *
448 * SBPRO SB20
449 * ----- --------
450 * input ls min 4 KHz 4 HJz
451 * input ls max 23 KHz 13 KHz
452 * input hs max 44.1 KHz 15 KHz
453 * output ls min 4 KHz 4 KHz
454 * output ls max 23 KHz 23 KHz
455 * output hs max 44.1 KHz 44.1 KHz
456 */
457 #define SB_LS_MIN 0x06 /* 4000 Hz */
458 #ifdef SBPRO
459 #define SB_ADC_LS_MAX 0xd4 /* 22727 Hz */
460 #define SB_ADC_HS_MAX 0xe9 /* 43478 Hz */
461 #else
462 #define SB_ADC_LS_MAX 0xb3 /* 12987 Hz */
463 #define SB_ADC_HS_MAX 0xbd /* 14925 Hz */
464 #endif
465 #define SB_DAC_LS_MAX 0xd4 /* 22727 Hz */
466 #define SB_DAC_HS_MAX 0xe9 /* 43478 Hz */
467
468 /*
469 * Convert a linear sampling rate into the DAC time constant.
470 * Set *mode to indicate the high/low-speed DMA operation.
471 * Because of limitations of the card, not all rates are possible.
472 * We return the time constant of the closest possible rate.
473 * The sampling rate limits are different for the DAC and ADC,
474 * so isdac indicates output, and !isdac indicates input.
475 */
476 int
477 sb_srtotc(int sr, int *mode, int isdac)
478 {
479 register int tc = 256 - 1000000 / sr;
480
481 if (tc < SB_LS_MIN) {
482 tc = SB_LS_MIN;
483 *mode = SB_ADAC_LS;
484 } else if (isdac) {
485 if (tc < SB_DAC_LS_MAX)
486 *mode = SB_ADAC_LS;
487 else {
488 *mode = SB_ADAC_HS;
489 if (tc > SB_DAC_HS_MAX)
490 tc = SB_DAC_HS_MAX;
491 }
492 } else {
493 if (tc < SB_ADC_LS_MAX)
494 *mode = SB_ADAC_LS;
495 else {
496 *mode = SB_ADAC_HS;
497 if (tc > SB_ADC_HS_MAX)
498 tc = SB_ADC_HS_MAX;
499 }
500 }
501 return (tc);
502 }
503
504 /*
505 * Convert a DAC time constant to a sampling rate.
506 * See SBK, section 12.
507 */
508 int
509 sb_tctosr(int tc)
510 {
511 return (1000000 / (256 - tc));
512 }
513
514 int
515 sb_set_sr(register struct sb_softc *sc, u_long *sr, int isdac)
516 {
517 register int tc;
518 int mode;
519
520 tc = sb_srtotc(*sr, &mode, isdac);
521 if (wdsp(sc->sc_base, SB_DSP_TIMECONST) < 0 ||
522 wdsp(sc->sc_base, tc) < 0)
523 return (-1);
524
525 *sr = sb_tctosr(tc);
526 sc->sc_adacmode = mode;
527 sc->sc_adactc = tc;
528
529 return (0);
530 }
531
532 int
533 sb_round_sr(u_long sr, int isdac)
534 {
535 int mode, tc;
536
537 tc = sb_srtotc(sr, &mode, isdac);
538 return (sb_tctosr(tc));
539 }
540
541 int
542 sb_dma_input(struct sb_softc *sc, void *p, int cc, void (*intr)(), void *arg)
543 {
544 register int base;
545
546 at_dma(1, p, cc, sc->sc_dmachan);
547 sc->sc_intr = intr;
548 sc->sc_arg = arg;
549 base = sc->sc_base;
550 --cc;
551 if (sc->sc_adacmode == SB_ADAC_LS) {
552 if (wdsp(base, SB_DSP_RDMA) < 0 ||
553 wdsp(base, cc) < 0 ||
554 wdsp(base, cc >> 8) < 0) {
555 sbreset(sc->sc_base);
556 return (EIO);
557 }
558 } else {
559 if (wdsp(base, SB_DSP_BLOCKSIZE) < 0 ||
560 wdsp(base, cc) < 0 ||
561 wdsp(base, cc >> 8) < 0 ||
562 wdsp(base, SB_DSP_HS_INPUT) < 0) {
563 sbreset(sc->sc_base);
564 return (EIO);
565 }
566 sc->sc_locked = 1;
567 }
568 return (0);
569 }
570
571 int
572 sb_dma_output(struct sb_softc *sc, void *p, int cc, void (*intr)(), void *arg)
573 {
574 register int base;
575
576 at_dma(0, p, cc, sc->sc_dmachan);
577 sc->sc_intr = intr;
578 sc->sc_arg = arg;
579 base = sc->sc_base;
580 --cc;
581 if (sc->sc_adacmode == SB_ADAC_LS) {
582 if (wdsp(base, SB_DSP_WDMA) < 0 ||
583 wdsp(base, cc) < 0 ||
584 wdsp(base, cc >> 8) < 0) {
585 sbreset(sc->sc_base);
586 return (EIO);
587 }
588 } else {
589 if (wdsp(base, SB_DSP_BLOCKSIZE) < 0 ||
590 wdsp(base, cc) < 0 ||
591 wdsp(base, cc >> 8) < 0 ||
592 wdsp(base, SB_DSP_HS_OUTPUT) < 0) {
593 sbreset(sc->sc_base);
594 return (EIO);
595 }
596 sc->sc_locked = 1;
597 }
598 return (0);
599 }
600
601 /*
602 * Only the DSP unit on the sound blaster generates interrupts.
603 * There are three cases of interrupt: reception of a midi byte
604 * (when mode is enabled), completion of dma transmission, or
605 * completion of a dma reception. The three modes are mutually
606 * exclusive so we know a priori which event has occurred.
607 */
608 #ifdef NEWCONFIG
609 int
610 sbintr(struct sb_softc *sc)
611 {
612 #else
613 int
614 sbintr(int unit)
615 {
616 register struct sb_softc *sc = &sb_softcs[UNIT(unit)];
617 #endif
618
619 sc->sc_locked = 0;
620 /* clear interrupt */
621 inb(sc->sc_base + SBP_DSP_RSTAT);
622 if (sc->sc_mintr != 0) {
623 int c = rdsp(sc->sc_base);
624 (*sc->sc_mintr)(sc->sc_arg, c);
625 } else
626 (*sc->sc_intr)(sc->sc_arg);
627
628 return (1);
629 }
630
631 /*
632 * Enter midi uart mode and arrange for read interrupts
633 * to vector to `intr'. This puts the card in a mode
634 * which allows only midi I/O; the card must be reset
635 * to leave this mode. Unfortunately, the card does not
636 * use transmit interrupts, so bytes must be output
637
638
639 * using polling. To keep the polling overhead to a
640 * minimum, output should be driven off a timer.
641 * This is a little tricky since only 320us separate
642 * consecutive midi bytes.
643 */
644 void
645 sb_set_midi_mode(struct sb_softc *sc, void (*intr)(), void *arg)
646 {
647 wdsp(sc->sc_base, SB_MIDI_UART_INTR);
648 sc->sc_mintr = intr;
649 sc->sc_intr = 0;
650 sc->sc_arg = arg;
651 }
652
653 /*
654 * Write a byte to the midi port, when in midi uart mode.
655 */
656 void
657 sb_midi_output(struct sb_softc *sc, int v)
658 {
659 if (wdsp(sc->sc_base, v) < 0)
660 ++sberr.wmidi;
661 }
662 #endif
663