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smsc.c revision 1.12
      1  1.12  pgoyette /*	$NetBSD: smsc.c,v 1.12 2015/04/23 23:23:00 pgoyette Exp $ */
      2   1.1     blymn 
      3   1.1     blymn /*-
      4   1.1     blymn  * Copyright (c) 2007 The NetBSD Foundation, Inc.
      5   1.1     blymn  * All rights reserved.
      6   1.1     blymn  *
      7   1.1     blymn  * This code is derived from software contributed to The NetBSD Foundation
      8   1.1     blymn  * by Brett Lymn.
      9   1.1     blymn  *
     10   1.1     blymn  * Redistribution and use in source and binary forms, with or without
     11   1.1     blymn  * modification, are permitted provided that the following conditions
     12   1.1     blymn  * are met:
     13   1.1     blymn  * 1. Redistributions of source code must retain the above copyright
     14   1.1     blymn  *    notice, this list of conditions and the following disclaimer.
     15   1.1     blymn  * 2. Redistributions in binary form must reproduce the above copyright
     16   1.1     blymn  *    notice, this list of conditions and the following disclaimer in the
     17   1.1     blymn  *    documentation and/or other materials provided with the distribution.
     18   1.1     blymn  *
     19   1.1     blymn  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     20   1.1     blymn  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     21   1.1     blymn  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     22   1.1     blymn  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     23   1.1     blymn  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     24   1.1     blymn  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     25   1.1     blymn  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     26   1.1     blymn  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     27   1.1     blymn  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     28   1.1     blymn  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     29   1.1     blymn  * POSSIBILITY OF SUCH DAMAGE.
     30   1.1     blymn  */
     31   1.1     blymn 
     32   1.1     blymn /*
     33   1.1     blymn  * This is a driver for the Standard Microsystems Corp (SMSC)
     34   1.1     blymn  * LPC47B397 "super i/o" chip.  This driver only handles the environment
     35   1.1     blymn  * monitoring capabilities of the chip, the other functions will be
     36   1.1     blymn  * probed/matched as "normal" PC hardware devices (serial ports, fdc, so on).
     37   1.1     blymn  * SMSC has not deigned to release a datasheet for this particular chip
     38   1.1     blymn  * (though they do for others they make) so this driver was written from
     39   1.1     blymn  * information contained in the comment block for the Linux driver.
     40   1.1     blymn  */
     41   1.1     blymn 
     42   1.1     blymn #include <sys/cdefs.h>
     43  1.12  pgoyette __KERNEL_RCSID(0, "$NetBSD: smsc.c,v 1.12 2015/04/23 23:23:00 pgoyette Exp $");
     44   1.1     blymn 
     45   1.1     blymn #include <sys/param.h>
     46   1.1     blymn #include <sys/systm.h>
     47   1.1     blymn #include <sys/device.h>
     48  1.11  jmcneill #include <sys/module.h>
     49   1.4        ad #include <sys/bus.h>
     50   1.1     blymn 
     51   1.1     blymn #include <dev/isa/isareg.h>
     52   1.1     blymn #include <dev/isa/isavar.h>
     53   1.1     blymn 
     54   1.1     blymn #include <dev/sysmon/sysmonvar.h>
     55   1.1     blymn #include <dev/isa/smscvar.h>
     56   1.1     blymn 
     57   1.1     blymn #if defined(LMDEBUG)
     58   1.1     blymn #define DPRINTF(x)	do { printf x; } while (0)
     59   1.1     blymn #else
     60   1.1     blymn #define DPRINTF(x)
     61   1.1     blymn #endif
     62   1.1     blymn 
     63   1.7   xtraeme static int	smsc_match(device_t, cfdata_t, void *);
     64   1.7   xtraeme static void	smsc_attach(device_t, device_t, void *);
     65   1.7   xtraeme static int	smsc_detach(device_t, int);
     66   1.7   xtraeme 
     67   1.7   xtraeme static uint8_t	smsc_readreg(bus_space_tag_t, bus_space_handle_t, int);
     68   1.7   xtraeme static void 	smsc_writereg(bus_space_tag_t, bus_space_handle_t, int, int);
     69   1.1     blymn 
     70   1.5   xtraeme static void 	smsc_refresh(struct sysmon_envsys *, envsys_data_t *);
     71   1.1     blymn 
     72   1.7   xtraeme CFATTACH_DECL_NEW(smsc, sizeof(struct smsc_softc),
     73   1.5   xtraeme     smsc_match, smsc_attach, smsc_detach, NULL);
     74   1.1     blymn 
     75   1.1     blymn /*
     76   1.1     blymn  * Probe for the SMSC Super I/O chip
     77   1.1     blymn  */
     78   1.5   xtraeme static int
     79   1.7   xtraeme smsc_match(device_t parent, cfdata_t match, void *aux)
     80   1.1     blymn {
     81   1.1     blymn 	bus_space_handle_t ioh;
     82   1.1     blymn 	struct isa_attach_args *ia = aux;
     83   1.1     blymn 	int rv;
     84   1.1     blymn 	uint8_t cr;
     85   1.1     blymn 
     86   1.1     blymn 	/* Must supply an address */
     87   1.1     blymn 	if (ia->ia_nio < 1)
     88   1.1     blymn 		return 0;
     89   1.1     blymn 
     90   1.1     blymn 	if (ISA_DIRECT_CONFIG(ia))
     91   1.1     blymn 		return 0;
     92   1.1     blymn 
     93   1.1     blymn 	if (ia->ia_io[0].ir_addr == ISA_UNKNOWN_PORT)
     94   1.1     blymn 		return 0;
     95   1.1     blymn 
     96   1.1     blymn 	if (bus_space_map(ia->ia_iot, ia->ia_io[0].ir_addr, 2, 0, &ioh))
     97   1.1     blymn 		return 0;
     98   1.1     blymn 
     99   1.1     blymn 	/* To get the device ID we must enter config mode... */
    100   1.1     blymn 	bus_space_write_1(ia->ia_iot, ioh, SMSC_ADDR, SMSC_CONFIG_START);
    101   1.1     blymn 
    102   1.1     blymn 	/* Then select the device id register */
    103   1.7   xtraeme 	cr = smsc_readreg(ia->ia_iot, ioh, SMSC_DEVICE_ID);
    104   1.1     blymn 
    105   1.1     blymn 	/* Exit config mode, apparently this is important to do */
    106   1.1     blymn 	bus_space_write_1(ia->ia_iot, ioh, SMSC_ADDR, SMSC_CONFIG_END);
    107   1.1     blymn 
    108   1.7   xtraeme 	switch (cr) {
    109   1.7   xtraeme 	case SMSC_ID_47B397:
    110   1.7   xtraeme 	case SMSC_ID_SCH5307NS:
    111   1.7   xtraeme 	case SMSC_ID_SCH5317:
    112   1.1     blymn 		rv = 1;
    113   1.7   xtraeme 		break;
    114   1.7   xtraeme 	default:
    115   1.1     blymn 		rv = 0;
    116   1.7   xtraeme 		break;
    117   1.7   xtraeme 	}
    118   1.1     blymn 
    119   1.1     blymn 	DPRINTF(("smsc: rv = %d, cr = %x\n", rv, cr));
    120   1.1     blymn 
    121   1.1     blymn 	bus_space_unmap(ia->ia_iot, ioh, 2);
    122   1.1     blymn 
    123   1.1     blymn 	if (rv) {
    124   1.1     blymn 		ia->ia_nio = 1;
    125   1.1     blymn 		ia->ia_io[0].ir_size = 2;
    126   1.1     blymn 
    127   1.1     blymn 		ia->ia_niomem = 0;
    128   1.1     blymn 		ia->ia_nirq = 0;
    129   1.1     blymn 		ia->ia_ndrq = 0;
    130   1.1     blymn 	}
    131   1.1     blymn 
    132   1.1     blymn 	return rv;
    133   1.1     blymn }
    134   1.1     blymn 
    135   1.1     blymn /*
    136   1.1     blymn  * Get the base address for the monitoring registers and set up the
    137   1.7   xtraeme  * sysmon_envsys(9) framework.
    138   1.1     blymn  */
    139   1.5   xtraeme static void
    140   1.7   xtraeme smsc_attach(device_t parent, device_t self, void *aux)
    141   1.1     blymn {
    142   1.5   xtraeme 	struct smsc_softc *sc = device_private(self);
    143   1.1     blymn 	struct isa_attach_args *ia = aux;
    144   1.1     blymn 	bus_space_handle_t ioh;
    145   1.7   xtraeme 	uint8_t rev, msb, lsb, chipid;
    146   1.1     blymn 	unsigned address;
    147   1.5   xtraeme 	int i;
    148   1.1     blymn 
    149   1.5   xtraeme 	sc->sc_iot = ia->ia_iot;
    150   1.1     blymn 
    151   1.7   xtraeme 	aprint_naive("\n");
    152   1.7   xtraeme 
    153   1.7   xtraeme 	/*
    154   1.7   xtraeme 	 * To attach we need to find the actual Hardware Monitor
    155   1.7   xtraeme 	 * I/O address space.
    156   1.7   xtraeme 	 */
    157   1.1     blymn 	if (bus_space_map(ia->ia_iot, ia->ia_io[0].ir_addr, 2, 0,
    158   1.1     blymn 	    &ioh)) {
    159   1.1     blymn 		aprint_error(": can't map base i/o space\n");
    160   1.1     blymn 		return;
    161   1.1     blymn 	}
    162   1.1     blymn 
    163   1.7   xtraeme 	/* Enter config mode */
    164   1.1     blymn 	bus_space_write_1(ia->ia_iot, ioh, SMSC_ADDR, SMSC_CONFIG_START);
    165   1.1     blymn 
    166   1.7   xtraeme 	/*
    167   1.7   xtraeme 	 * While we have the base registers mapped, grab the chip
    168   1.7   xtraeme 	 * revision and device ID.
    169   1.7   xtraeme 	 */
    170   1.7   xtraeme 	rev = smsc_readreg(ia->ia_iot, ioh, SMSC_DEVICE_REVISION);
    171   1.7   xtraeme 	chipid = smsc_readreg(ia->ia_iot, ioh, SMSC_DEVICE_ID);
    172   1.7   xtraeme 
    173   1.7   xtraeme 	/* Select the Hardware Monitor LDN */
    174   1.7   xtraeme 	smsc_writereg(ia->ia_iot, ioh, SMSC_LOGICAL_DEV_SEL,
    175   1.7   xtraeme 	    SMSC_LOGICAL_DEVICE);
    176   1.1     blymn 
    177   1.1     blymn 	/* Read the base address for the registers. */
    178   1.7   xtraeme 	msb = smsc_readreg(ia->ia_iot, ioh, SMSC_IO_BASE_MSB);
    179   1.7   xtraeme 	lsb = smsc_readreg(ia->ia_iot, ioh, SMSC_IO_BASE_LSB);
    180   1.1     blymn 	address = (msb << 8) | lsb;
    181   1.1     blymn 
    182   1.1     blymn 	/* Exit config mode */
    183   1.1     blymn 	bus_space_write_1(ia->ia_iot, ioh, SMSC_ADDR, SMSC_CONFIG_END);
    184   1.1     blymn 	bus_space_unmap(ia->ia_iot, ioh, 2);
    185   1.1     blymn 
    186   1.7   xtraeme 	/* Map the Hardware Monitor I/O space. */
    187   1.5   xtraeme 	if (bus_space_map(ia->ia_iot, address, 2, 0, &sc->sc_ioh)) {
    188   1.1     blymn 		aprint_error(": can't map register i/o space\n");
    189   1.1     blymn 		return;
    190   1.1     blymn 	}
    191   1.1     blymn 
    192   1.5   xtraeme 	sc->sc_sme = sysmon_envsys_create();
    193   1.5   xtraeme 
    194   1.7   xtraeme #define INITSENSOR(index, string, reg, type) 			\
    195   1.7   xtraeme 	do {							\
    196   1.7   xtraeme 		strlcpy(sc->sc_sensor[index].desc, string,	\
    197   1.7   xtraeme 		    sizeof(sc->sc_sensor[index].desc));		\
    198   1.7   xtraeme 		sc->sc_sensor[index].units = type;		\
    199   1.7   xtraeme 		sc->sc_regs[index] = reg;			\
    200   1.7   xtraeme 		sc->sc_sensor[index].state = ENVSYS_SVALID;	\
    201   1.7   xtraeme 	} while (/* CONSTCOND */ 0)
    202   1.7   xtraeme 
    203   1.7   xtraeme 	/* Temperature sensors */
    204   1.7   xtraeme 	INITSENSOR(0, "Temp0", SMSC_TEMP1, ENVSYS_STEMP);
    205   1.7   xtraeme 	INITSENSOR(1, "Temp1", SMSC_TEMP2, ENVSYS_STEMP);
    206   1.7   xtraeme 	INITSENSOR(2, "Temp2", SMSC_TEMP3, ENVSYS_STEMP);
    207   1.7   xtraeme 	INITSENSOR(3, "Temp3", SMSC_TEMP4, ENVSYS_STEMP);
    208   1.7   xtraeme 
    209   1.7   xtraeme 	/* Fan sensors */
    210   1.7   xtraeme 	INITSENSOR(4, "Fan0", SMSC_FAN1_LSB, ENVSYS_SFANRPM);
    211   1.7   xtraeme 	INITSENSOR(5, "Fan1", SMSC_FAN2_LSB, ENVSYS_SFANRPM);
    212   1.7   xtraeme 	INITSENSOR(6, "Fan2", SMSC_FAN3_LSB, ENVSYS_SFANRPM);
    213   1.7   xtraeme 	INITSENSOR(7, "Fan3", SMSC_FAN4_LSB, ENVSYS_SFANRPM);
    214   1.5   xtraeme 
    215   1.7   xtraeme 	for (i = 0; i < SMSC_MAX_SENSORS; i++) {
    216  1.10  pgoyette 		sc->sc_sensor[i].state = ENVSYS_SINVALID;
    217   1.5   xtraeme 		if (sysmon_envsys_sensor_attach(sc->sc_sme,
    218   1.5   xtraeme 						&sc->sc_sensor[i])) {
    219   1.5   xtraeme 			sysmon_envsys_destroy(sc->sc_sme);
    220   1.7   xtraeme 			bus_space_unmap(sc->sc_iot, sc->sc_ioh, 2);
    221   1.5   xtraeme 			return;
    222   1.5   xtraeme 		}
    223   1.5   xtraeme 	}
    224   1.5   xtraeme 
    225   1.7   xtraeme 	sc->sc_sme->sme_name = device_xname(self);
    226   1.5   xtraeme 	sc->sc_sme->sme_cookie = sc;
    227   1.5   xtraeme 	sc->sc_sme->sme_refresh = smsc_refresh;
    228   1.5   xtraeme 
    229   1.5   xtraeme 	if ((i = sysmon_envsys_register(sc->sc_sme)) != 0) {
    230   1.7   xtraeme 		aprint_error(": unable to register with sysmon (%d)\n", i);
    231   1.5   xtraeme 		sysmon_envsys_destroy(sc->sc_sme);
    232   1.7   xtraeme 		bus_space_unmap(sc->sc_iot, sc->sc_ioh, 2);
    233   1.7   xtraeme 		return;
    234   1.7   xtraeme 	}
    235   1.7   xtraeme 
    236   1.7   xtraeme 	switch (chipid) {
    237   1.7   xtraeme 	case SMSC_ID_47B397:
    238   1.7   xtraeme 		aprint_normal(": SMSC LPC47B397 Super I/O");
    239   1.7   xtraeme 		break;
    240   1.7   xtraeme 	case SMSC_ID_SCH5307NS:
    241   1.7   xtraeme 		aprint_normal(": SMSC SCH5307-NS Super I/O");
    242   1.7   xtraeme 		break;
    243   1.7   xtraeme 	case SMSC_ID_SCH5317:
    244   1.7   xtraeme 		aprint_normal(": SMSC SCH5317 Super I/O");
    245   1.7   xtraeme 		break;
    246   1.5   xtraeme 	}
    247   1.5   xtraeme 
    248   1.7   xtraeme 	aprint_normal(" (rev %u)\n", rev);
    249   1.7   xtraeme 	aprint_normal_dev(self, "Hardware Monitor registers at 0x%04x\n",
    250   1.7   xtraeme 	    address);
    251   1.1     blymn }
    252   1.1     blymn 
    253   1.5   xtraeme static int
    254   1.9    cegger smsc_detach(device_t self, int flags)
    255   1.3   xtraeme {
    256   1.3   xtraeme 	struct smsc_softc *sc = device_private(self);
    257   1.3   xtraeme 
    258   1.5   xtraeme 	sysmon_envsys_unregister(sc->sc_sme);
    259   1.5   xtraeme 	bus_space_unmap(sc->sc_iot, sc->sc_ioh, 2);
    260   1.3   xtraeme 	return 0;
    261   1.3   xtraeme }
    262   1.1     blymn 
    263   1.1     blymn /*
    264   1.1     blymn  * Read the value of the given register
    265   1.1     blymn  */
    266   1.1     blymn static uint8_t
    267   1.7   xtraeme smsc_readreg(bus_space_tag_t iot, bus_space_handle_t ioh, int reg)
    268   1.1     blymn {
    269   1.7   xtraeme 	bus_space_write_1(iot, ioh, SMSC_ADDR, reg);
    270   1.7   xtraeme 	return bus_space_read_1(iot, ioh, SMSC_DATA);
    271   1.1     blymn }
    272   1.1     blymn 
    273   1.1     blymn /*
    274   1.7   xtraeme  * Write the given value to the given register.
    275   1.7   xtraeme  */
    276   1.1     blymn static void
    277   1.7   xtraeme smsc_writereg(bus_space_tag_t iot, bus_space_handle_t ioh, int reg, int val)
    278   1.1     blymn {
    279   1.7   xtraeme 	bus_space_write_1(iot, ioh, SMSC_ADDR, reg);
    280   1.7   xtraeme 	bus_space_write_1(iot, ioh, SMSC_DATA, val);
    281   1.5   xtraeme }
    282   1.1     blymn 
    283   1.1     blymn /* convert temperature read from the chip to micro kelvin */
    284   1.1     blymn static inline int
    285   1.1     blymn smsc_temp2muk(uint8_t t)
    286   1.1     blymn {
    287   1.1     blymn         int temp=t;
    288   1.1     blymn 
    289   1.1     blymn         return temp * 1000000 + 273150000U;
    290   1.1     blymn }
    291   1.1     blymn 
    292   1.1     blymn /*
    293   1.1     blymn  * convert register value read from chip into rpm using:
    294   1.1     blymn  *
    295   1.1     blymn  * RPM = 60/(Count * 11.111us)
    296   1.1     blymn  *
    297   1.1     blymn  * 1/1.1111us = 90kHz
    298   1.1     blymn  *
    299   1.1     blymn  */
    300   1.1     blymn static inline int
    301   1.1     blymn smsc_reg2rpm(unsigned int r)
    302   1.1     blymn {
    303   1.1     blymn 	unsigned long rpm;
    304   1.1     blymn 
    305   1.1     blymn         if (r == 0x0)
    306   1.1     blymn                 return 0;
    307   1.1     blymn 
    308   1.1     blymn 	rpm = (90000 * 60) / ((unsigned long) r);
    309   1.1     blymn         return (int) rpm;
    310   1.1     blymn }
    311   1.1     blymn 
    312   1.1     blymn /* min and max temperatures in uK */
    313   1.1     blymn #define SMSC_MIN_TEMP_UK ((-127 * 1000000) + 273150000)
    314   1.1     blymn #define SMSC_MAX_TEMP_UK ((127 * 1000000) + 273150000)
    315   1.1     blymn 
    316   1.1     blymn /*
    317   1.1     blymn  * Get the data for the requested sensor, update the sysmon structure
    318   1.1     blymn  * with the retrieved value.
    319   1.1     blymn  */
    320   1.5   xtraeme static void
    321   1.5   xtraeme smsc_refresh(struct sysmon_envsys *sme, envsys_data_t *edata)
    322   1.1     blymn {
    323   1.1     blymn 	struct smsc_softc *sc = sme->sme_cookie;
    324   1.5   xtraeme 	int reg;
    325   1.1     blymn 	unsigned int rpm;
    326   1.1     blymn 	uint8_t msb, lsb;
    327   1.1     blymn 
    328   1.5   xtraeme 	reg = sc->sc_regs[edata->sensor];
    329   1.1     blymn 
    330   1.2   xtraeme 	switch (edata->units) {
    331   1.1     blymn 	case ENVSYS_STEMP:
    332   1.7   xtraeme 		edata->value_cur =
    333   1.7   xtraeme 		    smsc_temp2muk(smsc_readreg(sc->sc_iot, sc->sc_ioh, reg));
    334   1.1     blymn 		break;
    335   1.1     blymn 
    336   1.1     blymn 	case ENVSYS_SFANRPM:
    337   1.1     blymn 		/* reading lsb first locks msb... */
    338   1.7   xtraeme 		lsb = smsc_readreg(sc->sc_iot, sc->sc_ioh, reg);
    339   1.7   xtraeme 		msb = smsc_readreg(sc->sc_iot, sc->sc_ioh, reg + 1);
    340   1.1     blymn 		rpm = (msb << 8) | lsb;
    341   1.2   xtraeme 		edata->value_cur = smsc_reg2rpm(rpm);
    342   1.1     blymn 		break;
    343   1.1     blymn 	}
    344   1.1     blymn }
    345  1.11  jmcneill 
    346  1.12  pgoyette MODULE(MODULE_CLASS_DRIVER, smsc, "sysmon_envsys");
    347  1.11  jmcneill 
    348  1.11  jmcneill #ifdef _MODULE
    349  1.11  jmcneill #include "ioconf.c"
    350  1.11  jmcneill #endif
    351  1.11  jmcneill 
    352  1.11  jmcneill static int
    353  1.11  jmcneill smsc_modcmd(modcmd_t cmd, void *opaque)
    354  1.11  jmcneill {
    355  1.11  jmcneill 	int error = 0;
    356  1.11  jmcneill 
    357  1.11  jmcneill 	switch (cmd) {
    358  1.11  jmcneill 	case MODULE_CMD_INIT:
    359  1.11  jmcneill #ifdef _MODULE
    360  1.11  jmcneill 		error = config_init_component(cfdriver_ioconf_smsc,
    361  1.11  jmcneill 		    cfattach_ioconf_smsc, cfdata_ioconf_smsc);
    362  1.11  jmcneill #endif
    363  1.11  jmcneill 		return error;
    364  1.11  jmcneill 	case MODULE_CMD_FINI:
    365  1.11  jmcneill #ifdef _MODULE
    366  1.11  jmcneill 		error = config_fini_component(cfdriver_ioconf_smsc,
    367  1.11  jmcneill 		    cfattach_ioconf_smsc, cfdata_ioconf_smsc);
    368  1.11  jmcneill #endif
    369  1.11  jmcneill 		return error;
    370  1.11  jmcneill 	default:
    371  1.11  jmcneill 		return ENOTTY;
    372  1.11  jmcneill 	}
    373  1.11  jmcneill }
    374