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smsc.c revision 1.2.10.1
      1  1.2.10.1     matt /*	$NetBSD: smsc.c,v 1.2.10.1 2007/11/06 23:28:00 matt Exp $ */
      2       1.1    blymn 
      3       1.1    blymn /*-
      4       1.1    blymn  * Copyright (c) 2007 The NetBSD Foundation, Inc.
      5       1.1    blymn  * All rights reserved.
      6       1.1    blymn  *
      7       1.1    blymn  * This code is derived from software contributed to The NetBSD Foundation
      8       1.1    blymn  * by Brett Lymn.
      9       1.1    blymn  *
     10       1.1    blymn  * Redistribution and use in source and binary forms, with or without
     11       1.1    blymn  * modification, are permitted provided that the following conditions
     12       1.1    blymn  * are met:
     13       1.1    blymn  * 1. Redistributions of source code must retain the above copyright
     14       1.1    blymn  *    notice, this list of conditions and the following disclaimer.
     15       1.1    blymn  * 2. Redistributions in binary form must reproduce the above copyright
     16       1.1    blymn  *    notice, this list of conditions and the following disclaimer in the
     17       1.1    blymn  *    documentation and/or other materials provided with the distribution.
     18       1.1    blymn  * 3. All advertising materials mentioning features or use of this software
     19       1.1    blymn  *    must display the following acknowledgement:
     20       1.1    blymn  *        This product includes software developed by the NetBSD
     21       1.1    blymn  *        Foundation, Inc. and its contributors.
     22       1.1    blymn  * 4. Neither the name of The NetBSD Foundation nor the names of its
     23       1.1    blymn  *    contributors may be used to endorse or promote products derived
     24       1.1    blymn  *    from this software without specific prior written permission.
     25       1.1    blymn  *
     26       1.1    blymn  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     27       1.1    blymn  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     28       1.1    blymn  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     29       1.1    blymn  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     30       1.1    blymn  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     31       1.1    blymn  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     32       1.1    blymn  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     33       1.1    blymn  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     34       1.1    blymn  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     35       1.1    blymn  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     36       1.1    blymn  * POSSIBILITY OF SUCH DAMAGE.
     37       1.1    blymn  */
     38       1.1    blymn 
     39       1.1    blymn /*
     40       1.1    blymn  * This is a driver for the Standard Microsystems Corp (SMSC)
     41       1.1    blymn  * LPC47B397 "super i/o" chip.  This driver only handles the environment
     42       1.1    blymn  * monitoring capabilities of the chip, the other functions will be
     43       1.1    blymn  * probed/matched as "normal" PC hardware devices (serial ports, fdc, so on).
     44       1.1    blymn  * SMSC has not deigned to release a datasheet for this particular chip
     45       1.1    blymn  * (though they do for others they make) so this driver was written from
     46       1.1    blymn  * information contained in the comment block for the Linux driver.
     47       1.1    blymn  */
     48       1.1    blymn 
     49       1.1    blymn #include <sys/cdefs.h>
     50  1.2.10.1     matt __KERNEL_RCSID(0, "$NetBSD: smsc.c,v 1.2.10.1 2007/11/06 23:28:00 matt Exp $");
     51       1.1    blymn 
     52       1.1    blymn #include <sys/param.h>
     53       1.1    blymn #include <sys/systm.h>
     54       1.1    blymn #include <sys/kernel.h>
     55       1.1    blymn #include <sys/malloc.h>
     56       1.1    blymn #include <sys/proc.h>
     57       1.1    blymn #include <sys/device.h>
     58       1.1    blymn #include <sys/conf.h>
     59       1.1    blymn #include <sys/time.h>
     60       1.1    blymn 
     61  1.2.10.1     matt #include <sys/bus.h>
     62       1.1    blymn 
     63       1.1    blymn #include <dev/isa/isareg.h>
     64       1.1    blymn #include <dev/isa/isavar.h>
     65       1.1    blymn 
     66       1.1    blymn #include <dev/sysmon/sysmonvar.h>
     67       1.1    blymn 
     68       1.1    blymn #include <dev/isa/smscvar.h>
     69       1.1    blymn 
     70  1.2.10.1     matt #include <sys/intr.h>
     71       1.1    blymn 
     72       1.1    blymn #if defined(LMDEBUG)
     73       1.1    blymn #define DPRINTF(x)	do { printf x; } while (0)
     74       1.1    blymn #else
     75       1.1    blymn #define DPRINTF(x)
     76       1.1    blymn #endif
     77       1.1    blymn 
     78       1.1    blymn int smsc_probe(struct device *, struct cfdata *, void *);
     79       1.1    blymn void smsc_attach(struct device *, struct device *, void *);
     80  1.2.10.1     matt int smsc_detach(struct device *, int);
     81       1.1    blymn static uint8_t smsc_readreg(struct smsc_softc *, int);
     82       1.1    blymn /*static void smsc_writereg(struct smsc_softc *, int, int);*/
     83       1.1    blymn void smsc_setup(struct smsc_softc *);
     84       1.1    blymn 
     85       1.2  xtraeme static int smsc_gtredata(struct sysmon_envsys *, envsys_data_t *);
     86       1.1    blymn 
     87       1.1    blymn CFATTACH_DECL(smsc, sizeof(struct smsc_softc),
     88  1.2.10.1     matt     smsc_probe, smsc_attach, smsc_detach, NULL);
     89       1.1    blymn 
     90       1.1    blymn struct smsc_sysmon {
     91       1.1    blymn 	struct sysmon_envsys sme;
     92       1.1    blymn 	struct smsc_softc *sc;
     93       1.2  xtraeme 	envsys_data_t smsc_sensor[];
     94       1.1    blymn };
     95       1.1    blymn 
     96       1.1    blymn /*
     97       1.1    blymn  * Probe for the SMSC Super I/O chip
     98       1.1    blymn  */
     99       1.1    blymn int
    100       1.1    blymn smsc_probe(struct device *parent, struct cfdata *match, void *aux)
    101       1.1    blymn {
    102       1.1    blymn 	bus_space_handle_t ioh;
    103       1.1    blymn 	struct isa_attach_args *ia = aux;
    104       1.1    blymn 	int rv;
    105       1.1    blymn 	uint8_t cr;
    106       1.1    blymn 
    107       1.1    blymn 	/* Must supply an address */
    108       1.1    blymn 	if (ia->ia_nio < 1)
    109       1.1    blymn 		return 0;
    110       1.1    blymn 
    111       1.1    blymn 	if (ISA_DIRECT_CONFIG(ia))
    112       1.1    blymn 		return 0;
    113       1.1    blymn 
    114       1.1    blymn 	if (ia->ia_io[0].ir_addr == ISA_UNKNOWN_PORT)
    115       1.1    blymn 		return 0;
    116       1.1    blymn 
    117       1.1    blymn 	if (bus_space_map(ia->ia_iot, ia->ia_io[0].ir_addr, 2, 0, &ioh))
    118       1.1    blymn 		return 0;
    119       1.1    blymn 
    120       1.1    blymn 	/* To get the device ID we must enter config mode... */
    121       1.1    blymn 	bus_space_write_1(ia->ia_iot, ioh, SMSC_ADDR, SMSC_CONFIG_START);
    122       1.1    blymn 
    123       1.1    blymn 	/* Then select the device id register */
    124       1.1    blymn 	bus_space_write_1(ia->ia_iot, ioh, SMSC_ADDR, SMSC_DEVICE_ID);
    125       1.1    blymn 
    126       1.1    blymn 	/* Finally, read the id from the chip */
    127       1.1    blymn 	cr = bus_space_read_1(ia->ia_iot, ioh, SMSC_DATA);
    128       1.1    blymn 
    129       1.1    blymn 	/* Exit config mode, apparently this is important to do */
    130       1.1    blymn 	bus_space_write_1(ia->ia_iot, ioh, SMSC_ADDR, SMSC_CONFIG_END);
    131       1.1    blymn 
    132       1.1    blymn 	if (cr == SMSC_ID)
    133       1.1    blymn 		rv = 1;
    134       1.1    blymn 	else
    135       1.1    blymn 		rv = 0;
    136       1.1    blymn 
    137       1.1    blymn 	DPRINTF(("smsc: rv = %d, cr = %x\n", rv, cr));
    138       1.1    blymn 
    139       1.1    blymn 	bus_space_unmap(ia->ia_iot, ioh, 2);
    140       1.1    blymn 
    141       1.1    blymn 	if (rv) {
    142       1.1    blymn 		ia->ia_nio = 1;
    143       1.1    blymn 		ia->ia_io[0].ir_size = 2;
    144       1.1    blymn 
    145       1.1    blymn 		ia->ia_niomem = 0;
    146       1.1    blymn 		ia->ia_nirq = 0;
    147       1.1    blymn 		ia->ia_ndrq = 0;
    148       1.1    blymn 	}
    149       1.1    blymn 
    150       1.1    blymn 	return rv;
    151       1.1    blymn }
    152       1.1    blymn 
    153       1.1    blymn /*
    154       1.1    blymn  * Get the base address for the monitoring registers and set up the
    155       1.1    blymn  * env sysmon framework.
    156       1.1    blymn  */
    157       1.1    blymn void
    158       1.1    blymn smsc_attach(struct device *parent, struct device *self, void *aux)
    159       1.1    blymn {
    160       1.1    blymn 	struct smsc_softc *smsc_sc = (void *)self;
    161       1.1    blymn 	struct isa_attach_args *ia = aux;
    162       1.1    blymn 	bus_space_handle_t ioh;
    163       1.1    blymn 	uint8_t rev, msb, lsb;
    164       1.1    blymn 	unsigned address;
    165       1.1    blymn 
    166       1.1    blymn 	smsc_sc->smsc_iot = ia->ia_iot;
    167       1.1    blymn 
    168       1.1    blymn 	/* To attach we need to find the actual i/o register space,
    169       1.1    blymn 	   map the base registers in first. */
    170       1.1    blymn 	if (bus_space_map(ia->ia_iot, ia->ia_io[0].ir_addr, 2, 0,
    171       1.1    blymn 	    &ioh)) {
    172       1.1    blymn 		aprint_error(": can't map base i/o space\n");
    173       1.1    blymn 		return;
    174       1.1    blymn 	}
    175       1.1    blymn 
    176       1.1    blymn 	/* Enter config mode. */
    177       1.1    blymn 	bus_space_write_1(ia->ia_iot, ioh, SMSC_ADDR, SMSC_CONFIG_START);
    178       1.1    blymn 
    179       1.1    blymn 	/* While we have the base registers mapped, grab the chip revision */
    180       1.1    blymn 	bus_space_write_1(ia->ia_iot, ioh, SMSC_ADDR, SMSC_DEVICE_REVISION);
    181       1.1    blymn 	rev = bus_space_read_1(ia->ia_iot, ioh, SMSC_DATA);
    182       1.1    blymn 
    183       1.1    blymn 	/* Select the correct logical device */
    184       1.1    blymn 	bus_space_write_1(ia->ia_iot, ioh, SMSC_ADDR, SMSC_LOGICAL_DEV_SEL);
    185       1.1    blymn 	bus_space_write_1(ia->ia_iot, ioh, SMSC_DATA, SMSC_LOGICAL_DEVICE);
    186       1.1    blymn 
    187       1.1    blymn 	/* Read the base address for the registers. */
    188       1.1    blymn 	bus_space_write_1(ia->ia_iot, ioh, SMSC_ADDR, SMSC_IO_BASE_MSB);
    189       1.1    blymn 	msb = bus_space_read_1(ia->ia_iot, ioh, SMSC_DATA);
    190       1.1    blymn 	bus_space_write_1(ia->ia_iot, ioh, SMSC_ADDR, SMSC_IO_BASE_LSB);
    191       1.1    blymn 	lsb = bus_space_read_1(ia->ia_iot, ioh, SMSC_DATA);
    192       1.1    blymn 	address = (msb << 8) | lsb;
    193       1.1    blymn 
    194       1.1    blymn 	/* Exit config mode */
    195       1.1    blymn 	bus_space_write_1(ia->ia_iot, ioh, SMSC_ADDR, SMSC_CONFIG_END);
    196       1.1    blymn 
    197       1.1    blymn 	bus_space_unmap(ia->ia_iot, ioh, 2);
    198       1.1    blymn 
    199       1.1    blymn 	/* Map the i/o space for the registers. */
    200       1.1    blymn 	if (bus_space_map(ia->ia_iot, address, 2, 0, &smsc_sc->smsc_ioh)) {
    201       1.1    blymn 		aprint_error(": can't map register i/o space\n");
    202       1.1    blymn 		return;
    203       1.1    blymn 	}
    204       1.1    blymn 
    205       1.1    blymn 	aprint_normal(": monitor registers at 0x%04x  (rev. %u)\n",
    206       1.1    blymn 	       address, rev);
    207       1.1    blymn 
    208       1.1    blymn 	smsc_setup(smsc_sc);
    209       1.1    blymn }
    210       1.1    blymn 
    211  1.2.10.1     matt int
    212  1.2.10.1     matt smsc_detach(struct device *self, int flags)
    213  1.2.10.1     matt {
    214  1.2.10.1     matt 	struct smsc_softc *sc = device_private(self);
    215  1.2.10.1     matt 
    216  1.2.10.1     matt 	sysmon_envsys_unregister(sc->smsc_sysmon);
    217  1.2.10.1     matt 	bus_space_unmap(sc->smsc_iot, sc->smsc_ioh, 2);
    218  1.2.10.1     matt 	return 0;
    219  1.2.10.1     matt }
    220       1.1    blymn 
    221       1.1    blymn /*
    222       1.1    blymn  * Read the value of the given register
    223       1.1    blymn  */
    224       1.1    blymn static uint8_t
    225       1.1    blymn smsc_readreg(struct smsc_softc *sc, int reg)
    226       1.1    blymn {
    227       1.1    blymn 	bus_space_write_1(sc->smsc_iot, sc->smsc_ioh, SMSC_ADDR, reg);
    228       1.1    blymn 	return bus_space_read_1(sc->smsc_iot, sc->smsc_ioh, SMSC_DATA);
    229       1.1    blymn }
    230       1.1    blymn 
    231       1.1    blymn 
    232       1.1    blymn /*
    233       1.1    blymn  * Write the given value to the given register - here just for completeness
    234       1.1    blymn  * it is unused in the current code.
    235       1.1    blymn 
    236       1.1    blymn static void
    237       1.1    blymn smsc_writereg (struct smsc_softc *sc, int reg, int val)
    238       1.1    blymn {
    239       1.1    blymn 	bus_space_write_1(sc->smsc_iot, sc->smsc_ioh, SMSC_ADDR, reg);
    240       1.1    blymn 	bus_space_write_1(sc->smsc_iot, sc->smsc_ioh, SMSC_DATA, val);
    241       1.1    blymn } */
    242       1.1    blymn 
    243       1.1    blymn /* convert temperature read from the chip to micro kelvin */
    244       1.1    blymn static inline int
    245       1.1    blymn smsc_temp2muk(uint8_t t)
    246       1.1    blymn {
    247       1.1    blymn         int temp=t;
    248       1.1    blymn 
    249       1.1    blymn         return temp * 1000000 + 273150000U;
    250       1.1    blymn }
    251       1.1    blymn 
    252       1.1    blymn /*
    253       1.1    blymn  * convert register value read from chip into rpm using:
    254       1.1    blymn  *
    255       1.1    blymn  * RPM = 60/(Count * 11.111us)
    256       1.1    blymn  *
    257       1.1    blymn  * 1/1.1111us = 90kHz
    258       1.1    blymn  *
    259       1.1    blymn  */
    260       1.1    blymn static inline int
    261       1.1    blymn smsc_reg2rpm(unsigned int r)
    262       1.1    blymn {
    263       1.1    blymn 	unsigned long rpm;
    264       1.1    blymn 
    265       1.1    blymn         if (r == 0x0)
    266       1.1    blymn                 return 0;
    267       1.1    blymn 
    268       1.1    blymn 	rpm = (90000 * 60) / ((unsigned long) r);
    269       1.1    blymn         return (int) rpm;
    270       1.1    blymn }
    271       1.1    blymn 
    272       1.1    blymn /* min and max temperatures in uK */
    273       1.1    blymn #define SMSC_MIN_TEMP_UK ((-127 * 1000000) + 273150000)
    274       1.1    blymn #define SMSC_MAX_TEMP_UK ((127 * 1000000) + 273150000)
    275       1.1    blymn 
    276       1.1    blymn /*
    277       1.1    blymn  * Set up the environment monitoring framework for all the devices
    278       1.1    blymn  * that we monitor.
    279       1.1    blymn  */
    280       1.1    blymn void
    281       1.1    blymn smsc_setup(struct smsc_softc *sc)
    282       1.1    blymn {
    283       1.1    blymn 	struct smsc_sysmon *datap;
    284       1.1    blymn 	int error, i;
    285       1.1    blymn 	char label[8];
    286       1.2  xtraeme 	envsys_data_t *edata;
    287       1.1    blymn 
    288       1.1    blymn 	datap = malloc(sizeof(struct sysmon_envsys) + SMSC_MAX_SENSORS *
    289       1.2  xtraeme 	    sizeof(envsys_data_t) + sizeof(void *),
    290       1.1    blymn 	    M_DEVBUF, M_WAITOK | M_ZERO);
    291       1.1    blymn 
    292       1.1    blymn 	for (i = 0; i < 4; i++) {
    293       1.2  xtraeme 		edata = &datap->smsc_sensor[i];
    294       1.1    blymn 		sprintf(label, "Temp-%d", i + 1);
    295       1.2  xtraeme 		strlcpy(edata->desc, label, sizeof(edata->desc));
    296       1.2  xtraeme 		edata->units = ENVSYS_STEMP;
    297       1.2  xtraeme 		edata->sensor = i;
    298       1.2  xtraeme 		edata->state = ENVSYS_SVALID;
    299       1.1    blymn 		switch (i) {
    300       1.1    blymn 		case 0:
    301       1.1    blymn 			sc->regs[i] = SMSC_TEMP1;
    302       1.1    blymn 			break;
    303       1.1    blymn 
    304       1.1    blymn 		case 1:
    305       1.1    blymn 			sc->regs[i] = SMSC_TEMP2;
    306       1.1    blymn 			break;
    307       1.1    blymn 
    308       1.1    blymn 		case 2:
    309       1.1    blymn 			sc->regs[i] = SMSC_TEMP3;
    310       1.1    blymn 			break;
    311       1.1    blymn 
    312       1.1    blymn 		case 3:
    313       1.1    blymn 			sc->regs[i] = SMSC_TEMP4;
    314       1.1    blymn 			break;
    315       1.1    blymn 		}
    316       1.1    blymn 
    317       1.1    blymn 	}
    318       1.1    blymn 
    319       1.1    blymn 	for (i = 4; i < SMSC_MAX_SENSORS; i++) {
    320       1.2  xtraeme 		edata = &datap->smsc_sensor[i];
    321       1.1    blymn 		sprintf(label, "Fan-%d", i - 3);
    322       1.2  xtraeme 		strlcpy(edata->desc, label, sizeof(edata->desc));
    323       1.2  xtraeme 		edata->units = ENVSYS_SFANRPM;
    324       1.2  xtraeme 		edata->sensor = i;
    325       1.2  xtraeme 		edata->units = ENVSYS_SFANRPM;
    326       1.2  xtraeme 		edata->state = ENVSYS_SVALID;
    327       1.1    blymn 
    328       1.1    blymn 		switch (i) {
    329       1.1    blymn 		case 4:
    330       1.1    blymn 			sc->regs[i] = SMSC_FAN1_LSB;
    331       1.1    blymn 			break;
    332       1.1    blymn 
    333       1.1    blymn 		case 5:
    334       1.1    blymn 			sc->regs[i] = SMSC_FAN2_LSB;
    335       1.1    blymn 			break;
    336       1.1    blymn 
    337       1.1    blymn 		case 6:
    338       1.1    blymn 			sc->regs[i] = SMSC_FAN3_LSB;
    339       1.1    blymn 			break;
    340       1.1    blymn 
    341       1.1    blymn 		case 7:
    342       1.1    blymn 			sc->regs[i] = SMSC_FAN4_LSB;
    343       1.1    blymn 			break;
    344       1.1    blymn 
    345       1.1    blymn 		default:
    346       1.1    blymn 			aprint_error(": more fans than expected");
    347       1.1    blymn 			break;
    348       1.1    blymn 		}
    349       1.1    blymn 	}
    350       1.1    blymn 
    351       1.1    blymn 	sc->smsc_sysmon = &datap->sme;
    352       1.1    blymn 	datap->sme.sme_nsensors = SMSC_MAX_SENSORS;
    353       1.2  xtraeme 	datap->sme.sme_sensor_data = datap->smsc_sensor;
    354       1.2  xtraeme 	datap->sme.sme_name = sc->sc_dev.dv_xname;
    355       1.1    blymn 	datap->sme.sme_cookie = sc;
    356       1.1    blymn 	datap->sme.sme_gtredata = smsc_gtredata;
    357       1.1    blymn 
    358       1.1    blymn 	if ((error = sysmon_envsys_register(&datap->sme)) != 0) {
    359       1.1    blymn 		aprint_error("%s: unable to register with sysmon (%d)\n",
    360       1.1    blymn 		    sc->sc_dev.dv_xname, error);
    361       1.1    blymn 		return;
    362       1.1    blymn 	}
    363       1.1    blymn 
    364       1.1    blymn }
    365       1.1    blymn 
    366       1.1    blymn /*
    367       1.1    blymn  * Get the data for the requested sensor, update the sysmon structure
    368       1.1    blymn  * with the retrieved value.
    369       1.1    blymn  */
    370       1.1    blymn static int
    371       1.2  xtraeme smsc_gtredata(struct sysmon_envsys *sme, envsys_data_t *edata)
    372       1.1    blymn {
    373       1.1    blymn 	struct smsc_softc *sc = sme->sme_cookie;
    374       1.1    blymn 	int i, reg;
    375       1.1    blymn 	unsigned int rpm;
    376       1.1    blymn 	uint8_t msb, lsb;
    377       1.1    blymn 
    378       1.2  xtraeme 	i = edata->sensor;
    379       1.1    blymn 	reg = sc->regs[i];
    380       1.1    blymn 
    381       1.2  xtraeme 	switch (edata->units) {
    382       1.1    blymn 	case ENVSYS_STEMP:
    383       1.2  xtraeme 		edata->value_cur = smsc_temp2muk(smsc_readreg(sc, reg));
    384       1.1    blymn 		break;
    385       1.1    blymn 
    386       1.1    blymn 	case ENVSYS_SFANRPM:
    387       1.1    blymn 		/* reading lsb first locks msb... */
    388       1.1    blymn 		lsb = smsc_readreg(sc, reg);
    389       1.1    blymn 		msb = smsc_readreg(sc, reg + 1); /* XXX note explicit
    390       1.1    blymn 						    assumption that msb is
    391       1.1    blymn 						    the next register along */
    392       1.1    blymn 		rpm = (msb << 8) | lsb;
    393       1.2  xtraeme 		edata->value_cur = smsc_reg2rpm(rpm);
    394       1.1    blymn 		break;
    395       1.1    blymn 	}
    396       1.1    blymn 
    397       1.2  xtraeme 	edata->state = ENVSYS_SVALID;
    398       1.1    blymn 	return 0;
    399       1.1    blymn }
    400