smsc.c revision 1.2.10.2 1 1.2.10.2 matt /* $NetBSD: smsc.c,v 1.2.10.2 2008/01/09 01:53:15 matt Exp $ */
2 1.1 blymn
3 1.1 blymn /*-
4 1.1 blymn * Copyright (c) 2007 The NetBSD Foundation, Inc.
5 1.1 blymn * All rights reserved.
6 1.1 blymn *
7 1.1 blymn * This code is derived from software contributed to The NetBSD Foundation
8 1.1 blymn * by Brett Lymn.
9 1.1 blymn *
10 1.1 blymn * Redistribution and use in source and binary forms, with or without
11 1.1 blymn * modification, are permitted provided that the following conditions
12 1.1 blymn * are met:
13 1.1 blymn * 1. Redistributions of source code must retain the above copyright
14 1.1 blymn * notice, this list of conditions and the following disclaimer.
15 1.1 blymn * 2. Redistributions in binary form must reproduce the above copyright
16 1.1 blymn * notice, this list of conditions and the following disclaimer in the
17 1.1 blymn * documentation and/or other materials provided with the distribution.
18 1.1 blymn * 3. All advertising materials mentioning features or use of this software
19 1.1 blymn * must display the following acknowledgement:
20 1.1 blymn * This product includes software developed by the NetBSD
21 1.1 blymn * Foundation, Inc. and its contributors.
22 1.1 blymn * 4. Neither the name of The NetBSD Foundation nor the names of its
23 1.1 blymn * contributors may be used to endorse or promote products derived
24 1.1 blymn * from this software without specific prior written permission.
25 1.1 blymn *
26 1.1 blymn * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
27 1.1 blymn * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
28 1.1 blymn * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
29 1.1 blymn * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
30 1.1 blymn * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
31 1.1 blymn * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
32 1.1 blymn * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
33 1.1 blymn * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
34 1.1 blymn * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
35 1.1 blymn * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
36 1.1 blymn * POSSIBILITY OF SUCH DAMAGE.
37 1.1 blymn */
38 1.1 blymn
39 1.1 blymn /*
40 1.1 blymn * This is a driver for the Standard Microsystems Corp (SMSC)
41 1.1 blymn * LPC47B397 "super i/o" chip. This driver only handles the environment
42 1.1 blymn * monitoring capabilities of the chip, the other functions will be
43 1.1 blymn * probed/matched as "normal" PC hardware devices (serial ports, fdc, so on).
44 1.1 blymn * SMSC has not deigned to release a datasheet for this particular chip
45 1.1 blymn * (though they do for others they make) so this driver was written from
46 1.1 blymn * information contained in the comment block for the Linux driver.
47 1.1 blymn */
48 1.1 blymn
49 1.1 blymn #include <sys/cdefs.h>
50 1.2.10.2 matt __KERNEL_RCSID(0, "$NetBSD: smsc.c,v 1.2.10.2 2008/01/09 01:53:15 matt Exp $");
51 1.1 blymn
52 1.1 blymn #include <sys/param.h>
53 1.1 blymn #include <sys/systm.h>
54 1.1 blymn #include <sys/kernel.h>
55 1.1 blymn #include <sys/malloc.h>
56 1.1 blymn #include <sys/proc.h>
57 1.1 blymn #include <sys/device.h>
58 1.1 blymn #include <sys/conf.h>
59 1.1 blymn #include <sys/time.h>
60 1.1 blymn
61 1.2.10.1 matt #include <sys/bus.h>
62 1.1 blymn
63 1.1 blymn #include <dev/isa/isareg.h>
64 1.1 blymn #include <dev/isa/isavar.h>
65 1.1 blymn
66 1.1 blymn #include <dev/sysmon/sysmonvar.h>
67 1.1 blymn
68 1.1 blymn #include <dev/isa/smscvar.h>
69 1.1 blymn
70 1.2.10.1 matt #include <sys/intr.h>
71 1.1 blymn
72 1.1 blymn #if defined(LMDEBUG)
73 1.1 blymn #define DPRINTF(x) do { printf x; } while (0)
74 1.1 blymn #else
75 1.1 blymn #define DPRINTF(x)
76 1.1 blymn #endif
77 1.1 blymn
78 1.2.10.2 matt static int smsc_match(struct device *, struct cfdata *, void *);
79 1.2.10.2 matt static void smsc_attach(struct device *, struct device *, void *);
80 1.2.10.2 matt static int smsc_detach(struct device *, int);
81 1.2.10.2 matt static uint8_t smsc_readreg(struct smsc_softc *, int);
82 1.1 blymn /*static void smsc_writereg(struct smsc_softc *, int, int);*/
83 1.1 blymn
84 1.2.10.2 matt static void smsc_refresh(struct sysmon_envsys *, envsys_data_t *);
85 1.1 blymn
86 1.1 blymn CFATTACH_DECL(smsc, sizeof(struct smsc_softc),
87 1.2.10.2 matt smsc_match, smsc_attach, smsc_detach, NULL);
88 1.1 blymn
89 1.1 blymn /*
90 1.1 blymn * Probe for the SMSC Super I/O chip
91 1.1 blymn */
92 1.2.10.2 matt static int
93 1.2.10.2 matt smsc_match(struct device *parent, struct cfdata *match, void *aux)
94 1.1 blymn {
95 1.1 blymn bus_space_handle_t ioh;
96 1.1 blymn struct isa_attach_args *ia = aux;
97 1.1 blymn int rv;
98 1.1 blymn uint8_t cr;
99 1.1 blymn
100 1.1 blymn /* Must supply an address */
101 1.1 blymn if (ia->ia_nio < 1)
102 1.1 blymn return 0;
103 1.1 blymn
104 1.1 blymn if (ISA_DIRECT_CONFIG(ia))
105 1.1 blymn return 0;
106 1.1 blymn
107 1.1 blymn if (ia->ia_io[0].ir_addr == ISA_UNKNOWN_PORT)
108 1.1 blymn return 0;
109 1.1 blymn
110 1.1 blymn if (bus_space_map(ia->ia_iot, ia->ia_io[0].ir_addr, 2, 0, &ioh))
111 1.1 blymn return 0;
112 1.1 blymn
113 1.1 blymn /* To get the device ID we must enter config mode... */
114 1.1 blymn bus_space_write_1(ia->ia_iot, ioh, SMSC_ADDR, SMSC_CONFIG_START);
115 1.1 blymn
116 1.1 blymn /* Then select the device id register */
117 1.1 blymn bus_space_write_1(ia->ia_iot, ioh, SMSC_ADDR, SMSC_DEVICE_ID);
118 1.1 blymn
119 1.1 blymn /* Finally, read the id from the chip */
120 1.1 blymn cr = bus_space_read_1(ia->ia_iot, ioh, SMSC_DATA);
121 1.1 blymn
122 1.1 blymn /* Exit config mode, apparently this is important to do */
123 1.1 blymn bus_space_write_1(ia->ia_iot, ioh, SMSC_ADDR, SMSC_CONFIG_END);
124 1.1 blymn
125 1.1 blymn if (cr == SMSC_ID)
126 1.1 blymn rv = 1;
127 1.1 blymn else
128 1.1 blymn rv = 0;
129 1.1 blymn
130 1.1 blymn DPRINTF(("smsc: rv = %d, cr = %x\n", rv, cr));
131 1.1 blymn
132 1.1 blymn bus_space_unmap(ia->ia_iot, ioh, 2);
133 1.1 blymn
134 1.1 blymn if (rv) {
135 1.1 blymn ia->ia_nio = 1;
136 1.1 blymn ia->ia_io[0].ir_size = 2;
137 1.1 blymn
138 1.1 blymn ia->ia_niomem = 0;
139 1.1 blymn ia->ia_nirq = 0;
140 1.1 blymn ia->ia_ndrq = 0;
141 1.1 blymn }
142 1.1 blymn
143 1.1 blymn return rv;
144 1.1 blymn }
145 1.1 blymn
146 1.1 blymn /*
147 1.1 blymn * Get the base address for the monitoring registers and set up the
148 1.1 blymn * env sysmon framework.
149 1.1 blymn */
150 1.2.10.2 matt static void
151 1.1 blymn smsc_attach(struct device *parent, struct device *self, void *aux)
152 1.1 blymn {
153 1.2.10.2 matt struct smsc_softc *sc = device_private(self);
154 1.1 blymn struct isa_attach_args *ia = aux;
155 1.1 blymn bus_space_handle_t ioh;
156 1.1 blymn uint8_t rev, msb, lsb;
157 1.1 blymn unsigned address;
158 1.2.10.2 matt char label[8];
159 1.2.10.2 matt int i;
160 1.1 blymn
161 1.2.10.2 matt sc->sc_iot = ia->ia_iot;
162 1.1 blymn
163 1.1 blymn /* To attach we need to find the actual i/o register space,
164 1.1 blymn map the base registers in first. */
165 1.1 blymn if (bus_space_map(ia->ia_iot, ia->ia_io[0].ir_addr, 2, 0,
166 1.1 blymn &ioh)) {
167 1.1 blymn aprint_error(": can't map base i/o space\n");
168 1.1 blymn return;
169 1.1 blymn }
170 1.1 blymn
171 1.1 blymn /* Enter config mode. */
172 1.1 blymn bus_space_write_1(ia->ia_iot, ioh, SMSC_ADDR, SMSC_CONFIG_START);
173 1.1 blymn
174 1.1 blymn /* While we have the base registers mapped, grab the chip revision */
175 1.1 blymn bus_space_write_1(ia->ia_iot, ioh, SMSC_ADDR, SMSC_DEVICE_REVISION);
176 1.1 blymn rev = bus_space_read_1(ia->ia_iot, ioh, SMSC_DATA);
177 1.1 blymn
178 1.1 blymn /* Select the correct logical device */
179 1.1 blymn bus_space_write_1(ia->ia_iot, ioh, SMSC_ADDR, SMSC_LOGICAL_DEV_SEL);
180 1.1 blymn bus_space_write_1(ia->ia_iot, ioh, SMSC_DATA, SMSC_LOGICAL_DEVICE);
181 1.1 blymn
182 1.1 blymn /* Read the base address for the registers. */
183 1.1 blymn bus_space_write_1(ia->ia_iot, ioh, SMSC_ADDR, SMSC_IO_BASE_MSB);
184 1.1 blymn msb = bus_space_read_1(ia->ia_iot, ioh, SMSC_DATA);
185 1.1 blymn bus_space_write_1(ia->ia_iot, ioh, SMSC_ADDR, SMSC_IO_BASE_LSB);
186 1.1 blymn lsb = bus_space_read_1(ia->ia_iot, ioh, SMSC_DATA);
187 1.1 blymn address = (msb << 8) | lsb;
188 1.1 blymn
189 1.1 blymn /* Exit config mode */
190 1.1 blymn bus_space_write_1(ia->ia_iot, ioh, SMSC_ADDR, SMSC_CONFIG_END);
191 1.1 blymn
192 1.1 blymn bus_space_unmap(ia->ia_iot, ioh, 2);
193 1.1 blymn
194 1.1 blymn /* Map the i/o space for the registers. */
195 1.2.10.2 matt if (bus_space_map(ia->ia_iot, address, 2, 0, &sc->sc_ioh)) {
196 1.1 blymn aprint_error(": can't map register i/o space\n");
197 1.1 blymn return;
198 1.1 blymn }
199 1.1 blymn
200 1.2.10.2 matt sc->sc_sme = sysmon_envsys_create();
201 1.2.10.2 matt
202 1.2.10.2 matt for (i = 0; i < 4; i++) {
203 1.2.10.2 matt sprintf(label, "Temp-%d", i);
204 1.2.10.2 matt strlcpy(sc->sc_sensor[i].desc, label,
205 1.2.10.2 matt sizeof(sc->sc_sensor[i].desc));
206 1.2.10.2 matt sc->sc_sensor[i].units = ENVSYS_STEMP;
207 1.2.10.2 matt switch (i) {
208 1.2.10.2 matt case 0:
209 1.2.10.2 matt sc->sc_regs[i] = SMSC_TEMP1;
210 1.2.10.2 matt break;
211 1.2.10.2 matt
212 1.2.10.2 matt case 1:
213 1.2.10.2 matt sc->sc_regs[i] = SMSC_TEMP2;
214 1.2.10.2 matt break;
215 1.2.10.2 matt
216 1.2.10.2 matt case 2:
217 1.2.10.2 matt sc->sc_regs[i] = SMSC_TEMP3;
218 1.2.10.2 matt break;
219 1.2.10.2 matt
220 1.2.10.2 matt case 3:
221 1.2.10.2 matt sc->sc_regs[i] = SMSC_TEMP4;
222 1.2.10.2 matt break;
223 1.2.10.2 matt }
224 1.2.10.2 matt if (sysmon_envsys_sensor_attach(sc->sc_sme,
225 1.2.10.2 matt &sc->sc_sensor[i])) {
226 1.2.10.2 matt sysmon_envsys_destroy(sc->sc_sme);
227 1.2.10.2 matt return;
228 1.2.10.2 matt }
229 1.2.10.2 matt
230 1.2.10.2 matt }
231 1.2.10.2 matt
232 1.2.10.2 matt for (i = 4; i < SMSC_MAX_SENSORS; i++) {
233 1.2.10.2 matt sprintf(label, "Fan-%d", i - 3);
234 1.2.10.2 matt strlcpy(sc->sc_sensor[i].desc, label,
235 1.2.10.2 matt sizeof(sc->sc_sensor[i].desc));
236 1.2.10.2 matt sc->sc_sensor[i].units = ENVSYS_SFANRPM;
237 1.2.10.2 matt switch (i) {
238 1.2.10.2 matt case 4:
239 1.2.10.2 matt sc->sc_regs[i] = SMSC_FAN1_LSB;
240 1.2.10.2 matt break;
241 1.2.10.2 matt
242 1.2.10.2 matt case 5:
243 1.2.10.2 matt sc->sc_regs[i] = SMSC_FAN2_LSB;
244 1.2.10.2 matt break;
245 1.2.10.2 matt
246 1.2.10.2 matt case 6:
247 1.2.10.2 matt sc->sc_regs[i] = SMSC_FAN3_LSB;
248 1.2.10.2 matt break;
249 1.2.10.2 matt
250 1.2.10.2 matt case 7:
251 1.2.10.2 matt sc->sc_regs[i] = SMSC_FAN4_LSB;
252 1.2.10.2 matt break;
253 1.2.10.2 matt
254 1.2.10.2 matt default:
255 1.2.10.2 matt aprint_error(": more fans than expected");
256 1.2.10.2 matt break;
257 1.2.10.2 matt }
258 1.2.10.2 matt if (sysmon_envsys_sensor_attach(sc->sc_sme,
259 1.2.10.2 matt &sc->sc_sensor[i])) {
260 1.2.10.2 matt sysmon_envsys_destroy(sc->sc_sme);
261 1.2.10.2 matt return;
262 1.2.10.2 matt }
263 1.2.10.2 matt }
264 1.2.10.2 matt
265 1.2.10.2 matt sc->sc_sme->sme_name = sc->sc_dev.dv_xname;
266 1.2.10.2 matt sc->sc_sme->sme_cookie = sc;
267 1.2.10.2 matt sc->sc_sme->sme_refresh = smsc_refresh;
268 1.2.10.2 matt
269 1.2.10.2 matt if ((i = sysmon_envsys_register(sc->sc_sme)) != 0) {
270 1.2.10.2 matt aprint_error("%s: unable to register with sysmon (%d)\n",
271 1.2.10.2 matt sc->sc_dev.dv_xname, i);
272 1.2.10.2 matt sysmon_envsys_destroy(sc->sc_sme);
273 1.2.10.2 matt }
274 1.2.10.2 matt
275 1.1 blymn aprint_normal(": monitor registers at 0x%04x (rev. %u)\n",
276 1.1 blymn address, rev);
277 1.1 blymn }
278 1.1 blymn
279 1.2.10.2 matt static int
280 1.2.10.1 matt smsc_detach(struct device *self, int flags)
281 1.2.10.1 matt {
282 1.2.10.1 matt struct smsc_softc *sc = device_private(self);
283 1.2.10.1 matt
284 1.2.10.2 matt sysmon_envsys_unregister(sc->sc_sme);
285 1.2.10.2 matt bus_space_unmap(sc->sc_iot, sc->sc_ioh, 2);
286 1.2.10.1 matt return 0;
287 1.2.10.1 matt }
288 1.1 blymn
289 1.1 blymn /*
290 1.1 blymn * Read the value of the given register
291 1.1 blymn */
292 1.1 blymn static uint8_t
293 1.1 blymn smsc_readreg(struct smsc_softc *sc, int reg)
294 1.1 blymn {
295 1.2.10.2 matt bus_space_write_1(sc->sc_iot, sc->sc_ioh, SMSC_ADDR, reg);
296 1.2.10.2 matt return bus_space_read_1(sc->sc_iot, sc->sc_ioh, SMSC_DATA);
297 1.1 blymn }
298 1.1 blymn
299 1.1 blymn
300 1.1 blymn /*
301 1.1 blymn * Write the given value to the given register - here just for completeness
302 1.1 blymn * it is unused in the current code.
303 1.1 blymn
304 1.1 blymn static void
305 1.1 blymn smsc_writereg (struct smsc_softc *sc, int reg, int val)
306 1.1 blymn {
307 1.2.10.2 matt bus_space_write_1(sc->sc_iot, sc->sc_ioh, SMSC_ADDR, reg);
308 1.2.10.2 matt bus_space_write_1(sc->sc_iot, sc->sc_ioh, SMSC_DATA, val);
309 1.2.10.2 matt }
310 1.2.10.2 matt */
311 1.1 blymn
312 1.1 blymn /* convert temperature read from the chip to micro kelvin */
313 1.1 blymn static inline int
314 1.1 blymn smsc_temp2muk(uint8_t t)
315 1.1 blymn {
316 1.1 blymn int temp=t;
317 1.1 blymn
318 1.1 blymn return temp * 1000000 + 273150000U;
319 1.1 blymn }
320 1.1 blymn
321 1.1 blymn /*
322 1.1 blymn * convert register value read from chip into rpm using:
323 1.1 blymn *
324 1.1 blymn * RPM = 60/(Count * 11.111us)
325 1.1 blymn *
326 1.1 blymn * 1/1.1111us = 90kHz
327 1.1 blymn *
328 1.1 blymn */
329 1.1 blymn static inline int
330 1.1 blymn smsc_reg2rpm(unsigned int r)
331 1.1 blymn {
332 1.1 blymn unsigned long rpm;
333 1.1 blymn
334 1.1 blymn if (r == 0x0)
335 1.1 blymn return 0;
336 1.1 blymn
337 1.1 blymn rpm = (90000 * 60) / ((unsigned long) r);
338 1.1 blymn return (int) rpm;
339 1.1 blymn }
340 1.1 blymn
341 1.1 blymn /* min and max temperatures in uK */
342 1.1 blymn #define SMSC_MIN_TEMP_UK ((-127 * 1000000) + 273150000)
343 1.1 blymn #define SMSC_MAX_TEMP_UK ((127 * 1000000) + 273150000)
344 1.1 blymn
345 1.1 blymn /*
346 1.1 blymn * Get the data for the requested sensor, update the sysmon structure
347 1.1 blymn * with the retrieved value.
348 1.1 blymn */
349 1.2.10.2 matt static void
350 1.2.10.2 matt smsc_refresh(struct sysmon_envsys *sme, envsys_data_t *edata)
351 1.1 blymn {
352 1.1 blymn struct smsc_softc *sc = sme->sme_cookie;
353 1.2.10.2 matt int reg;
354 1.1 blymn unsigned int rpm;
355 1.1 blymn uint8_t msb, lsb;
356 1.1 blymn
357 1.2.10.2 matt reg = sc->sc_regs[edata->sensor];
358 1.1 blymn
359 1.2 xtraeme switch (edata->units) {
360 1.1 blymn case ENVSYS_STEMP:
361 1.2 xtraeme edata->value_cur = smsc_temp2muk(smsc_readreg(sc, reg));
362 1.1 blymn break;
363 1.1 blymn
364 1.1 blymn case ENVSYS_SFANRPM:
365 1.1 blymn /* reading lsb first locks msb... */
366 1.1 blymn lsb = smsc_readreg(sc, reg);
367 1.1 blymn msb = smsc_readreg(sc, reg + 1); /* XXX note explicit
368 1.1 blymn assumption that msb is
369 1.1 blymn the next register along */
370 1.1 blymn rpm = (msb << 8) | lsb;
371 1.2 xtraeme edata->value_cur = smsc_reg2rpm(rpm);
372 1.1 blymn break;
373 1.1 blymn }
374 1.2 xtraeme edata->state = ENVSYS_SVALID;
375 1.1 blymn }
376