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tcic2_isa.c revision 1.27.18.1
      1 /*	$NetBSD: tcic2_isa.c,v 1.27.18.1 2020/04/13 08:04:22 martin Exp $	*/
      2 
      3 /*
      4  *
      5  * Copyright (c) 1998, 1999 Christoph Badura. All rights reserved.
      6  * Copyright (c) 1997 Marc Horowitz.  All rights reserved.
      7  *
      8  * Redistribution and use in source and binary forms, with or without
      9  * modification, are permitted provided that the following conditions
     10  * are met:
     11  * 1. Redistributions of source code must retain the above copyright
     12  *    notice, this list of conditions and the following disclaimer.
     13  * 2. Redistributions in binary form must reproduce the above copyright
     14  *    notice, this list of conditions and the following disclaimer in the
     15  *    documentation and/or other materials provided with the distribution.
     16  * 3. All advertising materials mentioning features or use of this software
     17  *    must display the following acknowledgement:
     18  *	This product includes software developed by Marc Horowitz.
     19  * 4. The name of the author may not be used to endorse or promote products
     20  *    derived from this software without specific prior written permission.
     21  *
     22  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
     23  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
     24  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
     25  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
     26  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
     27  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
     28  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
     29  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
     30  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
     31  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
     32  */
     33 
     34 #include <sys/cdefs.h>
     35 __KERNEL_RCSID(0, "$NetBSD: tcic2_isa.c,v 1.27.18.1 2020/04/13 08:04:22 martin Exp $");
     36 
     37 #include <sys/param.h>
     38 #include <sys/systm.h>
     39 #include <sys/device.h>
     40 #include <sys/extent.h>
     41 #include <sys/malloc.h>
     42 
     43 #include <sys/bus.h>
     44 #include <sys/intr.h>
     45 
     46 #include <dev/isa/isareg.h>
     47 #include <dev/isa/isavar.h>
     48 
     49 #include <dev/pcmcia/pcmciareg.h>
     50 #include <dev/pcmcia/pcmciavar.h>
     51 #include <dev/pcmcia/pcmciachip.h>
     52 
     53 #include <dev/ic/tcic2reg.h>
     54 #include <dev/ic/tcic2var.h>
     55 
     56 /*****************************************************************************
     57  * Configurable parameters.
     58  *****************************************************************************/
     59 
     60 #include "opt_tcic_isa_alloc_iobase.h"
     61 #include "opt_tcic_isa_alloc_iosize.h"
     62 #include "opt_tcic_isa_intr_alloc_mask.h"
     63 
     64 /*
     65  * Default I/O allocation range.  If both are set to non-zero, these
     66  * values will be used instead.  Otherwise, the code attempts to probe
     67  * the bus width.  Systems with 10 address bits should use 0x300 and 0xff.
     68  * Systems with 12 address bits (most) should use 0x400 and 0xbff.
     69  */
     70 
     71 #ifndef TCIC_ISA_ALLOC_IOBASE
     72 #define	TCIC_ISA_ALLOC_IOBASE		0
     73 #endif
     74 
     75 #ifndef TCIC_ISA_ALLOC_IOSIZE
     76 #define	TCIC_ISA_ALLOC_IOSIZE		0
     77 #endif
     78 
     79 int	tcic_isa_alloc_iobase = TCIC_ISA_ALLOC_IOBASE;
     80 int	tcic_isa_alloc_iosize = TCIC_ISA_ALLOC_IOSIZE;
     81 
     82 /*
     83  * Default IRQ allocation bitmask.  This defines the range of allowable
     84  * IRQs for PCMCIA slots.  Useful if order of probing would screw up other
     85  * devices, or if TCIC hardware/cards have trouble with certain interrupt
     86  * lines.
     87  *
     88  * We disable IRQ 10 by default, since some common laptops (namely, the
     89  * NEC Versa series) reserve IRQ 10 for the docking station SCSI interface.
     90  *
     91  * XXX Do we care about this?  the Versa doesn't use a tcic. -chb
     92  */
     93 
     94 #ifndef TCIC_ISA_INTR_ALLOC_MASK
     95 #define	TCIC_ISA_INTR_ALLOC_MASK	0xffff
     96 #endif
     97 
     98 int	tcic_isa_intr_alloc_mask = TCIC_ISA_INTR_ALLOC_MASK;
     99 
    100 /*****************************************************************************
    101  * End of configurable parameters.
    102  *****************************************************************************/
    103 
    104 #ifdef TCICISADEBUG
    105 int	tcic_isa_debug = 1;
    106 #define	DPRINTF(arg) if (tcic_isa_debug) printf arg;
    107 #else
    108 #define	DPRINTF(arg)
    109 #endif
    110 
    111 int	tcic_isa_probe(device_t, cfdata_t, void *);
    112 void	tcic_isa_attach(device_t, device_t, void *);
    113 
    114 void	*tcic_isa_chip_intr_establish(pcmcia_chipset_handle_t,
    115 	    struct pcmcia_function *, int, int (*) (void *), void *);
    116 void	tcic_isa_chip_intr_disestablish(pcmcia_chipset_handle_t, void *);
    117 
    118 CFATTACH_DECL_NEW(tcic_isa, sizeof(struct tcic_softc),
    119     tcic_isa_probe, tcic_isa_attach, NULL, NULL);
    120 
    121 static const struct pcmcia_chip_functions tcic_isa_functions = {
    122 	tcic_chip_mem_alloc,
    123 	tcic_chip_mem_free,
    124 	tcic_chip_mem_map,
    125 	tcic_chip_mem_unmap,
    126 
    127 	tcic_chip_io_alloc,
    128 	tcic_chip_io_free,
    129 	tcic_chip_io_map,
    130 	tcic_chip_io_unmap,
    131 
    132 	tcic_isa_chip_intr_establish,
    133 	tcic_isa_chip_intr_disestablish,
    134 
    135 	tcic_chip_socket_enable,
    136 	tcic_chip_socket_disable,
    137 	tcic_chip_socket_settype,
    138 
    139 	NULL,	/* card_detect */
    140 };
    141 
    142 int
    143 tcic_isa_probe(device_t parent, cfdata_t match, void *aux)
    144 {
    145 	struct isa_attach_args *ia = aux;
    146 	bus_space_tag_t iot = ia->ia_iot;
    147 	bus_space_handle_t ioh, memh;
    148 	int val, found, msize;
    149 
    150 	if (ia->ia_nio < 1)
    151 		return (0);
    152 	if (ia->ia_niomem < 1)
    153 		return (0);
    154 
    155 	if (ISA_DIRECT_CONFIG(ia))
    156 		return (0);
    157 
    158 	/* Disallow wildcarded i/o address. */
    159 	if (ia->ia_io[0].ir_addr == ISA_UNKNOWN_PORT)
    160 		return (0);
    161 	if (ia->ia_iomem[0].ir_addr == ISA_UNKNOWN_IOMEM)
    162 		return (0);
    163 
    164 	if (bus_space_map(iot, ia->ia_io[0].ir_addr, TCIC_IOSIZE, 0, &ioh))
    165 		return (0);
    166 
    167 	if (ia->ia_iomem[0].ir_size == ISA_UNKNOWN_IOSIZ)
    168 		msize = TCIC_MEMSIZE;
    169 	else
    170 		msize = ia->ia_iomem[0].ir_size;
    171 
    172 	if (bus_space_map(ia->ia_memt, ia->ia_iomem[0].ir_addr,
    173 	    msize, 0, &memh)) {
    174 		bus_space_unmap(iot, ioh, TCIC_IOSIZE);
    175 		return (0);
    176 	}
    177 
    178 	DPRINTF(("tcic probing 0x%03x\n", ia->ia_iomem[0].ir_addr));
    179 	found = 0;
    180 
    181 	/*
    182 	 * First, check for the reserved bits to be zero.
    183 	 */
    184 	if (tcic_check_reserved_bits(iot, ioh)) {
    185 		DPRINTF(("tcic: reserved bits checked OK\n"));
    186 		/* Second, check whether the we know how to handle the chip. */
    187 		if ((val = tcic_chipid(iot, ioh))) {
    188 			DPRINTF(("tcic id: 0x%02x\n", val));
    189 			if (tcic_chipid_known(val))
    190 				found++;
    191 		}
    192 	}
    193 	else {
    194 		DPRINTF(("tcic: reserved bits didn't check OK\n"));
    195 	}
    196 
    197 	bus_space_unmap(iot, ioh, TCIC_IOSIZE);
    198 	bus_space_unmap(ia->ia_memt, memh, msize);
    199 
    200 	if (!found)
    201 		return (0);
    202 
    203 	ia->ia_nio = 1;
    204 	ia->ia_io[0].ir_size = TCIC_IOSIZE;
    205 
    206 	ia->ia_niomem = 1;
    207 	ia->ia_iomem[0].ir_size = msize;
    208 
    209 	/* IRQ is special. */
    210 
    211 	ia->ia_ndrq = 0;
    212 
    213 	return (1);
    214 }
    215 
    216 void
    217 tcic_isa_attach(device_t parent, device_t self, void *aux)
    218 {
    219 	struct tcic_softc *sc = device_private(self);
    220 	struct isa_attach_args *ia = aux;
    221 	isa_chipset_tag_t ic = ia->ia_ic;
    222 	bus_space_tag_t iot = ia->ia_iot;
    223 	bus_space_tag_t memt = ia->ia_memt;
    224 	bus_space_handle_t ioh;
    225 	bus_space_handle_t memh;
    226 
    227 	sc->sc_dev = self;
    228 	aprint_naive("\n");
    229 
    230 	/* Map i/o space. */
    231 	if (bus_space_map(iot, ia->ia_io[0].ir_addr, TCIC_IOSIZE, 0, &ioh)) {
    232 		aprint_error(": can't map i/o space\n");
    233 		return;
    234 	}
    235 
    236 	/* Map mem space. */
    237 	if (bus_space_map(memt, ia->ia_iomem[0].ir_addr,
    238 	    ia->ia_iomem[0].ir_size, 0, &memh)) {
    239 		aprint_error(": can't map mem space\n");
    240 		return;
    241 	}
    242 
    243 	sc->membase = ia->ia_iomem[0].ir_addr;
    244 	sc->subregionmask =
    245 	    (1 << (ia->ia_iomem[0].ir_size / TCIC_MEM_PAGESIZE)) - 1;
    246 	sc->memsize2 = tcic_log2((u_int)ia->ia_iomem[0].ir_size);
    247 
    248 	sc->intr_est = ic;
    249 	sc->pct = (pcmcia_chipset_tag_t) & tcic_isa_functions;
    250 
    251 	sc->iot = iot;
    252 	sc->ioh = ioh;
    253 	sc->memt = memt;
    254 	sc->memh = memh;
    255 
    256 	/*
    257 	 * determine chip type and initialise some chip type dependend
    258 	 * parameters in softc.
    259 	 */
    260 	sc->chipid = tcic_chipid(iot, ioh);
    261 	sc->validirqs = tcic_validirqs(sc->chipid);
    262 
    263 	/*
    264 	 * allocate an irq.  interrupts are relatively
    265 	 * scarce but for TCIC controllers very infrequent.
    266 	 */
    267 
    268 	if (ia->ia_nirq < 1)
    269 		sc->irq = ISA_UNKNOWN_IRQ;
    270 	else
    271 		sc->irq = ia->ia_irq[0].ir_irq;
    272 	if (sc->irq == ISA_UNKNOWN_IRQ) {
    273 		if (isa_intr_alloc(ic,
    274 		    sc->validirqs & (tcic_isa_intr_alloc_mask & 0xff00),
    275 		    IST_EDGE, &sc->irq)) {
    276 			aprint_normal("\n");
    277 			aprint_error_dev(self, "can't allocate interrupt\n");
    278 			return;
    279 		}
    280 		aprint_normal(": using irq %d", sc->irq);
    281 	}
    282 	aprint_normal("\n");
    283 
    284 	tcic_attach(sc);
    285 
    286 
    287 	/*
    288 	 * XXX mycroft recommends I/O space range 0x400-0xfff.
    289 	 */
    290 
    291 	/*
    292 	 * XXX some hardware doesn't seem to grok addresses in 0x400 range--
    293 	 * apparently missing a bit or more of address lines. (e.g.
    294 	 * CIRRUS_PD672X with Linksys EthernetCard ne2000 clone in TI
    295 	 * TravelMate 5000--not clear which is at fault)
    296 	 *
    297 	 * Add a kludge to detect 10 bit wide buses and deal with them,
    298 	 * and also a config file option to override the probe.
    299 	 */
    300 
    301 #if 0
    302 	/*
    303 	 * This is what we'd like to use, but...
    304 	 */
    305 	sc->iobase = 0x400;
    306 	sc->iosize = 0xbff;
    307 #else
    308 	/*
    309 	 * ...the above bus width probe doesn't always work.
    310 	 * So, experimentation has shown the following range
    311 	 * to not lose on systems that 0x300-0x3ff loses on
    312 	 * (e.g. the NEC Versa 6030X).
    313 	 */
    314 	sc->iobase = 0x330;
    315 	sc->iosize = 0x0cf;
    316 #endif
    317 
    318 	DPRINTF(("%s: bus_space_alloc range 0x%04lx-0x%04lx)\n",
    319 	    device_xname(self), (long) sc->iobase,
    320 	    (long) sc->iobase + sc->iosize));
    321 
    322 	if (tcic_isa_alloc_iobase && tcic_isa_alloc_iosize) {
    323 		sc->iobase = tcic_isa_alloc_iobase;
    324 		sc->iosize = tcic_isa_alloc_iosize;
    325 
    326 		DPRINTF(("%s: bus_space_alloc range 0x%04lx-0x%04lx "
    327 		    "(config override)\n", device_xname(self),
    328 		    (long)sc->iobase, (long)sc->iobase + sc->iosize));
    329 	}
    330 	sc->ih = isa_intr_establish(ic, sc->irq, IST_EDGE, IPL_TTY,
    331 	    tcic_intr, sc);
    332 	if (sc->ih == NULL) {
    333 		aprint_error_dev(self, "can't establish interrupt\n");
    334 		return;
    335 	}
    336 
    337 	tcic_attach_sockets(sc);
    338 }
    339 
    340 void *
    341 tcic_isa_chip_intr_establish(pcmcia_chipset_handle_t pch,
    342     struct pcmcia_function *pf, int ipl, int (*fct)(void *), void *arg)
    343 {
    344 	struct tcic_handle *h = (struct tcic_handle *) pch;
    345 	int irq, ist;
    346 	void *ih;
    347 
    348 	DPRINTF(("%s: tcic_isa_chip_intr_establish\n",
    349 	    device_xname(h->sc->sc_dev)));
    350 
    351 	/* XXX should we convert level to pulse? -chb  */
    352 	if (pf->cfe->flags & PCMCIA_CFE_IRQLEVEL)
    353 		ist = IST_LEVEL;
    354 	else if (pf->cfe->flags & PCMCIA_CFE_IRQPULSE)
    355 		ist = IST_PULSE;
    356 	else
    357 		ist = IST_LEVEL;
    358 
    359 	if (isa_intr_alloc(h->sc->intr_est,
    360 	    h->sc->validirqs & tcic_isa_intr_alloc_mask, ist, &irq))
    361 		return (NULL);
    362 	if ((ih = isa_intr_establish(h->sc->intr_est, irq, ist, ipl,
    363 	    fct, arg)) == NULL)
    364 		return (NULL);
    365 
    366 	DPRINTF(("%s: intr estrablished\n", device_xname(h->sc->sc_dev)));
    367 
    368 	h->ih_irq = irq;
    369 
    370 	printf("%s: card irq %d\n", device_xname(h->pcmcia), irq);
    371 
    372 	return (ih);
    373 }
    374 
    375 void
    376 tcic_isa_chip_intr_disestablish(pcmcia_chipset_handle_t pch, void *ih)
    377 {
    378 	struct tcic_handle *h = (struct tcic_handle *) pch;
    379 	int val, reg;
    380 
    381 	DPRINTF(("%s: tcic_isa_chip_intr_disestablish\n",
    382 	    device_xname(h->sc->sc_dev)));
    383 
    384 	h->ih_irq = 0;
    385 
    386 	reg = TCIC_IR_SCF1_N(h->sock);
    387 	val = tcic_read_ind_2(h, reg);
    388 	val &= ~TCIC_SCF1_IRQ_MASK;
    389 	tcic_write_ind_2(h, reg, val);
    390 
    391 	isa_intr_disestablish(h->sc->intr_est, ih);
    392 }
    393