uha_isa.c revision 1.16 1 /* $NetBSD: uha_isa.c,v 1.16 1998/07/04 22:18:51 jonathan Exp $ */
2
3 /*
4 * Copyright (c) 1994, 1996, 1997 Charles M. Hannum. All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * 3. All advertising materials mentioning features or use of this software
15 * must display the following acknowledgement:
16 * This product includes software developed by Charles M. Hannum.
17 * 4. The name of the author may not be used to endorse or promote products
18 * derived from this software without specific prior written permission.
19 *
20 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
21 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
22 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
23 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
24 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
25 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
26 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
27 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
28 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
29 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
30 */
31
32 #include "opt_ddb.h"
33
34 #include <sys/types.h>
35 #include <sys/param.h>
36 #include <sys/systm.h>
37 #include <sys/device.h>
38 #include <sys/kernel.h>
39 #include <sys/proc.h>
40 #include <sys/user.h>
41
42 #include <machine/bus.h>
43 #include <machine/intr.h>
44
45 #include <dev/scsipi/scsi_all.h>
46 #include <dev/scsipi/scsipi_all.h>
47 #include <dev/scsipi/scsiconf.h>
48
49 #include <dev/isa/isavar.h>
50 #include <dev/isa/isadmavar.h>
51
52 #include <dev/ic/uhareg.h>
53 #include <dev/ic/uhavar.h>
54
55 #define UHA_ISA_IOSIZE 16
56
57 int uha_isa_probe __P((struct device *, struct cfdata *, void *));
58 void uha_isa_attach __P((struct device *, struct device *, void *));
59
60 struct cfattach uha_isa_ca = {
61 sizeof(struct uha_softc), uha_isa_probe, uha_isa_attach
62 };
63
64 #ifndef DDB
65 #define Debugger() panic("should call debugger here (uha_isa.c)")
66 #endif /* ! DDB */
67
68 int u14_find __P((bus_space_tag_t, bus_space_handle_t,
69 struct uha_probe_data *));
70 void u14_start_mbox __P((struct uha_softc *, struct uha_mscp *));
71 int u14_poll __P((struct uha_softc *, struct scsipi_xfer *, int));
72 int u14_intr __P((void *));
73 void u14_init __P((struct uha_softc *));
74
75 /*
76 * Check the slots looking for a board we recognise
77 * If we find one, note it's address (slot) and call
78 * the actual probe routine to check it out.
79 */
80 int
81 uha_isa_probe(parent, match, aux)
82 struct device *parent;
83 struct cfdata *match;
84 void *aux;
85 {
86 struct isa_attach_args *ia = aux;
87 bus_space_tag_t iot = ia->ia_iot;
88 bus_space_handle_t ioh;
89 struct uha_probe_data upd;
90 int rv;
91
92 /* Disallow wildcarded i/o address. */
93 if (ia->ia_iobase == ISACF_PORT_DEFAULT)
94 return (0);
95
96 if (bus_space_map(iot, ia->ia_iobase, UHA_ISA_IOSIZE, 0, &ioh))
97 return (0);
98
99 rv = u14_find(iot, ioh, &upd);
100
101 bus_space_unmap(iot, ioh, UHA_ISA_IOSIZE);
102
103 if (rv) {
104 if (ia->ia_irq != -1 && ia->ia_irq != upd.sc_irq)
105 return (0);
106 if (ia->ia_drq != -1 && ia->ia_drq != upd.sc_drq)
107 return (0);
108 ia->ia_irq = upd.sc_irq;
109 ia->ia_drq = upd.sc_drq;
110 ia->ia_msize = 0;
111 ia->ia_iosize = UHA_ISA_IOSIZE;
112 }
113 return (rv);
114 }
115
116 /*
117 * Attach all the sub-devices we can find
118 */
119 void
120 uha_isa_attach(parent, self, aux)
121 struct device *parent, *self;
122 void *aux;
123 {
124 struct isa_attach_args *ia = aux;
125 struct uha_softc *sc = (void *)self;
126 bus_space_tag_t iot = ia->ia_iot;
127 bus_dma_tag_t dmat = ia->ia_dmat;
128 bus_space_handle_t ioh;
129 struct uha_probe_data upd;
130 isa_chipset_tag_t ic = ia->ia_ic;
131 int error;
132
133 printf("\n");
134
135 if (bus_space_map(iot, ia->ia_iobase, UHA_ISA_IOSIZE, 0, &ioh)) {
136 printf("%s: can't map i/o space\n", sc->sc_dev.dv_xname);
137 return;
138 }
139
140 sc->sc_iot = iot;
141 sc->sc_ioh = ioh;
142 sc->sc_dmat = dmat;
143 if (!u14_find(iot, ioh, &upd)) {
144 printf("%s: u14_find failed\n", sc->sc_dev.dv_xname);
145 return;
146 }
147
148 if (upd.sc_drq != -1) {
149 sc->sc_dmaflags = 0;
150 if ((error = isa_dmacascade(ic, upd.sc_drq)) != 0) {
151 printf("%s: unable to cascade DRQ, error = %d\n",
152 sc->sc_dev.dv_xname, error);
153 return;
154 }
155 } else {
156 /*
157 * We have a VLB controller, and can do 32-bit DMA.
158 */
159 sc->sc_dmaflags = ISABUS_DMA_32BIT;
160 }
161
162 sc->sc_ih = isa_intr_establish(ic, upd.sc_irq, IST_EDGE, IPL_BIO,
163 u14_intr, sc);
164 if (sc->sc_ih == NULL) {
165 printf("%s: couldn't establish interrupt\n",
166 sc->sc_dev.dv_xname);
167 return;
168 }
169
170 /* Save function pointers for later use. */
171 sc->start_mbox = u14_start_mbox;
172 sc->poll = u14_poll;
173 sc->init = u14_init;
174
175 uha_attach(sc, &upd);
176 }
177
178 /*
179 * Start the board, ready for normal operation
180 */
181 int
182 u14_find(iot, ioh, sc)
183 bus_space_tag_t iot;
184 bus_space_handle_t ioh;
185 struct uha_probe_data *sc;
186 {
187 u_int16_t model, config;
188 int irq, drq;
189 int resetcount = 4000; /* 4 secs? */
190
191 model = (bus_space_read_1(iot, ioh, U14_ID + 0) << 8) |
192 (bus_space_read_1(iot, ioh, U14_ID + 1) << 0);
193 if ((model & 0xfff0) != 0x5640)
194 return (0);
195
196 config = (bus_space_read_1(iot, ioh, U14_CONFIG + 0) << 8) |
197 (bus_space_read_1(iot, ioh, U14_CONFIG + 1) << 0);
198
199 switch (model & 0x000f) {
200 case 0x0000:
201 switch (config & U14_DMA_MASK) {
202 case U14_DMA_CH5:
203 drq = 5;
204 break;
205 case U14_DMA_CH6:
206 drq = 6;
207 break;
208 case U14_DMA_CH7:
209 drq = 7;
210 break;
211 default:
212 printf("u14_find: illegal drq setting %x\n",
213 config & U14_DMA_MASK);
214 return (0);
215 }
216 break;
217 case 0x0001:
218 /* This is a 34f, and doesn't need an ISA DMA channel. */
219 drq = -1;
220 break;
221 default:
222 printf("u14_find: unknown model %x\n", model);
223 return (0);
224 }
225
226 switch (config & U14_IRQ_MASK) {
227 case U14_IRQ10:
228 irq = 10;
229 break;
230 case U14_IRQ11:
231 irq = 11;
232 break;
233 case U14_IRQ14:
234 irq = 14;
235 break;
236 case U14_IRQ15:
237 irq = 15;
238 break;
239 default:
240 printf("u14_find: illegal irq setting %x\n",
241 config & U14_IRQ_MASK);
242 return (0);
243 }
244
245 bus_space_write_1(iot, ioh, U14_LINT, UHA_ASRST);
246
247 while (--resetcount) {
248 if (bus_space_read_1(iot, ioh, U14_LINT))
249 break;
250 delay(1000); /* 1 mSec per loop */
251 }
252 if (!resetcount) {
253 printf("u14_find: board timed out during reset\n");
254 return (0);
255 }
256
257 /* if we want to fill in softc, do so now */
258 if (sc) {
259 sc->sc_irq = irq;
260 sc->sc_drq = drq;
261 sc->sc_scsi_dev = config & U14_HOSTID_MASK;
262 }
263
264 return (1);
265 }
266
267 /*
268 * Function to send a command out through a mailbox
269 */
270 void
271 u14_start_mbox(sc, mscp)
272 struct uha_softc *sc;
273 struct uha_mscp *mscp;
274 {
275 bus_space_tag_t iot = sc->sc_iot;
276 bus_space_handle_t ioh = sc->sc_ioh;
277 int spincount = 100000; /* 1s should be enough */
278
279 while (--spincount) {
280 if ((bus_space_read_1(iot, ioh, U14_LINT) & U14_LDIP) == 0)
281 break;
282 delay(100);
283 }
284 if (!spincount) {
285 printf("%s: uha_start_mbox, board not responding\n",
286 sc->sc_dev.dv_xname);
287 Debugger();
288 }
289
290 bus_space_write_4(iot, ioh, U14_OGMPTR,
291 sc->sc_dmamap_mscp->dm_segs[0].ds_addr + UHA_MSCP_OFF(mscp));
292 if (mscp->flags & MSCP_ABORT)
293 bus_space_write_1(iot, ioh, U14_LINT, U14_ABORT);
294 else
295 bus_space_write_1(iot, ioh, U14_LINT, U14_OGMFULL);
296
297 if ((mscp->xs->flags & SCSI_POLL) == 0)
298 timeout(uha_timeout, mscp, (mscp->timeout * hz) / 1000);
299 }
300
301 /*
302 * Function to poll for command completion when in poll mode.
303 *
304 * wait = timeout in msec
305 */
306 int
307 u14_poll(sc, xs, count)
308 struct uha_softc *sc;
309 struct scsipi_xfer *xs;
310 int count;
311 {
312 bus_space_tag_t iot = sc->sc_iot;
313 bus_space_handle_t ioh = sc->sc_ioh;
314
315 while (count) {
316 /*
317 * If we had interrupts enabled, would we
318 * have got an interrupt?
319 */
320 if (bus_space_read_1(iot, ioh, U14_SINT) & U14_SDIP)
321 u14_intr(sc);
322 if (xs->flags & ITSDONE)
323 return (0);
324 delay(1000);
325 count--;
326 }
327 return (1);
328 }
329
330 /*
331 * Catch an interrupt from the adaptor
332 */
333 int
334 u14_intr(arg)
335 void *arg;
336 {
337 struct uha_softc *sc = arg;
338 bus_space_tag_t iot = sc->sc_iot;
339 bus_space_handle_t ioh = sc->sc_ioh;
340 struct uha_mscp *mscp;
341 u_char uhastat;
342 u_long mboxval;
343
344 #ifdef UHADEBUG
345 printf("%s: uhaintr ", sc->sc_dev.dv_xname);
346 #endif /*UHADEBUG */
347
348 if ((bus_space_read_1(iot, ioh, U14_SINT) & U14_SDIP) == 0)
349 return (0);
350
351 for (;;) {
352 /*
353 * First get all the information and then
354 * acknowledge the interrupt
355 */
356 uhastat = bus_space_read_1(iot, ioh, U14_SINT);
357 mboxval = bus_space_read_4(iot, ioh, U14_ICMPTR);
358 /* XXX Send an ABORT_ACK instead? */
359 bus_space_write_1(iot, ioh, U14_SINT, U14_ICM_ACK);
360
361 #ifdef UHADEBUG
362 printf("status = 0x%x ", uhastat);
363 #endif /*UHADEBUG*/
364
365 /*
366 * Process the completed operation
367 */
368 mscp = uha_mscp_phys_kv(sc, mboxval);
369 if (!mscp) {
370 printf("%s: BAD MSCP RETURNED!\n",
371 sc->sc_dev.dv_xname);
372 continue; /* whatever it was, it'll timeout */
373 }
374
375 untimeout(uha_timeout, mscp);
376 uha_done(sc, mscp);
377
378 if ((bus_space_read_1(iot, ioh, U14_SINT) & U14_SDIP) == 0)
379 return (1);
380 }
381 }
382
383 void
384 u14_init(sc)
385 struct uha_softc *sc;
386 {
387 bus_space_tag_t iot = sc->sc_iot;
388 bus_space_handle_t ioh = sc->sc_ioh;
389
390 /* make sure interrupts are enabled */
391 #ifdef UHADEBUG
392 printf("u14_init: lmask=%02x, smask=%02x\n",
393 bus_space_read_1(iot, ioh, U14_LMASK),
394 bus_space_read_1(iot, ioh, U14_SMASK));
395 #endif
396 bus_space_write_1(iot, ioh, U14_LMASK, 0xd1); /* XXX */
397 bus_space_write_1(iot, ioh, U14_SMASK, 0x91); /* XXX */
398 }
399