uha_isa.c revision 1.2
1 /* $NetBSD: uha_isa.c,v 1.2 1996/09/01 00:20:24 mycroft Exp $ */ 2 3 /* 4 * Copyright (c) 1994, 1996 Charles M. Hannum. All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 3. All advertising materials mentioning features or use of this software 15 * must display the following acknowledgement: 16 * This product includes software developed by Charles M. Hannum. 17 * 4. The name of the author may not be used to endorse or promote products 18 * derived from this software without specific prior written permission. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 21 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 22 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 23 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 24 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 25 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 26 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 27 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 28 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 29 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 30 */ 31 32 #include <sys/types.h> 33 #include <sys/param.h> 34 #include <sys/device.h> 35 #include <sys/kernel.h> 36 #include <sys/proc.h> 37 #include <sys/user.h> 38 39 #include <machine/bus.h> 40 #include <machine/intr.h> 41 42 #include <scsi/scsi_all.h> 43 #include <scsi/scsiconf.h> 44 45 #include <dev/isa/isavar.h> 46 #include <dev/isa/isadmavar.h> 47 48 #include <dev/ic/uhareg.h> 49 #include <dev/ic/uhavar.h> 50 51 #define UHA_ISA_IOSIZE 16 52 53 int uha_isa_probe __P((struct device *, void *, void *)); 54 void uha_isa_attach __P((struct device *, struct device *, void *)); 55 56 struct cfattach uha_isa_ca = { 57 sizeof(struct uha_softc), uha_isa_probe, uha_isa_attach 58 }; 59 60 #define KVTOPHYS(x) vtophys(x) 61 62 int u14_find __P((bus_chipset_tag_t, bus_io_handle_t, struct uha_softc *)); 63 void u14_start_mbox __P((struct uha_softc *, struct uha_mscp *)); 64 int u14_poll __P((struct uha_softc *, struct scsi_xfer *, int)); 65 int u14_intr __P((void *)); 66 void u14_init __P((struct uha_softc *)); 67 68 /* 69 * Check the slots looking for a board we recognise 70 * If we find one, note it's address (slot) and call 71 * the actual probe routine to check it out. 72 */ 73 int 74 uha_isa_probe(parent, match, aux) 75 struct device *parent; 76 void *match, *aux; 77 { 78 struct isa_attach_args *ia = aux; 79 struct uha_softc sc; 80 bus_chipset_tag_t bc = ia->ia_bc; 81 bus_io_handle_t ioh; 82 isa_chipset_tag_t ic = ia->ia_ic; 83 int rv; 84 85 if (bus_io_map(bc, ia->ia_iobase, UHA_ISA_IOSIZE, &ioh)) 86 return (0); 87 88 rv = u14_find(bc, ioh, &sc); 89 90 bus_io_unmap(bc, ioh, UHA_ISA_IOSIZE); 91 92 if (rv) { 93 if (ia->ia_irq != -1 && ia->ia_irq != sc.sc_irq) 94 return (0); 95 if (ia->ia_drq != -1 && ia->ia_drq != sc.sc_drq) 96 return (0); 97 ia->ia_irq = sc.sc_irq; 98 ia->ia_drq = sc.sc_drq; 99 ia->ia_msize = 0; 100 ia->ia_iosize = UHA_ISA_IOSIZE; 101 } 102 return (rv); 103 } 104 105 /* 106 * Attach all the sub-devices we can find 107 */ 108 void 109 uha_isa_attach(parent, self, aux) 110 struct device *parent, *self; 111 void *aux; 112 { 113 struct isa_attach_args *ia = aux; 114 struct uha_softc *sc = (void *)self; 115 bus_chipset_tag_t bc = ia->ia_bc; 116 bus_io_handle_t ioh; 117 isa_chipset_tag_t ic = ia->ia_ic; 118 119 printf("\n"); 120 121 if (bus_io_map(bc, ia->ia_iobase, UHA_ISA_IOSIZE, &ioh)) 122 panic("uha_attach: bus_io_map failed!"); 123 124 sc->sc_bc = bc; 125 sc->sc_ioh = ioh; 126 if (!u14_find(bc, ioh, sc)) 127 panic("uha_attach: u14_find failed!"); 128 129 if (sc->sc_drq != -1) 130 isa_dmacascade(sc->sc_drq); 131 132 sc->sc_ih = isa_intr_establish(ic, sc->sc_irq, IST_EDGE, IPL_BIO, 133 u14_intr, sc); 134 if (sc->sc_ih == NULL) { 135 printf("%s: couldn't establish interrupt\n", 136 sc->sc_dev.dv_xname); 137 return; 138 } 139 140 /* Save function pointers for later use. */ 141 sc->start_mbox = u14_start_mbox; 142 sc->poll = u14_poll; 143 sc->init = u14_init; 144 145 uha_attach(sc); 146 } 147 148 /* 149 * Start the board, ready for normal operation 150 */ 151 int 152 u14_find(bc, ioh, sc) 153 bus_chipset_tag_t bc; 154 bus_io_handle_t ioh; 155 struct uha_softc *sc; 156 { 157 u_int16_t model, config; 158 int irq, drq; 159 int resetcount = 4000; /* 4 secs? */ 160 161 model = (bus_io_read_1(bc, ioh, U14_ID + 0) << 8) | 162 (bus_io_read_1(bc, ioh, U14_ID + 1) << 0); 163 if ((model & 0xfff0) != 0x5640) 164 return (0); 165 166 config = (bus_io_read_1(bc, ioh, U14_CONFIG + 0) << 8) | 167 (bus_io_read_1(bc, ioh, U14_CONFIG + 1) << 0); 168 169 switch (model & 0x000f) { 170 case 0x0000: 171 switch (config & U14_DMA_MASK) { 172 case U14_DMA_CH5: 173 drq = 5; 174 break; 175 case U14_DMA_CH6: 176 drq = 6; 177 break; 178 case U14_DMA_CH7: 179 drq = 7; 180 break; 181 default: 182 printf("u14_find: illegal drq setting %x\n", 183 config & U14_DMA_MASK); 184 return (0); 185 } 186 break; 187 case 0x0001: 188 /* This is a 34f, and doesn't need an ISA DMA channel. */ 189 drq = -1; 190 break; 191 } 192 193 switch (config & U14_IRQ_MASK) { 194 case U14_IRQ10: 195 irq = 10; 196 break; 197 case U14_IRQ11: 198 irq = 11; 199 break; 200 case U14_IRQ14: 201 irq = 14; 202 break; 203 case U14_IRQ15: 204 irq = 15; 205 break; 206 default: 207 printf("u14_find: illegal irq setting %x\n", 208 config & U14_IRQ_MASK); 209 return (0); 210 } 211 212 bus_io_write_1(bc, ioh, U14_LINT, UHA_ASRST); 213 214 while (--resetcount) { 215 if (bus_io_read_1(bc, ioh, U14_LINT)) 216 break; 217 delay(1000); /* 1 mSec per loop */ 218 } 219 if (!resetcount) { 220 printf("u14_find: board timed out during reset\n"); 221 return (0); 222 } 223 224 /* if we want to fill in softc, do so now */ 225 if (sc != NULL) { 226 sc->sc_irq = irq; 227 sc->sc_drq = drq; 228 sc->sc_scsi_dev = config & U14_HOSTID_MASK; 229 } 230 231 return (1); 232 } 233 234 /* 235 * Function to send a command out through a mailbox 236 */ 237 void 238 u14_start_mbox(sc, mscp) 239 struct uha_softc *sc; 240 struct uha_mscp *mscp; 241 { 242 bus_chipset_tag_t bc = sc->sc_bc; 243 bus_io_handle_t ioh = sc->sc_ioh; 244 int spincount = 100000; /* 1s should be enough */ 245 246 while (--spincount) { 247 if ((bus_io_read_1(bc, ioh, U14_LINT) & U14_LDIP) == 0) 248 break; 249 delay(100); 250 } 251 if (!spincount) { 252 printf("%s: uha_start_mbox, board not responding\n", 253 sc->sc_dev.dv_xname); 254 Debugger(); 255 } 256 257 bus_io_write_4(bc, ioh, U14_OGMPTR, KVTOPHYS(mscp)); 258 if (mscp->flags & MSCP_ABORT) 259 bus_io_write_1(bc, ioh, U14_LINT, U14_ABORT); 260 else 261 bus_io_write_1(bc, ioh, U14_LINT, U14_OGMFULL); 262 263 if ((mscp->xs->flags & SCSI_POLL) == 0) 264 timeout(uha_timeout, mscp, (mscp->timeout * hz) / 1000); 265 } 266 267 /* 268 * Function to poll for command completion when in poll mode. 269 * 270 * wait = timeout in msec 271 */ 272 int 273 u14_poll(sc, xs, count) 274 struct uha_softc *sc; 275 struct scsi_xfer *xs; 276 int count; 277 { 278 bus_chipset_tag_t bc = sc->sc_bc; 279 bus_io_handle_t ioh = sc->sc_ioh; 280 281 while (count) { 282 /* 283 * If we had interrupts enabled, would we 284 * have got an interrupt? 285 */ 286 if (bus_io_read_1(bc, ioh, U14_SINT) & U14_SDIP) 287 u14_intr(sc); 288 if (xs->flags & ITSDONE) 289 return (0); 290 delay(1000); 291 count--; 292 } 293 return (1); 294 } 295 296 /* 297 * Catch an interrupt from the adaptor 298 */ 299 int 300 u14_intr(arg) 301 void *arg; 302 { 303 struct uha_softc *sc = arg; 304 bus_chipset_tag_t bc = sc->sc_bc; 305 bus_io_handle_t ioh = sc->sc_ioh; 306 struct uha_mscp *mscp; 307 u_char uhastat; 308 u_long mboxval; 309 310 #ifdef UHADEBUG 311 printf("%s: uhaintr ", sc->sc_dev.dv_xname); 312 #endif /*UHADEBUG */ 313 314 if ((bus_io_read_1(bc, ioh, U14_SINT) & U14_SDIP) == 0) 315 return (0); 316 317 for (;;) { 318 /* 319 * First get all the information and then 320 * acknowledge the interrupt 321 */ 322 uhastat = bus_io_read_1(bc, ioh, U14_SINT); 323 mboxval = bus_io_read_4(bc, ioh, U14_ICMPTR); 324 /* XXX Send an ABORT_ACK instead? */ 325 bus_io_write_1(bc, ioh, U14_SINT, U14_ICM_ACK); 326 327 #ifdef UHADEBUG 328 printf("status = 0x%x ", uhastat); 329 #endif /*UHADEBUG*/ 330 331 /* 332 * Process the completed operation 333 */ 334 mscp = uha_mscp_phys_kv(sc, mboxval); 335 if (!mscp) { 336 printf("%s: BAD MSCP RETURNED!\n", 337 sc->sc_dev.dv_xname); 338 continue; /* whatever it was, it'll timeout */ 339 } 340 341 untimeout(uha_timeout, mscp); 342 uha_done(sc, mscp); 343 344 if ((bus_io_read_1(bc, ioh, U14_SINT) & U14_SDIP) == 0) 345 return (1); 346 } 347 } 348 349 void 350 u14_init(sc) 351 struct uha_softc *sc; 352 { 353 bus_chipset_tag_t bc = sc->sc_bc; 354 bus_io_handle_t ioh = sc->sc_ioh; 355 356 /* make sure interrupts are enabled */ 357 #ifdef UHADEBUG 358 printf("u14_init: lmask=%02x, smask=%02x\n", 359 bus_io_read_1(bc, ioh, U14_LMASK), 360 bus_io_read_1(bc, ioh, U14_SMASK)); 361 #endif 362 bus_io_write_1(bc, ioh, U14_LMASK, 0xd1); /* XXX */ 363 bus_io_write_1(bc, ioh, U14_SMASK, 0x91); /* XXX */ 364 } 365
Indexes created Tue Sep 30 20:09:53 GMT 2025