uha_isa.c revision 1.3
1 /* $NetBSD: uha_isa.c,v 1.3 1996/10/10 21:23:28 christos Exp $ */ 2 3 /* 4 * Copyright (c) 1994, 1996 Charles M. Hannum. All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 3. All advertising materials mentioning features or use of this software 15 * must display the following acknowledgement: 16 * This product includes software developed by Charles M. Hannum. 17 * 4. The name of the author may not be used to endorse or promote products 18 * derived from this software without specific prior written permission. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 21 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 22 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 23 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 24 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 25 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 26 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 27 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 28 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 29 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 30 */ 31 32 #include <sys/types.h> 33 #include <sys/param.h> 34 #include <sys/systm.h> 35 #include <sys/device.h> 36 #include <sys/kernel.h> 37 #include <sys/proc.h> 38 #include <sys/user.h> 39 40 #include <machine/bus.h> 41 #include <machine/intr.h> 42 43 #include <scsi/scsi_all.h> 44 #include <scsi/scsiconf.h> 45 46 #include <dev/isa/isavar.h> 47 #include <dev/isa/isadmavar.h> 48 49 #include <dev/ic/uhareg.h> 50 #include <dev/ic/uhavar.h> 51 52 #define UHA_ISA_IOSIZE 16 53 54 int uha_isa_probe __P((struct device *, void *, void *)); 55 void uha_isa_attach __P((struct device *, struct device *, void *)); 56 57 struct cfattach uha_isa_ca = { 58 sizeof(struct uha_softc), uha_isa_probe, uha_isa_attach 59 }; 60 61 #define KVTOPHYS(x) vtophys(x) 62 63 int u14_find __P((bus_chipset_tag_t, bus_io_handle_t, struct uha_softc *)); 64 void u14_start_mbox __P((struct uha_softc *, struct uha_mscp *)); 65 int u14_poll __P((struct uha_softc *, struct scsi_xfer *, int)); 66 int u14_intr __P((void *)); 67 void u14_init __P((struct uha_softc *)); 68 69 /* 70 * Check the slots looking for a board we recognise 71 * If we find one, note it's address (slot) and call 72 * the actual probe routine to check it out. 73 */ 74 int 75 uha_isa_probe(parent, match, aux) 76 struct device *parent; 77 void *match, *aux; 78 { 79 struct isa_attach_args *ia = aux; 80 struct uha_softc sc; 81 bus_chipset_tag_t bc = ia->ia_bc; 82 bus_io_handle_t ioh; 83 int rv; 84 85 if (bus_io_map(bc, ia->ia_iobase, UHA_ISA_IOSIZE, &ioh)) 86 return (0); 87 88 rv = u14_find(bc, ioh, &sc); 89 90 bus_io_unmap(bc, ioh, UHA_ISA_IOSIZE); 91 92 if (rv) { 93 if (ia->ia_irq != -1 && ia->ia_irq != sc.sc_irq) 94 return (0); 95 if (ia->ia_drq != -1 && ia->ia_drq != sc.sc_drq) 96 return (0); 97 ia->ia_irq = sc.sc_irq; 98 ia->ia_drq = sc.sc_drq; 99 ia->ia_msize = 0; 100 ia->ia_iosize = UHA_ISA_IOSIZE; 101 } 102 return (rv); 103 } 104 105 /* 106 * Attach all the sub-devices we can find 107 */ 108 void 109 uha_isa_attach(parent, self, aux) 110 struct device *parent, *self; 111 void *aux; 112 { 113 struct isa_attach_args *ia = aux; 114 struct uha_softc *sc = (void *)self; 115 bus_chipset_tag_t bc = ia->ia_bc; 116 bus_io_handle_t ioh; 117 isa_chipset_tag_t ic = ia->ia_ic; 118 119 kprintf("\n"); 120 121 if (bus_io_map(bc, ia->ia_iobase, UHA_ISA_IOSIZE, &ioh)) 122 panic("uha_attach: bus_io_map failed!"); 123 124 sc->sc_bc = bc; 125 sc->sc_ioh = ioh; 126 if (!u14_find(bc, ioh, sc)) 127 panic("uha_attach: u14_find failed!"); 128 129 if (sc->sc_drq != -1) 130 isa_dmacascade(sc->sc_drq); 131 132 sc->sc_ih = isa_intr_establish(ic, sc->sc_irq, IST_EDGE, IPL_BIO, 133 u14_intr, sc); 134 if (sc->sc_ih == NULL) { 135 kprintf("%s: couldn't establish interrupt\n", 136 sc->sc_dev.dv_xname); 137 return; 138 } 139 140 /* Save function pointers for later use. */ 141 sc->start_mbox = u14_start_mbox; 142 sc->poll = u14_poll; 143 sc->init = u14_init; 144 145 uha_attach(sc); 146 } 147 148 /* 149 * Start the board, ready for normal operation 150 */ 151 int 152 u14_find(bc, ioh, sc) 153 bus_chipset_tag_t bc; 154 bus_io_handle_t ioh; 155 struct uha_softc *sc; 156 { 157 u_int16_t model, config; 158 int irq, drq; 159 int resetcount = 4000; /* 4 secs? */ 160 161 model = (bus_io_read_1(bc, ioh, U14_ID + 0) << 8) | 162 (bus_io_read_1(bc, ioh, U14_ID + 1) << 0); 163 if ((model & 0xfff0) != 0x5640) 164 return (0); 165 166 config = (bus_io_read_1(bc, ioh, U14_CONFIG + 0) << 8) | 167 (bus_io_read_1(bc, ioh, U14_CONFIG + 1) << 0); 168 169 switch (model & 0x000f) { 170 case 0x0000: 171 switch (config & U14_DMA_MASK) { 172 case U14_DMA_CH5: 173 drq = 5; 174 break; 175 case U14_DMA_CH6: 176 drq = 6; 177 break; 178 case U14_DMA_CH7: 179 drq = 7; 180 break; 181 default: 182 kprintf("u14_find: illegal drq setting %x\n", 183 config & U14_DMA_MASK); 184 return (0); 185 } 186 break; 187 case 0x0001: 188 /* This is a 34f, and doesn't need an ISA DMA channel. */ 189 drq = -1; 190 break; 191 default: 192 kprintf("u14_find: unknown model %x\n", model); 193 return (0); 194 } 195 196 switch (config & U14_IRQ_MASK) { 197 case U14_IRQ10: 198 irq = 10; 199 break; 200 case U14_IRQ11: 201 irq = 11; 202 break; 203 case U14_IRQ14: 204 irq = 14; 205 break; 206 case U14_IRQ15: 207 irq = 15; 208 break; 209 default: 210 kprintf("u14_find: illegal irq setting %x\n", 211 config & U14_IRQ_MASK); 212 return (0); 213 } 214 215 bus_io_write_1(bc, ioh, U14_LINT, UHA_ASRST); 216 217 while (--resetcount) { 218 if (bus_io_read_1(bc, ioh, U14_LINT)) 219 break; 220 delay(1000); /* 1 mSec per loop */ 221 } 222 if (!resetcount) { 223 kprintf("u14_find: board timed out during reset\n"); 224 return (0); 225 } 226 227 /* if we want to fill in softc, do so now */ 228 if (sc != NULL) { 229 sc->sc_irq = irq; 230 sc->sc_drq = drq; 231 sc->sc_scsi_dev = config & U14_HOSTID_MASK; 232 } 233 234 return (1); 235 } 236 237 /* 238 * Function to send a command out through a mailbox 239 */ 240 void 241 u14_start_mbox(sc, mscp) 242 struct uha_softc *sc; 243 struct uha_mscp *mscp; 244 { 245 bus_chipset_tag_t bc = sc->sc_bc; 246 bus_io_handle_t ioh = sc->sc_ioh; 247 int spincount = 100000; /* 1s should be enough */ 248 249 while (--spincount) { 250 if ((bus_io_read_1(bc, ioh, U14_LINT) & U14_LDIP) == 0) 251 break; 252 delay(100); 253 } 254 if (!spincount) { 255 kprintf("%s: uha_start_mbox, board not responding\n", 256 sc->sc_dev.dv_xname); 257 Debugger(); 258 } 259 260 bus_io_write_4(bc, ioh, U14_OGMPTR, KVTOPHYS(mscp)); 261 if (mscp->flags & MSCP_ABORT) 262 bus_io_write_1(bc, ioh, U14_LINT, U14_ABORT); 263 else 264 bus_io_write_1(bc, ioh, U14_LINT, U14_OGMFULL); 265 266 if ((mscp->xs->flags & SCSI_POLL) == 0) 267 timeout(uha_timeout, mscp, (mscp->timeout * hz) / 1000); 268 } 269 270 /* 271 * Function to poll for command completion when in poll mode. 272 * 273 * wait = timeout in msec 274 */ 275 int 276 u14_poll(sc, xs, count) 277 struct uha_softc *sc; 278 struct scsi_xfer *xs; 279 int count; 280 { 281 bus_chipset_tag_t bc = sc->sc_bc; 282 bus_io_handle_t ioh = sc->sc_ioh; 283 284 while (count) { 285 /* 286 * If we had interrupts enabled, would we 287 * have got an interrupt? 288 */ 289 if (bus_io_read_1(bc, ioh, U14_SINT) & U14_SDIP) 290 u14_intr(sc); 291 if (xs->flags & ITSDONE) 292 return (0); 293 delay(1000); 294 count--; 295 } 296 return (1); 297 } 298 299 /* 300 * Catch an interrupt from the adaptor 301 */ 302 int 303 u14_intr(arg) 304 void *arg; 305 { 306 struct uha_softc *sc = arg; 307 bus_chipset_tag_t bc = sc->sc_bc; 308 bus_io_handle_t ioh = sc->sc_ioh; 309 struct uha_mscp *mscp; 310 u_char uhastat; 311 u_long mboxval; 312 313 #ifdef UHADEBUG 314 kprintf("%s: uhaintr ", sc->sc_dev.dv_xname); 315 #endif /*UHADEBUG */ 316 317 if ((bus_io_read_1(bc, ioh, U14_SINT) & U14_SDIP) == 0) 318 return (0); 319 320 for (;;) { 321 /* 322 * First get all the information and then 323 * acknowledge the interrupt 324 */ 325 uhastat = bus_io_read_1(bc, ioh, U14_SINT); 326 mboxval = bus_io_read_4(bc, ioh, U14_ICMPTR); 327 /* XXX Send an ABORT_ACK instead? */ 328 bus_io_write_1(bc, ioh, U14_SINT, U14_ICM_ACK); 329 330 #ifdef UHADEBUG 331 kprintf("status = 0x%x ", uhastat); 332 #endif /*UHADEBUG*/ 333 334 /* 335 * Process the completed operation 336 */ 337 mscp = uha_mscp_phys_kv(sc, mboxval); 338 if (!mscp) { 339 kprintf("%s: BAD MSCP RETURNED!\n", 340 sc->sc_dev.dv_xname); 341 continue; /* whatever it was, it'll timeout */ 342 } 343 344 untimeout(uha_timeout, mscp); 345 uha_done(sc, mscp); 346 347 if ((bus_io_read_1(bc, ioh, U14_SINT) & U14_SDIP) == 0) 348 return (1); 349 } 350 } 351 352 void 353 u14_init(sc) 354 struct uha_softc *sc; 355 { 356 bus_chipset_tag_t bc = sc->sc_bc; 357 bus_io_handle_t ioh = sc->sc_ioh; 358 359 /* make sure interrupts are enabled */ 360 #ifdef UHADEBUG 361 kprintf("u14_init: lmask=%02x, smask=%02x\n", 362 bus_io_read_1(bc, ioh, U14_LMASK), 363 bus_io_read_1(bc, ioh, U14_SMASK)); 364 #endif 365 bus_io_write_1(bc, ioh, U14_LMASK, 0xd1); /* XXX */ 366 bus_io_write_1(bc, ioh, U14_SMASK, 0x91); /* XXX */ 367 } 368
Indexes created Tue Sep 30 20:09:53 GMT 2025