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wdc_isa.c revision 1.1
      1  1.1  cgd /*	$NetBSD: wdc_isa.c,v 1.1 1998/01/14 23:42:07 cgd Exp $ */
      2  1.1  cgd 
      3  1.1  cgd /*
      4  1.1  cgd  * Copyright (c) 1994, 1995 Charles M. Hannum.  All rights reserved.
      5  1.1  cgd  *
      6  1.1  cgd  * DMA and multi-sector PIO handling are derived from code contributed by
      7  1.1  cgd  * Onno van der Linden.
      8  1.1  cgd  *
      9  1.1  cgd  * ISA attachment created by Christopher G. Demetriou.
     10  1.1  cgd  *
     11  1.1  cgd  * Redistribution and use in source and binary forms, with or without
     12  1.1  cgd  * modification, are permitted provided that the following conditions
     13  1.1  cgd  * are met:
     14  1.1  cgd  * 1. Redistributions of source code must retain the above copyright
     15  1.1  cgd  *    notice, this list of conditions and the following disclaimer.
     16  1.1  cgd  * 2. Redistributions in binary form must reproduce the above copyright
     17  1.1  cgd  *    notice, this list of conditions and the following disclaimer in the
     18  1.1  cgd  *    documentation and/or other materials provided with the distribution.
     19  1.1  cgd  * 3. All advertising materials mentioning features or use of this software
     20  1.1  cgd  *    must display the following acknowledgement:
     21  1.1  cgd  *	This product includes software developed by Charles M. Hannum.
     22  1.1  cgd  * 4. The name of the author may not be used to endorse or promote products
     23  1.1  cgd  *    derived from this software without specific prior written permission.
     24  1.1  cgd  *
     25  1.1  cgd  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
     26  1.1  cgd  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
     27  1.1  cgd  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
     28  1.1  cgd  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
     29  1.1  cgd  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
     30  1.1  cgd  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
     31  1.1  cgd  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
     32  1.1  cgd  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
     33  1.1  cgd  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
     34  1.1  cgd  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
     35  1.1  cgd  */
     36  1.1  cgd 
     37  1.1  cgd #include <sys/param.h>
     38  1.1  cgd #include <sys/systm.h>
     39  1.1  cgd #include <sys/kernel.h>
     40  1.1  cgd #include <sys/conf.h>
     41  1.1  cgd #include <sys/file.h>
     42  1.1  cgd #include <sys/stat.h>
     43  1.1  cgd #include <sys/ioctl.h>
     44  1.1  cgd #include <sys/buf.h>
     45  1.1  cgd #include <sys/uio.h>
     46  1.1  cgd #include <sys/malloc.h>
     47  1.1  cgd #include <sys/device.h>
     48  1.1  cgd #include <sys/disklabel.h>
     49  1.1  cgd #include <sys/disk.h>
     50  1.1  cgd #include <sys/syslog.h>
     51  1.1  cgd #include <sys/proc.h>
     52  1.1  cgd 
     53  1.1  cgd #include <machine/intr.h>
     54  1.1  cgd #include <machine/bus.h>
     55  1.1  cgd 
     56  1.1  cgd #include <dev/isa/isavar.h>
     57  1.1  cgd #include <dev/isa/isadmavar.h>
     58  1.1  cgd #include <dev/ic/wdcvar.h>
     59  1.1  cgd 
     60  1.1  cgd #define	WDC_ISA_REG_NPORTS	8
     61  1.1  cgd #define	WDC_ISA_AUXREG_OFFSET	0x206
     62  1.1  cgd #define	WDC_ISA_AUXREG_NPORTS	1
     63  1.1  cgd 
     64  1.1  cgd /*
     65  1.1  cgd  * XXX This code currently doesn't even try to allow 32-bit data port use.
     66  1.1  cgd  */
     67  1.1  cgd 
     68  1.1  cgd struct wdc_isa_softc {
     69  1.1  cgd 	struct wdc_softc sc_wdcdev;
     70  1.1  cgd 	struct wdc_attachment_data sc_ad;
     71  1.1  cgd 	void	*sc_ih;
     72  1.1  cgd 	int	sc_drq;
     73  1.1  cgd };
     74  1.1  cgd 
     75  1.1  cgd #ifdef __BROKEN_INDIRECT_CONFIG
     76  1.1  cgd int	wdc_isa_probe	__P((struct device *, void *, void *));
     77  1.1  cgd #else
     78  1.1  cgd int	wdc_isa_probe	__P((struct device *, struct cfdata *, void *));
     79  1.1  cgd #endif
     80  1.1  cgd void	wdc_isa_attach	__P((struct device *, struct device *, void *));
     81  1.1  cgd 
     82  1.1  cgd struct cfattach wdc_isa_ca = {
     83  1.1  cgd 	sizeof(struct wdc_isa_softc), wdc_isa_probe, wdc_isa_attach
     84  1.1  cgd };
     85  1.1  cgd 
     86  1.1  cgd static void	wdc_isa_dma_setup __P((void *));
     87  1.1  cgd static void	wdc_isa_dma_start __P((void *, void *, size_t, int));
     88  1.1  cgd static void	wdc_isa_dma_finish __P((void *));
     89  1.1  cgd 
     90  1.1  cgd int
     91  1.1  cgd wdc_isa_probe(parent, match, aux)
     92  1.1  cgd 	struct device *parent;
     93  1.1  cgd #ifdef __BROKEN_INDIRECT_CONFIG
     94  1.1  cgd 	void *match;
     95  1.1  cgd #else
     96  1.1  cgd 	struct cfdata *match;
     97  1.1  cgd #endif
     98  1.1  cgd 	void *aux;
     99  1.1  cgd {
    100  1.1  cgd #if 0 /* XXX memset */
    101  1.1  cgd 	struct wdc_attachment_data ad = { 0 };
    102  1.1  cgd #else /* XXX memset */
    103  1.1  cgd 	struct wdc_attachment_data ad;
    104  1.1  cgd #endif /* XXX memset */
    105  1.1  cgd 	struct isa_attach_args *ia = aux;
    106  1.1  cgd 	int result = 0;
    107  1.1  cgd 
    108  1.1  cgd #if 0 /* XXX memset */
    109  1.1  cgd #else /* XXX memset */
    110  1.1  cgd 	bzero(&ad, sizeof ad);
    111  1.1  cgd #endif /* XXX memset */
    112  1.1  cgd 	ad.iot = ia->ia_iot;
    113  1.1  cgd 	if (bus_space_map(ad.iot, ia->ia_iobase, WDC_ISA_REG_NPORTS, 0,
    114  1.1  cgd 	    &ad.ioh))
    115  1.1  cgd 		goto out;
    116  1.1  cgd 
    117  1.1  cgd 	ad.auxiot = ia->ia_iot;
    118  1.1  cgd 	if (bus_space_map(ad.auxiot, ia->ia_iobase + WDC_ISA_AUXREG_OFFSET,
    119  1.1  cgd 	    WDC_ISA_AUXREG_NPORTS, 0, &ad.auxioh))
    120  1.1  cgd 		goto outunmap;
    121  1.1  cgd 
    122  1.1  cgd 	result = wdcprobe(&ad);
    123  1.1  cgd 	if (result) {
    124  1.1  cgd 		ia->ia_iosize = WDC_ISA_REG_NPORTS;
    125  1.1  cgd 		ia->ia_msize = 0;
    126  1.1  cgd 	}
    127  1.1  cgd 
    128  1.1  cgd outunmap:
    129  1.1  cgd 	bus_space_unmap(ad.auxiot, ad.auxioh, WDC_ISA_AUXREG_NPORTS);
    130  1.1  cgd out:
    131  1.1  cgd 	bus_space_unmap(ad.iot, ad.ioh, WDC_ISA_REG_NPORTS);
    132  1.1  cgd 	return (result);
    133  1.1  cgd }
    134  1.1  cgd 
    135  1.1  cgd void
    136  1.1  cgd wdc_isa_attach(parent, self, aux)
    137  1.1  cgd 	struct device *parent, *self;
    138  1.1  cgd 	void *aux;
    139  1.1  cgd {
    140  1.1  cgd 	struct wdc_isa_softc *sc = (struct wdc_isa_softc *)self;
    141  1.1  cgd 	struct isa_attach_args *ia = aux;
    142  1.1  cgd 
    143  1.1  cgd 	bzero(&sc->sc_ad, sizeof sc->sc_ad);
    144  1.1  cgd 	sc->sc_ad.iot = ia->ia_iot;
    145  1.1  cgd 	sc->sc_ad.auxiot = ia->ia_iot;
    146  1.1  cgd 	if (bus_space_map(sc->sc_ad.iot, ia->ia_iobase, WDC_ISA_REG_NPORTS, 0,
    147  1.1  cgd 	      &sc->sc_ad.ioh) ||
    148  1.1  cgd 	    bus_space_map(sc->sc_ad.auxiot,
    149  1.1  cgd 	      ia->ia_iobase + WDC_ISA_AUXREG_OFFSET, WDC_ISA_AUXREG_NPORTS,
    150  1.1  cgd 	      0, &sc->sc_ad.auxioh)) {
    151  1.1  cgd 		printf(": couldn't map registers\n");
    152  1.1  cgd 		panic("wdc_isa_attach: couldn't map registers\n");
    153  1.1  cgd 	}
    154  1.1  cgd 
    155  1.1  cgd 	sc->sc_ih = isa_intr_establish(ia->ia_ic, ia->ia_irq, IST_EDGE,
    156  1.1  cgd 	    IPL_BIO, wdcintr, sc);
    157  1.1  cgd 
    158  1.1  cgd 	if (ia->ia_drq != DRQUNK) {
    159  1.1  cgd 		sc->sc_drq = ia->ia_drq;
    160  1.1  cgd 
    161  1.1  cgd 		sc->sc_ad.cap |= WDC_CAPABILITY_DMA;
    162  1.1  cgd 		sc->sc_ad.dma_setup = &wdc_isa_dma_setup;
    163  1.1  cgd 		sc->sc_ad.dma_start = &wdc_isa_dma_start;
    164  1.1  cgd 		sc->sc_ad.dma_finish = &wdc_isa_dma_finish;
    165  1.1  cgd 	}
    166  1.1  cgd 
    167  1.1  cgd 	wdcattach(&sc->sc_wdcdev, &sc->sc_ad);
    168  1.1  cgd }
    169  1.1  cgd 
    170  1.1  cgd static void
    171  1.1  cgd wdc_isa_dma_setup(scv)
    172  1.1  cgd 	void *scv;
    173  1.1  cgd {
    174  1.1  cgd 	struct wdc_isa_softc *sc = scv;
    175  1.1  cgd 
    176  1.1  cgd 	if (isa_dmamap_create(sc->sc_wdcdev.sc_dev.dv_parent, sc->sc_drq,
    177  1.1  cgd 	    MAXPHYS, BUS_DMA_NOWAIT|BUS_DMA_ALLOCNOW)) {
    178  1.1  cgd 		printf("%s: can't create map for drq %d\n",
    179  1.1  cgd 		    sc->sc_wdcdev.sc_dev.dv_xname, sc->sc_drq);
    180  1.1  cgd 		sc->sc_ad.cap &= ~WDC_CAPABILITY_DMA;
    181  1.1  cgd 	}
    182  1.1  cgd }
    183  1.1  cgd 
    184  1.1  cgd static void
    185  1.1  cgd wdc_isa_dma_start(scv, buf, size, read)
    186  1.1  cgd 	void *scv, *buf;
    187  1.1  cgd 	size_t size;
    188  1.1  cgd 	int read;
    189  1.1  cgd {
    190  1.1  cgd 	struct wdc_isa_softc *sc = scv;
    191  1.1  cgd 
    192  1.1  cgd 	isa_dmastart(sc->sc_wdcdev.sc_dev.dv_parent, sc->sc_drq, buf,
    193  1.1  cgd 	    size, NULL, read ? DMAMODE_READ : DMAMODE_WRITE,
    194  1.1  cgd 	    BUS_DMA_NOWAIT);
    195  1.1  cgd }
    196  1.1  cgd 
    197  1.1  cgd static void
    198  1.1  cgd wdc_isa_dma_finish(scv)
    199  1.1  cgd 	void *scv;
    200  1.1  cgd {
    201  1.1  cgd 	struct wdc_isa_softc *sc = scv;
    202  1.1  cgd 
    203  1.1  cgd 	isa_dmadone(sc->sc_wdcdev.sc_dev.dv_parent, sc->sc_drq);
    204  1.1  cgd }
    205