wdc_isa.c revision 1.6.2.2 1 1.6.2.2 bouyer /* $NetBSD: wdc_isa.c,v 1.6.2.2 1998/06/09 13:04:24 bouyer Exp $ */
2 1.1 cgd
3 1.1 cgd /*
4 1.1 cgd * Copyright (c) 1994, 1995 Charles M. Hannum. All rights reserved.
5 1.1 cgd *
6 1.1 cgd * DMA and multi-sector PIO handling are derived from code contributed by
7 1.1 cgd * Onno van der Linden.
8 1.1 cgd *
9 1.1 cgd * ISA attachment created by Christopher G. Demetriou.
10 1.1 cgd *
11 1.1 cgd * Redistribution and use in source and binary forms, with or without
12 1.1 cgd * modification, are permitted provided that the following conditions
13 1.1 cgd * are met:
14 1.1 cgd * 1. Redistributions of source code must retain the above copyright
15 1.1 cgd * notice, this list of conditions and the following disclaimer.
16 1.1 cgd * 2. Redistributions in binary form must reproduce the above copyright
17 1.1 cgd * notice, this list of conditions and the following disclaimer in the
18 1.1 cgd * documentation and/or other materials provided with the distribution.
19 1.1 cgd * 3. All advertising materials mentioning features or use of this software
20 1.1 cgd * must display the following acknowledgement:
21 1.1 cgd * This product includes software developed by Charles M. Hannum.
22 1.1 cgd * 4. The name of the author may not be used to endorse or promote products
23 1.1 cgd * derived from this software without specific prior written permission.
24 1.1 cgd *
25 1.1 cgd * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
26 1.1 cgd * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
27 1.1 cgd * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
28 1.1 cgd * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
29 1.1 cgd * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
30 1.1 cgd * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
31 1.1 cgd * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
32 1.1 cgd * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
33 1.1 cgd * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
34 1.1 cgd * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
35 1.1 cgd */
36 1.1 cgd
37 1.3 mycroft #include <sys/types.h>
38 1.1 cgd #include <sys/param.h>
39 1.1 cgd #include <sys/systm.h>
40 1.1 cgd #include <sys/device.h>
41 1.6.2.1 bouyer #include <sys/malloc.h>
42 1.1 cgd
43 1.3 mycroft #include <machine/bus.h>
44 1.1 cgd #include <machine/intr.h>
45 1.1 cgd
46 1.1 cgd #include <dev/isa/isavar.h>
47 1.1 cgd #include <dev/isa/isadmavar.h>
48 1.3 mycroft
49 1.6.2.1 bouyer #include <dev/ata/atavar.h>
50 1.1 cgd #include <dev/ic/wdcvar.h>
51 1.1 cgd
52 1.1 cgd #define WDC_ISA_REG_NPORTS 8
53 1.1 cgd #define WDC_ISA_AUXREG_OFFSET 0x206
54 1.5 drochner #define WDC_ISA_AUXREG_NPORTS 1 /* XXX "fdc" owns ports 0x3f7/0x377 */
55 1.1 cgd
56 1.1 cgd /*
57 1.1 cgd * XXX This code currently doesn't even try to allow 32-bit data port use.
58 1.1 cgd */
59 1.1 cgd
60 1.1 cgd struct wdc_isa_softc {
61 1.6.2.1 bouyer struct wdc_softc sc_wdcdev;
62 1.6.2.1 bouyer struct channel_softc wdc_channel;
63 1.6.2.2 bouyer isa_chipset_tag_t sc_ic;
64 1.1 cgd void *sc_ih;
65 1.1 cgd int sc_drq;
66 1.1 cgd };
67 1.1 cgd
68 1.1 cgd int wdc_isa_probe __P((struct device *, struct cfdata *, void *));
69 1.1 cgd void wdc_isa_attach __P((struct device *, struct device *, void *));
70 1.1 cgd
71 1.1 cgd struct cfattach wdc_isa_ca = {
72 1.1 cgd sizeof(struct wdc_isa_softc), wdc_isa_probe, wdc_isa_attach
73 1.1 cgd };
74 1.1 cgd
75 1.6.2.1 bouyer static void wdc_isa_dma_setup __P((struct wdc_isa_softc *));
76 1.6.2.1 bouyer static int wdc_isa_dma_init __P((void*, int, int, void *, size_t, int));
77 1.6.2.1 bouyer static void wdc_isa_dma_start __P((void*, int, int, int));
78 1.6.2.1 bouyer static int wdc_isa_dma_finish __P((void*, int, int, int));
79 1.1 cgd
80 1.1 cgd int
81 1.1 cgd wdc_isa_probe(parent, match, aux)
82 1.1 cgd struct device *parent;
83 1.1 cgd struct cfdata *match;
84 1.1 cgd void *aux;
85 1.1 cgd {
86 1.1 cgd #if 0 /* XXX memset */
87 1.6.2.1 bouyer struct channel_softc ch = { 0 };
88 1.1 cgd #else /* XXX memset */
89 1.6.2.1 bouyer struct channel_softc ch;
90 1.1 cgd #endif /* XXX memset */
91 1.1 cgd struct isa_attach_args *ia = aux;
92 1.1 cgd int result = 0;
93 1.1 cgd
94 1.1 cgd #if 0 /* XXX memset */
95 1.1 cgd #else /* XXX memset */
96 1.6.2.1 bouyer bzero(&ch, sizeof ch);
97 1.1 cgd #endif /* XXX memset */
98 1.6.2.1 bouyer ch.cmd_iot = ia->ia_iot;
99 1.6.2.1 bouyer if (bus_space_map(ch.cmd_iot, ia->ia_iobase, WDC_ISA_REG_NPORTS, 0,
100 1.6.2.1 bouyer &ch.cmd_ioh))
101 1.1 cgd goto out;
102 1.1 cgd
103 1.6.2.1 bouyer ch.ctl_iot = ia->ia_iot;
104 1.6.2.1 bouyer if (bus_space_map(ch.ctl_iot, ia->ia_iobase + WDC_ISA_AUXREG_OFFSET,
105 1.6.2.1 bouyer WDC_ISA_AUXREG_NPORTS, 0, &ch.ctl_ioh))
106 1.1 cgd goto outunmap;
107 1.1 cgd
108 1.6.2.1 bouyer result = wdcprobe(&ch);
109 1.1 cgd if (result) {
110 1.1 cgd ia->ia_iosize = WDC_ISA_REG_NPORTS;
111 1.1 cgd ia->ia_msize = 0;
112 1.1 cgd }
113 1.1 cgd
114 1.6.2.1 bouyer bus_space_unmap(ch.ctl_iot, ch.ctl_ioh, WDC_ISA_AUXREG_NPORTS);
115 1.1 cgd outunmap:
116 1.6.2.1 bouyer bus_space_unmap(ch.cmd_iot, ch.cmd_ioh, WDC_ISA_REG_NPORTS);
117 1.1 cgd out:
118 1.1 cgd return (result);
119 1.1 cgd }
120 1.1 cgd
121 1.1 cgd void
122 1.1 cgd wdc_isa_attach(parent, self, aux)
123 1.1 cgd struct device *parent, *self;
124 1.1 cgd void *aux;
125 1.1 cgd {
126 1.4 mycroft struct wdc_isa_softc *sc = (void *)self;
127 1.1 cgd struct isa_attach_args *ia = aux;
128 1.1 cgd
129 1.4 mycroft printf("\n");
130 1.4 mycroft
131 1.6.2.1 bouyer sc->wdc_channel.cmd_iot = ia->ia_iot;
132 1.6.2.1 bouyer sc->wdc_channel.ctl_iot = ia->ia_iot;
133 1.6.2.2 bouyer sc->sc_ic = ia->ia_ic;
134 1.6.2.1 bouyer if (bus_space_map(sc->wdc_channel.cmd_iot, ia->ia_iobase,
135 1.6.2.1 bouyer WDC_ISA_REG_NPORTS, 0, &sc->wdc_channel.cmd_ioh) ||
136 1.6.2.1 bouyer bus_space_map(sc->wdc_channel.ctl_iot,
137 1.1 cgd ia->ia_iobase + WDC_ISA_AUXREG_OFFSET, WDC_ISA_AUXREG_NPORTS,
138 1.6.2.1 bouyer 0, &sc->wdc_channel.ctl_ioh)) {
139 1.4 mycroft printf("%s: couldn't map registers\n",
140 1.4 mycroft sc->sc_wdcdev.sc_dev.dv_xname);
141 1.1 cgd }
142 1.1 cgd
143 1.1 cgd sc->sc_ih = isa_intr_establish(ia->ia_ic, ia->ia_irq, IST_EDGE,
144 1.6.2.1 bouyer IPL_BIO, wdcintr, &sc->wdc_channel);
145 1.1 cgd
146 1.1 cgd if (ia->ia_drq != DRQUNK) {
147 1.1 cgd sc->sc_drq = ia->ia_drq;
148 1.1 cgd
149 1.6.2.1 bouyer sc->sc_wdcdev.cap |= WDC_CAPABILITY_DMA;
150 1.6.2.1 bouyer sc->sc_wdcdev.dma_arg = sc;
151 1.6.2.1 bouyer sc->sc_wdcdev.dma_init = wdc_isa_dma_init;
152 1.6.2.1 bouyer sc->sc_wdcdev.dma_start = wdc_isa_dma_start;
153 1.6.2.1 bouyer sc->sc_wdcdev.dma_finish = wdc_isa_dma_finish;
154 1.6.2.1 bouyer wdc_isa_dma_setup(sc);
155 1.6 cgd }
156 1.6.2.1 bouyer sc->sc_wdcdev.cap |= WDC_CAPABILITY_DATA32;
157 1.6.2.1 bouyer sc->sc_wdcdev.pio_mode = 0;
158 1.6.2.1 bouyer sc->sc_wdcdev.channels = &sc->wdc_channel;
159 1.6.2.1 bouyer sc->sc_wdcdev.nchannels = 1;
160 1.6.2.1 bouyer sc->wdc_channel.channel = 0;
161 1.6.2.1 bouyer sc->wdc_channel.wdc = &sc->sc_wdcdev;
162 1.6.2.1 bouyer sc->wdc_channel.ch_queue = malloc(sizeof(struct channel_queue),
163 1.6.2.1 bouyer M_DEVBUF, M_NOWAIT);
164 1.6.2.1 bouyer if (sc->wdc_channel.ch_queue == NULL) {
165 1.6.2.1 bouyer printf("%s: can't allocate memory for command queue",
166 1.6.2.1 bouyer sc->sc_wdcdev.sc_dev.dv_xname);
167 1.6.2.1 bouyer return;
168 1.6.2.1 bouyer }
169 1.6.2.1 bouyer wdcattach(&sc->wdc_channel);
170 1.1 cgd }
171 1.1 cgd
172 1.1 cgd static void
173 1.6.2.1 bouyer wdc_isa_dma_setup(sc)
174 1.6.2.1 bouyer struct wdc_isa_softc *sc;
175 1.1 cgd {
176 1.6.2.2 bouyer if (isa_dmamap_create(sc->sc_ic, sc->sc_drq,
177 1.1 cgd MAXPHYS, BUS_DMA_NOWAIT|BUS_DMA_ALLOCNOW)) {
178 1.1 cgd printf("%s: can't create map for drq %d\n",
179 1.1 cgd sc->sc_wdcdev.sc_dev.dv_xname, sc->sc_drq);
180 1.6.2.1 bouyer sc->sc_wdcdev.cap &= ~WDC_CAPABILITY_DMA;
181 1.1 cgd }
182 1.1 cgd }
183 1.1 cgd
184 1.6.2.1 bouyer static int
185 1.6.2.1 bouyer wdc_isa_dma_init(v, channel, drive, databuf, datalen, read)
186 1.6.2.1 bouyer void *v;
187 1.6.2.1 bouyer void *databuf;
188 1.6.2.1 bouyer size_t datalen;
189 1.1 cgd int read;
190 1.1 cgd {
191 1.6.2.1 bouyer struct wdc_isa_softc *sc = v;
192 1.1 cgd
193 1.6.2.2 bouyer isa_dmastart(sc->sc_ic, sc->sc_drq, databuf,
194 1.6.2.1 bouyer datalen, NULL, read ? DMAMODE_READ : DMAMODE_WRITE,
195 1.1 cgd BUS_DMA_NOWAIT);
196 1.6.2.1 bouyer return 0;
197 1.1 cgd }
198 1.1 cgd
199 1.1 cgd static void
200 1.6.2.1 bouyer wdc_isa_dma_start(v, channel, drive, read)
201 1.6.2.1 bouyer void *v;
202 1.6.2.1 bouyer int channel, drive;
203 1.6.2.1 bouyer {
204 1.6.2.1 bouyer /* nothing to do */
205 1.6.2.1 bouyer }
206 1.6.2.1 bouyer
207 1.6.2.1 bouyer static int
208 1.6.2.1 bouyer wdc_isa_dma_finish(v, channel, drive, read)
209 1.6.2.1 bouyer void *v;
210 1.6.2.1 bouyer int channel, drive;
211 1.6.2.1 bouyer int read;
212 1.1 cgd {
213 1.6.2.1 bouyer struct wdc_isa_softc *sc = v;
214 1.1 cgd
215 1.6.2.2 bouyer isa_dmadone(sc->sc_ic, sc->sc_drq);
216 1.6.2.1 bouyer return 0;
217 1.1 cgd }
218