wdc_isa.c revision 1.10
1 /* $NetBSD: wdc_isa.c,v 1.10 1998/10/12 16:09:19 bouyer Exp $ */ 2 3 /*- 4 * Copyright (c) 1998 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Charles M. Hannum and by Onno van der Linden. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 #include <sys/types.h> 40 #include <sys/param.h> 41 #include <sys/systm.h> 42 #include <sys/device.h> 43 #include <sys/malloc.h> 44 45 #include <machine/bus.h> 46 #include <machine/intr.h> 47 48 #include <dev/isa/isavar.h> 49 #include <dev/isa/isadmavar.h> 50 51 #include <dev/ata/atavar.h> 52 #include <dev/ic/wdcvar.h> 53 54 #define WDC_ISA_REG_NPORTS 8 55 #define WDC_ISA_AUXREG_OFFSET 0x206 56 #define WDC_ISA_AUXREG_NPORTS 1 /* XXX "fdc" owns ports 0x3f7/0x377 */ 57 58 /* 59 * XXX This code currently doesn't even try to allow 32-bit data port use. 60 */ 61 62 struct wdc_isa_softc { 63 struct wdc_softc sc_wdcdev; 64 struct channel_softc wdc_channel; 65 isa_chipset_tag_t sc_ic; 66 void *sc_ih; 67 int sc_drq; 68 }; 69 70 int wdc_isa_probe __P((struct device *, struct cfdata *, void *)); 71 void wdc_isa_attach __P((struct device *, struct device *, void *)); 72 73 struct cfattach wdc_isa_ca = { 74 sizeof(struct wdc_isa_softc), wdc_isa_probe, wdc_isa_attach 75 }; 76 77 static void wdc_isa_dma_setup __P((struct wdc_isa_softc *)); 78 static int wdc_isa_dma_init __P((void*, int, int, void *, size_t, int)); 79 static void wdc_isa_dma_start __P((void*, int, int, int)); 80 static int wdc_isa_dma_finish __P((void*, int, int, int)); 81 82 int 83 wdc_isa_probe(parent, match, aux) 84 struct device *parent; 85 struct cfdata *match; 86 void *aux; 87 { 88 struct channel_softc ch = { 0 }; 89 struct isa_attach_args *ia = aux; 90 int result = 0; 91 92 ch.cmd_iot = ia->ia_iot; 93 if (bus_space_map(ch.cmd_iot, ia->ia_iobase, WDC_ISA_REG_NPORTS, 0, 94 &ch.cmd_ioh)) 95 goto out; 96 97 ch.ctl_iot = ia->ia_iot; 98 if (bus_space_map(ch.ctl_iot, ia->ia_iobase + WDC_ISA_AUXREG_OFFSET, 99 WDC_ISA_AUXREG_NPORTS, 0, &ch.ctl_ioh)) 100 goto outunmap; 101 102 result = wdcprobe(&ch); 103 if (result) { 104 ia->ia_iosize = WDC_ISA_REG_NPORTS; 105 ia->ia_msize = 0; 106 } 107 108 bus_space_unmap(ch.ctl_iot, ch.ctl_ioh, WDC_ISA_AUXREG_NPORTS); 109 outunmap: 110 bus_space_unmap(ch.cmd_iot, ch.cmd_ioh, WDC_ISA_REG_NPORTS); 111 out: 112 return (result); 113 } 114 115 void 116 wdc_isa_attach(parent, self, aux) 117 struct device *parent, *self; 118 void *aux; 119 { 120 struct wdc_isa_softc *sc = (void *)self; 121 struct isa_attach_args *ia = aux; 122 123 printf("\n"); 124 125 sc->wdc_channel.cmd_iot = ia->ia_iot; 126 sc->wdc_channel.ctl_iot = ia->ia_iot; 127 sc->sc_ic = ia->ia_ic; 128 if (bus_space_map(sc->wdc_channel.cmd_iot, ia->ia_iobase, 129 WDC_ISA_REG_NPORTS, 0, &sc->wdc_channel.cmd_ioh) || 130 bus_space_map(sc->wdc_channel.ctl_iot, 131 ia->ia_iobase + WDC_ISA_AUXREG_OFFSET, WDC_ISA_AUXREG_NPORTS, 132 0, &sc->wdc_channel.ctl_ioh)) { 133 printf("%s: couldn't map registers\n", 134 sc->sc_wdcdev.sc_dev.dv_xname); 135 } 136 sc->wdc_channel.data32iot = sc->wdc_channel.cmd_iot; 137 sc->wdc_channel.data32ioh = sc->wdc_channel.cmd_ioh; 138 139 sc->sc_ih = isa_intr_establish(ia->ia_ic, ia->ia_irq, IST_EDGE, 140 IPL_BIO, wdcintr, &sc->wdc_channel); 141 142 if (ia->ia_drq != DRQUNK) { 143 sc->sc_drq = ia->ia_drq; 144 145 sc->sc_wdcdev.cap |= WDC_CAPABILITY_DMA; 146 sc->sc_wdcdev.dma_arg = sc; 147 sc->sc_wdcdev.dma_init = wdc_isa_dma_init; 148 sc->sc_wdcdev.dma_start = wdc_isa_dma_start; 149 sc->sc_wdcdev.dma_finish = wdc_isa_dma_finish; 150 wdc_isa_dma_setup(sc); 151 } 152 sc->sc_wdcdev.cap |= WDC_CAPABILITY_DATA16 | WDC_CAPABILITY_DATA32; 153 sc->sc_wdcdev.pio_mode = 0; 154 sc->sc_wdcdev.channels = &sc->wdc_channel; 155 sc->sc_wdcdev.nchannels = 1; 156 sc->wdc_channel.channel = 0; 157 sc->wdc_channel.wdc = &sc->sc_wdcdev; 158 sc->wdc_channel.ch_queue = malloc(sizeof(struct channel_queue), 159 M_DEVBUF, M_NOWAIT); 160 if (sc->wdc_channel.ch_queue == NULL) { 161 printf("%s: can't allocate memory for command queue", 162 sc->sc_wdcdev.sc_dev.dv_xname); 163 return; 164 } 165 wdcattach(&sc->wdc_channel); 166 } 167 168 static void 169 wdc_isa_dma_setup(sc) 170 struct wdc_isa_softc *sc; 171 { 172 if (isa_dmamap_create(sc->sc_ic, sc->sc_drq, 173 MAXPHYS, BUS_DMA_NOWAIT|BUS_DMA_ALLOCNOW)) { 174 printf("%s: can't create map for drq %d\n", 175 sc->sc_wdcdev.sc_dev.dv_xname, sc->sc_drq); 176 sc->sc_wdcdev.cap &= ~WDC_CAPABILITY_DMA; 177 } 178 } 179 180 static int 181 wdc_isa_dma_init(v, channel, drive, databuf, datalen, read) 182 void *v; 183 void *databuf; 184 size_t datalen; 185 int read; 186 { 187 struct wdc_isa_softc *sc = v; 188 189 isa_dmastart(sc->sc_ic, sc->sc_drq, databuf, 190 datalen, NULL, read ? DMAMODE_READ : DMAMODE_WRITE, 191 BUS_DMA_NOWAIT); 192 return 0; 193 } 194 195 static void 196 wdc_isa_dma_start(v, channel, drive, read) 197 void *v; 198 int channel, drive; 199 { 200 /* nothing to do */ 201 } 202 203 static int 204 wdc_isa_dma_finish(v, channel, drive, read) 205 void *v; 206 int channel, drive; 207 int read; 208 { 209 struct wdc_isa_softc *sc = v; 210 211 isa_dmadone(sc->sc_ic, sc->sc_drq); 212 return 0; 213 } 214
Indexes created Tue Sep 30 20:09:53 GMT 2025