wdc_isa.c revision 1.13 1 /* $NetBSD: wdc_isa.c,v 1.13 1999/02/22 03:24:33 mycroft Exp $ */
2
3 /*-
4 * Copyright (c) 1998 The NetBSD Foundation, Inc.
5 * All rights reserved.
6 *
7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Charles M. Hannum and by Onno van der Linden.
9 *
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
12 * are met:
13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 * notice, this list of conditions and the following disclaimer in the
17 * documentation and/or other materials provided with the distribution.
18 * 3. All advertising materials mentioning features or use of this software
19 * must display the following acknowledgement:
20 * This product includes software developed by the NetBSD
21 * Foundation, Inc. and its contributors.
22 * 4. Neither the name of The NetBSD Foundation nor the names of its
23 * contributors may be used to endorse or promote products derived
24 * from this software without specific prior written permission.
25 *
26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
36 * POSSIBILITY OF SUCH DAMAGE.
37 */
38
39 #include <sys/types.h>
40 #include <sys/param.h>
41 #include <sys/systm.h>
42 #include <sys/device.h>
43 #include <sys/malloc.h>
44
45 #include <machine/bus.h>
46 #include <machine/intr.h>
47
48 #include <dev/isa/isavar.h>
49 #include <dev/isa/isadmavar.h>
50
51 #include <dev/ata/atavar.h>
52 #include <dev/ic/wdcvar.h>
53
54 #define WDC_ISA_REG_NPORTS 8
55 #define WDC_ISA_AUXREG_OFFSET 0x206
56 #define WDC_ISA_AUXREG_NPORTS 1 /* XXX "fdc" owns ports 0x3f7/0x377 */
57
58 /*
59 * XXX This code currently doesn't even try to allow 32-bit data port use.
60 */
61
62 struct wdc_isa_softc {
63 struct wdc_softc sc_wdcdev;
64 struct channel_softc *wdc_chanptr;
65 struct channel_softc wdc_channel;
66 isa_chipset_tag_t sc_ic;
67 void *sc_ih;
68 int sc_drq;
69 };
70
71 int wdc_isa_probe __P((struct device *, struct cfdata *, void *));
72 void wdc_isa_attach __P((struct device *, struct device *, void *));
73
74 struct cfattach wdc_isa_ca = {
75 sizeof(struct wdc_isa_softc), wdc_isa_probe, wdc_isa_attach
76 };
77
78 static void wdc_isa_dma_setup __P((struct wdc_isa_softc *));
79 static int wdc_isa_dma_init __P((void*, int, int, void *, size_t, int));
80 static void wdc_isa_dma_start __P((void*, int, int, int));
81 static int wdc_isa_dma_finish __P((void*, int, int, int));
82
83 int
84 wdc_isa_probe(parent, match, aux)
85 struct device *parent;
86 struct cfdata *match;
87 void *aux;
88 {
89 struct channel_softc ch = { 0 };
90 struct isa_attach_args *ia = aux;
91 int result = 0;
92
93 ch.cmd_iot = ia->ia_iot;
94 if (bus_space_map(ch.cmd_iot, ia->ia_iobase, WDC_ISA_REG_NPORTS, 0,
95 &ch.cmd_ioh))
96 goto out;
97
98 ch.ctl_iot = ia->ia_iot;
99 if (bus_space_map(ch.ctl_iot, ia->ia_iobase + WDC_ISA_AUXREG_OFFSET,
100 WDC_ISA_AUXREG_NPORTS, 0, &ch.ctl_ioh))
101 goto outunmap;
102
103 result = wdcprobe(&ch);
104 if (result) {
105 ia->ia_iosize = WDC_ISA_REG_NPORTS;
106 ia->ia_msize = 0;
107 }
108
109 bus_space_unmap(ch.ctl_iot, ch.ctl_ioh, WDC_ISA_AUXREG_NPORTS);
110 outunmap:
111 bus_space_unmap(ch.cmd_iot, ch.cmd_ioh, WDC_ISA_REG_NPORTS);
112 out:
113 return (result);
114 }
115
116 void
117 wdc_isa_attach(parent, self, aux)
118 struct device *parent, *self;
119 void *aux;
120 {
121 struct wdc_isa_softc *sc = (void *)self;
122 struct isa_attach_args *ia = aux;
123
124 printf("\n");
125
126 sc->wdc_channel.cmd_iot = ia->ia_iot;
127 sc->wdc_channel.ctl_iot = ia->ia_iot;
128 sc->sc_ic = ia->ia_ic;
129 if (bus_space_map(sc->wdc_channel.cmd_iot, ia->ia_iobase,
130 WDC_ISA_REG_NPORTS, 0, &sc->wdc_channel.cmd_ioh) ||
131 bus_space_map(sc->wdc_channel.ctl_iot,
132 ia->ia_iobase + WDC_ISA_AUXREG_OFFSET, WDC_ISA_AUXREG_NPORTS,
133 0, &sc->wdc_channel.ctl_ioh)) {
134 printf("%s: couldn't map registers\n",
135 sc->sc_wdcdev.sc_dev.dv_xname);
136 }
137 sc->wdc_channel.data32iot = sc->wdc_channel.cmd_iot;
138 sc->wdc_channel.data32ioh = sc->wdc_channel.cmd_ioh;
139
140 sc->sc_ih = isa_intr_establish(ia->ia_ic, ia->ia_irq, IST_EDGE,
141 IPL_BIO, wdcintr, &sc->wdc_channel);
142
143 if (ia->ia_drq != DRQUNK) {
144 sc->sc_drq = ia->ia_drq;
145
146 sc->sc_wdcdev.cap |= WDC_CAPABILITY_DMA;
147 sc->sc_wdcdev.dma_arg = sc;
148 sc->sc_wdcdev.dma_init = wdc_isa_dma_init;
149 sc->sc_wdcdev.dma_start = wdc_isa_dma_start;
150 sc->sc_wdcdev.dma_finish = wdc_isa_dma_finish;
151 wdc_isa_dma_setup(sc);
152 }
153 sc->sc_wdcdev.cap |= WDC_CAPABILITY_DATA16 | WDC_CAPABILITY_DATA32;
154 sc->sc_wdcdev.PIO_cap = 0;
155 sc->wdc_chanptr = &sc->wdc_channel;
156 sc->sc_wdcdev.channels = &sc->wdc_chanptr;
157 sc->sc_wdcdev.nchannels = 1;
158 sc->wdc_channel.channel = 0;
159 sc->wdc_channel.wdc = &sc->sc_wdcdev;
160 sc->wdc_channel.ch_queue = malloc(sizeof(struct channel_queue),
161 M_DEVBUF, M_NOWAIT);
162 if (sc->wdc_channel.ch_queue == NULL) {
163 printf("%s: can't allocate memory for command queue",
164 sc->sc_wdcdev.sc_dev.dv_xname);
165 return;
166 }
167 wdcattach(&sc->wdc_channel);
168 }
169
170 static void
171 wdc_isa_dma_setup(sc)
172 struct wdc_isa_softc *sc;
173 {
174 if (isa_dmamap_create(sc->sc_ic, sc->sc_drq,
175 MAXPHYS, BUS_DMA_NOWAIT|BUS_DMA_ALLOCNOW)) {
176 printf("%s: can't create map for drq %d\n",
177 sc->sc_wdcdev.sc_dev.dv_xname, sc->sc_drq);
178 sc->sc_wdcdev.cap &= ~WDC_CAPABILITY_DMA;
179 }
180 }
181
182 static int
183 wdc_isa_dma_init(v, channel, drive, databuf, datalen, read)
184 void *v;
185 void *databuf;
186 size_t datalen;
187 int read;
188 {
189 struct wdc_isa_softc *sc = v;
190
191 isa_dmastart(sc->sc_ic, sc->sc_drq, databuf, datalen, NULL,
192 (read ? DMAMODE_READ : DMAMODE_WRITE) | DMAMODE_DEMAND,
193 BUS_DMA_NOWAIT);
194 return 0;
195 }
196
197 static void
198 wdc_isa_dma_start(v, channel, drive, read)
199 void *v;
200 int channel, drive;
201 {
202 /* nothing to do */
203 }
204
205 static int
206 wdc_isa_dma_finish(v, channel, drive, read)
207 void *v;
208 int channel, drive;
209 int read;
210 {
211 struct wdc_isa_softc *sc = v;
212
213 isa_dmadone(sc->sc_ic, sc->sc_drq);
214 return 0;
215 }
216